1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIEliminationUtils.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 #include "llvm/Function.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/ADT/SmallPtrSet.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/ADT/Statistic.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Compiler.h"
33 #include "llvm/Support/Debug.h"
38 DisableEdgeSplitting("disable-phi-elim-edge-splitting", cl::init(false),
39 cl::Hidden, cl::desc("Disable critical edge splitting "
40 "during PHI elimination"));
43 class PHIElimination : public MachineFunctionPass {
44 MachineRegisterInfo *MRI; // Machine register information
47 static char ID; // Pass identification, replacement for typeid
48 PHIElimination() : MachineFunctionPass(ID) {
49 initializePHIEliminationPass(*PassRegistry::getPassRegistry());
52 virtual bool runOnMachineFunction(MachineFunction &Fn);
53 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
56 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
57 /// in predecessor basic blocks.
59 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
60 void LowerAtomicPHINode(MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator AfterPHIsIt);
63 /// analyzePHINodes - Gather information about the PHI nodes in
64 /// here. In particular, we want to map the number of uses of a virtual
65 /// register which is used in a PHI node. We map that to the BB the
66 /// vreg is coming from. This is used later to determine when the vreg
67 /// is killed in the BB.
69 void analyzePHINodes(const MachineFunction& Fn);
71 /// Split critical edges where necessary for good coalescer performance.
72 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB,
73 LiveVariables &LV, MachineLoopInfo *MLI);
75 typedef std::pair<unsigned, unsigned> BBVRegPair;
76 typedef DenseMap<BBVRegPair, unsigned> VRegPHIUse;
78 VRegPHIUse VRegPHIUseCount;
80 // Defs of PHI sources which are implicit_def.
81 SmallPtrSet<MachineInstr*, 4> ImpDefs;
83 // Map reusable lowered PHI node -> incoming join register.
84 typedef DenseMap<MachineInstr*, unsigned,
85 MachineInstrExpressionTrait> LoweredPHIMap;
86 LoweredPHIMap LoweredPHIs;
90 STATISTIC(NumAtomic, "Number of atomic phis lowered");
91 STATISTIC(NumCriticalEdgesSplit, "Number of critical edges split");
92 STATISTIC(NumReused, "Number of reused lowered phis");
94 char PHIElimination::ID = 0;
95 INITIALIZE_PASS(PHIElimination, "phi-node-elimination",
96 "Eliminate PHI nodes for register allocation", false, false)
98 char& llvm::PHIEliminationID = PHIElimination::ID;
100 void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
101 AU.addPreserved<LiveVariables>();
102 AU.addPreserved<MachineDominatorTree>();
103 AU.addPreserved<MachineLoopInfo>();
104 MachineFunctionPass::getAnalysisUsage(AU);
107 bool PHIElimination::runOnMachineFunction(MachineFunction &MF) {
108 MRI = &MF.getRegInfo();
110 bool Changed = false;
112 // This pass takes the function out of SSA form.
115 // Split critical edges to help the coalescer
116 if (!DisableEdgeSplitting) {
117 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) {
118 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
119 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
120 Changed |= SplitPHIEdges(MF, *I, *LV, MLI);
124 // Populate VRegPHIUseCount
127 // Eliminate PHI instructions by inserting copies into predecessor blocks.
128 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
129 Changed |= EliminatePHINodes(MF, *I);
131 // Remove dead IMPLICIT_DEF instructions.
132 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(),
133 E = ImpDefs.end(); I != E; ++I) {
134 MachineInstr *DefMI = *I;
135 unsigned DefReg = DefMI->getOperand(0).getReg();
136 if (MRI->use_nodbg_empty(DefReg))
137 DefMI->eraseFromParent();
140 // Clean up the lowered PHI instructions.
141 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end();
143 MF.DeleteMachineInstr(I->first);
147 VRegPHIUseCount.clear();
152 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
153 /// predecessor basic blocks.
155 bool PHIElimination::EliminatePHINodes(MachineFunction &MF,
156 MachineBasicBlock &MBB) {
157 if (MBB.empty() || !MBB.front().isPHI())
158 return false; // Quick exit for basic blocks without PHIs.
160 // Get an iterator to the first instruction after the last PHI node (this may
161 // also be the end of the basic block).
162 MachineBasicBlock::iterator AfterPHIsIt = MBB.SkipPHIsAndLabels(MBB.begin());
164 while (MBB.front().isPHI())
165 LowerAtomicPHINode(MBB, AfterPHIsIt);
170 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
171 /// are implicit_def's.
172 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
173 const MachineRegisterInfo *MRI) {
174 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
175 unsigned SrcReg = MPhi->getOperand(i).getReg();
176 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
177 if (!DefMI || !DefMI->isImplicitDef())
185 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
186 /// under the assuption that it needs to be lowered in a way that supports
187 /// atomic execution of PHIs. This lowering method is always correct all of the
190 void PHIElimination::LowerAtomicPHINode(
191 MachineBasicBlock &MBB,
192 MachineBasicBlock::iterator AfterPHIsIt) {
194 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
195 MachineInstr *MPhi = MBB.remove(MBB.begin());
197 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
198 unsigned DestReg = MPhi->getOperand(0).getReg();
199 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs");
200 bool isDead = MPhi->getOperand(0).isDead();
202 // Create a new register for the incoming PHI arguments.
203 MachineFunction &MF = *MBB.getParent();
204 unsigned IncomingReg = 0;
205 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI?
207 // Insert a register to register copy at the top of the current block (but
208 // after any remaining phi nodes) which copies the new incoming register
209 // into the phi node destination.
210 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
211 if (isSourceDefinedByImplicitDef(MPhi, MRI))
212 // If all sources of a PHI node are implicit_def, just emit an
213 // implicit_def instead of a copy.
214 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
215 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
217 // Can we reuse an earlier PHI node? This only happens for critical edges,
218 // typically those created by tail duplication.
219 unsigned &entry = LoweredPHIs[MPhi];
221 // An identical PHI node was already lowered. Reuse the incoming register.
223 reusedIncoming = true;
225 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi);
227 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
228 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
230 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
231 TII->get(TargetOpcode::COPY), DestReg)
232 .addReg(IncomingReg);
235 // Update live variable information if there is any.
236 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
238 MachineInstr *PHICopy = prior(AfterPHIsIt);
241 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg);
243 // Increment use count of the newly created virtual register.
245 LV->setPHIJoin(IncomingReg);
247 // When we are reusing the incoming register, it may already have been
248 // killed in this block. The old kill will also have been inserted at
249 // AfterPHIsIt, so it appears before the current PHICopy.
251 if (MachineInstr *OldKill = VI.findKill(&MBB)) {
252 DEBUG(dbgs() << "Remove old kill from " << *OldKill);
253 LV->removeVirtualRegisterKilled(IncomingReg, OldKill);
257 // Add information to LiveVariables to know that the incoming value is
258 // killed. Note that because the value is defined in several places (once
259 // each for each incoming block), the "def" block and instruction fields
260 // for the VarInfo is not filled in.
261 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
264 // Since we are going to be deleting the PHI node, if it is the last use of
265 // any registers, or if the value itself is dead, we need to move this
266 // information over to the new copy we just inserted.
267 LV->removeVirtualRegistersKilled(MPhi);
269 // If the result is dead, update LV.
271 LV->addVirtualRegisterDead(DestReg, PHICopy);
272 LV->removeVirtualRegisterDead(DestReg, MPhi);
276 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
277 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
278 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(),
279 MPhi->getOperand(i).getReg())];
281 // Now loop over all of the incoming arguments, changing them to copy into the
282 // IncomingReg register in the corresponding predecessor basic block.
283 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
284 for (int i = NumSrcs - 1; i >= 0; --i) {
285 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
286 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg();
288 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
289 "Machine PHI Operands must all be virtual registers!");
291 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
293 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
295 // If source is defined by an implicit def, there is no need to insert a
297 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
298 if (DefMI->isImplicitDef()) {
299 ImpDefs.insert(DefMI);
303 // Check to make sure we haven't already emitted the copy for this block.
304 // This can happen because PHI nodes may have multiple entries for the same
306 if (!MBBsInsertedInto.insert(&opBlock))
307 continue; // If the copy has already been emitted, we're done.
309 // Find a safe location to insert the copy, this may be the first terminator
310 // in the block (or end()).
311 MachineBasicBlock::iterator InsertPos =
312 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg);
315 if (!reusedIncoming && IncomingReg)
316 BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
317 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg);
319 // Now update live variable information if we have it. Otherwise we're done
322 // We want to be able to insert a kill of the register if this PHI (aka, the
323 // copy we just inserted) is the last use of the source value. Live
324 // variable analysis conservatively handles this by saying that the value is
325 // live until the end of the block the PHI entry lives in. If the value
326 // really is dead at the PHI copy, there will be no successor blocks which
327 // have the value live-in.
329 // Also check to see if this register is in use by another PHI node which
330 // has not yet been eliminated. If so, it will be killed at an appropriate
333 // Is it used by any PHI instructions in this block?
334 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)];
336 // Okay, if we now know that the value is not live out of the block, we can
337 // add a kill marker in this block saying that it kills the incoming value!
338 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) {
339 // In our final twist, we have to decide which instruction kills the
340 // register. In most cases this is the copy, however, the first
341 // terminator instruction at the end of the block may also use the value.
342 // In this case, we should mark *it* as being the killing block, not the
344 MachineBasicBlock::iterator KillInst;
345 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
346 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) {
349 // Check that no other terminators use values.
351 for (MachineBasicBlock::iterator TI = llvm::next(Term);
352 TI != opBlock.end(); ++TI) {
353 if (TI->isDebugValue())
355 assert(!TI->readsRegister(SrcReg) &&
356 "Terminator instructions cannot use virtual registers unless"
357 "they are the first terminator in a block!");
360 } else if (reusedIncoming || !IncomingReg) {
361 // We may have to rewind a bit if we didn't insert a copy this time.
363 while (KillInst != opBlock.begin()) {
365 if (KillInst->isDebugValue())
367 if (KillInst->readsRegister(SrcReg))
371 // We just inserted this copy.
372 KillInst = prior(InsertPos);
374 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction");
376 // Finally, mark it killed.
377 LV->addVirtualRegisterKilled(SrcReg, KillInst);
379 // This vreg no longer lives all of the way through opBlock.
380 unsigned opBlockNum = opBlock.getNumber();
381 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
385 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map.
386 if (reusedIncoming || !IncomingReg)
387 MF.DeleteMachineInstr(MPhi);
390 /// analyzePHINodes - Gather information about the PHI nodes in here. In
391 /// particular, we want to map the number of uses of a virtual register which is
392 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
393 /// used later to determine when the vreg is killed in the BB.
395 void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
396 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
398 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
399 BBI != BBE && BBI->isPHI(); ++BBI)
400 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
401 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
402 BBI->getOperand(i).getReg())];
405 bool PHIElimination::SplitPHIEdges(MachineFunction &MF,
406 MachineBasicBlock &MBB,
408 MachineLoopInfo *MLI) {
409 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad())
410 return false; // Quick exit for basic blocks without PHIs.
412 bool Changed = false;
413 for (MachineBasicBlock::iterator BBI = MBB.begin(), BBE = MBB.end();
414 BBI != BBE && BBI->isPHI(); ++BBI) {
415 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
416 unsigned Reg = BBI->getOperand(i).getReg();
417 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
418 // We break edges when registers are live out from the predecessor block
419 // (not considering PHI nodes). If the register is live in to this block
420 // anyway, we would gain nothing from splitting.
421 // Avoid splitting backedges of loops. It would introduce small
422 // out-of-line blocks into the loop which is very bad for code placement.
423 if (PreMBB != &MBB &&
424 !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) {
426 !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) &&
427 MLI->isLoopHeader(&MBB))) {
428 if (PreMBB->SplitCriticalEdge(&MBB, this)) {
430 ++NumCriticalEdgesSplit;