1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIElimination.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Function.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Compiler.h"
31 #include "llvm/Support/Debug.h"
36 STATISTIC(NumAtomic, "Number of atomic phis lowered");
37 STATISTIC(NumSplits, "Number of critical edges split on demand");
40 SplitEdges("split-phi-edges",
41 cl::desc("Split critical edges during phi elimination"),
42 cl::init(false), cl::Hidden);
44 char PHIElimination::ID = 0;
45 static RegisterPass<PHIElimination>
46 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
48 const PassInfo *const llvm::PHIEliminationID = &X;
50 void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
51 AU.addPreserved<LiveVariables>();
53 AU.addRequired<LiveVariables>();
56 AU.addPreservedID(MachineLoopInfoID);
57 AU.addPreservedID(MachineDominatorsID);
59 MachineFunctionPass::getAnalysisUsage(AU);
62 bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
63 MRI = &Fn.getRegInfo();
70 // Split critical edges to help the coalescer
72 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
73 Changed |= SplitPHIEdges(Fn, *I);
75 // Populate VRegPHIUseCount
78 // Eliminate PHI instructions by inserting copies into predecessor blocks.
79 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
80 Changed |= EliminatePHINodes(Fn, *I);
82 // Remove dead IMPLICIT_DEF instructions.
83 for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
84 E = ImpDefs.end(); I != E; ++I) {
85 MachineInstr *DefMI = *I;
86 unsigned DefReg = DefMI->getOperand(0).getReg();
87 if (MRI->use_empty(DefReg))
88 DefMI->eraseFromParent();
92 VRegPHIUseCount.clear();
96 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
97 /// predecessor basic blocks.
99 bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
100 MachineBasicBlock &MBB) {
101 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
102 return false; // Quick exit for basic blocks without PHIs.
104 // Get an iterator to the first instruction after the last PHI node (this may
105 // also be the end of the basic block).
106 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
108 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
109 LowerAtomicPHINode(MBB, AfterPHIsIt);
114 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
115 /// are implicit_def's.
116 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
117 const MachineRegisterInfo *MRI) {
118 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
119 unsigned SrcReg = MPhi->getOperand(i).getReg();
120 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
121 if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
127 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
128 // when following the CFG edge to SuccMBB. This needs to be after any def of
129 // SrcReg, but before any subsequent point where control flow might jump out of
131 MachineBasicBlock::iterator
132 llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
133 MachineBasicBlock &SuccMBB,
135 // Handle the trivial case trivially.
139 // Usually, we just want to insert the copy before the first terminator
140 // instruction. However, for the edge going to a landing pad, we must insert
141 // the copy before the call/invoke instruction.
142 if (!SuccMBB.isLandingPad())
143 return MBB.getFirstTerminator();
145 // Discover any definitions in this basic block.
146 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
147 for (MachineRegisterInfo::def_iterator RI = MRI->def_begin(SrcReg),
148 RE = MRI->def_end(); RI != RE; ++RI) {
149 MachineInstr *DefUseMI = &*RI;
150 if (DefUseMI->getParent() == &MBB)
151 DefUsesInMBB.insert(DefUseMI);
154 MachineBasicBlock::iterator InsertPoint;
155 if (DefUsesInMBB.empty()) {
156 // No defs. Insert the copy at the start of the basic block.
157 InsertPoint = MBB.begin();
158 } else if (DefUsesInMBB.size() == 1) {
159 // Insert the copy immediately after the def.
160 InsertPoint = *DefUsesInMBB.begin();
163 // Insert the copy immediately after the last def.
164 InsertPoint = MBB.end();
165 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
169 // Make sure the copy goes after any phi nodes however.
170 return SkipPHIsAndLabels(MBB, InsertPoint);
173 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
174 /// under the assuption that it needs to be lowered in a way that supports
175 /// atomic execution of PHIs. This lowering method is always correct all of the
178 void llvm::PHIElimination::LowerAtomicPHINode(
179 MachineBasicBlock &MBB,
180 MachineBasicBlock::iterator AfterPHIsIt) {
181 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
182 MachineInstr *MPhi = MBB.remove(MBB.begin());
184 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
185 unsigned DestReg = MPhi->getOperand(0).getReg();
186 bool isDead = MPhi->getOperand(0).isDead();
188 // Create a new register for the incoming PHI arguments.
189 MachineFunction &MF = *MBB.getParent();
190 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
191 unsigned IncomingReg = 0;
193 // Insert a register to register copy at the top of the current block (but
194 // after any remaining phi nodes) which copies the new incoming register
195 // into the phi node destination.
196 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
197 if (isSourceDefinedByImplicitDef(MPhi, MRI))
198 // If all sources of a PHI node are implicit_def, just emit an
199 // implicit_def instead of a copy.
200 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
201 TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
203 IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
204 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
208 assert(!hasPHIDef(DestReg) && "Vreg has multiple phi-defs?");
209 PHIDefs[DestReg] = &MBB;
211 // Update live variable information if there is any.
212 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
214 MachineInstr *PHICopy = prior(AfterPHIsIt);
217 // Increment use count of the newly created virtual register.
218 LV->getVarInfo(IncomingReg).NumUses++;
220 // Add information to LiveVariables to know that the incoming value is
221 // killed. Note that because the value is defined in several places (once
222 // each for each incoming block), the "def" block and instruction fields
223 // for the VarInfo is not filled in.
224 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
227 // Since we are going to be deleting the PHI node, if it is the last use of
228 // any registers, or if the value itself is dead, we need to move this
229 // information over to the new copy we just inserted.
230 LV->removeVirtualRegistersKilled(MPhi);
232 // If the result is dead, update LV.
234 LV->addVirtualRegisterDead(DestReg, PHICopy);
235 LV->removeVirtualRegisterDead(DestReg, MPhi);
239 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
240 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
241 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
242 MPhi->getOperand(i).getReg())];
244 // Now loop over all of the incoming arguments, changing them to copy into the
245 // IncomingReg register in the corresponding predecessor basic block.
246 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
247 for (int i = NumSrcs - 1; i >= 0; --i) {
248 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
249 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
250 "Machine PHI Operands must all be virtual registers!");
252 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
254 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
257 PHIKills[SrcReg].insert(&opBlock);
259 // If source is defined by an implicit def, there is no need to insert a
261 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
262 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
263 ImpDefs.insert(DefMI);
267 // Check to make sure we haven't already emitted the copy for this block.
268 // This can happen because PHI nodes may have multiple entries for the same
270 if (!MBBsInsertedInto.insert(&opBlock))
271 continue; // If the copy has already been emitted, we're done.
273 // Find a safe location to insert the copy, this may be the first terminator
274 // in the block (or end()).
275 MachineBasicBlock::iterator InsertPos =
276 FindCopyInsertPoint(opBlock, MBB, SrcReg);
279 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
281 // Now update live variable information if we have it. Otherwise we're done
284 // We want to be able to insert a kill of the register if this PHI (aka, the
285 // copy we just inserted) is the last use of the source value. Live
286 // variable analysis conservatively handles this by saying that the value is
287 // live until the end of the block the PHI entry lives in. If the value
288 // really is dead at the PHI copy, there will be no successor blocks which
289 // have the value live-in.
291 // Also check to see if this register is in use by another PHI node which
292 // has not yet been eliminated. If so, it will be killed at an appropriate
295 // Is it used by any PHI instructions in this block?
296 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
298 // Okay, if we now know that the value is not live out of the block, we can
299 // add a kill marker in this block saying that it kills the incoming value!
300 // When SplitEdges is enabled, the value is never live out.
301 if (!ValueIsUsed && !isLiveOut(SrcReg, opBlock, *LV)) {
302 // In our final twist, we have to decide which instruction kills the
303 // register. In most cases this is the copy, however, the first
304 // terminator instruction at the end of the block may also use the value.
305 // In this case, we should mark *it* as being the killing block, not the
307 MachineBasicBlock::iterator KillInst = prior(InsertPos);
308 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
309 if (Term != opBlock.end()) {
310 if (Term->readsRegister(SrcReg))
313 // Check that no other terminators use values.
315 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
317 assert(!TI->readsRegister(SrcReg) &&
318 "Terminator instructions cannot use virtual registers unless"
319 "they are the first terminator in a block!");
324 // Finally, mark it killed.
325 LV->addVirtualRegisterKilled(SrcReg, KillInst);
327 // This vreg no longer lives all of the way through opBlock.
328 unsigned opBlockNum = opBlock.getNumber();
329 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
333 // Really delete the PHI instruction now!
334 MF.DeleteMachineInstr(MPhi);
338 /// analyzePHINodes - Gather information about the PHI nodes in here. In
339 /// particular, we want to map the number of uses of a virtual register which is
340 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
341 /// used later to determine when the vreg is killed in the BB.
343 void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) {
344 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
346 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
347 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
348 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
349 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
350 BBI->getOperand(i).getReg())];
353 bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
354 MachineBasicBlock &MBB) {
355 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
356 return false; // Quick exit for basic blocks without PHIs.
357 LiveVariables &LV = getAnalysis<LiveVariables>();
358 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
359 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) {
360 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
361 unsigned Reg = BBI->getOperand(i).getReg();
362 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
363 // We break edges when registers are live out from the predecessor block
364 // (not considering PHI nodes). If the register is live in to this block
365 // anyway, we would gain nothing from splitting.
366 if (isLiveOut(Reg, *PreMBB, LV) && !isLiveIn(Reg, MBB, LV))
367 SplitCriticalEdge(PreMBB, &MBB);
373 bool llvm::PHIElimination::isLiveOut(unsigned Reg, const MachineBasicBlock &MBB,
375 LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
377 // Loop over all of the successors of the basic block, checking to see if
378 // the value is either live in the block, or if it is killed in the block.
379 std::vector<MachineBasicBlock*> OpSuccBlocks;
380 for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
381 E = MBB.succ_end(); SI != E; ++SI) {
382 MachineBasicBlock *SuccMBB = *SI;
384 // Is it alive in this successor?
385 unsigned SuccIdx = SuccMBB->getNumber();
386 if (VI.AliveBlocks.test(SuccIdx))
388 OpSuccBlocks.push_back(SuccMBB);
391 // Check to see if this value is live because there is a use in a successor
393 switch (OpSuccBlocks.size()) {
395 MachineBasicBlock *SuccMBB = OpSuccBlocks[0];
396 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
397 if (VI.Kills[i]->getParent() == SuccMBB)
402 MachineBasicBlock *SuccMBB1 = OpSuccBlocks[0], *SuccMBB2 = OpSuccBlocks[1];
403 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
404 if (VI.Kills[i]->getParent() == SuccMBB1 ||
405 VI.Kills[i]->getParent() == SuccMBB2)
410 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
411 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
412 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
413 VI.Kills[i]->getParent()))
419 bool llvm::PHIElimination::isLiveIn(unsigned Reg, const MachineBasicBlock &MBB,
421 LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
423 return VI.AliveBlocks.test(MBB.getNumber()) || VI.findKill(&MBB);
426 MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
427 MachineBasicBlock *B) {
428 assert(A && B && "Missing MBB end point");
431 MachineFunction *MF = A->getParent();
432 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
434 DEBUG(errs() << "PHIElimination splitting critical edge:"
435 " BB#" << A->getNumber()
436 << " -- BB#" << NMBB->getNumber()
437 << " -- BB#" << B->getNumber() << '\n');
439 A->ReplaceUsesOfBlockWith(B, NMBB);
440 NMBB->addSuccessor(B);
442 // Insert unconditional "jump B" instruction in NMBB.
443 SmallVector<MachineOperand, 4> Cond;
444 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
446 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>())
447 LV->addNewBlock(NMBB, A);
449 // Fix PHI nodes in B so they refer to NMBB instead of A
450 for (MachineBasicBlock::iterator i = B->begin(), e = B->end();
451 i != e && i->getOpcode() == TargetInstrInfo::PHI; ++i)
452 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
453 if (i->getOperand(ni+1).getMBB() == A)
454 i->getOperand(ni+1).setMBB(NMBB);