1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/CodeGen/LiveVariables.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/SSARegMap.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/Statistic.h"
26 #include "llvm/Support/Compiler.h"
32 static Statistic<> NumAtomic("phielim", "Number of atomic phis lowered");
33 static Statistic<> NumSimple("phielim", "Number of simple phis lowered");
35 struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass {
36 bool runOnMachineFunction(MachineFunction &Fn) {
41 // Eliminate PHI instructions by inserting copies into predecessor blocks.
42 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
43 Changed |= EliminatePHINodes(Fn, *I);
45 VRegPHIUseCount.clear();
49 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
50 AU.addPreserved<LiveVariables>();
51 MachineFunctionPass::getAnalysisUsage(AU);
55 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
56 /// in predecessor basic blocks.
58 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
59 void LowerAtomicPHINode(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator AfterPHIsIt);
62 /// analyzePHINodes - Gather information about the PHI nodes in
63 /// here. In particular, we want to map the number of uses of a virtual
64 /// register which is used in a PHI node. We map that to the BB the
65 /// vreg is coming from. This is used later to determine when the vreg
66 /// is killed in the BB.
68 void analyzePHINodes(const MachineFunction& Fn);
70 typedef std::pair<const MachineBasicBlock*, unsigned> BBVRegPair;
71 typedef std::map<BBVRegPair, unsigned> VRegPHIUse;
73 VRegPHIUse VRegPHIUseCount;
76 RegisterPass<PNE> X("phi-node-elimination",
77 "Eliminate PHI nodes for register allocation");
80 const PassInfo *llvm::PHIEliminationID = X.getPassInfo();
82 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
83 /// predecessor basic blocks.
85 bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
86 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
87 return false; // Quick exit for basic blocks without PHIs.
89 // Get an iterator to the first instruction after the last PHI node (this may
90 // also be the end of the basic block).
91 MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
92 while (AfterPHIsIt != MBB.end() &&
93 AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
94 ++AfterPHIsIt; // Skip over all of the PHI nodes...
96 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
97 LowerAtomicPHINode(MBB, AfterPHIsIt);
102 /// InstructionUsesRegister - Return true if the specified machine instr has a
103 /// use of the specified register.
104 static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) {
105 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
106 if (MI->getOperand(i).isRegister() &&
107 MI->getOperand(i).getReg() == SrcReg &&
108 MI->getOperand(i).isUse())
113 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
114 /// under the assuption that it needs to be lowered in a way that supports
115 /// atomic execution of PHIs. This lowering method is always correct all of the
117 void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
118 MachineBasicBlock::iterator AfterPHIsIt) {
119 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
120 MachineInstr *MPhi = MBB.remove(MBB.begin());
122 unsigned DestReg = MPhi->getOperand(0).getReg();
124 // Create a new register for the incoming PHI arguments.
125 MachineFunction &MF = *MBB.getParent();
126 const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
127 unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC);
129 // Insert a register to register copy in the top of the current block (but
130 // after any remaining phi nodes) which copies the new incoming register
131 // into the phi node destination.
133 const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
134 RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
136 // Update live variable information if there is any...
137 LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
139 MachineInstr *PHICopy = prior(AfterPHIsIt);
141 // Add information to LiveVariables to know that the incoming value is
142 // killed. Note that because the value is defined in several places (once
143 // each for each incoming block), the "def" block and instruction fields
144 // for the VarInfo is not filled in.
146 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
148 // Since we are going to be deleting the PHI node, if it is the last use
149 // of any registers, or if the value itself is dead, we need to move this
150 // information over to the new copy we just inserted.
152 LV->removeVirtualRegistersKilled(MPhi);
154 // If the result is dead, update LV.
155 if (LV->RegisterDefIsDead(MPhi, DestReg)) {
156 LV->addVirtualRegisterDead(DestReg, PHICopy);
157 LV->removeVirtualRegistersDead(MPhi);
160 // Realize that the destination register is defined by the PHI copy now, not
162 LV->getVarInfo(DestReg).DefInst = PHICopy;
165 // Adjust the VRegPHIUseCount map to account for the removal of this PHI
167 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
168 --VRegPHIUseCount[BBVRegPair(
169 MPhi->getOperand(i + 1).getMachineBasicBlock(),
170 MPhi->getOperand(i).getReg())];
172 // Now loop over all of the incoming arguments, changing them to copy into
173 // the IncomingReg register in the corresponding predecessor basic block.
175 std::set<MachineBasicBlock*> MBBsInsertedInto;
176 for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) {
177 unsigned SrcReg = MPhi->getOperand(i-1).getReg();
178 assert(MRegisterInfo::isVirtualRegister(SrcReg) &&
179 "Machine PHI Operands must all be virtual registers!");
181 // Get the MachineBasicBlock equivalent of the BasicBlock that is the
182 // source path the PHI.
183 MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock();
185 // Check to make sure we haven't already emitted the copy for this block.
186 // This can happen because PHI nodes may have multiple entries for the
188 if (!MBBsInsertedInto.insert(&opBlock).second)
189 continue; // If the copy has already been emitted, we're done.
191 // Get an iterator pointing to the first terminator in the block (or end()).
192 // This is the point where we can insert a copy if we'd like to.
193 MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
196 RegInfo->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC);
198 // Now update live variable information if we have it. Otherwise we're done
201 // We want to be able to insert a kill of the register if this PHI
202 // (aka, the copy we just inserted) is the last use of the source
203 // value. Live variable analysis conservatively handles this by
204 // saying that the value is live until the end of the block the PHI
205 // entry lives in. If the value really is dead at the PHI copy, there
206 // will be no successor blocks which have the value live-in.
208 // Check to see if the copy is the last use, and if so, update the
209 // live variables information so that it knows the copy source
210 // instruction kills the incoming value.
212 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
214 // Loop over all of the successors of the basic block, checking to see
215 // if the value is either live in the block, or if it is killed in the
216 // block. Also check to see if this register is in use by another PHI
217 // node which has not yet been eliminated. If so, it will be killed
218 // at an appropriate point later.
221 // Is it used by any PHI instructions in this block?
222 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
224 std::vector<MachineBasicBlock*> OpSuccBlocks;
226 // Otherwise, scan successors, including the BB the PHI node lives in.
227 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
228 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
229 MachineBasicBlock *SuccMBB = *SI;
231 // Is it alive in this successor?
232 unsigned SuccIdx = SuccMBB->getNumber();
233 if (SuccIdx < InRegVI.AliveBlocks.size() &&
234 InRegVI.AliveBlocks[SuccIdx]) {
239 OpSuccBlocks.push_back(SuccMBB);
242 // Check to see if this value is live because there is a use in a successor
245 switch (OpSuccBlocks.size()) {
247 MachineBasicBlock *MBB = OpSuccBlocks[0];
248 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
249 if (InRegVI.Kills[i]->getParent() == MBB) {
256 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1];
257 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
258 if (InRegVI.Kills[i]->getParent() == MBB1 ||
259 InRegVI.Kills[i]->getParent() == MBB2) {
266 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
267 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
268 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
269 InRegVI.Kills[i]->getParent())) {
276 // Okay, if we now know that the value is not live out of the block,
277 // we can add a kill marker in this block saying that it kills the incoming
280 // In our final twist, we have to decide which instruction kills the
281 // register. In most cases this is the copy, however, the first
282 // terminator instruction at the end of the block may also use the value.
283 // In this case, we should mark *it* as being the killing block, not the
285 bool FirstTerminatorUsesValue = false;
286 if (I != opBlock.end()) {
287 FirstTerminatorUsesValue = InstructionUsesRegister(I, SrcReg);
289 // Check that no other terminators use values.
291 for (MachineBasicBlock::iterator TI = next(I); TI != opBlock.end();
293 assert(!InstructionUsesRegister(TI, SrcReg) &&
294 "Terminator instructions cannot use virtual registers unless"
295 "they are the first terminator in a block!");
300 MachineBasicBlock::iterator KillInst;
301 if (!FirstTerminatorUsesValue)
306 // Finally, mark it killed.
307 LV->addVirtualRegisterKilled(SrcReg, KillInst);
309 // This vreg no longer lives all of the way through opBlock.
310 unsigned opBlockNum = opBlock.getNumber();
311 if (opBlockNum < InRegVI.AliveBlocks.size())
312 InRegVI.AliveBlocks[opBlockNum] = false;
316 // Really delete the PHI instruction now!
321 /// analyzePHINodes - Gather information about the PHI nodes in here. In
322 /// particular, we want to map the number of uses of a virtual register which is
323 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
324 /// used later to determine when the vreg is killed in the BB.
326 void PNE::analyzePHINodes(const MachineFunction& Fn) {
327 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
329 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
330 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
331 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
332 ++VRegPHIUseCount[BBVRegPair(
333 BBI->getOperand(i + 1).getMachineBasicBlock(),
334 BBI->getOperand(i).getReg())];