1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "llvm/BasicBlock.h"
18 #include "llvm/Instructions.h"
19 #include "llvm/CodeGen/LiveVariables.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/SmallPtrSet.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/Support/Compiler.h"
35 STATISTIC(NumAtomic, "Number of atomic phis lowered");
38 class VISIBILITY_HIDDEN PNE : public MachineFunctionPass {
39 MachineRegisterInfo *MRI; // Machine register information
42 static char ID; // Pass identification, replacement for typeid
43 PNE() : MachineFunctionPass(&ID) {}
45 virtual bool runOnMachineFunction(MachineFunction &Fn);
47 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
48 AU.addPreserved<LiveVariables>();
49 AU.addPreservedID(MachineLoopInfoID);
50 AU.addPreservedID(MachineDominatorsID);
51 MachineFunctionPass::getAnalysisUsage(AU);
55 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
56 /// in predecessor basic blocks.
58 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
59 void LowerAtomicPHINode(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator AfterPHIsIt);
62 /// analyzePHINodes - Gather information about the PHI nodes in
63 /// here. In particular, we want to map the number of uses of a virtual
64 /// register which is used in a PHI node. We map that to the BB the
65 /// vreg is coming from. This is used later to determine when the vreg
66 /// is killed in the BB.
68 void analyzePHINodes(const MachineFunction& Fn);
70 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from
71 // SrcReg. This needs to be after any def or uses of SrcReg, but before
72 // any subsequent point where control flow might jump out of the basic
74 MachineBasicBlock::iterator FindCopyInsertPoint(MachineBasicBlock &MBB,
77 // SkipPHIsAndLabels - Copies need to be inserted after phi nodes and
78 // also after any exception handling labels: in landing pads execution
79 // starts at the label, so any copies placed before it won't be executed!
80 MachineBasicBlock::iterator SkipPHIsAndLabels(MachineBasicBlock &MBB,
81 MachineBasicBlock::iterator I) {
82 // Rather than assuming that EH labels come before other kinds of labels,
83 // just skip all labels.
84 while (I != MBB.end() &&
85 (I->getOpcode() == TargetInstrInfo::PHI || I->isLabel()))
90 typedef std::pair<const MachineBasicBlock*, unsigned> BBVRegPair;
91 typedef std::map<BBVRegPair, unsigned> VRegPHIUse;
93 VRegPHIUse VRegPHIUseCount;
95 // Defs of PHI sources which are implicit_def.
96 SmallPtrSet<MachineInstr*, 4> ImpDefs;
101 static RegisterPass<PNE>
102 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
104 const PassInfo *const llvm::PHIEliminationID = &X;
106 bool PNE::runOnMachineFunction(MachineFunction &Fn) {
107 MRI = &Fn.getRegInfo();
111 bool Changed = false;
113 // Eliminate PHI instructions by inserting copies into predecessor blocks.
114 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
115 Changed |= EliminatePHINodes(Fn, *I);
117 // Remove dead IMPLICIT_DEF instructions.
118 for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
119 E = ImpDefs.end(); I != E; ++I) {
120 MachineInstr *DefMI = *I;
121 unsigned DefReg = DefMI->getOperand(0).getReg();
122 if (MRI->use_empty(DefReg))
123 DefMI->eraseFromParent();
127 VRegPHIUseCount.clear();
132 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
133 /// predecessor basic blocks.
135 bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
136 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
137 return false; // Quick exit for basic blocks without PHIs.
139 // Get an iterator to the first instruction after the last PHI node (this may
140 // also be the end of the basic block).
141 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
143 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
144 LowerAtomicPHINode(MBB, AfterPHIsIt);
149 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
150 /// are implicit_def's.
151 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
152 const MachineRegisterInfo *MRI) {
153 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
154 unsigned SrcReg = MPhi->getOperand(i).getReg();
155 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
156 if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
162 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg.
163 // This needs to be after any def or uses of SrcReg, but before any subsequent
164 // point where control flow might jump out of the basic block.
165 MachineBasicBlock::iterator PNE::FindCopyInsertPoint(MachineBasicBlock &MBB,
167 // Handle the trivial case trivially.
171 // If this basic block does not contain an invoke, then control flow always
172 // reaches the end of it, so place the copy there. The logic below works in
173 // this case too, but is more expensive.
174 if (!isa<InvokeInst>(MBB.getBasicBlock()->getTerminator()))
175 return MBB.getFirstTerminator();
177 // Discover any definition/uses in this basic block.
178 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
179 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
180 RE = MRI->reg_end(); RI != RE; ++RI) {
181 MachineInstr *DefUseMI = &*RI;
182 if (DefUseMI->getParent() == &MBB)
183 DefUsesInMBB.insert(DefUseMI);
186 MachineBasicBlock::iterator InsertPoint;
187 if (DefUsesInMBB.empty()) {
188 // No def/uses. Insert the copy at the start of the basic block.
189 InsertPoint = MBB.begin();
190 } else if (DefUsesInMBB.size() == 1) {
191 // Insert the copy immediately after the definition/use.
192 InsertPoint = *DefUsesInMBB.begin();
195 // Insert the copy immediately after the last definition/use.
196 InsertPoint = MBB.end();
197 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
201 // Make sure the copy goes after any phi nodes however.
202 return SkipPHIsAndLabels(MBB, InsertPoint);
205 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
206 /// under the assuption that it needs to be lowered in a way that supports
207 /// atomic execution of PHIs. This lowering method is always correct all of the
210 void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
211 MachineBasicBlock::iterator AfterPHIsIt) {
212 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
213 MachineInstr *MPhi = MBB.remove(MBB.begin());
215 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
216 unsigned DestReg = MPhi->getOperand(0).getReg();
217 bool isDead = MPhi->getOperand(0).isDead();
219 // Create a new register for the incoming PHI arguments.
220 MachineFunction &MF = *MBB.getParent();
221 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
222 unsigned IncomingReg = 0;
224 // Insert a register to register copy at the top of the current block (but
225 // after any remaining phi nodes) which copies the new incoming register
226 // into the phi node destination.
227 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
228 if (isSourceDefinedByImplicitDef(MPhi, MRI))
229 // If all sources of a PHI node are implicit_def, just emit an
230 // implicit_def instead of a copy.
231 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
232 TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
234 IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
235 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
238 // Update live variable information if there is any.
239 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
241 MachineInstr *PHICopy = prior(AfterPHIsIt);
244 // Increment use count of the newly created virtual register.
245 LV->getVarInfo(IncomingReg).NumUses++;
247 // Add information to LiveVariables to know that the incoming value is
248 // killed. Note that because the value is defined in several places (once
249 // each for each incoming block), the "def" block and instruction fields
250 // for the VarInfo is not filled in.
251 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
254 // Since we are going to be deleting the PHI node, if it is the last use of
255 // any registers, or if the value itself is dead, we need to move this
256 // information over to the new copy we just inserted.
257 LV->removeVirtualRegistersKilled(MPhi);
259 // If the result is dead, update LV.
261 LV->addVirtualRegisterDead(DestReg, PHICopy);
262 LV->removeVirtualRegisterDead(DestReg, MPhi);
266 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
267 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
268 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
269 MPhi->getOperand(i).getReg())];
271 // Now loop over all of the incoming arguments, changing them to copy into the
272 // IncomingReg register in the corresponding predecessor basic block.
273 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
274 for (int i = NumSrcs - 1; i >= 0; --i) {
275 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
276 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
277 "Machine PHI Operands must all be virtual registers!");
279 // If source is defined by an implicit def, there is no need to insert a
281 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
282 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
283 ImpDefs.insert(DefMI);
287 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
289 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
291 // Check to make sure we haven't already emitted the copy for this block.
292 // This can happen because PHI nodes may have multiple entries for the same
294 if (!MBBsInsertedInto.insert(&opBlock))
295 continue; // If the copy has already been emitted, we're done.
297 // Find a safe location to insert the copy, this may be the first terminator
298 // in the block (or end()).
299 MachineBasicBlock::iterator InsertPos = FindCopyInsertPoint(opBlock, SrcReg);
302 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
304 // Now update live variable information if we have it. Otherwise we're done
307 // We want to be able to insert a kill of the register if this PHI (aka, the
308 // copy we just inserted) is the last use of the source value. Live
309 // variable analysis conservatively handles this by saying that the value is
310 // live until the end of the block the PHI entry lives in. If the value
311 // really is dead at the PHI copy, there will be no successor blocks which
312 // have the value live-in.
314 // Check to see if the copy is the last use, and if so, update the live
315 // variables information so that it knows the copy source instruction kills
316 // the incoming value.
317 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
319 // Loop over all of the successors of the basic block, checking to see if
320 // the value is either live in the block, or if it is killed in the block.
321 // Also check to see if this register is in use by another PHI node which
322 // has not yet been eliminated. If so, it will be killed at an appropriate
325 // Is it used by any PHI instructions in this block?
326 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
328 std::vector<MachineBasicBlock*> OpSuccBlocks;
330 // Otherwise, scan successors, including the BB the PHI node lives in.
331 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
332 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
333 MachineBasicBlock *SuccMBB = *SI;
335 // Is it alive in this successor?
336 unsigned SuccIdx = SuccMBB->getNumber();
337 if (InRegVI.AliveBlocks.test(SuccIdx)) {
342 OpSuccBlocks.push_back(SuccMBB);
345 // Check to see if this value is live because there is a use in a successor
348 switch (OpSuccBlocks.size()) {
350 MachineBasicBlock *MBB = OpSuccBlocks[0];
351 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
352 if (InRegVI.Kills[i]->getParent() == MBB) {
359 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1];
360 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
361 if (InRegVI.Kills[i]->getParent() == MBB1 ||
362 InRegVI.Kills[i]->getParent() == MBB2) {
369 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
370 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
371 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
372 InRegVI.Kills[i]->getParent())) {
379 // Okay, if we now know that the value is not live out of the block, we can
380 // add a kill marker in this block saying that it kills the incoming value!
382 // In our final twist, we have to decide which instruction kills the
383 // register. In most cases this is the copy, however, the first
384 // terminator instruction at the end of the block may also use the value.
385 // In this case, we should mark *it* as being the killing block, not the
387 MachineBasicBlock::iterator KillInst = prior(InsertPos);
388 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
389 if (Term != opBlock.end()) {
390 if (Term->readsRegister(SrcReg))
393 // Check that no other terminators use values.
395 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
397 assert(!TI->readsRegister(SrcReg) &&
398 "Terminator instructions cannot use virtual registers unless"
399 "they are the first terminator in a block!");
404 // Finally, mark it killed.
405 LV->addVirtualRegisterKilled(SrcReg, KillInst);
407 // This vreg no longer lives all of the way through opBlock.
408 unsigned opBlockNum = opBlock.getNumber();
409 InRegVI.AliveBlocks.reset(opBlockNum);
413 // Really delete the PHI instruction now!
414 MF.DeleteMachineInstr(MPhi);
418 /// analyzePHINodes - Gather information about the PHI nodes in here. In
419 /// particular, we want to map the number of uses of a virtual register which is
420 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
421 /// used later to determine when the vreg is killed in the BB.
423 void PNE::analyzePHINodes(const MachineFunction& Fn) {
424 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
426 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
427 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
428 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
429 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
430 BBI->getOperand(i).getReg())];