1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIElimination.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Function.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/SmallPtrSet.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/Support/Compiler.h"
31 #include "llvm/Support/Debug.h"
36 STATISTIC(NumAtomic, "Number of atomic phis lowered");
37 STATISTIC(NumSplits, "Number of critical edges split on demand");
38 STATISTIC(NumReused, "Number of reused lowered phis");
40 char PHIElimination::ID = 0;
41 static RegisterPass<PHIElimination>
42 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
44 const PassInfo *const llvm::PHIEliminationID = &X;
46 void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
47 AU.addPreserved<LiveVariables>();
48 AU.addPreserved<MachineDominatorTree>();
49 // rdar://7401784 This would be nice:
50 // AU.addPreservedID(MachineLoopInfoID);
51 MachineFunctionPass::getAnalysisUsage(AU);
54 bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &MF) {
55 MRI = &MF.getRegInfo();
59 // Split critical edges to help the coalescer
60 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>())
61 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
62 Changed |= SplitPHIEdges(MF, *I, *LV);
64 // Populate VRegPHIUseCount
67 // Eliminate PHI instructions by inserting copies into predecessor blocks.
68 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
69 Changed |= EliminatePHINodes(MF, *I);
71 // Remove dead IMPLICIT_DEF instructions.
72 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(),
73 E = ImpDefs.end(); I != E; ++I) {
74 MachineInstr *DefMI = *I;
75 unsigned DefReg = DefMI->getOperand(0).getReg();
76 if (MRI->use_nodbg_empty(DefReg))
77 DefMI->eraseFromParent();
80 // Clean up the lowered PHI instructions.
81 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end();
83 MF.DeleteMachineInstr(I->first);
87 VRegPHIUseCount.clear();
92 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
93 /// predecessor basic blocks.
95 bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
96 MachineBasicBlock &MBB) {
97 if (MBB.empty() || !MBB.front().isPHI())
98 return false; // Quick exit for basic blocks without PHIs.
100 // Get an iterator to the first instruction after the last PHI node (this may
101 // also be the end of the basic block).
102 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
104 while (MBB.front().isPHI())
105 LowerAtomicPHINode(MBB, AfterPHIsIt);
110 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
111 /// are implicit_def's.
112 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
113 const MachineRegisterInfo *MRI) {
114 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
115 unsigned SrcReg = MPhi->getOperand(i).getReg();
116 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
117 if (!DefMI || !DefMI->isImplicitDef())
123 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
124 // when following the CFG edge to SuccMBB. This needs to be after any def of
125 // SrcReg, but before any subsequent point where control flow might jump out of
127 MachineBasicBlock::iterator
128 llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
129 MachineBasicBlock &SuccMBB,
131 // Handle the trivial case trivially.
135 // Usually, we just want to insert the copy before the first terminator
136 // instruction. However, for the edge going to a landing pad, we must insert
137 // the copy before the call/invoke instruction.
138 if (!SuccMBB.isLandingPad())
139 return MBB.getFirstTerminator();
141 // Discover any defs/uses in this basic block.
142 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
143 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
144 RE = MRI->reg_end(); RI != RE; ++RI) {
145 MachineInstr *DefUseMI = &*RI;
146 if (DefUseMI->getParent() == &MBB)
147 DefUsesInMBB.insert(DefUseMI);
150 MachineBasicBlock::iterator InsertPoint;
151 if (DefUsesInMBB.empty()) {
152 // No defs. Insert the copy at the start of the basic block.
153 InsertPoint = MBB.begin();
154 } else if (DefUsesInMBB.size() == 1) {
155 // Insert the copy immediately after the def/use.
156 InsertPoint = *DefUsesInMBB.begin();
159 // Insert the copy immediately after the last def/use.
160 InsertPoint = MBB.end();
161 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
165 // Make sure the copy goes after any phi nodes however.
166 return SkipPHIsAndLabels(MBB, InsertPoint);
169 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
170 /// under the assuption that it needs to be lowered in a way that supports
171 /// atomic execution of PHIs. This lowering method is always correct all of the
174 void llvm::PHIElimination::LowerAtomicPHINode(
175 MachineBasicBlock &MBB,
176 MachineBasicBlock::iterator AfterPHIsIt) {
178 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
179 MachineInstr *MPhi = MBB.remove(MBB.begin());
181 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
182 unsigned DestReg = MPhi->getOperand(0).getReg();
183 bool isDead = MPhi->getOperand(0).isDead();
185 // Create a new register for the incoming PHI arguments.
186 MachineFunction &MF = *MBB.getParent();
187 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
188 unsigned IncomingReg = 0;
189 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI?
191 // Insert a register to register copy at the top of the current block (but
192 // after any remaining phi nodes) which copies the new incoming register
193 // into the phi node destination.
194 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
195 if (isSourceDefinedByImplicitDef(MPhi, MRI))
196 // If all sources of a PHI node are implicit_def, just emit an
197 // implicit_def instead of a copy.
198 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
199 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
201 // Can we reuse an earlier PHI node? This only happens for critical edges,
202 // typically those created by tail duplication.
203 unsigned &entry = LoweredPHIs[MPhi];
205 // An identical PHI node was already lowered. Reuse the incoming register.
207 reusedIncoming = true;
209 DEBUG(dbgs() << "Reusing %reg" << IncomingReg << " for " << *MPhi);
211 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
213 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC,
214 MPhi->getDebugLoc());
217 // Update live variable information if there is any.
218 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
220 MachineInstr *PHICopy = prior(AfterPHIsIt);
223 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg);
225 // Increment use count of the newly created virtual register.
227 LV->setPHIJoin(IncomingReg);
229 // When we are reusing the incoming register, it may already have been
230 // killed in this block. The old kill will also have been inserted at
231 // AfterPHIsIt, so it appears before the current PHICopy.
233 if (MachineInstr *OldKill = VI.findKill(&MBB)) {
234 DEBUG(dbgs() << "Remove old kill from " << *OldKill);
235 LV->removeVirtualRegisterKilled(IncomingReg, OldKill);
239 // Add information to LiveVariables to know that the incoming value is
240 // killed. Note that because the value is defined in several places (once
241 // each for each incoming block), the "def" block and instruction fields
242 // for the VarInfo is not filled in.
243 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
246 // Since we are going to be deleting the PHI node, if it is the last use of
247 // any registers, or if the value itself is dead, we need to move this
248 // information over to the new copy we just inserted.
249 LV->removeVirtualRegistersKilled(MPhi);
251 // If the result is dead, update LV.
253 LV->addVirtualRegisterDead(DestReg, PHICopy);
254 LV->removeVirtualRegisterDead(DestReg, MPhi);
258 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
259 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
260 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(),
261 MPhi->getOperand(i).getReg())];
263 // Now loop over all of the incoming arguments, changing them to copy into the
264 // IncomingReg register in the corresponding predecessor basic block.
265 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
266 for (int i = NumSrcs - 1; i >= 0; --i) {
267 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
268 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
269 "Machine PHI Operands must all be virtual registers!");
271 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
273 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
275 // If source is defined by an implicit def, there is no need to insert a
277 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
278 if (DefMI->isImplicitDef()) {
279 ImpDefs.insert(DefMI);
283 // Check to make sure we haven't already emitted the copy for this block.
284 // This can happen because PHI nodes may have multiple entries for the same
286 if (!MBBsInsertedInto.insert(&opBlock))
287 continue; // If the copy has already been emitted, we're done.
289 // Find a safe location to insert the copy, this may be the first terminator
290 // in the block (or end()).
291 MachineBasicBlock::iterator InsertPos =
292 FindCopyInsertPoint(opBlock, MBB, SrcReg);
295 if (!reusedIncoming && IncomingReg)
296 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC,
297 MPhi->getDebugLoc());
299 // Now update live variable information if we have it. Otherwise we're done
302 // We want to be able to insert a kill of the register if this PHI (aka, the
303 // copy we just inserted) is the last use of the source value. Live
304 // variable analysis conservatively handles this by saying that the value is
305 // live until the end of the block the PHI entry lives in. If the value
306 // really is dead at the PHI copy, there will be no successor blocks which
307 // have the value live-in.
309 // Also check to see if this register is in use by another PHI node which
310 // has not yet been eliminated. If so, it will be killed at an appropriate
313 // Is it used by any PHI instructions in this block?
314 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)];
316 // Okay, if we now know that the value is not live out of the block, we can
317 // add a kill marker in this block saying that it kills the incoming value!
318 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) {
319 // In our final twist, we have to decide which instruction kills the
320 // register. In most cases this is the copy, however, the first
321 // terminator instruction at the end of the block may also use the value.
322 // In this case, we should mark *it* as being the killing block, not the
324 MachineBasicBlock::iterator KillInst;
325 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
326 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) {
329 // Check that no other terminators use values.
331 for (MachineBasicBlock::iterator TI = llvm::next(Term);
332 TI != opBlock.end(); ++TI) {
333 assert(!TI->readsRegister(SrcReg) &&
334 "Terminator instructions cannot use virtual registers unless"
335 "they are the first terminator in a block!");
338 } else if (reusedIncoming || !IncomingReg) {
339 // We may have to rewind a bit if we didn't insert a copy this time.
341 while (KillInst != opBlock.begin())
342 if ((--KillInst)->readsRegister(SrcReg))
345 // We just inserted this copy.
346 KillInst = prior(InsertPos);
348 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction");
350 // Finally, mark it killed.
351 LV->addVirtualRegisterKilled(SrcReg, KillInst);
353 // This vreg no longer lives all of the way through opBlock.
354 unsigned opBlockNum = opBlock.getNumber();
355 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
359 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map.
360 if (reusedIncoming || !IncomingReg)
361 MF.DeleteMachineInstr(MPhi);
364 /// analyzePHINodes - Gather information about the PHI nodes in here. In
365 /// particular, we want to map the number of uses of a virtual register which is
366 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
367 /// used later to determine when the vreg is killed in the BB.
369 void llvm::PHIElimination::analyzePHINodes(const MachineFunction& MF) {
370 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
372 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
373 BBI != BBE && BBI->isPHI(); ++BBI)
374 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
375 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
376 BBI->getOperand(i).getReg())];
379 bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
380 MachineBasicBlock &MBB,
382 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad())
383 return false; // Quick exit for basic blocks without PHIs.
385 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
386 BBI != BBE && BBI->isPHI(); ++BBI) {
387 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
388 unsigned Reg = BBI->getOperand(i).getReg();
389 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
390 // We break edges when registers are live out from the predecessor block
391 // (not considering PHI nodes). If the register is live in to this block
392 // anyway, we would gain nothing from splitting.
393 if (!LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB))
394 SplitCriticalEdge(PreMBB, &MBB);
400 MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
401 MachineBasicBlock *B) {
402 assert(A && B && "Missing MBB end point");
404 MachineFunction *MF = A->getParent();
406 // We may need to update A's terminator, but we can't do that if AnalyzeBranch
407 // fails. If A uses a jump table, we won't touch it.
408 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
409 MachineBasicBlock *TBB = 0, *FBB = 0;
410 SmallVector<MachineOperand, 4> Cond;
411 if (TII->AnalyzeBranch(*A, TBB, FBB, Cond))
416 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
417 MF->insert(llvm::next(MachineFunction::iterator(A)), NMBB);
418 DEBUG(dbgs() << "PHIElimination splitting critical edge:"
419 " BB#" << A->getNumber()
420 << " -- BB#" << NMBB->getNumber()
421 << " -- BB#" << B->getNumber() << '\n');
423 A->ReplaceUsesOfBlockWith(B, NMBB);
424 A->updateTerminator();
426 // Insert unconditional "jump B" instruction in NMBB if necessary.
427 NMBB->addSuccessor(B);
428 if (!NMBB->isLayoutSuccessor(B)) {
430 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
433 // Fix PHI nodes in B so they refer to NMBB instead of A
434 for (MachineBasicBlock::iterator i = B->begin(), e = B->end();
435 i != e && i->isPHI(); ++i)
436 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
437 if (i->getOperand(ni+1).getMBB() == A)
438 i->getOperand(ni+1).setMBB(NMBB);
440 if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>())
441 LV->addNewBlock(NMBB, A, B);
443 if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>())
444 MDT->addNewBlock(NMBB, A);