1 //===-- PeepholeOptimizer.cpp - Peephole Optimizations --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Perform peephole optimizations on the machine code:
12 // - Optimize Extensions
14 // Optimization of sign / zero extension instructions. It may be extended to
15 // handle other instructions with similar properties.
17 // On some targets, some instructions, e.g. X86 sign / zero extension, may
18 // leave the source value in the lower part of the result. This optimization
19 // will replace some uses of the pre-extension value with uses of the
20 // sub-register of the results.
22 // - Optimize Comparisons
24 // Optimization of comparison instructions. For instance, in this code:
30 // If the "sub" instruction all ready sets (or could be modified to set) the
31 // same flag that the "cmp" instruction sets and that "bz" uses, then we can
32 // eliminate the "cmp" instruction.
34 //===----------------------------------------------------------------------===//
36 #define DEBUG_TYPE "peephole-opt"
37 #include "llvm/CodeGen/Passes.h"
38 #include "llvm/CodeGen/MachineDominators.h"
39 #include "llvm/CodeGen/MachineInstrBuilder.h"
40 #include "llvm/CodeGen/MachineRegisterInfo.h"
41 #include "llvm/Target/TargetInstrInfo.h"
42 #include "llvm/Target/TargetRegisterInfo.h"
43 #include "llvm/Support/CommandLine.h"
44 #include "llvm/ADT/SmallPtrSet.h"
45 #include "llvm/ADT/Statistic.h"
48 // Optimize Extensions
50 Aggressive("aggressive-ext-opt", cl::Hidden,
51 cl::desc("Aggressive extension optimization"));
53 STATISTIC(NumReuse, "Number of extension results reused");
54 STATISTIC(NumEliminated, "Number of compares eliminated");
57 class PeepholeOptimizer : public MachineFunctionPass {
58 const TargetMachine *TM;
59 const TargetInstrInfo *TII;
60 MachineRegisterInfo *MRI;
61 MachineDominatorTree *DT; // Machine dominator tree
64 static char ID; // Pass identification
65 PeepholeOptimizer() : MachineFunctionPass(ID) {}
67 virtual bool runOnMachineFunction(MachineFunction &MF);
69 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
71 MachineFunctionPass::getAnalysisUsage(AU);
73 AU.addRequired<MachineDominatorTree>();
74 AU.addPreserved<MachineDominatorTree>();
79 bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB,
80 MachineBasicBlock::iterator &MII);
81 bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
82 SmallPtrSet<MachineInstr*, 8> &LocalMIs);
86 char PeepholeOptimizer::ID = 0;
87 INITIALIZE_PASS(PeepholeOptimizer, "peephole-opts",
88 "Peephole Optimizations", false, false)
90 FunctionPass *llvm::createPeepholeOptimizerPass() {
91 return new PeepholeOptimizer();
94 /// OptimizeExtInstr - If instruction is a copy-like instruction, i.e. it reads
95 /// a single register and writes a single register and it does not modify the
96 /// source, and if the source value is preserved as a sub-register of the
97 /// result, then replace all reachable uses of the source with the subreg of the
100 /// Do not generate an EXTRACT that is used only in a debug use, as this changes
101 /// the code. Since this code does not currently share EXTRACTs, just ignore all
103 bool PeepholeOptimizer::
104 OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
105 SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
108 unsigned SrcReg, DstReg, SubIdx;
109 if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
112 if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
113 TargetRegisterInfo::isPhysicalRegister(SrcReg))
116 MachineRegisterInfo::use_nodbg_iterator UI = MRI->use_nodbg_begin(SrcReg);
117 if (++UI == MRI->use_nodbg_end())
121 // The source has other uses. See if we can replace the other uses with use of
122 // the result of the extension.
123 SmallPtrSet<MachineBasicBlock*, 4> ReachedBBs;
124 UI = MRI->use_nodbg_begin(DstReg);
125 for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
127 ReachedBBs.insert(UI->getParent());
129 // Uses that are in the same BB of uses of the result of the instruction.
130 SmallVector<MachineOperand*, 8> Uses;
132 // Uses that the result of the instruction can reach.
133 SmallVector<MachineOperand*, 8> ExtendedUses;
135 bool ExtendLife = true;
136 UI = MRI->use_nodbg_begin(SrcReg);
137 for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
139 MachineOperand &UseMO = UI.getOperand();
140 MachineInstr *UseMI = &*UI;
144 if (UseMI->isPHI()) {
149 // It's an error to translate this:
151 // %reg1025 = <sext> %reg1024
153 // %reg1026 = SUBREG_TO_REG 0, %reg1024, 4
157 // %reg1025 = <sext> %reg1024
159 // %reg1027 = COPY %reg1025:4
160 // %reg1026 = SUBREG_TO_REG 0, %reg1027, 4
162 // The problem here is that SUBREG_TO_REG is there to assert that an
163 // implicit zext occurs. It doesn't insert a zext instruction. If we allow
164 // the COPY here, it will give us the value after the <sext>, not the
165 // original value of %reg1024 before <sext>.
166 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
169 MachineBasicBlock *UseMBB = UseMI->getParent();
171 // Local uses that come after the extension.
172 if (!LocalMIs.count(UseMI))
173 Uses.push_back(&UseMO);
174 } else if (ReachedBBs.count(UseMBB)) {
175 // Non-local uses where the result of the extension is used. Always
176 // replace these unless it's a PHI.
177 Uses.push_back(&UseMO);
178 } else if (Aggressive && DT->dominates(MBB, UseMBB)) {
179 // We may want to extend the live range of the extension result in order
180 // to replace these uses.
181 ExtendedUses.push_back(&UseMO);
183 // Both will be live out of the def MBB anyway. Don't extend live range of
184 // the extension result.
190 if (ExtendLife && !ExtendedUses.empty())
191 // Extend the liveness of the extension result.
192 std::copy(ExtendedUses.begin(), ExtendedUses.end(),
193 std::back_inserter(Uses));
195 // Now replace all uses.
196 bool Changed = false;
198 SmallPtrSet<MachineBasicBlock*, 4> PHIBBs;
200 // Look for PHI uses of the extended result, we don't want to extend the
201 // liveness of a PHI input. It breaks all kinds of assumptions down
202 // stream. A PHI use is expected to be the kill of its source values.
203 UI = MRI->use_nodbg_begin(DstReg);
204 for (MachineRegisterInfo::use_nodbg_iterator
205 UE = MRI->use_nodbg_end(); UI != UE; ++UI)
207 PHIBBs.insert(UI->getParent());
209 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
210 for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
211 MachineOperand *UseMO = Uses[i];
212 MachineInstr *UseMI = UseMO->getParent();
213 MachineBasicBlock *UseMBB = UseMI->getParent();
214 if (PHIBBs.count(UseMBB))
217 unsigned NewVR = MRI->createVirtualRegister(RC);
218 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
219 TII->get(TargetOpcode::COPY), NewVR)
220 .addReg(DstReg, 0, SubIdx);
222 UseMO->setReg(NewVR);
231 /// OptimizeCmpInstr - If the instruction is a compare and the previous
232 /// instruction it's comparing against all ready sets (or could be modified to
233 /// set) the same flag as the compare, then we can remove the comparison and use
234 /// the flag from the previous instruction.
235 bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
236 MachineBasicBlock *MBB,
237 MachineBasicBlock::iterator &NextIter){
238 // If this instruction is a comparison against zero and isn't comparing a
239 // physical register, we can try to optimize it.
241 int CmpMask, CmpValue;
242 if (!TII->AnalyzeCompare(MI, SrcReg, CmpMask, CmpValue) ||
243 TargetRegisterInfo::isPhysicalRegister(SrcReg))
246 // Attempt to optimize the comparison instruction.
247 if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, NextIter)) {
255 bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
256 TM = &MF.getTarget();
257 TII = TM->getInstrInfo();
258 MRI = &MF.getRegInfo();
259 DT = Aggressive ? &getAnalysis<MachineDominatorTree>() : 0;
261 bool Changed = false;
263 SmallPtrSet<MachineInstr*, 8> LocalMIs;
264 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
265 MachineBasicBlock *MBB = &*I;
268 for (MachineBasicBlock::iterator
269 MII = I->begin(), MIE = I->end(); MII != MIE; ) {
270 MachineInstr *MI = &*MII;
272 if (MI->getDesc().isCompare() &&
273 !MI->getDesc().hasUnmodeledSideEffects()) {
274 if (OptimizeCmpInstr(MI, MBB, MII))
279 Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);