1 //===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level pre-register allocation
11 // live interval splitting pass. It finds live interval barriers, i.e.
12 // instructions which will kill all physical registers in certain register
13 // classes, and split all live intervals which cross the barrier.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "pre-alloc-split"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineLoopInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/CodeGen/RegisterCoalescer.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/ADT/SmallPtrSet.h"
32 #include "llvm/ADT/Statistic.h"
36 STATISTIC(NumSplit , "Number of intervals split");
39 class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
40 MachineFunction *CurMF;
41 const TargetMachine *TM;
42 const TargetInstrInfo *TII;
43 MachineFrameInfo *MFI;
44 MachineRegisterInfo *MRI;
47 // Barrier - Current barrier being processed.
48 MachineInstr *Barrier;
50 // BarrierMBB - Basic block where the barrier resides in.
51 MachineBasicBlock *BarrierMBB;
53 // Barrier - Current barrier index.
56 // CurrLI - Current live interval being split.
59 // LIValNoSSMap - A map from live interval and val# pairs to spill slots.
60 // This records what live interval's val# has been split and what spill
62 std::map<std::pair<unsigned, unsigned>, int> LIValNoSSMap;
64 // RestoreMIs - All the restores inserted due to live interval splitting.
65 SmallPtrSet<MachineInstr*, 8> RestoreMIs;
69 PreAllocSplitting() : MachineFunctionPass(&ID) {}
71 virtual bool runOnMachineFunction(MachineFunction &MF);
73 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
74 AU.addRequired<LiveIntervals>();
75 AU.addPreserved<LiveIntervals>();
76 AU.addPreserved<RegisterCoalescer>();
78 AU.addPreservedID(StrongPHIEliminationID);
80 AU.addPreservedID(PHIEliminationID);
81 MachineFunctionPass::getAnalysisUsage(AU);
84 virtual void releaseMemory() {
89 virtual const char *getPassName() const {
90 return "Pre-Register Allocaton Live Interval Splitting";
93 /// print - Implement the dump method.
94 virtual void print(std::ostream &O, const Module* M = 0) const {
98 void print(std::ostream *O, const Module* M = 0) const {
103 MachineBasicBlock::iterator
104 findNextEmptySlot(MachineBasicBlock*, MachineInstr*,
107 MachineBasicBlock::iterator
108 findSpillPoint(MachineBasicBlock*, MachineInstr*,
109 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
111 MachineBasicBlock::iterator
112 findRestorePoint(MachineBasicBlock*, MachineInstr*,
113 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
115 void RecordSplit(unsigned, unsigned, unsigned, int);
117 bool isAlreadySplit(unsigned, unsigned, int&);
119 void UpdateIntervalForSplit(VNInfo*, unsigned, unsigned);
121 bool ShrinkWrapToLastUse(MachineBasicBlock*,
122 SmallVector<MachineOperand*, 4>&,
123 SmallPtrSet<MachineInstr*, 4>&);
125 void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*, MachineBasicBlock*,
126 MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&,
127 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&,
128 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&,
129 SmallVector<MachineBasicBlock*, 4>&);
131 bool SplitRegLiveInterval(LiveInterval*);
133 bool SplitRegLiveIntervals(const TargetRegisterClass **);
135 } // end anonymous namespace
137 char PreAllocSplitting::ID = 0;
139 static RegisterPass<PreAllocSplitting>
140 X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
142 const PassInfo *const llvm::PreAllocSplittingID = &X;
145 /// findNextEmptySlot - Find a gap after the given machine instruction in the
146 /// instruction index map. If there isn't one, return end().
147 MachineBasicBlock::iterator
148 PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI,
149 unsigned &SpotIndex) {
150 MachineBasicBlock::iterator MII = MI;
151 if (++MII != MBB->end()) {
152 unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII));
161 /// findSpillPoint - Find a gap as far away from the given MI that's suitable
162 /// for spilling the current live interval. The index must be before any
163 /// defs and uses of the live interval register in the mbb. Return begin() if
165 MachineBasicBlock::iterator
166 PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI,
167 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
168 unsigned &SpillIndex) {
169 MachineBasicBlock::iterator Pt = MBB->begin();
171 // Go top down if RefsInMBB is empty.
172 if (RefsInMBB.empty()) {
173 MachineBasicBlock::iterator MII = MBB->begin();
174 MachineBasicBlock::iterator EndPt = MI;
177 unsigned Index = LIs->getInstructionIndex(MII);
178 unsigned Gap = LIs->findGapBeforeInstr(Index);
184 } while (MII != EndPt);
186 MachineBasicBlock::iterator MII = MI;
187 while (MII != MBB->begin() && !RefsInMBB.count(MII)) {
188 unsigned Index = LIs->getInstructionIndex(MII);
189 if (LIs->hasGapBeforeInstr(Index)) {
191 SpillIndex = LIs->findGapBeforeInstr(Index, true);
200 /// findRestorePoint - Find a gap in the instruction index map that's suitable
201 /// for restoring the current live interval value. The index must be before any
202 /// uses of the live interval register in the mbb. Return end() if none is
204 MachineBasicBlock::iterator
205 PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI,
206 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
207 unsigned &RestoreIndex) {
208 MachineBasicBlock::iterator Pt = MBB->end();
210 // Go bottom up if RefsInMBB is empty.
211 if (RefsInMBB.empty()) {
212 MachineBasicBlock::iterator MII = MBB->end();
213 MachineBasicBlock::iterator EndPt = MI;
216 unsigned Index = LIs->getInstructionIndex(MII);
217 unsigned Gap = LIs->findGapBeforeInstr(Index);
223 } while (MII != EndPt);
225 MachineBasicBlock::iterator MII = MI;
227 while (MII != MBB->end()) {
228 unsigned Index = LIs->getInstructionIndex(MII);
229 unsigned Gap = LIs->findGapBeforeInstr(Index);
234 if (RefsInMBB.count(MII))
243 /// RecordSplit - Given a register live interval is split, remember the spill
244 /// slot where the val#s are in.
245 void PreAllocSplitting::RecordSplit(unsigned Reg, unsigned SpillIndex,
246 unsigned RestoreIndex, int SS) {
247 const LiveRange *LR = NULL;
249 LR = CurrLI->getLiveRangeContaining(LIs->getUseIndex(SpillIndex));
250 LIValNoSSMap.insert(std::make_pair(std::make_pair(CurrLI->reg,
251 LR->valno->id), SS));
253 LR = CurrLI->getLiveRangeContaining(LIs->getDefIndex(RestoreIndex));
254 LIValNoSSMap.insert(std::make_pair(std::make_pair(CurrLI->reg,
255 LR->valno->id), SS));
258 /// isAlreadySplit - Return if a given val# of a register live interval is already
259 /// split. Also return by reference the spill stock where the value is.
260 bool PreAllocSplitting::isAlreadySplit(unsigned Reg, unsigned ValNoId, int &SS){
261 std::map<std::pair<unsigned, unsigned>, int>::iterator I =
262 LIValNoSSMap.find(std::make_pair(Reg, ValNoId));
263 if (I == LIValNoSSMap.end())
269 /// UpdateIntervalForSplit - Given the specified val# of the current live
270 /// interval is being split, and the split and rejoin indices, update the live
271 /// interval accordingly.
273 PreAllocSplitting::UpdateIntervalForSplit(VNInfo *ValNo, unsigned SplitIndex,
274 unsigned JoinIndex) {
275 SmallVector<std::pair<unsigned,unsigned>, 4> Before;
276 SmallVector<std::pair<unsigned,unsigned>, 4> After;
277 SmallVector<unsigned, 4> BeforeKills;
278 SmallVector<unsigned, 4> AfterKills;
279 SmallPtrSet<const LiveRange*, 4> Processed;
281 // First, let's figure out which parts of the live interval is now defined
282 // by the restore, which are defined by the original definition.
283 const LiveRange *LR = CurrLI->getLiveRangeContaining(JoinIndex);
284 After.push_back(std::make_pair(JoinIndex, LR->end));
285 if (CurrLI->isKill(ValNo, LR->end))
286 AfterKills.push_back(LR->end);
288 assert(LR->contains(SplitIndex));
289 if (SplitIndex > LR->start) {
290 Before.push_back(std::make_pair(LR->start, SplitIndex));
291 BeforeKills.push_back(SplitIndex);
293 Processed.insert(LR);
295 SmallVector<MachineBasicBlock*, 4> WorkList;
296 MachineBasicBlock *MBB = LIs->getMBBFromIndex(LR->end-1);
297 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
298 SE = MBB->succ_end(); SI != SE; ++SI)
299 WorkList.push_back(*SI);
301 while (!WorkList.empty()) {
302 MBB = WorkList.back();
304 unsigned Idx = LIs->getMBBStartIdx(MBB);
305 LR = CurrLI->getLiveRangeContaining(Idx);
306 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
307 After.push_back(std::make_pair(LR->start, LR->end));
308 if (CurrLI->isKill(ValNo, LR->end))
309 AfterKills.push_back(LR->end);
310 Idx = LIs->getMBBEndIdx(MBB);
312 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
313 SE = MBB->succ_end(); SI != SE; ++SI)
314 WorkList.push_back(*SI);
315 if (LR->end > Idx+1) {
316 MBB = LIs->getMBBFromIndex(LR->end-1);
317 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
318 SE = MBB->succ_end(); SI != SE; ++SI)
319 WorkList.push_back(*SI);
322 Processed.insert(LR);
326 for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end();
329 if (LR->valno == ValNo && !Processed.count(LR)) {
330 Before.push_back(std::make_pair(LR->start, LR->end));
331 if (CurrLI->isKill(ValNo, LR->end))
332 BeforeKills.push_back(LR->end);
336 // Now create new val#s to represent the live ranges defined by the old def
337 // those defined by the restore.
338 unsigned AfterDef = ValNo->def;
339 MachineInstr *AfterCopy = ValNo->copy;
340 bool HasPHIKill = ValNo->hasPHIKill;
341 CurrLI->removeValNo(ValNo);
342 VNInfo *BValNo = (Before.empty())
344 : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator());
346 CurrLI->addKills(BValNo, BeforeKills);
348 VNInfo *AValNo = (After.empty())
350 : CurrLI->getNextValue(JoinIndex,0, LIs->getVNInfoAllocator());
352 AValNo->hasPHIKill = HasPHIKill;
353 CurrLI->addKills(AValNo, AfterKills);
356 for (unsigned i = 0, e = Before.size(); i != e; ++i) {
357 unsigned Start = Before[i].first;
358 unsigned End = Before[i].second;
359 CurrLI->addRange(LiveRange(Start, End, BValNo));
361 for (unsigned i = 0, e = After.size(); i != e; ++i) {
362 unsigned Start = After[i].first;
363 unsigned End = After[i].second;
364 CurrLI->addRange(LiveRange(Start, End, AValNo));
368 /// ShrinkWrapToLastUse - There are uses of the current live interval in the
369 /// given block, shrink wrap the live interval to the last use (i.e. remove
370 /// from last use to the end of the mbb). In case mbb is the where the barrier
371 /// is, remove from the last use to the barrier.
373 PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB,
374 SmallVector<MachineOperand*, 4> &Uses,
375 SmallPtrSet<MachineInstr*, 4> &UseMIs) {
376 MachineOperand *LastMO = 0;
377 MachineInstr *LastMI = 0;
378 if (MBB != BarrierMBB && Uses.size() == 1) {
379 // Single use, no need to traverse the block. We can't assume this for the
380 // barrier bb though since the use is probably below the barrier.
382 LastMI = LastMO->getParent();
384 MachineBasicBlock::iterator MEE = MBB->begin();
385 MachineBasicBlock::iterator MII;
386 if (MBB == BarrierMBB)
390 while (--MII != MEE) {
391 MachineInstr *UseMI = &*MII;
392 if (!UseMIs.count(UseMI))
394 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) {
395 MachineOperand &MO = UseMI->getOperand(i);
396 if (MO.isReg() && MO.getReg() == CurrLI->reg) {
406 // Cut off live range from last use (or beginning of the mbb if there
407 // are no uses in it) to the end of the mbb.
408 unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1;
410 RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1;
411 assert(!LastMO->isKill() && "Last use already terminates the interval?");
414 assert(MBB == BarrierMBB);
415 RangeStart = LIs->getMBBStartIdx(MBB);
417 if (MBB == BarrierMBB)
418 RangeEnd = LIs->getUseIndex(BarrierIdx)+1;
419 CurrLI->removeRange(RangeStart, RangeEnd);
421 // Return true if the last use becomes a new kill.
425 /// ShrinkWrapLiveInterval - Recursively traverse the predecessor
426 /// chain to find the new 'kills' and shrink wrap the live interval to the
427 /// new kill indices.
429 PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo, MachineBasicBlock *MBB,
430 MachineBasicBlock *SuccMBB, MachineBasicBlock *DefMBB,
431 SmallPtrSet<MachineBasicBlock*, 8> &Visited,
432 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses,
433 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs,
434 SmallVector<MachineBasicBlock*, 4> &UseMBBs) {
435 if (Visited.count(MBB))
438 // If live interval is live in another successor path, then we can't process
439 // this block. But we may able to do so after all the successors have been
441 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
442 SE = MBB->succ_end(); SI != SE; ++SI) {
443 MachineBasicBlock *SMBB = *SI;
446 if (CurrLI->liveAt(LIs->getMBBStartIdx(SMBB)))
452 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
453 UMII = Uses.find(MBB);
454 if (UMII != Uses.end()) {
455 // At least one use in this mbb, lets look for the kill.
456 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
457 UMII2 = UseMIs.find(MBB);
458 if (ShrinkWrapToLastUse(MBB, UMII->second, UMII2->second))
459 // Found a kill, shrink wrapping of this path ends here.
461 } else if (MBB == DefMBB) {
462 assert(LIValNoSSMap.find(std::make_pair(CurrLI->reg, ValNo->id)) !=
463 LIValNoSSMap.end() && "Why wasn't def spilled?");
464 // There are no uses after the def.
465 MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def);
466 assert(RestoreMIs.count(DefMI) && "Not defined by a join?");
467 if (UseMBBs.empty()) {
468 // The only use must be below barrier in the barrier block. It's safe to
470 LIs->RemoveMachineInstrFromMaps(DefMI);
471 DefMI->eraseFromParent();
472 CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1);
474 } else if (MBB == BarrierMBB) {
475 // Remove entire live range from start of mbb to barrier.
476 CurrLI->removeRange(LIs->getMBBStartIdx(MBB),
477 LIs->getUseIndex(BarrierIdx)+1);
479 // Remove entire live range of the mbb out of the live interval.
480 CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1);
484 // Reached the def mbb, stop traversing this path further.
487 // Traverse the pathes up the predecessor chains further.
488 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
489 PE = MBB->pred_end(); PI != PE; ++PI) {
490 MachineBasicBlock *Pred = *PI;
493 if (Pred == DefMBB && ValNo->hasPHIKill)
494 // Pred is the def bb and the def reaches other val#s, we must
495 // allow the value to be live out of the bb.
497 ShrinkWrapLiveInterval(ValNo, Pred, MBB, DefMBB, Visited,
498 Uses, UseMIs, UseMBBs);
504 /// SplitRegLiveInterval - Split (spill and restore) the given live interval
505 /// so it would not cross the barrier that's being processed. Shrink wrap
506 /// (minimize) the live interval to the last uses.
507 bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
510 // Find live range where current interval cross the barrier.
511 LiveInterval::iterator LR =
512 CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
513 VNInfo *ValNo = LR->valno;
515 if (ValNo->def == ~1U) {
516 // Defined by a dead def? How can this be?
517 assert(0 && "Val# is defined by a dead def?");
521 // FIXME: For now, if definition is rematerializable, do not split.
522 MachineInstr *DefMI = (ValNo->def != ~0U)
523 ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
524 if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
527 // Find all references in the barrier mbb.
528 SmallPtrSet<MachineInstr*, 4> RefsInMBB;
529 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
530 E = MRI->reg_end(); I != E; ++I) {
531 MachineInstr *RefMI = &*I;
532 if (RefMI->getParent() == BarrierMBB)
533 RefsInMBB.insert(RefMI);
536 // Find a point to restore the value after the barrier.
537 unsigned RestoreIndex;
538 MachineBasicBlock::iterator RestorePt =
539 findRestorePoint(BarrierMBB, Barrier, RefsInMBB, RestoreIndex);
540 if (RestorePt == BarrierMBB->end())
543 // Add a spill either before the barrier or after the definition.
544 MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
545 const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
546 unsigned SpillIndex = 0;
547 MachineInstr *SpillMI = NULL;
549 bool PrevSpilled = isAlreadySplit(CurrLI->reg, ValNo->id, SS);
550 if (ValNo->def == ~0U) {
551 // If it's defined by a phi, we must split just before the barrier.
552 MachineBasicBlock::iterator SpillPt =
553 findSpillPoint(BarrierMBB, Barrier, RefsInMBB, SpillIndex);
554 if (SpillPt == BarrierMBB->begin())
555 return false; // No gap to insert spill.
558 // If previously split, reuse the spill slot.
559 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
560 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
561 SpillMI = prior(SpillPt);
562 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
563 } else if (!PrevSpilled) {
565 // Def is dead. Do nothing.
567 // If it's already split, just restore the value. There is no need to spill
569 // Check if it's possible to insert a spill after the def MI.
570 MachineBasicBlock::iterator SpillPt =
571 findNextEmptySlot(DefMBB, DefMI, SpillIndex);
572 if (SpillPt == DefMBB->end())
573 return false; // No gap to insert spill.
574 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
576 // Add spill. The store instruction kills the register if def is before
577 // the barrier in the barrier block.
578 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
579 DefMBB == BarrierMBB, SS, RC);
580 SpillMI = prior(SpillPt);
581 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
585 // FIXME: Create live interval for stack slot.
586 TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
587 MachineInstr *LoadMI = prior(RestorePt);
588 LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
589 RestoreMIs.insert(LoadMI);
591 // If live interval is spilled in the same block as the barrier, just
592 // create a hole in the interval.
594 (SpillMI && SpillMI->getParent() == BarrierMBB)) {
595 UpdateIntervalForSplit(ValNo, LIs->getUseIndex(SpillIndex)+1,
596 LIs->getDefIndex(RestoreIndex));
598 // Record val# values are in the specific spill slot.
599 RecordSplit(CurrLI->reg, SpillIndex, RestoreIndex, SS);
605 // Shrink wrap the live interval by walking up the CFG and find the
607 // Now let's find all the uses of the val#.
608 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses;
609 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs;
610 SmallPtrSet<MachineBasicBlock*, 4> Seen;
611 SmallVector<MachineBasicBlock*, 4> UseMBBs;
612 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg),
613 UE = MRI->use_end(); UI != UE; ++UI) {
614 MachineOperand &UseMO = UI.getOperand();
615 MachineInstr *UseMI = UseMO.getParent();
616 unsigned UseIdx = LIs->getInstructionIndex(UseMI);
617 LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx);
618 if (ULR->valno != ValNo)
620 MachineBasicBlock *UseMBB = UseMI->getParent();
621 // Remember which other mbb's use this val#.
622 if (Seen.insert(UseMBB) && UseMBB != BarrierMBB)
623 UseMBBs.push_back(UseMBB);
624 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
625 UMII = Uses.find(UseMBB);
626 if (UMII != Uses.end()) {
627 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
628 UMII2 = UseMIs.find(UseMBB);
629 UMII->second.push_back(&UseMO);
630 UMII2->second.insert(UseMI);
632 SmallVector<MachineOperand*, 4> Ops;
633 Ops.push_back(&UseMO);
634 Uses.insert(std::make_pair(UseMBB, Ops));
635 SmallPtrSet<MachineInstr*, 4> MIs;
637 UseMIs.insert(std::make_pair(UseMBB, MIs));
641 // Walk up the predecessor chains.
642 SmallPtrSet<MachineBasicBlock*, 8> Visited;
643 ShrinkWrapLiveInterval(ValNo, BarrierMBB, NULL, DefMBB, Visited,
644 Uses, UseMIs, UseMBBs);
646 // Remove live range from barrier to the restore. FIXME: Find a better
647 // point to re-start the live interval.
648 UpdateIntervalForSplit(ValNo, LIs->getUseIndex(BarrierIdx)+1,
649 LIs->getDefIndex(RestoreIndex));
650 // Record val# values are in the specific spill slot.
651 RecordSplit(CurrLI->reg, SpillIndex, RestoreIndex, SS);
657 /// SplitRegLiveIntervals - Split all register live intervals that cross the
658 /// barrier that's being processed.
660 PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) {
661 // First find all the virtual registers whose live intervals are intercepted
662 // by the current barrier.
663 SmallVector<LiveInterval*, 8> Intervals;
664 for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
665 if (TII->IgnoreRegisterClassBarriers(*RC))
667 std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
668 for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
669 unsigned Reg = VRs[i];
670 if (!LIs->hasInterval(Reg))
672 LiveInterval *LI = &LIs->getInterval(Reg);
673 if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
674 // Virtual register live interval is intercepted by the barrier. We
675 // should split and shrink wrap its interval if possible.
676 Intervals.push_back(LI);
680 // Process the affected live intervals.
682 while (!Intervals.empty()) {
683 LiveInterval *LI = Intervals.back();
684 Intervals.pop_back();
685 Change |= SplitRegLiveInterval(LI);
691 bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
693 TM = &MF.getTarget();
694 TII = TM->getInstrInfo();
695 MFI = MF.getFrameInfo();
696 MRI = &MF.getRegInfo();
697 LIs = &getAnalysis<LiveIntervals>();
699 bool MadeChange = false;
701 // Make sure blocks are numbered in order.
704 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
707 for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(),
708 EE = BarrierMBB->rend(); II != EE; ++II) {
710 const TargetRegisterClass **BarrierRCs =
711 Barrier->getDesc().getRegClassBarriers();
714 BarrierIdx = LIs->getInstructionIndex(Barrier);
715 MadeChange |= SplitRegLiveIntervals(BarrierRCs);