1 //===---------------------- ProcessImplicitDefs.cpp -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/ADT/SetVector.h"
11 #include "llvm/Analysis/AliasAnalysis.h"
12 #include "llvm/CodeGen/MachineFunctionPass.h"
13 #include "llvm/CodeGen/MachineInstr.h"
14 #include "llvm/CodeGen/MachineRegisterInfo.h"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/Support/Debug.h"
17 #include "llvm/Support/raw_ostream.h"
18 #include "llvm/Target/TargetInstrInfo.h"
19 #include "llvm/Target/TargetSubtargetInfo.h"
23 #define DEBUG_TYPE "processimplicitdefs"
26 /// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
27 /// for each use. Add isUndef marker to implicit_def defs and their uses.
28 class ProcessImplicitDefs : public MachineFunctionPass {
29 const TargetInstrInfo *TII;
30 const TargetRegisterInfo *TRI;
31 MachineRegisterInfo *MRI;
33 SmallSetVector<MachineInstr*, 16> WorkList;
35 void processImplicitDef(MachineInstr *MI);
36 bool canTurnIntoImplicitDef(MachineInstr *MI);
41 ProcessImplicitDefs() : MachineFunctionPass(ID) {
42 initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
45 void getAnalysisUsage(AnalysisUsage &au) const override;
47 bool runOnMachineFunction(MachineFunction &fn) override;
49 } // end anonymous namespace
51 char ProcessImplicitDefs::ID = 0;
52 char &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID;
54 INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
55 "Process Implicit Definitions", false, false)
56 INITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs",
57 "Process Implicit Definitions", false, false)
59 void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
61 AU.addPreserved<AliasAnalysis>();
62 MachineFunctionPass::getAnalysisUsage(AU);
65 bool ProcessImplicitDefs::canTurnIntoImplicitDef(MachineInstr *MI) {
66 if (!MI->isCopyLike() &&
67 !MI->isInsertSubreg() &&
68 !MI->isRegSequence() &&
71 for (MIOperands MO(MI); MO.isValid(); ++MO)
72 if (MO->isReg() && MO->isUse() && MO->readsReg())
77 void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) {
78 DEBUG(dbgs() << "Processing " << *MI);
79 unsigned Reg = MI->getOperand(0).getReg();
81 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
82 // For virtual registers, mark all uses as <undef>, and convert users to
83 // implicit-def when possible.
84 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
86 MachineInstr *UserMI = MO.getParent();
87 if (!canTurnIntoImplicitDef(UserMI))
89 DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI);
90 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
91 WorkList.insert(UserMI);
93 MI->eraseFromParent();
97 // This is a physreg implicit-def.
98 // Look for the first instruction to use or define an alias.
99 MachineBasicBlock::instr_iterator UserMI = MI;
100 MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end();
102 for (++UserMI; UserMI != UserE; ++UserMI) {
103 for (MIOperands MO(UserMI); MO.isValid(); ++MO) {
106 unsigned UserReg = MO->getReg();
107 if (!TargetRegisterInfo::isPhysicalRegister(UserReg) ||
108 !TRI->regsOverlap(Reg, UserReg))
110 // UserMI uses or redefines Reg. Set <undef> flags on all uses.
119 // If we found the using MI, we can erase the IMPLICIT_DEF.
121 DEBUG(dbgs() << "Physreg user: " << *UserMI);
122 MI->eraseFromParent();
126 // Using instr wasn't found, it could be in another block.
127 // Leave the physreg IMPLICIT_DEF, but trim any extra operands.
128 for (unsigned i = MI->getNumOperands() - 1; i; --i)
129 MI->RemoveOperand(i);
130 DEBUG(dbgs() << "Keeping physreg: " << *MI);
133 /// processImplicitDefs - Process IMPLICIT_DEF instructions and turn them into
134 /// <undef> operands.
135 bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) {
137 DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n"
138 << "********** Function: " << MF.getName() << '\n');
140 bool Changed = false;
142 TII = MF.getSubtarget().getInstrInfo();
143 TRI = MF.getSubtarget().getRegisterInfo();
144 MRI = &MF.getRegInfo();
145 assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form.");
146 assert(WorkList.empty() && "Inconsistent worklist state");
148 for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end();
150 // Scan the basic block for implicit defs.
151 for (MachineBasicBlock::instr_iterator MBBI = MFI->instr_begin(),
152 MBBE = MFI->instr_end(); MBBI != MBBE; ++MBBI)
153 if (MBBI->isImplicitDef())
154 WorkList.insert(MBBI);
156 if (WorkList.empty())
159 DEBUG(dbgs() << "BB#" << MFI->getNumber() << " has " << WorkList.size()
160 << " implicit defs.\n");
163 // Drain the WorkList to recursively process any new implicit defs.
164 do processImplicitDef(WorkList.pop_back_val());
165 while (!WorkList.empty());