1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 // This pass provides an optional shrink wrapping variant of prolog/epilog
18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
20 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "pei"
23 #include "PrologEpilogInserter.h"
24 #include "llvm/ADT/IndexedMap.h"
25 #include "llvm/ADT/STLExtras.h"
26 #include "llvm/ADT/SmallSet.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/CodeGen/MachineDominators.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/CodeGen/MachineLoopInfo.h"
32 #include "llvm/CodeGen/MachineModuleInfo.h"
33 #include "llvm/CodeGen/MachineRegisterInfo.h"
34 #include "llvm/CodeGen/RegisterScavenging.h"
35 #include "llvm/IR/InlineAsm.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/Compiler.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/raw_ostream.h"
40 #include "llvm/Target/TargetFrameLowering.h"
41 #include "llvm/Target/TargetInstrInfo.h"
42 #include "llvm/Target/TargetMachine.h"
43 #include "llvm/Target/TargetRegisterInfo.h"
49 char &llvm::PrologEpilogCodeInserterID = PEI::ID;
51 static cl::opt<unsigned>
52 WarnStackSize("warn-stack-size", cl::Hidden, cl::init((unsigned)-1),
53 cl::desc("Warn for stack size bigger than the given"
56 INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
57 "Prologue/Epilogue Insertion", false, false)
58 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
59 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
60 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
61 INITIALIZE_PASS_END(PEI, "prologepilog",
62 "Prologue/Epilogue Insertion & Frame Finalization",
65 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
66 STATISTIC(NumBytesStackSpace,
67 "Number of bytes used for stack in all functions");
69 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
70 /// frame indexes with appropriate references.
72 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
73 const Function* F = Fn.getFunction();
74 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
75 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
77 assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
79 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
80 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
82 // Calculate the MaxCallFrameSize and AdjustsStack variables for the
83 // function's frame information. Also eliminates call frame pseudo
85 calculateCallsInformation(Fn);
87 // Allow the target machine to make some adjustments to the function
88 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
89 TFI->processFunctionBeforeCalleeSavedScan(Fn, RS);
91 // Scan the function for modified callee saved registers and insert spill code
92 // for any callee saved registers that are modified.
93 calculateCalleeSavedRegisters(Fn);
95 // Determine placement of CSR spill/restore code:
96 // - With shrink wrapping, place spills and restores to tightly
97 // enclose regions in the Machine CFG of the function where
99 // - Without shink wrapping (default), place all spills in the
100 // entry block, all restores in return blocks.
101 placeCSRSpillsAndRestores(Fn);
103 // Add the code to save and restore the callee saved registers
104 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
106 insertCSRSpillsAndRestores(Fn);
108 // Allow the target machine to make final modifications to the function
109 // before the frame layout is finalized.
110 TFI->processFunctionBeforeFrameFinalized(Fn, RS);
112 // Calculate actual frame offsets for all abstract stack objects...
113 calculateFrameObjectOffsets(Fn);
115 // Add prolog and epilog code to the function. This function is required
116 // to align the stack frame as necessary for any stack variables or
117 // called functions. Because of this, calculateCalleeSavedRegisters()
118 // must be called before this function in order to set the AdjustsStack
119 // and MaxCallFrameSize variables.
120 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
122 insertPrologEpilogCode(Fn);
124 // Replace all MO_FrameIndex operands with physical register references
125 // and actual offsets.
127 replaceFrameIndices(Fn);
129 // If register scavenging is needed, as we've enabled doing it as a
130 // post-pass, scavenge the virtual registers that frame index elimiation
132 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
133 scavengeFrameVirtualRegs(Fn);
135 // Clear any vregs created by virtual scavenging.
136 Fn.getRegInfo().clearVirtRegs();
138 // Warn on stack size when we exceeds the given limit.
139 MachineFrameInfo *MFI = Fn.getFrameInfo();
140 if (WarnStackSize.getNumOccurrences() > 0 &&
141 WarnStackSize < MFI->getStackSize())
142 errs() << "warning: Stack size limit exceeded (" << MFI->getStackSize()
143 << ") in " << Fn.getName() << ".\n";
150 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
151 /// variables for the function's frame information and eliminate call frame
152 /// pseudo instructions.
153 void PEI::calculateCallsInformation(MachineFunction &Fn) {
154 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
155 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
156 MachineFrameInfo *MFI = Fn.getFrameInfo();
158 unsigned MaxCallFrameSize = 0;
159 bool AdjustsStack = MFI->adjustsStack();
161 // Get the function call frame set-up and tear-down instruction opcode
162 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
163 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
165 // Early exit for targets which have no call frame setup/destroy pseudo
167 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
170 std::vector<MachineBasicBlock::iterator> FrameSDOps;
171 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
172 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
173 if (I->getOpcode() == FrameSetupOpcode ||
174 I->getOpcode() == FrameDestroyOpcode) {
175 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
176 " instructions should have a single immediate argument!");
177 unsigned Size = I->getOperand(0).getImm();
178 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
180 FrameSDOps.push_back(I);
181 } else if (I->isInlineAsm()) {
182 // Some inline asm's need a stack frame, as indicated by operand 1.
183 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
184 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
188 MFI->setAdjustsStack(AdjustsStack);
189 MFI->setMaxCallFrameSize(MaxCallFrameSize);
191 for (std::vector<MachineBasicBlock::iterator>::iterator
192 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
193 MachineBasicBlock::iterator I = *i;
195 // If call frames are not being included as part of the stack frame, and
196 // the target doesn't indicate otherwise, remove the call frame pseudos
197 // here. The sub/add sp instruction pairs are still inserted, but we don't
198 // need to track the SP adjustment for frame index elimination.
199 if (TFI->canSimplifyCallFramePseudos(Fn))
200 TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
205 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved
207 void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
208 const TargetRegisterInfo *RegInfo = F.getTarget().getRegisterInfo();
209 const TargetFrameLowering *TFI = F.getTarget().getFrameLowering();
210 MachineFrameInfo *MFI = F.getFrameInfo();
212 // Get the callee saved register list...
213 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&F);
215 // These are used to keep track the callee-save area. Initialize them.
216 MinCSFrameIndex = INT_MAX;
219 // Early exit for targets which have no callee saved registers.
220 if (CSRegs == 0 || CSRegs[0] == 0)
223 // In Naked functions we aren't going to save any registers.
224 if (F.getFunction()->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
228 std::vector<CalleeSavedInfo> CSI;
229 for (unsigned i = 0; CSRegs[i]; ++i) {
230 unsigned Reg = CSRegs[i];
231 // Functions which call __builtin_unwind_init get all their registers saved.
232 if (F.getRegInfo().isPhysRegUsed(Reg) || F.getMMI().callsUnwindInit()) {
233 // If the reg is modified, save it!
234 CSI.push_back(CalleeSavedInfo(Reg));
239 return; // Early exit if no callee saved registers are modified!
241 unsigned NumFixedSpillSlots;
242 const TargetFrameLowering::SpillSlot *FixedSpillSlots =
243 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
245 // Now that we know which registers need to be saved and restored, allocate
246 // stack slots for them.
247 for (std::vector<CalleeSavedInfo>::iterator
248 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
249 unsigned Reg = I->getReg();
250 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
253 if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
254 I->setFrameIdx(FrameIdx);
258 // Check to see if this physreg must be spilled to a particular stack slot
260 const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
261 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
262 FixedSlot->Reg != Reg)
265 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
266 // Nope, just spill it anywhere convenient.
267 unsigned Align = RC->getAlignment();
268 unsigned StackAlign = TFI->getStackAlignment();
270 // We may not be able to satisfy the desired alignment specification of
271 // the TargetRegisterClass if the stack alignment is smaller. Use the
273 Align = std::min(Align, StackAlign);
274 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
275 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
276 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
278 // Spill it to the stack where we must.
279 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true);
282 I->setFrameIdx(FrameIdx);
285 MFI->setCalleeSavedInfo(CSI);
288 /// insertCSRSpillsAndRestores - Insert spill and restore code for
289 /// callee saved registers used in the function, handling shrink wrapping.
291 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
292 // Get callee saved register information.
293 MachineFrameInfo *MFI = Fn.getFrameInfo();
294 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
296 MFI->setCalleeSavedInfoValid(true);
298 // Early exit if no callee saved registers are modified!
302 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
303 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
304 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
305 MachineBasicBlock::iterator I;
307 if (!ShrinkWrapThisFunction) {
308 // Spill using target interface.
309 I = EntryBlock->begin();
310 if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
311 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
312 // Add the callee-saved register as live-in.
313 // It's killed at the spill.
314 EntryBlock->addLiveIn(CSI[i].getReg());
316 // Insert the spill to the stack frame.
317 unsigned Reg = CSI[i].getReg();
318 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
319 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
320 CSI[i].getFrameIdx(), RC, TRI);
324 // Restore using target interface.
325 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
326 MachineBasicBlock* MBB = ReturnBlocks[ri];
329 // Skip over all terminator instructions, which are part of the return
331 MachineBasicBlock::iterator I2 = I;
332 while (I2 != MBB->begin() && (--I2)->isTerminator())
335 bool AtStart = I == MBB->begin();
336 MachineBasicBlock::iterator BeforeI = I;
340 // Restore all registers immediately before the return and any
341 // terminators that precede it.
342 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
343 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
344 unsigned Reg = CSI[i].getReg();
345 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
346 TII.loadRegFromStackSlot(*MBB, I, Reg,
347 CSI[i].getFrameIdx(),
349 assert(I != MBB->begin() &&
350 "loadRegFromStackSlot didn't insert any code!");
351 // Insert in reverse order. loadRegFromStackSlot can insert
352 // multiple instructions.
366 std::vector<CalleeSavedInfo> blockCSI;
367 for (CSRegBlockMap::iterator BI = CSRSave.begin(),
368 BE = CSRSave.end(); BI != BE; ++BI) {
369 MachineBasicBlock* MBB = BI->first;
370 CSRegSet save = BI->second;
376 for (CSRegSet::iterator RI = save.begin(),
377 RE = save.end(); RI != RE; ++RI) {
378 blockCSI.push_back(CSI[*RI]);
380 assert(blockCSI.size() > 0 &&
381 "Could not collect callee saved register info");
385 // When shrink wrapping, use stack slot stores/loads.
386 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
387 // Add the callee-saved register as live-in.
388 // It's killed at the spill.
389 MBB->addLiveIn(blockCSI[i].getReg());
391 // Insert the spill to the stack frame.
392 unsigned Reg = blockCSI[i].getReg();
393 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
394 TII.storeRegToStackSlot(*MBB, I, Reg,
396 blockCSI[i].getFrameIdx(),
401 for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
402 BE = CSRRestore.end(); BI != BE; ++BI) {
403 MachineBasicBlock* MBB = BI->first;
404 CSRegSet restore = BI->second;
410 for (CSRegSet::iterator RI = restore.begin(),
411 RE = restore.end(); RI != RE; ++RI) {
412 blockCSI.push_back(CSI[*RI]);
414 assert(blockCSI.size() > 0 &&
415 "Could not find callee saved register info");
417 // If MBB is empty and needs restores, insert at the _beginning_.
424 // Skip over all terminator instructions, which are part of the
426 if (! I->isTerminator()) {
429 MachineBasicBlock::iterator I2 = I;
430 while (I2 != MBB->begin() && (--I2)->isTerminator())
435 bool AtStart = I == MBB->begin();
436 MachineBasicBlock::iterator BeforeI = I;
440 // Restore all registers immediately before the return and any
441 // terminators that precede it.
442 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
443 unsigned Reg = blockCSI[i].getReg();
444 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
445 TII.loadRegFromStackSlot(*MBB, I, Reg,
446 blockCSI[i].getFrameIdx(),
448 assert(I != MBB->begin() &&
449 "loadRegFromStackSlot didn't insert any code!");
450 // Insert in reverse order. loadRegFromStackSlot can insert
451 // multiple instructions.
462 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
464 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
465 bool StackGrowsDown, int64_t &Offset,
466 unsigned &MaxAlign) {
467 // If the stack grows down, add the object size to find the lowest address.
469 Offset += MFI->getObjectSize(FrameIdx);
471 unsigned Align = MFI->getObjectAlignment(FrameIdx);
473 // If the alignment of this object is greater than that of the stack, then
474 // increase the stack alignment to match.
475 MaxAlign = std::max(MaxAlign, Align);
477 // Adjust to alignment boundary.
478 Offset = (Offset + Align - 1) / Align * Align;
480 if (StackGrowsDown) {
481 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
482 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
484 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
485 MFI->setObjectOffset(FrameIdx, Offset);
486 Offset += MFI->getObjectSize(FrameIdx);
490 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
491 /// abstract stack objects.
493 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
494 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
496 bool StackGrowsDown =
497 TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
499 // Loop over all of the stack objects, assigning sequential addresses...
500 MachineFrameInfo *MFI = Fn.getFrameInfo();
502 // Start at the beginning of the local area.
503 // The Offset is the distance from the stack top in the direction
504 // of stack growth -- so it's always nonnegative.
505 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
507 LocalAreaOffset = -LocalAreaOffset;
508 assert(LocalAreaOffset >= 0
509 && "Local area offset should be in direction of stack growth");
510 int64_t Offset = LocalAreaOffset;
512 // If there are fixed sized objects that are preallocated in the local area,
513 // non-fixed objects can't be allocated right at the start of local area.
514 // We currently don't support filling in holes in between fixed sized
515 // objects, so we adjust 'Offset' to point to the end of last fixed sized
516 // preallocated object.
517 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
519 if (StackGrowsDown) {
520 // The maximum distance from the stack pointer is at lower address of
521 // the object -- which is given by offset. For down growing stack
522 // the offset is negative, so we negate the offset to get the distance.
523 FixedOff = -MFI->getObjectOffset(i);
525 // The maximum distance from the start pointer is at the upper
526 // address of the object.
527 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
529 if (FixedOff > Offset) Offset = FixedOff;
532 // First assign frame offsets to stack objects that are used to spill
533 // callee saved registers.
534 if (StackGrowsDown) {
535 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
536 // If the stack grows down, we need to add the size to find the lowest
537 // address of the object.
538 Offset += MFI->getObjectSize(i);
540 unsigned Align = MFI->getObjectAlignment(i);
541 // Adjust to alignment boundary
542 Offset = (Offset+Align-1)/Align*Align;
544 MFI->setObjectOffset(i, -Offset); // Set the computed offset
547 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
548 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
549 unsigned Align = MFI->getObjectAlignment(i);
550 // Adjust to alignment boundary
551 Offset = (Offset+Align-1)/Align*Align;
553 MFI->setObjectOffset(i, Offset);
554 Offset += MFI->getObjectSize(i);
558 unsigned MaxAlign = MFI->getMaxAlignment();
560 // Make sure the special register scavenging spill slot is closest to the
561 // incoming stack pointer if a frame pointer is required and is closer
562 // to the incoming rather than the final stack pointer.
563 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
564 bool EarlyScavengingSlots = (TFI.hasFP(Fn) &&
565 TFI.isFPCloseToIncomingSP() &&
566 RegInfo->useFPForScavengingIndex(Fn) &&
567 !RegInfo->needsStackRealignment(Fn));
568 if (RS && EarlyScavengingSlots) {
569 SmallVector<int, 2> SFIs;
570 RS->getScavengingFrameIndices(SFIs);
571 for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
572 IE = SFIs.end(); I != IE; ++I)
573 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
576 // FIXME: Once this is working, then enable flag will change to a target
577 // check for whether the frame is large enough to want to use virtual
578 // frame index registers. Functions which don't want/need this optimization
579 // will continue to use the existing code path.
580 if (MFI->getUseLocalStackAllocationBlock()) {
581 unsigned Align = MFI->getLocalFrameMaxAlign();
583 // Adjust to alignment boundary.
584 Offset = (Offset + Align - 1) / Align * Align;
586 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
588 // Resolve offsets for objects in the local block.
589 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
590 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
591 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
592 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
594 MFI->setObjectOffset(Entry.first, FIOffset);
596 // Allocate the local block
597 Offset += MFI->getLocalFrameSize();
599 MaxAlign = std::max(Align, MaxAlign);
602 // Make sure that the stack protector comes before the local variables on the
604 SmallSet<int, 16> LargeStackObjs;
605 if (MFI->getStackProtectorIndex() >= 0) {
606 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
609 // Assign large stack objects first.
610 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
611 if (MFI->isObjectPreAllocated(i) &&
612 MFI->getUseLocalStackAllocationBlock())
614 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
616 if (RS && RS->isScavengingFrameIndex((int)i))
618 if (MFI->isDeadObjectIndex(i))
620 if (MFI->getStackProtectorIndex() == (int)i)
622 if (!MFI->MayNeedStackProtector(i))
625 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
626 LargeStackObjs.insert(i);
630 // Then assign frame offsets to stack objects that are not used to spill
631 // callee saved registers.
632 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
633 if (MFI->isObjectPreAllocated(i) &&
634 MFI->getUseLocalStackAllocationBlock())
636 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
638 if (RS && RS->isScavengingFrameIndex((int)i))
640 if (MFI->isDeadObjectIndex(i))
642 if (MFI->getStackProtectorIndex() == (int)i)
644 if (LargeStackObjs.count(i))
647 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
650 // Make sure the special register scavenging spill slot is closest to the
652 if (RS && !EarlyScavengingSlots) {
653 SmallVector<int, 2> SFIs;
654 RS->getScavengingFrameIndices(SFIs);
655 for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
656 IE = SFIs.end(); I != IE; ++I)
657 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
660 if (!TFI.targetHandlesStackFrameRounding()) {
661 // If we have reserved argument space for call sites in the function
662 // immediately on entry to the current function, count it as part of the
663 // overall stack size.
664 if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
665 Offset += MFI->getMaxCallFrameSize();
667 // Round up the size to a multiple of the alignment. If the function has
668 // any calls or alloca's, align to the target's StackAlignment value to
669 // ensure that the callee's frame or the alloca data is suitably aligned;
670 // otherwise, for leaf functions, align to the TransientStackAlignment
673 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
674 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
675 StackAlign = TFI.getStackAlignment();
677 StackAlign = TFI.getTransientStackAlignment();
679 // If the frame pointer is eliminated, all frame offsets will be relative to
680 // SP not FP. Align to MaxAlign so this works.
681 StackAlign = std::max(StackAlign, MaxAlign);
682 unsigned AlignMask = StackAlign - 1;
683 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
686 // Update frame info to pretend that this is part of the stack...
687 int64_t StackSize = Offset - LocalAreaOffset;
688 MFI->setStackSize(StackSize);
689 NumBytesStackSpace += StackSize;
692 /// insertPrologEpilogCode - Scan the function for modified callee saved
693 /// registers, insert spill code for these callee saved registers, then add
694 /// prolog and epilog code to the function.
696 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
697 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
699 // Add prologue to the function...
700 TFI.emitPrologue(Fn);
702 // Add epilogue to restore the callee-save registers in each exiting block
703 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
704 // If last instruction is a return instruction, add an epilogue
705 if (!I->empty() && I->back().isReturn())
706 TFI.emitEpilogue(Fn, *I);
709 // Emit additional code that is required to support segmented stacks, if
710 // we've been asked for it. This, when linked with a runtime with support
711 // for segmented stacks (libgcc is one), will result in allocating stack
712 // space in small chunks instead of one large contiguous block.
713 if (Fn.getTarget().Options.EnableSegmentedStacks)
714 TFI.adjustForSegmentedStacks(Fn);
716 // Emit additional code that is required to explicitly handle the stack in
717 // HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
718 // approach is rather similar to that of Segmented Stacks, but it uses a
719 // different conditional check and another BIF for allocating more stack
721 if (Fn.getFunction()->getCallingConv() == CallingConv::HiPE)
722 TFI.adjustForHiPEPrologue(Fn);
725 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
726 /// register references and actual offsets.
728 void PEI::replaceFrameIndices(MachineFunction &Fn) {
729 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
731 const TargetMachine &TM = Fn.getTarget();
732 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
733 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
734 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
735 const TargetFrameLowering *TFI = TM.getFrameLowering();
736 bool StackGrowsDown =
737 TFI->getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
738 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
739 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
741 for (MachineFunction::iterator BB = Fn.begin(),
742 E = Fn.end(); BB != E; ++BB) {
744 int SPAdjCount = 0; // frame setup / destroy count.
746 int SPAdj = 0; // SP offset due to call frame setup / destroy.
747 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
749 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
751 if (I->getOpcode() == FrameSetupOpcode ||
752 I->getOpcode() == FrameDestroyOpcode) {
754 // Track whether we see even pairs of them
755 SPAdjCount += I->getOpcode() == FrameSetupOpcode ? 1 : -1;
757 // Remember how much SP has been adjusted to create the call
759 int Size = I->getOperand(0).getImm();
761 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
762 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
767 MachineBasicBlock::iterator PrevI = BB->end();
768 if (I != BB->begin()) PrevI = prior(I);
769 TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
771 // Visit the instructions created by eliminateCallFramePseudoInstr().
772 if (PrevI == BB->end())
773 I = BB->begin(); // The replaced instr was the first in the block.
775 I = llvm::next(PrevI);
779 MachineInstr *MI = I;
781 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
782 if (!MI->getOperand(i).isFI())
785 // Frame indicies in debug values are encoded in a target independent
786 // way with simply the frame index and offset rather than any
787 // target-specific addressing mode.
788 if (MI->isDebugValue()) {
789 assert(i == 0 && "Frame indicies can only appear as the first "
790 "operand of a DBG_VALUE machine instruction");
792 MachineOperand &Offset = MI->getOperand(1);
793 Offset.setImm(Offset.getImm() +
794 TFI->getFrameIndexReference(
795 Fn, MI->getOperand(0).getIndex(), Reg));
796 MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
800 // Some instructions (e.g. inline asm instructions) can have
801 // multiple frame indices and/or cause eliminateFrameIndex
802 // to insert more than one instruction. We need the register
803 // scavenger to go through all of these instructions so that
804 // it can update its register information. We keep the
805 // iterator at the point before insertion so that we can
806 // revisit them in full.
807 bool AtBeginning = (I == BB->begin());
808 if (!AtBeginning) --I;
810 // If this instruction has a FrameIndex operand, we need to
811 // use that target machine register info object to eliminate
813 TRI.eliminateFrameIndex(MI, SPAdj, i,
814 FrameIndexVirtualScavenging ? NULL : RS);
816 // Reset the iterator if we were at the beginning of the BB.
826 if (DoIncr && I != BB->end()) ++I;
828 // Update register states.
829 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
832 // If we have evenly matched pairs of frame setup / destroy instructions,
833 // make sure the adjustments come out to zero. If we don't have matched
834 // pairs, we can't be sure the missing bit isn't in another basic block
835 // due to a custom inserter playing tricks, so just asserting SPAdj==0
836 // isn't sufficient. See tMOVCC on Thumb1, for example.
837 assert((SPAdjCount || SPAdj == 0) &&
838 "Unbalanced call frame setup / destroy pairs?");
842 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
843 /// with physical registers. Use the register scavenger to find an
844 /// appropriate register to use.
846 /// FIXME: Iterating over the instruction stream is unnecessary. We can simply
847 /// iterate over the vreg use list, which at this point only contains machine
848 /// operands for which eliminateFrameIndex need a new scratch reg.
849 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
850 // Run through the instructions and find any virtual registers.
851 for (MachineFunction::iterator BB = Fn.begin(),
852 E = Fn.end(); BB != E; ++BB) {
853 RS->enterBasicBlock(BB);
857 // The instruction stream may change in the loop, so check BB->end()
859 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
860 // We might end up here again with a NULL iterator if we scavenged a
861 // register for which we inserted spill code for definition by what was
862 // originally the first instruction in BB.
863 if (I == MachineBasicBlock::iterator(NULL))
866 MachineInstr *MI = I;
867 MachineBasicBlock::iterator J = llvm::next(I);
868 MachineBasicBlock::iterator P = I == BB->begin() ?
869 MachineBasicBlock::iterator(NULL) : llvm::prior(I);
871 // RS should process this instruction before we might scavenge at this
872 // location. This is because we might be replacing a virtual register
873 // defined by this instruction, and if so, registers killed by this
874 // instruction are available, and defined registers are not.
877 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
878 if (MI->getOperand(i).isReg()) {
879 MachineOperand &MO = MI->getOperand(i);
880 unsigned Reg = MO.getReg();
883 if (!TargetRegisterInfo::isVirtualRegister(Reg))
886 // When we first encounter a new virtual register, it
887 // must be a definition.
888 assert(MI->getOperand(i).isDef() &&
889 "frame index virtual missing def!");
890 // Scavenge a new scratch register
891 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
892 unsigned ScratchReg = RS->scavengeRegister(RC, J, SPAdj);
896 // Replace this reference to the virtual register with the
898 assert (ScratchReg && "Missing scratch register!");
899 Fn.getRegInfo().replaceRegWith(Reg, ScratchReg);
901 // Because this instruction was processed by the RS before this
902 // register was allocated, make sure that the RS now records the
903 // register as being used.
904 RS->setUsed(ScratchReg);
908 // If the scavenger needed to use one of its spill slots, the
909 // spill code will have been inserted in between I and J. This is a
910 // problem because we need the spill code before I: Move I to just
912 if (I != llvm::prior(J)) {
913 BB->splice(J, BB, I);
915 // Before we move I, we need to prepare the RS to visit I again.
916 // Specifically, RS will assert if it sees uses of registers that
917 // it believes are undefined. Because we have already processed
918 // register kills in I, when it visits I again, it will believe that
919 // those registers are undefined. To avoid this situation, unprocess
920 // the instruction I.
921 assert(RS->getCurrentPosition() == I &&
922 "The register scavenger has an unexpected position");