1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 //===----------------------------------------------------------------------===//
19 #include "llvm/ADT/IndexedMap.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/SetVector.h"
22 #include "llvm/ADT/SmallSet.h"
23 #include "llvm/ADT/Statistic.h"
24 #include "llvm/CodeGen/MachineDominators.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineInstr.h"
27 #include "llvm/CodeGen/MachineLoopInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/CodeGen/Passes.h"
31 #include "llvm/CodeGen/RegisterScavenging.h"
32 #include "llvm/CodeGen/StackProtector.h"
33 #include "llvm/CodeGen/WinEHFuncInfo.h"
34 #include "llvm/IR/DiagnosticInfo.h"
35 #include "llvm/IR/InlineAsm.h"
36 #include "llvm/IR/LLVMContext.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Compiler.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/raw_ostream.h"
41 #include "llvm/Target/TargetFrameLowering.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetMachine.h"
44 #include "llvm/Target/TargetRegisterInfo.h"
45 #include "llvm/Target/TargetSubtargetInfo.h"
50 #define DEBUG_TYPE "pei"
53 class PEI : public MachineFunctionPass {
56 PEI() : MachineFunctionPass(ID) {
57 initializePEIPass(*PassRegistry::getPassRegistry());
60 void getAnalysisUsage(AnalysisUsage &AU) const override;
62 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
63 /// frame indexes with appropriate references.
65 bool runOnMachineFunction(MachineFunction &Fn) override;
70 // MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved
71 // stack frame indexes.
72 unsigned MinCSFrameIndex, MaxCSFrameIndex;
74 // Save and Restore blocks of the current function.
75 MachineBasicBlock *SaveBlock;
76 SmallVector<MachineBasicBlock *, 4> RestoreBlocks;
78 // Flag to control whether to use the register scavenger to resolve
79 // frame index materialization registers. Set according to
80 // TRI->requiresFrameIndexScavenging() for the current function.
81 bool FrameIndexVirtualScavenging;
83 void calculateSets(MachineFunction &Fn);
84 void calculateCallsInformation(MachineFunction &Fn);
85 void assignCalleeSavedSpillSlots(MachineFunction &Fn,
86 const BitVector &SavedRegs);
87 void insertCSRSpillsAndRestores(MachineFunction &Fn);
88 void calculateFrameObjectOffsets(MachineFunction &Fn);
89 void replaceFrameIndices(MachineFunction &Fn);
90 void replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn,
92 void scavengeFrameVirtualRegs(MachineFunction &Fn);
93 void insertPrologEpilogCode(MachineFunction &Fn);
95 // Convenience for recognizing return blocks.
96 bool isReturnBlock(const MachineBasicBlock *MBB) const;
101 char &llvm::PrologEpilogCodeInserterID = PEI::ID;
103 static cl::opt<unsigned>
104 WarnStackSize("warn-stack-size", cl::Hidden, cl::init((unsigned)-1),
105 cl::desc("Warn for stack size bigger than the given"
108 INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
109 "Prologue/Epilogue Insertion", false, false)
110 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
111 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
112 INITIALIZE_PASS_DEPENDENCY(StackProtector)
113 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
114 INITIALIZE_PASS_END(PEI, "prologepilog",
115 "Prologue/Epilogue Insertion & Frame Finalization",
118 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
119 STATISTIC(NumBytesStackSpace,
120 "Number of bytes used for stack in all functions");
122 void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
123 AU.setPreservesCFG();
124 AU.addPreserved<MachineLoopInfo>();
125 AU.addPreserved<MachineDominatorTree>();
126 AU.addRequired<StackProtector>();
127 AU.addRequired<TargetPassConfig>();
128 MachineFunctionPass::getAnalysisUsage(AU);
131 bool PEI::isReturnBlock(const MachineBasicBlock* MBB) const {
132 return (MBB && !MBB->empty() && MBB->back().isReturn());
135 /// Compute the set of return blocks
136 void PEI::calculateSets(MachineFunction &Fn) {
137 const MachineFrameInfo *MFI = Fn.getFrameInfo();
139 // Even when we do not change any CSR, we still want to insert the
140 // prologue and epilogue of the function.
141 // So set the save points for those.
143 // Use the points found by shrink-wrapping, if any.
144 if (MFI->getSavePoint()) {
145 SaveBlock = MFI->getSavePoint();
146 assert(MFI->getRestorePoint() && "Both restore and save must be set");
147 MachineBasicBlock *RestoreBlock = MFI->getRestorePoint();
148 // If RestoreBlock does not have any successor and is not a return block
149 // then the end point is unreachable and we do not need to insert any
151 if (!RestoreBlock->succ_empty() || isReturnBlock(RestoreBlock))
152 RestoreBlocks.push_back(RestoreBlock);
156 // Save refs to entry and return blocks.
157 SaveBlock = Fn.begin();
158 for (MachineFunction::iterator MBB = Fn.begin(), E = Fn.end();
160 if (isReturnBlock(MBB))
161 RestoreBlocks.push_back(MBB);
166 /// StackObjSet - A set of stack object indexes
167 typedef SmallSetVector<int, 8> StackObjSet;
169 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
170 /// frame indexes with appropriate references.
172 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
173 const Function* F = Fn.getFunction();
174 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
175 const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
177 assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
179 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : nullptr;
180 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
182 // Calculate the MaxCallFrameSize and AdjustsStack variables for the
183 // function's frame information. Also eliminates call frame pseudo
185 calculateCallsInformation(Fn);
187 // Determine which of the registers in the callee save list should be saved.
189 TFI->determineCalleeSaves(Fn, SavedRegs, RS);
191 // Insert spill code for any callee saved registers that are modified.
192 assignCalleeSavedSpillSlots(Fn, SavedRegs);
194 // Determine placement of CSR spill/restore code:
195 // place all spills in the entry block, all restores in return blocks.
198 // Add the code to save and restore the callee saved registers
199 if (!F->hasFnAttribute(Attribute::Naked))
200 insertCSRSpillsAndRestores(Fn);
202 // Allow the target machine to make final modifications to the function
203 // before the frame layout is finalized.
204 TFI->processFunctionBeforeFrameFinalized(Fn, RS);
206 // Calculate actual frame offsets for all abstract stack objects...
207 calculateFrameObjectOffsets(Fn);
209 // Add prolog and epilog code to the function. This function is required
210 // to align the stack frame as necessary for any stack variables or
211 // called functions. Because of this, calculateCalleeSavedRegisters()
212 // must be called before this function in order to set the AdjustsStack
213 // and MaxCallFrameSize variables.
214 if (!F->hasFnAttribute(Attribute::Naked))
215 insertPrologEpilogCode(Fn);
217 // Replace all MO_FrameIndex operands with physical register references
218 // and actual offsets.
220 replaceFrameIndices(Fn);
222 // If register scavenging is needed, as we've enabled doing it as a
223 // post-pass, scavenge the virtual registers that frame index elimination
225 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
226 scavengeFrameVirtualRegs(Fn);
228 // Clear any vregs created by virtual scavenging.
229 Fn.getRegInfo().clearVirtRegs();
231 // Warn on stack size when we exceeds the given limit.
232 MachineFrameInfo *MFI = Fn.getFrameInfo();
233 uint64_t StackSize = MFI->getStackSize();
234 if (WarnStackSize.getNumOccurrences() > 0 && WarnStackSize < StackSize) {
235 DiagnosticInfoStackSize DiagStackSize(*F, StackSize);
236 F->getContext().diagnose(DiagStackSize);
240 RestoreBlocks.clear();
244 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
245 /// variables for the function's frame information and eliminate call frame
246 /// pseudo instructions.
247 void PEI::calculateCallsInformation(MachineFunction &Fn) {
248 const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
249 const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
250 MachineFrameInfo *MFI = Fn.getFrameInfo();
252 unsigned MaxCallFrameSize = 0;
253 bool AdjustsStack = MFI->adjustsStack();
255 // Get the function call frame set-up and tear-down instruction opcode
256 unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
257 unsigned FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
259 // Early exit for targets which have no call frame setup/destroy pseudo
261 if (FrameSetupOpcode == ~0u && FrameDestroyOpcode == ~0u)
264 std::vector<MachineBasicBlock::iterator> FrameSDOps;
265 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
266 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
267 if (I->getOpcode() == FrameSetupOpcode ||
268 I->getOpcode() == FrameDestroyOpcode) {
269 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
270 " instructions should have a single immediate argument!");
271 unsigned Size = I->getOperand(0).getImm();
272 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
274 FrameSDOps.push_back(I);
275 } else if (I->isInlineAsm()) {
276 // Some inline asm's need a stack frame, as indicated by operand 1.
277 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
278 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
282 MFI->setAdjustsStack(AdjustsStack);
283 MFI->setMaxCallFrameSize(MaxCallFrameSize);
285 for (std::vector<MachineBasicBlock::iterator>::iterator
286 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
287 MachineBasicBlock::iterator I = *i;
289 // If call frames are not being included as part of the stack frame, and
290 // the target doesn't indicate otherwise, remove the call frame pseudos
291 // here. The sub/add sp instruction pairs are still inserted, but we don't
292 // need to track the SP adjustment for frame index elimination.
293 if (TFI->canSimplifyCallFramePseudos(Fn))
294 TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
298 void PEI::assignCalleeSavedSpillSlots(MachineFunction &F,
299 const BitVector &SavedRegs) {
300 // These are used to keep track the callee-save area. Initialize them.
301 MinCSFrameIndex = INT_MAX;
304 if (SavedRegs.empty())
307 const TargetRegisterInfo *RegInfo = F.getSubtarget().getRegisterInfo();
308 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&F);
310 std::vector<CalleeSavedInfo> CSI;
311 for (unsigned i = 0; CSRegs[i]; ++i) {
312 unsigned Reg = CSRegs[i];
313 if (SavedRegs.test(Reg))
314 CSI.push_back(CalleeSavedInfo(Reg));
317 const TargetFrameLowering *TFI = F.getSubtarget().getFrameLowering();
318 MachineFrameInfo *MFI = F.getFrameInfo();
319 if (!TFI->assignCalleeSavedSpillSlots(F, RegInfo, CSI)) {
320 // If target doesn't implement this, use generic code.
323 return; // Early exit if no callee saved registers are modified!
325 unsigned NumFixedSpillSlots;
326 const TargetFrameLowering::SpillSlot *FixedSpillSlots =
327 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
329 // Now that we know which registers need to be saved and restored, allocate
330 // stack slots for them.
331 for (std::vector<CalleeSavedInfo>::iterator I = CSI.begin(), E = CSI.end();
333 unsigned Reg = I->getReg();
334 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
337 if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
338 I->setFrameIdx(FrameIdx);
342 // Check to see if this physreg must be spilled to a particular stack slot
344 const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
345 while (FixedSlot != FixedSpillSlots + NumFixedSpillSlots &&
346 FixedSlot->Reg != Reg)
349 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
350 // Nope, just spill it anywhere convenient.
351 unsigned Align = RC->getAlignment();
352 unsigned StackAlign = TFI->getStackAlignment();
354 // We may not be able to satisfy the desired alignment specification of
355 // the TargetRegisterClass if the stack alignment is smaller. Use the
357 Align = std::min(Align, StackAlign);
358 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
359 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
360 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
362 // Spill it to the stack where we must.
364 MFI->CreateFixedSpillStackObject(RC->getSize(), FixedSlot->Offset);
367 I->setFrameIdx(FrameIdx);
371 MFI->setCalleeSavedInfo(CSI);
374 /// Helper function to update the liveness information for the callee-saved
376 static void updateLiveness(MachineFunction &MF) {
377 MachineFrameInfo *MFI = MF.getFrameInfo();
378 // Visited will contain all the basic blocks that are in the region
379 // where the callee saved registers are alive:
380 // - Anything that is not Save or Restore -> LiveThrough.
382 // - Restore -> LiveOut.
383 // The live-out is not attached to the block, so no need to keep
384 // Restore in this set.
385 SmallPtrSet<MachineBasicBlock *, 8> Visited;
386 SmallVector<MachineBasicBlock *, 8> WorkList;
387 MachineBasicBlock *Entry = &MF.front();
388 MachineBasicBlock *Save = MFI->getSavePoint();
394 WorkList.push_back(Entry);
395 Visited.insert(Entry);
397 Visited.insert(Save);
399 MachineBasicBlock *Restore = MFI->getRestorePoint();
401 // By construction Restore cannot be visited, otherwise it
402 // means there exists a path to Restore that does not go
404 WorkList.push_back(Restore);
406 while (!WorkList.empty()) {
407 const MachineBasicBlock *CurBB = WorkList.pop_back_val();
408 // By construction, the region that is after the save point is
409 // dominated by the Save and post-dominated by the Restore.
412 // Enqueue all the successors not already visited.
413 // Those are by construction either before Save or after Restore.
414 for (MachineBasicBlock *SuccBB : CurBB->successors())
415 if (Visited.insert(SuccBB).second)
416 WorkList.push_back(SuccBB);
419 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
421 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
422 for (MachineBasicBlock *MBB : Visited)
423 // Add the callee-saved register as live-in.
424 // It's killed at the spill.
425 MBB->addLiveIn(CSI[i].getReg());
429 /// insertCSRSpillsAndRestores - Insert spill and restore code for
430 /// callee saved registers used in the function.
432 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
433 // Get callee saved register information.
434 MachineFrameInfo *MFI = Fn.getFrameInfo();
435 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
437 MFI->setCalleeSavedInfoValid(true);
439 // Early exit if no callee saved registers are modified!
443 const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
444 const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
445 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
446 MachineBasicBlock::iterator I;
448 // Spill using target interface.
449 I = SaveBlock->begin();
450 if (!TFI->spillCalleeSavedRegisters(*SaveBlock, I, CSI, TRI)) {
451 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
452 // Insert the spill to the stack frame.
453 unsigned Reg = CSI[i].getReg();
454 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
455 TII.storeRegToStackSlot(*SaveBlock, I, Reg, true, CSI[i].getFrameIdx(),
459 // Update the live-in information of all the blocks up to the save point.
462 // Restore using target interface.
463 for (MachineBasicBlock *MBB : RestoreBlocks) {
466 // Skip over all terminator instructions, which are part of the return
468 MachineBasicBlock::iterator I2 = I;
469 while (I2 != MBB->begin() && (--I2)->isTerminator())
472 bool AtStart = I == MBB->begin();
473 MachineBasicBlock::iterator BeforeI = I;
477 // Restore all registers immediately before the return and any
478 // terminators that precede it.
479 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
480 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
481 unsigned Reg = CSI[i].getReg();
482 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
483 TII.loadRegFromStackSlot(*MBB, I, Reg, CSI[i].getFrameIdx(), RC, TRI);
484 assert(I != MBB->begin() &&
485 "loadRegFromStackSlot didn't insert any code!");
486 // Insert in reverse order. loadRegFromStackSlot can insert
487 // multiple instructions.
499 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
501 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
502 bool StackGrowsDown, int64_t &Offset,
503 unsigned &MaxAlign) {
504 // If the stack grows down, add the object size to find the lowest address.
506 Offset += MFI->getObjectSize(FrameIdx);
508 unsigned Align = MFI->getObjectAlignment(FrameIdx);
510 // If the alignment of this object is greater than that of the stack, then
511 // increase the stack alignment to match.
512 MaxAlign = std::max(MaxAlign, Align);
514 // Adjust to alignment boundary.
515 Offset = (Offset + Align - 1) / Align * Align;
517 if (StackGrowsDown) {
518 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
519 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
521 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
522 MFI->setObjectOffset(FrameIdx, Offset);
523 Offset += MFI->getObjectSize(FrameIdx);
527 /// AssignProtectedObjSet - Helper function to assign large stack objects (i.e.,
528 /// those required to be close to the Stack Protector) to stack offsets.
530 AssignProtectedObjSet(const StackObjSet &UnassignedObjs,
531 SmallSet<int, 16> &ProtectedObjs,
532 MachineFrameInfo *MFI, bool StackGrowsDown,
533 int64_t &Offset, unsigned &MaxAlign) {
535 for (StackObjSet::const_iterator I = UnassignedObjs.begin(),
536 E = UnassignedObjs.end(); I != E; ++I) {
538 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
539 ProtectedObjs.insert(i);
543 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
544 /// abstract stack objects.
546 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
547 const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
548 StackProtector *SP = &getAnalysis<StackProtector>();
550 bool StackGrowsDown =
551 TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
553 // Loop over all of the stack objects, assigning sequential addresses...
554 MachineFrameInfo *MFI = Fn.getFrameInfo();
556 // Start at the beginning of the local area.
557 // The Offset is the distance from the stack top in the direction
558 // of stack growth -- so it's always nonnegative.
559 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
561 LocalAreaOffset = -LocalAreaOffset;
562 assert(LocalAreaOffset >= 0
563 && "Local area offset should be in direction of stack growth");
564 int64_t Offset = LocalAreaOffset;
566 // If there are fixed sized objects that are preallocated in the local area,
567 // non-fixed objects can't be allocated right at the start of local area.
568 // We currently don't support filling in holes in between fixed sized
569 // objects, so we adjust 'Offset' to point to the end of last fixed sized
570 // preallocated object.
571 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
573 if (StackGrowsDown) {
574 // The maximum distance from the stack pointer is at lower address of
575 // the object -- which is given by offset. For down growing stack
576 // the offset is negative, so we negate the offset to get the distance.
577 FixedOff = -MFI->getObjectOffset(i);
579 // The maximum distance from the start pointer is at the upper
580 // address of the object.
581 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
583 if (FixedOff > Offset) Offset = FixedOff;
586 // First assign frame offsets to stack objects that are used to spill
587 // callee saved registers.
588 if (StackGrowsDown) {
589 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
590 // If the stack grows down, we need to add the size to find the lowest
591 // address of the object.
592 Offset += MFI->getObjectSize(i);
594 unsigned Align = MFI->getObjectAlignment(i);
595 // Adjust to alignment boundary
596 Offset = RoundUpToAlignment(Offset, Align);
598 MFI->setObjectOffset(i, -Offset); // Set the computed offset
601 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
602 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
603 unsigned Align = MFI->getObjectAlignment(i);
604 // Adjust to alignment boundary
605 Offset = RoundUpToAlignment(Offset, Align);
607 MFI->setObjectOffset(i, Offset);
608 Offset += MFI->getObjectSize(i);
612 unsigned MaxAlign = MFI->getMaxAlignment();
614 // Make sure the special register scavenging spill slot is closest to the
615 // incoming stack pointer if a frame pointer is required and is closer
616 // to the incoming rather than the final stack pointer.
617 const TargetRegisterInfo *RegInfo = Fn.getSubtarget().getRegisterInfo();
618 bool EarlyScavengingSlots = (TFI.hasFP(Fn) &&
619 TFI.isFPCloseToIncomingSP() &&
620 RegInfo->useFPForScavengingIndex(Fn) &&
621 !RegInfo->needsStackRealignment(Fn));
622 if (RS && EarlyScavengingSlots) {
623 SmallVector<int, 2> SFIs;
624 RS->getScavengingFrameIndices(SFIs);
625 for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
626 IE = SFIs.end(); I != IE; ++I)
627 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
630 // FIXME: Once this is working, then enable flag will change to a target
631 // check for whether the frame is large enough to want to use virtual
632 // frame index registers. Functions which don't want/need this optimization
633 // will continue to use the existing code path.
634 if (MFI->getUseLocalStackAllocationBlock()) {
635 unsigned Align = MFI->getLocalFrameMaxAlign();
637 // Adjust to alignment boundary.
638 Offset = RoundUpToAlignment(Offset, Align);
640 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
642 // Resolve offsets for objects in the local block.
643 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
644 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
645 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
646 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
648 MFI->setObjectOffset(Entry.first, FIOffset);
650 // Allocate the local block
651 Offset += MFI->getLocalFrameSize();
653 MaxAlign = std::max(Align, MaxAlign);
656 // Make sure that the stack protector comes before the local variables on the
658 SmallSet<int, 16> ProtectedObjs;
659 if (MFI->getStackProtectorIndex() >= 0) {
660 StackObjSet LargeArrayObjs;
661 StackObjSet SmallArrayObjs;
662 StackObjSet AddrOfObjs;
664 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
667 // Assign large stack objects first.
668 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
669 if (MFI->isObjectPreAllocated(i) &&
670 MFI->getUseLocalStackAllocationBlock())
672 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
674 if (RS && RS->isScavengingFrameIndex((int)i))
676 if (MFI->isDeadObjectIndex(i))
678 if (MFI->getStackProtectorIndex() == (int)i)
681 switch (SP->getSSPLayout(MFI->getObjectAllocation(i))) {
682 case StackProtector::SSPLK_None:
684 case StackProtector::SSPLK_SmallArray:
685 SmallArrayObjs.insert(i);
687 case StackProtector::SSPLK_AddrOf:
688 AddrOfObjs.insert(i);
690 case StackProtector::SSPLK_LargeArray:
691 LargeArrayObjs.insert(i);
694 llvm_unreachable("Unexpected SSPLayoutKind.");
697 AssignProtectedObjSet(LargeArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
699 AssignProtectedObjSet(SmallArrayObjs, ProtectedObjs, MFI, StackGrowsDown,
701 AssignProtectedObjSet(AddrOfObjs, ProtectedObjs, MFI, StackGrowsDown,
705 // Then assign frame offsets to stack objects that are not used to spill
706 // callee saved registers.
707 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
708 if (MFI->isObjectPreAllocated(i) &&
709 MFI->getUseLocalStackAllocationBlock())
711 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
713 if (RS && RS->isScavengingFrameIndex((int)i))
715 if (MFI->isDeadObjectIndex(i))
717 if (MFI->getStackProtectorIndex() == (int)i)
719 if (ProtectedObjs.count(i))
722 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
725 // Make sure the special register scavenging spill slot is closest to the
727 if (RS && !EarlyScavengingSlots) {
728 SmallVector<int, 2> SFIs;
729 RS->getScavengingFrameIndices(SFIs);
730 for (SmallVectorImpl<int>::iterator I = SFIs.begin(),
731 IE = SFIs.end(); I != IE; ++I)
732 AdjustStackOffset(MFI, *I, StackGrowsDown, Offset, MaxAlign);
735 if (!TFI.targetHandlesStackFrameRounding()) {
736 // If we have reserved argument space for call sites in the function
737 // immediately on entry to the current function, count it as part of the
738 // overall stack size.
739 if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
740 Offset += MFI->getMaxCallFrameSize();
742 // Round up the size to a multiple of the alignment. If the function has
743 // any calls or alloca's, align to the target's StackAlignment value to
744 // ensure that the callee's frame or the alloca data is suitably aligned;
745 // otherwise, for leaf functions, align to the TransientStackAlignment
748 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
749 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
750 StackAlign = TFI.getStackAlignment();
752 StackAlign = TFI.getTransientStackAlignment();
754 // If the frame pointer is eliminated, all frame offsets will be relative to
755 // SP not FP. Align to MaxAlign so this works.
756 StackAlign = std::max(StackAlign, MaxAlign);
757 Offset = RoundUpToAlignment(Offset, StackAlign);
760 // Update frame info to pretend that this is part of the stack...
761 int64_t StackSize = Offset - LocalAreaOffset;
762 MFI->setStackSize(StackSize);
763 NumBytesStackSpace += StackSize;
766 /// insertPrologEpilogCode - Scan the function for modified callee saved
767 /// registers, insert spill code for these callee saved registers, then add
768 /// prolog and epilog code to the function.
770 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
771 const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
773 // Add prologue to the function...
774 TFI.emitPrologue(Fn, *SaveBlock);
776 // Add epilogue to restore the callee-save registers in each exiting block.
777 for (MachineBasicBlock *RestoreBlock : RestoreBlocks)
778 TFI.emitEpilogue(Fn, *RestoreBlock);
780 // Emit additional code that is required to support segmented stacks, if
781 // we've been asked for it. This, when linked with a runtime with support
782 // for segmented stacks (libgcc is one), will result in allocating stack
783 // space in small chunks instead of one large contiguous block.
784 if (Fn.shouldSplitStack())
785 TFI.adjustForSegmentedStacks(Fn, *SaveBlock);
787 // Emit additional code that is required to explicitly handle the stack in
788 // HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
789 // approach is rather similar to that of Segmented Stacks, but it uses a
790 // different conditional check and another BIF for allocating more stack
792 if (Fn.getFunction()->getCallingConv() == CallingConv::HiPE)
793 TFI.adjustForHiPEPrologue(Fn, *SaveBlock);
796 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
797 /// register references and actual offsets.
799 void PEI::replaceFrameIndices(MachineFunction &Fn) {
800 const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
801 if (!TFI.needsFrameIndexResolution(Fn)) return;
803 MachineModuleInfo &MMI = Fn.getMMI();
804 const Function *F = Fn.getFunction();
805 const Function *ParentF = MMI.getWinEHParent(F);
808 WinEHFuncInfo &FuncInfo = MMI.getWinEHFuncInfo(Fn.getFunction());
809 // FIXME: This should be unconditional but we have bugs in the preparation
811 if (FuncInfo.UnwindHelpFrameIdx != INT_MAX)
812 FuncInfo.UnwindHelpFrameOffset = TFI.getFrameIndexReferenceFromSP(
813 Fn, FuncInfo.UnwindHelpFrameIdx, FrameReg);
814 } else if (MMI.hasWinEHFuncInfo(F)) {
815 WinEHFuncInfo &FuncInfo = MMI.getWinEHFuncInfo(Fn.getFunction());
816 auto I = FuncInfo.CatchHandlerParentFrameObjIdx.find(F);
817 if (I != FuncInfo.CatchHandlerParentFrameObjIdx.end())
818 FuncInfo.CatchHandlerParentFrameObjOffset[F] =
819 TFI.getFrameIndexReferenceFromSP(Fn, I->second, FrameReg);
822 // Store SPAdj at exit of a basic block.
823 SmallVector<int, 8> SPState;
824 SPState.resize(Fn.getNumBlockIDs());
825 SmallPtrSet<MachineBasicBlock*, 8> Reachable;
827 // Iterate over the reachable blocks in DFS order.
828 for (auto DFI = df_ext_begin(&Fn, Reachable), DFE = df_ext_end(&Fn, Reachable);
831 // Check the exit state of the DFS stack predecessor.
832 if (DFI.getPathLength() >= 2) {
833 MachineBasicBlock *StackPred = DFI.getPath(DFI.getPathLength() - 2);
834 assert(Reachable.count(StackPred) &&
835 "DFS stack predecessor is already visited.\n");
836 SPAdj = SPState[StackPred->getNumber()];
838 MachineBasicBlock *BB = *DFI;
839 replaceFrameIndices(BB, Fn, SPAdj);
840 SPState[BB->getNumber()] = SPAdj;
843 // Handle the unreachable blocks.
844 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
845 if (Reachable.count(BB))
846 // Already handled in DFS traversal.
849 replaceFrameIndices(BB, Fn, SPAdj);
853 void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn,
855 assert(Fn.getSubtarget().getRegisterInfo() &&
856 "getRegisterInfo() must be implemented!");
857 const TargetInstrInfo &TII = *Fn.getSubtarget().getInstrInfo();
858 const TargetRegisterInfo &TRI = *Fn.getSubtarget().getRegisterInfo();
859 const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
860 unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
861 unsigned FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
863 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
865 bool InsideCallSequence = false;
867 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
869 if (I->getOpcode() == FrameSetupOpcode ||
870 I->getOpcode() == FrameDestroyOpcode) {
871 InsideCallSequence = (I->getOpcode() == FrameSetupOpcode);
872 SPAdj += TII.getSPAdjust(I);
874 MachineBasicBlock::iterator PrevI = BB->end();
875 if (I != BB->begin()) PrevI = std::prev(I);
876 TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
878 // Visit the instructions created by eliminateCallFramePseudoInstr().
879 if (PrevI == BB->end())
880 I = BB->begin(); // The replaced instr was the first in the block.
882 I = std::next(PrevI);
886 MachineInstr *MI = I;
888 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
889 if (!MI->getOperand(i).isFI())
892 // Frame indicies in debug values are encoded in a target independent
893 // way with simply the frame index and offset rather than any
894 // target-specific addressing mode.
895 if (MI->isDebugValue()) {
896 assert(i == 0 && "Frame indicies can only appear as the first "
897 "operand of a DBG_VALUE machine instruction");
899 MachineOperand &Offset = MI->getOperand(1);
900 Offset.setImm(Offset.getImm() +
901 TFI->getFrameIndexReference(
902 Fn, MI->getOperand(0).getIndex(), Reg));
903 MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
907 // TODO: This code should be commoned with the code for
908 // PATCHPOINT. There's no good reason for the difference in
909 // implementation other than historical accident. The only
910 // remaining difference is the unconditional use of the stack
911 // pointer as the base register.
912 if (MI->getOpcode() == TargetOpcode::STATEPOINT) {
913 assert((!MI->isDebugValue() || i == 0) &&
914 "Frame indicies can only appear as the first operand of a "
915 "DBG_VALUE machine instruction");
917 MachineOperand &Offset = MI->getOperand(i + 1);
918 const unsigned refOffset =
919 TFI->getFrameIndexReferenceFromSP(Fn, MI->getOperand(i).getIndex(),
922 Offset.setImm(Offset.getImm() + refOffset);
923 MI->getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
927 // Some instructions (e.g. inline asm instructions) can have
928 // multiple frame indices and/or cause eliminateFrameIndex
929 // to insert more than one instruction. We need the register
930 // scavenger to go through all of these instructions so that
931 // it can update its register information. We keep the
932 // iterator at the point before insertion so that we can
933 // revisit them in full.
934 bool AtBeginning = (I == BB->begin());
935 if (!AtBeginning) --I;
937 // If this instruction has a FrameIndex operand, we need to
938 // use that target machine register info object to eliminate
940 TRI.eliminateFrameIndex(MI, SPAdj, i,
941 FrameIndexVirtualScavenging ? nullptr : RS);
943 // Reset the iterator if we were at the beginning of the BB.
953 // If we are looking at a call sequence, we need to keep track of
954 // the SP adjustment made by each instruction in the sequence.
955 // This includes both the frame setup/destroy pseudos (handled above),
956 // as well as other instructions that have side effects w.r.t the SP.
957 // Note that this must come after eliminateFrameIndex, because
958 // if I itself referred to a frame index, we shouldn't count its own
960 if (MI && InsideCallSequence)
961 SPAdj += TII.getSPAdjust(MI);
963 if (DoIncr && I != BB->end()) ++I;
965 // Update register states.
966 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
970 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
971 /// with physical registers. Use the register scavenger to find an
972 /// appropriate register to use.
974 /// FIXME: Iterating over the instruction stream is unnecessary. We can simply
975 /// iterate over the vreg use list, which at this point only contains machine
976 /// operands for which eliminateFrameIndex need a new scratch reg.
978 PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
979 // Run through the instructions and find any virtual registers.
980 for (MachineFunction::iterator BB = Fn.begin(),
981 E = Fn.end(); BB != E; ++BB) {
982 RS->enterBasicBlock(BB);
986 // The instruction stream may change in the loop, so check BB->end()
988 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
989 // We might end up here again with a NULL iterator if we scavenged a
990 // register for which we inserted spill code for definition by what was
991 // originally the first instruction in BB.
992 if (I == MachineBasicBlock::iterator(nullptr))
995 MachineInstr *MI = I;
996 MachineBasicBlock::iterator J = std::next(I);
997 MachineBasicBlock::iterator P =
998 I == BB->begin() ? MachineBasicBlock::iterator(nullptr)
1001 // RS should process this instruction before we might scavenge at this
1002 // location. This is because we might be replacing a virtual register
1003 // defined by this instruction, and if so, registers killed by this
1004 // instruction are available, and defined registers are not.
1007 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
1008 if (MI->getOperand(i).isReg()) {
1009 MachineOperand &MO = MI->getOperand(i);
1010 unsigned Reg = MO.getReg();
1013 if (!TargetRegisterInfo::isVirtualRegister(Reg))
1016 // When we first encounter a new virtual register, it
1017 // must be a definition.
1018 assert(MI->getOperand(i).isDef() &&
1019 "frame index virtual missing def!");
1020 // Scavenge a new scratch register
1021 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
1022 unsigned ScratchReg = RS->scavengeRegister(RC, J, SPAdj);
1026 // Replace this reference to the virtual register with the
1027 // scratch register.
1028 assert (ScratchReg && "Missing scratch register!");
1029 Fn.getRegInfo().replaceRegWith(Reg, ScratchReg);
1031 // Because this instruction was processed by the RS before this
1032 // register was allocated, make sure that the RS now records the
1033 // register as being used.
1034 RS->setRegUsed(ScratchReg);
1038 // If the scavenger needed to use one of its spill slots, the
1039 // spill code will have been inserted in between I and J. This is a
1040 // problem because we need the spill code before I: Move I to just
1042 if (I != std::prev(J)) {
1043 BB->splice(J, BB, I);
1045 // Before we move I, we need to prepare the RS to visit I again.
1046 // Specifically, RS will assert if it sees uses of registers that
1047 // it believes are undefined. Because we have already processed
1048 // register kills in I, when it visits I again, it will believe that
1049 // those registers are undefined. To avoid this situation, unprocess
1050 // the instruction I.
1051 assert(RS->getCurrentPosition() == I &&
1052 "The register scavenger has an unexpected position");