1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 // This pass provides an optional shrink wrapping variant of prolog/epilog
18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
20 //===----------------------------------------------------------------------===//
22 #include "PrologEpilogInserter.h"
23 #include "llvm/CodeGen/MachineDominators.h"
24 #include "llvm/CodeGen/MachineLoopInfo.h"
25 #include "llvm/CodeGen/MachineInstr.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29 #include "llvm/CodeGen/RegisterScavenging.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetInstrInfo.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/Compiler.h"
36 #include "llvm/ADT/IndexedMap.h"
37 #include "llvm/ADT/STLExtras.h"
44 static RegisterPass<PEI>
45 X("prologepilog", "Prologue/Epilogue Insertion");
47 /// createPrologEpilogCodeInserter - This function returns a pass that inserts
48 /// prolog and epilog code, and eliminates abstract frame references.
50 FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); }
52 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
53 /// frame indexes with appropriate references.
55 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
56 const Function* F = Fn.getFunction();
57 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
58 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
59 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
61 // Get MachineModuleInfo so that we can track the construction of the
63 if (MachineModuleInfo *MMI = getAnalysisIfAvailable<MachineModuleInfo>())
64 Fn.getFrameInfo()->setMachineModuleInfo(MMI);
66 // Calculate the MaxCallFrameSize and HasCalls variables for the function's
67 // frame information. Also eliminates call frame pseudo instructions.
68 calculateCallsInformation(Fn);
70 // Allow the target machine to make some adjustments to the function
71 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
72 TRI->processFunctionBeforeCalleeSavedScan(Fn, RS);
74 // Scan the function for modified callee saved registers and insert spill code
75 // for any callee saved registers that are modified.
76 calculateCalleeSavedRegisters(Fn);
78 // Determine placement of CSR spill/restore code:
79 // - with shrink wrapping, place spills and restores to tightly
80 // enclose regions in the Machine CFG of the function where
81 // they are used. Without shrink wrapping
82 // - default (no shrink wrapping), place all spills in the
83 // entry block, all restores in return blocks.
84 placeCSRSpillsAndRestores(Fn);
86 // Add the code to save and restore the callee saved registers
87 if (!F->hasFnAttr(Attribute::Naked))
88 insertCSRSpillsAndRestores(Fn);
90 // Allow the target machine to make final modifications to the function
91 // before the frame layout is finalized.
92 TRI->processFunctionBeforeFrameFinalized(Fn);
94 // Calculate actual frame offsets for all abstract stack objects...
95 calculateFrameObjectOffsets(Fn);
97 // Add prolog and epilog code to the function. This function is required
98 // to align the stack frame as necessary for any stack variables or
99 // called functions. Because of this, calculateCalleeSavedRegisters
100 // must be called before this function in order to set the HasCalls
101 // and MaxCallFrameSize variables.
102 if (!F->hasFnAttr(Attribute::Naked))
103 insertPrologEpilogCode(Fn);
105 // Replace all MO_FrameIndex operands with physical register references
106 // and actual offsets.
108 replaceFrameIndices(Fn);
110 // If register scavenging is needed, as we've enabled doing it as a
111 // post-pass, scavenge the virtual registers that frame index elimiation
113 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
114 scavengeFrameVirtualRegs(Fn);
122 void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
123 AU.setPreservesCFG();
124 if (ShrinkWrapping || ShrinkWrapFunc != "") {
125 AU.addRequired<MachineLoopInfo>();
126 AU.addRequired<MachineDominatorTree>();
128 AU.addPreserved<MachineLoopInfo>();
129 AU.addPreserved<MachineDominatorTree>();
130 MachineFunctionPass::getAnalysisUsage(AU);
134 /// calculateCallsInformation - Calculate the MaxCallFrameSize and HasCalls
135 /// variables for the function's frame information and eliminate call frame
136 /// pseudo instructions.
137 void PEI::calculateCallsInformation(MachineFunction &Fn) {
138 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
139 MachineFrameInfo *FFI = Fn.getFrameInfo();
141 unsigned MaxCallFrameSize = 0;
142 bool HasCalls = FFI->hasCalls();
144 // Get the function call frame set-up and tear-down instruction opcode
145 int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode();
146 int FrameDestroyOpcode = RegInfo->getCallFrameDestroyOpcode();
148 // Early exit for targets which have no call frame setup/destroy pseudo
150 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
153 std::vector<MachineBasicBlock::iterator> FrameSDOps;
154 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
155 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
156 if (I->getOpcode() == FrameSetupOpcode ||
157 I->getOpcode() == FrameDestroyOpcode) {
158 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
159 " instructions should have a single immediate argument!");
160 unsigned Size = I->getOperand(0).getImm();
161 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
163 FrameSDOps.push_back(I);
164 } else if (I->isInlineAsm()) {
165 // An InlineAsm might be a call; assume it is to get the stack frame
166 // aligned correctly for calls.
170 FFI->setHasCalls(HasCalls);
171 FFI->setMaxCallFrameSize(MaxCallFrameSize);
173 for (std::vector<MachineBasicBlock::iterator>::iterator
174 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
175 MachineBasicBlock::iterator I = *i;
177 // If call frames are not being included as part of the stack frame, and
178 // there is no dynamic allocation (therefore referencing frame slots off
179 // sp), leave the pseudo ops alone. We'll eliminate them later.
180 if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
181 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
186 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved
188 void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
189 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
190 const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo();
191 MachineFrameInfo *FFI = Fn.getFrameInfo();
193 // Get the callee saved register list...
194 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
196 // These are used to keep track the callee-save area. Initialize them.
197 MinCSFrameIndex = INT_MAX;
200 // Early exit for targets which have no callee saved registers.
201 if (CSRegs == 0 || CSRegs[0] == 0)
204 // Figure out which *callee saved* registers are modified by the current
205 // function, thus needing to be saved and restored in the prolog/epilog.
206 const TargetRegisterClass * const *CSRegClasses =
207 RegInfo->getCalleeSavedRegClasses(&Fn);
209 std::vector<CalleeSavedInfo> CSI;
210 for (unsigned i = 0; CSRegs[i]; ++i) {
211 unsigned Reg = CSRegs[i];
212 if (Fn.getRegInfo().isPhysRegUsed(Reg)) {
213 // If the reg is modified, save it!
214 CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
216 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
217 *AliasSet; ++AliasSet) { // Check alias registers too.
218 if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) {
219 CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
227 return; // Early exit if no callee saved registers are modified!
229 unsigned NumFixedSpillSlots;
230 const TargetFrameInfo::SpillSlot *FixedSpillSlots =
231 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
233 // Now that we know which registers need to be saved and restored, allocate
234 // stack slots for them.
235 for (std::vector<CalleeSavedInfo>::iterator
236 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
237 unsigned Reg = I->getReg();
238 const TargetRegisterClass *RC = I->getRegClass();
241 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
242 I->setFrameIdx(FrameIdx);
246 // Check to see if this physreg must be spilled to a particular stack slot
248 const TargetFrameInfo::SpillSlot *FixedSlot = FixedSpillSlots;
249 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
250 FixedSlot->Reg != Reg)
253 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
254 // Nope, just spill it anywhere convenient.
255 unsigned Align = RC->getAlignment();
256 unsigned StackAlign = TFI->getStackAlignment();
258 // We may not be able to satisfy the desired alignment specification of
259 // the TargetRegisterClass if the stack alignment is smaller. Use the
261 Align = std::min(Align, StackAlign);
262 FrameIdx = FFI->CreateStackObject(RC->getSize(), Align, true);
263 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
264 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
266 // Spill it to the stack where we must.
267 FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset,
271 I->setFrameIdx(FrameIdx);
274 FFI->setCalleeSavedInfo(CSI);
277 /// insertCSRSpillsAndRestores - Insert spill and restore code for
278 /// callee saved registers used in the function, handling shrink wrapping.
280 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
281 // Get callee saved register information.
282 MachineFrameInfo *FFI = Fn.getFrameInfo();
283 const std::vector<CalleeSavedInfo> &CSI = FFI->getCalleeSavedInfo();
285 FFI->setCalleeSavedInfoValid(true);
287 // Early exit if no callee saved registers are modified!
291 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
292 MachineBasicBlock::iterator I;
294 if (! ShrinkWrapThisFunction) {
295 // Spill using target interface.
296 I = EntryBlock->begin();
297 if (!TII.spillCalleeSavedRegisters(*EntryBlock, I, CSI)) {
298 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
299 // Add the callee-saved register as live-in.
300 // It's killed at the spill.
301 EntryBlock->addLiveIn(CSI[i].getReg());
303 // Insert the spill to the stack frame.
304 TII.storeRegToStackSlot(*EntryBlock, I, CSI[i].getReg(), true,
305 CSI[i].getFrameIdx(), CSI[i].getRegClass());
309 // Restore using target interface.
310 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
311 MachineBasicBlock* MBB = ReturnBlocks[ri];
314 // Skip over all terminator instructions, which are part of the return
316 MachineBasicBlock::iterator I2 = I;
317 while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator())
320 bool AtStart = I == MBB->begin();
321 MachineBasicBlock::iterator BeforeI = I;
325 // Restore all registers immediately before the return and any
326 // terminators that preceed it.
327 if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI)) {
328 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
329 TII.loadRegFromStackSlot(*MBB, I, CSI[i].getReg(),
330 CSI[i].getFrameIdx(),
331 CSI[i].getRegClass());
332 assert(I != MBB->begin() &&
333 "loadRegFromStackSlot didn't insert any code!");
334 // Insert in reverse order. loadRegFromStackSlot can insert
335 // multiple instructions.
349 std::vector<CalleeSavedInfo> blockCSI;
350 for (CSRegBlockMap::iterator BI = CSRSave.begin(),
351 BE = CSRSave.end(); BI != BE; ++BI) {
352 MachineBasicBlock* MBB = BI->first;
353 CSRegSet save = BI->second;
359 for (CSRegSet::iterator RI = save.begin(),
360 RE = save.end(); RI != RE; ++RI) {
361 blockCSI.push_back(CSI[*RI]);
363 assert(blockCSI.size() > 0 &&
364 "Could not collect callee saved register info");
368 // When shrink wrapping, use stack slot stores/loads.
369 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
370 // Add the callee-saved register as live-in.
371 // It's killed at the spill.
372 MBB->addLiveIn(blockCSI[i].getReg());
374 // Insert the spill to the stack frame.
375 TII.storeRegToStackSlot(*MBB, I, blockCSI[i].getReg(),
377 blockCSI[i].getFrameIdx(),
378 blockCSI[i].getRegClass());
382 for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
383 BE = CSRRestore.end(); BI != BE; ++BI) {
384 MachineBasicBlock* MBB = BI->first;
385 CSRegSet restore = BI->second;
391 for (CSRegSet::iterator RI = restore.begin(),
392 RE = restore.end(); RI != RE; ++RI) {
393 blockCSI.push_back(CSI[*RI]);
395 assert(blockCSI.size() > 0 &&
396 "Could not find callee saved register info");
398 // If MBB is empty and needs restores, insert at the _beginning_.
405 // Skip over all terminator instructions, which are part of the
407 if (! I->getDesc().isTerminator()) {
410 MachineBasicBlock::iterator I2 = I;
411 while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator())
416 bool AtStart = I == MBB->begin();
417 MachineBasicBlock::iterator BeforeI = I;
421 // Restore all registers immediately before the return and any
422 // terminators that preceed it.
423 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
424 TII.loadRegFromStackSlot(*MBB, I, blockCSI[i].getReg(),
425 blockCSI[i].getFrameIdx(),
426 blockCSI[i].getRegClass());
427 assert(I != MBB->begin() &&
428 "loadRegFromStackSlot didn't insert any code!");
429 // Insert in reverse order. loadRegFromStackSlot can insert
430 // multiple instructions.
441 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
443 AdjustStackOffset(MachineFrameInfo *FFI, int FrameIdx,
444 bool StackGrowsDown, int64_t &Offset,
445 unsigned &MaxAlign) {
446 // If the stack grows down, add the object size to find the lowest address.
448 Offset += FFI->getObjectSize(FrameIdx);
450 unsigned Align = FFI->getObjectAlignment(FrameIdx);
452 // If the alignment of this object is greater than that of the stack, then
453 // increase the stack alignment to match.
454 MaxAlign = std::max(MaxAlign, Align);
456 // Adjust to alignment boundary.
457 Offset = (Offset + Align - 1) / Align * Align;
459 if (StackGrowsDown) {
460 FFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
462 FFI->setObjectOffset(FrameIdx, Offset);
463 Offset += FFI->getObjectSize(FrameIdx);
467 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
468 /// abstract stack objects.
470 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
471 const TargetFrameInfo &TFI = *Fn.getTarget().getFrameInfo();
473 bool StackGrowsDown =
474 TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
476 // Loop over all of the stack objects, assigning sequential addresses...
477 MachineFrameInfo *FFI = Fn.getFrameInfo();
479 // Start at the beginning of the local area.
480 // The Offset is the distance from the stack top in the direction
481 // of stack growth -- so it's always nonnegative.
482 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
484 LocalAreaOffset = -LocalAreaOffset;
485 assert(LocalAreaOffset >= 0
486 && "Local area offset should be in direction of stack growth");
487 int64_t Offset = LocalAreaOffset;
489 // If there are fixed sized objects that are preallocated in the local area,
490 // non-fixed objects can't be allocated right at the start of local area.
491 // We currently don't support filling in holes in between fixed sized
492 // objects, so we adjust 'Offset' to point to the end of last fixed sized
493 // preallocated object.
494 for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) {
496 if (StackGrowsDown) {
497 // The maximum distance from the stack pointer is at lower address of
498 // the object -- which is given by offset. For down growing stack
499 // the offset is negative, so we negate the offset to get the distance.
500 FixedOff = -FFI->getObjectOffset(i);
502 // The maximum distance from the start pointer is at the upper
503 // address of the object.
504 FixedOff = FFI->getObjectOffset(i) + FFI->getObjectSize(i);
506 if (FixedOff > Offset) Offset = FixedOff;
509 // First assign frame offsets to stack objects that are used to spill
510 // callee saved registers.
511 if (StackGrowsDown) {
512 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
513 // If stack grows down, we need to add size of find the lowest
514 // address of the object.
515 Offset += FFI->getObjectSize(i);
517 unsigned Align = FFI->getObjectAlignment(i);
518 // Adjust to alignment boundary
519 Offset = (Offset+Align-1)/Align*Align;
521 FFI->setObjectOffset(i, -Offset); // Set the computed offset
524 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
525 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
526 unsigned Align = FFI->getObjectAlignment(i);
527 // Adjust to alignment boundary
528 Offset = (Offset+Align-1)/Align*Align;
530 FFI->setObjectOffset(i, Offset);
531 Offset += FFI->getObjectSize(i);
535 unsigned MaxAlign = FFI->getMaxAlignment();
537 // Make sure the special register scavenging spill slot is closest to the
538 // frame pointer if a frame pointer is required.
539 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
540 if (RS && RegInfo->hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) {
541 int SFI = RS->getScavengingFrameIndex();
543 AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
546 // Make sure that the stack protector comes before the local variables on the
548 if (FFI->getStackProtectorIndex() >= 0)
549 AdjustStackOffset(FFI, FFI->getStackProtectorIndex(), StackGrowsDown,
552 // Then assign frame offsets to stack objects that are not used to spill
553 // callee saved registers.
554 for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
555 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
557 if (RS && (int)i == RS->getScavengingFrameIndex())
559 if (FFI->isDeadObjectIndex(i))
561 if (FFI->getStackProtectorIndex() == (int)i)
564 AdjustStackOffset(FFI, i, StackGrowsDown, Offset, MaxAlign);
567 // Make sure the special register scavenging spill slot is closest to the
569 if (RS && (!RegInfo->hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) {
570 int SFI = RS->getScavengingFrameIndex();
572 AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
575 if (!RegInfo->targetHandlesStackFrameRounding()) {
576 // If we have reserved argument space for call sites in the function
577 // immediately on entry to the current function, count it as part of the
578 // overall stack size.
579 if (FFI->hasCalls() && RegInfo->hasReservedCallFrame(Fn))
580 Offset += FFI->getMaxCallFrameSize();
582 // Round up the size to a multiple of the alignment. If the function has
583 // any calls or alloca's, align to the target's StackAlignment value to
584 // ensure that the callee's frame or the alloca data is suitably aligned;
585 // otherwise, for leaf functions, align to the TransientStackAlignment
588 if (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
589 (RegInfo->needsStackRealignment(Fn) && FFI->getObjectIndexEnd() != 0))
590 StackAlign = TFI.getStackAlignment();
592 StackAlign = TFI.getTransientStackAlignment();
593 // If the frame pointer is eliminated, all frame offsets will be relative
594 // to SP not FP; align to MaxAlign so this works.
595 StackAlign = std::max(StackAlign, MaxAlign);
596 unsigned AlignMask = StackAlign - 1;
597 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
600 // Update frame info to pretend that this is part of the stack...
601 FFI->setStackSize(Offset - LocalAreaOffset);
605 /// insertPrologEpilogCode - Scan the function for modified callee saved
606 /// registers, insert spill code for these callee saved registers, then add
607 /// prolog and epilog code to the function.
609 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
610 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
612 // Add prologue to the function...
613 TRI->emitPrologue(Fn);
615 // Add epilogue to restore the callee-save registers in each exiting block
616 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
617 // If last instruction is a return instruction, add an epilogue
618 if (!I->empty() && I->back().getDesc().isReturn())
619 TRI->emitEpilogue(Fn, *I);
624 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
625 /// register references and actual offsets.
627 void PEI::replaceFrameIndices(MachineFunction &Fn) {
628 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
630 const TargetMachine &TM = Fn.getTarget();
631 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
632 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
633 const TargetFrameInfo *TFI = TM.getFrameInfo();
634 bool StackGrowsDown =
635 TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
636 int FrameSetupOpcode = TRI.getCallFrameSetupOpcode();
637 int FrameDestroyOpcode = TRI.getCallFrameDestroyOpcode();
639 for (MachineFunction::iterator BB = Fn.begin(),
640 E = Fn.end(); BB != E; ++BB) {
641 int SPAdj = 0; // SP offset due to call frame setup / destroy.
642 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
644 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
646 if (I->getOpcode() == FrameSetupOpcode ||
647 I->getOpcode() == FrameDestroyOpcode) {
648 // Remember how much SP has been adjusted to create the call
650 int Size = I->getOperand(0).getImm();
652 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
653 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
658 MachineBasicBlock::iterator PrevI = BB->end();
659 if (I != BB->begin()) PrevI = prior(I);
660 TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
662 // Visit the instructions created by eliminateCallFramePseudoInstr().
663 if (PrevI == BB->end())
664 I = BB->begin(); // The replaced instr was the first in the block.
666 I = llvm::next(PrevI);
670 MachineInstr *MI = I;
672 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
673 if (MI->getOperand(i).isFI()) {
674 // Some instructions (e.g. inline asm instructions) can have
675 // multiple frame indices and/or cause eliminateFrameIndex
676 // to insert more than one instruction. We need the register
677 // scavenger to go through all of these instructions so that
678 // it can update its register information. We keep the
679 // iterator at the point before insertion so that we can
680 // revisit them in full.
681 bool AtBeginning = (I == BB->begin());
682 if (!AtBeginning) --I;
684 // If this instruction has a FrameIndex operand, we need to
685 // use that target machine register info object to eliminate
689 TRI.eliminateFrameIndex(MI, SPAdj, &Value,
690 FrameIndexVirtualScavenging ? NULL : RS);
692 assert (FrameIndexVirtualScavenging &&
693 "Not scavenging, but virtual returned from "
694 "eliminateFrameIndex()!");
695 FrameConstantRegMap[VReg] = FrameConstantEntry(Value, SPAdj);
698 // Reset the iterator if we were at the beginning of the BB.
708 if (DoIncr && I != BB->end()) ++I;
710 // Update register states.
711 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
714 assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
718 /// findLastUseReg - find the killing use of the specified register within
719 /// the instruciton range. Return the operand number of the kill in Operand.
720 static MachineBasicBlock::iterator
721 findLastUseReg(MachineBasicBlock::iterator I, MachineBasicBlock::iterator ME,
723 // Scan forward to find the last use of this virtual register
724 for (++I; I != ME; ++I) {
725 MachineInstr *MI = I;
726 bool isDefInsn = false;
727 bool isKillInsn = false;
728 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
729 if (MI->getOperand(i).isReg()) {
730 unsigned OpReg = MI->getOperand(i).getReg();
731 if (OpReg == 0 || !TargetRegisterInfo::isVirtualRegister(OpReg))
734 && "overlapping use of scavenged index register!");
735 // If this is the killing use, we have a candidate.
736 if (MI->getOperand(i).isKill())
738 else if (MI->getOperand(i).isDef())
741 if (isKillInsn && !isDefInsn)
744 // If we hit the end of the basic block, there was no kill of
745 // the virtual register, which is wrong.
746 assert (0 && "scavenged index register never killed!");
750 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
751 /// with physical registers. Use the register scavenger to find an
752 /// appropriate register to use.
753 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
754 // Run through the instructions and find any virtual registers.
755 for (MachineFunction::iterator BB = Fn.begin(),
756 E = Fn.end(); BB != E; ++BB) {
757 RS->enterBasicBlock(BB);
759 // FIXME: The logic flow in this function is still too convoluted.
760 // It needs a cleanup refactoring. Do that in preparation for tracking
761 // more than one scratch register value and using ranges to find
762 // available scratch registers.
763 unsigned CurrentVirtReg = 0;
764 unsigned CurrentScratchReg = 0;
765 bool havePrevValue = false;
767 MachineInstr *PrevLastUseMI = NULL;
768 unsigned PrevLastUseOp = 0;
769 bool trackingCurrentValue = false;
773 // The instruction stream may change in the loop, so check BB->end()
775 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
776 MachineInstr *MI = I;
777 bool isDefInsn = false;
778 bool isKillInsn = false;
779 bool clobbersScratchReg = false;
781 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
782 if (MI->getOperand(i).isReg()) {
783 MachineOperand &MO = MI->getOperand(i);
784 unsigned Reg = MO.getReg();
787 if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
788 // If we have a previous scratch reg, check and see if anything
789 // here kills whatever value is in there.
790 if (Reg == CurrentScratchReg) {
792 // Two-address operands implicitly kill
793 if (MO.isKill() || MI->isRegTiedToDefOperand(i))
794 clobbersScratchReg = true;
797 clobbersScratchReg = true;
802 // If this is a def, remember that this insn defines the value.
803 // This lets us properly consider insns which re-use the scratch
804 // register, such as r2 = sub r2, #imm, in the middle of the
809 // Have we already allocated a scratch register for this virtual?
810 if (Reg != CurrentVirtReg) {
811 // When we first encounter a new virtual register, it
812 // must be a definition.
813 assert(MI->getOperand(i).isDef() &&
814 "frame index virtual missing def!");
815 // We can't have nested virtual register live ranges because
816 // there's only a guarantee of one scavenged register at a time.
817 assert (CurrentVirtReg == 0 &&
818 "overlapping frame index virtual registers!");
820 // If the target gave us information about what's in the register,
821 // we can use that to re-use scratch regs.
822 DenseMap<unsigned, FrameConstantEntry>::iterator Entry =
823 FrameConstantRegMap.find(Reg);
824 trackingCurrentValue = Entry != FrameConstantRegMap.end();
825 if (trackingCurrentValue) {
826 SPAdj = (*Entry).second.second;
827 Value = (*Entry).second.first;
831 // If the scratch register from the last allocation is still
832 // available, see if the value matches. If it does, just re-use it.
833 if (trackingCurrentValue && havePrevValue && PrevValue == Value) {
834 // FIXME: This assumes that the instructions in the live range
835 // for the virtual register are exclusively for the purpose
836 // of populating the value in the register. That's reasonable
837 // for these frame index registers, but it's still a very, very
838 // strong assumption. rdar://7322732. Better would be to
839 // explicitly check each instruction in the range for references
840 // to the virtual register. Only delete those insns that
841 // touch the virtual register.
843 // Find the last use of the new virtual register. Remove all
844 // instruction between here and there, and update the current
845 // instruction to reference the last use insn instead.
846 MachineBasicBlock::iterator LastUseMI =
847 findLastUseReg(I, BB->end(), Reg);
849 // Remove all instructions up 'til the last use, since they're
850 // just calculating the value we already have.
851 BB->erase(I, LastUseMI);
854 // Extend the live range of the scratch register
855 PrevLastUseMI->getOperand(PrevLastUseOp).setIsKill(false);
856 RS->setUsed(CurrentScratchReg);
857 CurrentVirtReg = Reg;
859 // We deleted the instruction we were scanning the operands of.
860 // Jump back to the instruction iterator loop. Don't increment
861 // past this instruction since we updated the iterator already.
866 // Scavenge a new scratch register
867 CurrentVirtReg = Reg;
868 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
869 CurrentScratchReg = RS->FindUnusedReg(RC);
870 if (CurrentScratchReg == 0)
871 // No register is "free". Scavenge a register.
872 CurrentScratchReg = RS->scavengeRegister(RC, I, SPAdj);
876 // replace this reference to the virtual register with the
878 assert (CurrentScratchReg && "Missing scratch register!");
879 MI->getOperand(i).setReg(CurrentScratchReg);
881 if (MI->getOperand(i).isKill()) {
888 // If this is the last use of the scratch, stop tracking it. The
889 // last use will be a kill operand in an instruction that does
890 // not also define the scratch register.
891 if (isKillInsn && !isDefInsn) {
893 havePrevValue = trackingCurrentValue;
895 // Similarly, notice if instruction clobbered the value in the
896 // register we're tracking for possible later reuse. This is noted
897 // above, but enforced here since the value is still live while we
898 // process the rest of the operands of the instruction.
899 if (clobbersScratchReg) {
900 havePrevValue = false;
901 CurrentScratchReg = 0;