1 /* Title: PhyRegAlloc.h -*- C++ -*-
2 Author: Ruchira Sasanka
4 Purpose: This is the main entry point for register allocation.
9 * RegisterClasses: Each RegClass accepts a
10 TargetRegClass which contains machine specific info about that register
11 class. The code in the RegClass is machine independent and they use
12 access functions in the TargetRegClass object passed into it to get
13 machine specific info.
15 * Machine dependent work: All parts of the register coloring algorithm
16 except coloring of an individual node are machine independent.
19 #ifndef PHY_REG_ALLOC_H
20 #define PHY_REG_ALLOC_H
22 #include "llvm/CodeGen/LiveRangeInfo.h"
23 #include "Support/NonCopyable.h"
26 class MachineFunction;
28 class FunctionLiveVarInfo;
33 //----------------------------------------------------------------------------
34 // Class AddedInstrns:
35 // When register allocator inserts new instructions in to the existing
36 // instruction stream, it does NOT directly modify the instruction stream.
37 // Rather, it creates an object of AddedInstrns and stick it in the
38 // AddedInstrMap for an existing instruction. This class contains two vectors
39 // to store such instructions added before and after an existing instruction.
40 //----------------------------------------------------------------------------
43 std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst
44 std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
47 //----------------------------------------------------------------------------
49 // Main class the register allocator. Call allocateRegisters() to allocate
50 // registers for a Function.
51 //----------------------------------------------------------------------------
53 class PhyRegAlloc : public NonCopyable {
54 std::vector<RegClass *> RegClassList; // vector of register classes
55 const TargetMachine &TM; // target machine
56 const Function *Fn; // name of the function we work on
57 MachineFunction &MF; // descriptor for method's native code
58 FunctionLiveVarInfo *const LVI; // LV information for this method
59 // (already computed for BBs)
60 LiveRangeInfo LRI; // LR info (will be computed)
61 const TargetRegInfo &MRI; // Machine Register information
62 const unsigned NumOfRegClasses; // recorded here for efficiency
65 // AddedInstrMap - Used to store instrns added in this phase
66 std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
68 AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
69 LoopInfo *LoopDepthCalc; // to calculate loop depths
70 std::vector<unsigned> ResColList; // A set of reserved regs if desired.
74 PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
75 LoopInfo *LoopDepthCalc);
78 // main method called for allocating registers
80 void allocateRegisters();
83 // access to register classes by class ID
85 const RegClass* getRegClassByID(unsigned int id) const {
86 return RegClassList[id];
88 RegClass* getRegClassByID(unsigned int id) {
89 return RegClassList[id]; }
93 void addInterference(const Value *Def, const ValueSet *LVSet,
96 void addInterferencesForArgs();
97 void createIGNodeListsAndIGs();
98 void buildInterferenceGraphs();
100 void setCallInterferences(const MachineInstr *MInst,
101 const ValueSet *LVSetAft );
103 void move2DelayedInstr(const MachineInstr *OrigMI,
104 const MachineInstr *DelayedMI );
106 void markUnusableSugColors();
107 void allocateStackSpace4SpilledLRs();
109 void insertCode4SpilledLR (const LiveRange *LR,
111 const BasicBlock *BB,
112 const unsigned OpNum);
114 inline void constructLiveRanges() { LRI.constructLiveRanges(); }
116 void colorIncomingArgs();
117 void colorCallRetArgs();
118 void updateMachineCode();
120 void printLabel(const Value *const Val);
121 void printMachineCode();
124 friend class UltraSparcRegInfo; // FIXME: remove this
126 int getUsableUniRegAtMI(int RegType,
127 const ValueSet *LVSetBef,
129 std::vector<MachineInstr*>& MIBef,
130 std::vector<MachineInstr*>& MIAft);
132 int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
133 const ValueSet *LVSetBef);
135 void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
136 int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
138 void addInterf4PseudoInstr(const MachineInstr *MInst);