1 /* Title: PhyRegAlloc.h -*- C++ -*-
2 Author: Ruchira Sasanka
4 Purpose: This is the main entry point for register allocation.
9 * RegisterClasses: Each RegClass accepts a
10 MachineRegClass which contains machine specific info about that register
11 class. The code in the RegClass is machine independent and they use
12 access functions in the MachineRegClass object passed into it to get
13 machine specific info.
15 * Machine dependent work: All parts of the register coloring algorithm
16 except coloring of an individual node are machine independent.
19 #ifndef PHY_REG_ALLOC_H
20 #define PHY_REG_ALLOC_H
22 #include "llvm/CodeGen/RegClass.h"
23 #include "llvm/CodeGen/LiveRangeInfo.h"
26 class MachineFunction;
28 class FunctionLiveVarInfo;
32 //----------------------------------------------------------------------------
33 // Class AddedInstrns:
34 // When register allocator inserts new instructions in to the existing
35 // instruction stream, it does NOT directly modify the instruction stream.
36 // Rather, it creates an object of AddedInstrns and stick it in the
37 // AddedInstrMap for an existing instruction. This class contains two vectors
38 // to store such instructions added before and after an existing instruction.
39 //----------------------------------------------------------------------------
42 std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst
43 std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
46 //----------------------------------------------------------------------------
48 // Main class the register allocator. Call allocateRegisters() to allocate
49 // registers for a Function.
50 //----------------------------------------------------------------------------
52 class PhyRegAlloc: public NonCopyable {
53 std::vector<RegClass *> RegClassList; // vector of register classes
54 const TargetMachine &TM; // target machine
55 const Function *Fn; // name of the function we work on
56 MachineFunction &MF; // descriptor for method's native code
57 FunctionLiveVarInfo *const LVI; // LV information for this method
58 // (already computed for BBs)
59 LiveRangeInfo LRI; // LR info (will be computed)
60 const MachineRegInfo &MRI; // Machine Register information
61 const unsigned NumOfRegClasses; // recorded here for efficiency
64 // AddedInstrMap - Used to store instrns added in this phase
65 std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
67 AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
68 LoopInfo *LoopDepthCalc; // to calculate loop depths
69 ReservedColorListType ResColList; // A set of reserved regs if desired.
73 PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
74 LoopInfo *LoopDepthCalc);
77 // main method called for allocating registers
79 void allocateRegisters();
82 // access to register classes by class ID
84 const RegClass* getRegClassByID(unsigned int id) const {
85 return RegClassList[id];
87 RegClass* getRegClassByID(unsigned int id) {
88 return RegClassList[id]; }
92 void addInterference(const Value *Def, const ValueSet *LVSet,
95 void addInterferencesForArgs();
96 void createIGNodeListsAndIGs();
97 void buildInterferenceGraphs();
99 void setCallInterferences(const MachineInstr *MInst,
100 const ValueSet *LVSetAft );
102 void move2DelayedInstr(const MachineInstr *OrigMI,
103 const MachineInstr *DelayedMI );
105 void markUnusableSugColors();
106 void allocateStackSpace4SpilledLRs();
108 void insertCode4SpilledLR (const LiveRange *LR,
110 const BasicBlock *BB,
111 const unsigned OpNum);
113 inline void constructLiveRanges() { LRI.constructLiveRanges(); }
115 void colorIncomingArgs();
116 void colorCallRetArgs();
117 void updateMachineCode();
119 void printLabel(const Value *const Val);
120 void printMachineCode();
123 friend class UltraSparcRegInfo; // FIXME: remove this
125 int getUsableUniRegAtMI(int RegType,
126 const ValueSet *LVSetBef,
128 std::vector<MachineInstr*>& MIBef,
129 std::vector<MachineInstr*>& MIAft);
131 int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
132 const ValueSet *LVSetBef);
134 void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
135 int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
137 void addInterf4PseudoInstr(const MachineInstr *MInst);