1 //===-- RegAllocBase.h - basic regalloc interface and driver --*- C++ -*---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the RegAllocBase class, which is the skeleton of a basic
11 // register allocation algorithm and interface for extending it. It provides the
12 // building blocks on which to construct other experimental allocators and test
13 // the validity of two principles:
15 // - If virtual and physical register liveness is modeled using intervals, then
16 // on-the-fly interference checking is cheap. Furthermore, interferences can be
17 // lazily cached and reused.
19 // - Register allocation complexity, and generated code performance is
20 // determined by the effectiveness of live range splitting rather than optimal
23 // Following the first principle, interfering checking revolves around the
24 // LiveIntervalUnion data structure.
26 // To fulfill the second principle, the basic allocator provides a driver for
27 // incremental splitting. It essentially punts on the problem of register
28 // coloring, instead driving the assignment of virtual to physical registers by
29 // the cost of splitting. The basic allocator allows for heuristic reassignment
30 // of registers, if a more sophisticated allocator chooses to do that.
32 // This framework provides a way to engineer the compile time vs. code
33 // quality trade-off without relying on a particular theoretical solver.
35 //===----------------------------------------------------------------------===//
37 #ifndef LLVM_CODEGEN_REGALLOCBASE
38 #define LLVM_CODEGEN_REGALLOCBASE
40 #include "llvm/ADT/OwningPtr.h"
41 #include "llvm/CodeGen/LiveIntervalUnion.h"
42 #include "llvm/CodeGen/RegisterClassInfo.h"
46 template<typename T> class SmallVectorImpl;
47 class TargetRegisterInfo;
53 /// RegAllocBase provides the register allocation driver and interface that can
54 /// be extended to add interesting heuristics.
56 /// Register allocators must override the selectOrSplit() method to implement
57 /// live range splitting. They must also override enqueue/dequeue to provide an
61 const TargetRegisterInfo *TRI;
62 MachineRegisterInfo *MRI;
65 LiveRegMatrix *Matrix;
66 RegisterClassInfo RegClassInfo;
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
70 virtual ~RegAllocBase() {}
72 // A RegAlloc pass should call this before allocatePhysRegs.
73 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
75 // The top-level driver. The output is a VirtRegMap that us updated with
76 // physical register assignments.
77 void allocatePhysRegs();
79 // Get a temporary reference to a Spiller instance.
80 virtual Spiller &spiller() = 0;
82 /// enqueue - Add VirtReg to the priority queue of unassigned registers.
83 virtual void enqueue(LiveInterval *LI) = 0;
85 /// dequeue - Return the next unassigned register, or NULL.
86 virtual LiveInterval *dequeue() = 0;
88 // A RegAlloc pass should override this to provide the allocation heuristics.
89 // Each call must guarantee forward progess by returning an available PhysReg
90 // or new set of split live virtual registers. It is up to the splitter to
91 // converge quickly toward fully spilled live ranges.
92 virtual unsigned selectOrSplit(LiveInterval &VirtReg,
93 SmallVectorImpl<LiveInterval*> &splitLVRs) = 0;
95 // Use this group name for NamedRegionTimer.
96 static const char *TimerGroupName;
99 /// VerifyEnabled - True when -verify-regalloc is given.
100 static bool VerifyEnabled;
106 } // end namespace llvm
108 #endif // !defined(LLVM_CODEGEN_REGALLOCBASE)