1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
13 #define DEBUG_TYPE "regalloc"
14 #include "llvm/Function.h"
15 #include "llvm/CodeGen/LiveIntervals.h"
16 #include "llvm/CodeGen/LiveVariables.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/SSARegMap.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/CFG.h"
26 #include "Support/Debug.h"
27 #include "Support/DepthFirstIterator.h"
28 #include "Support/Statistic.h"
29 #include "Support/STLExtras.h"
34 Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
35 Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
37 class PhysRegTracker {
39 const MRegisterInfo* mri_;
40 std::vector<unsigned> regUse_;
43 PhysRegTracker(MachineFunction* mf)
44 : mri_(mf ? mf->getTarget().getRegisterInfo() : NULL) {
46 regUse_.assign(mri_->getNumRegs(), 0);
50 PhysRegTracker(const PhysRegTracker& rhs)
52 regUse_(rhs.regUse_) {
55 const PhysRegTracker& operator=(const PhysRegTracker& rhs) {
57 regUse_ = rhs.regUse_;
61 void addPhysRegUse(unsigned physReg) {
63 for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
69 void delPhysRegUse(unsigned physReg) {
70 assert(regUse_[physReg] != 0);
72 for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
74 assert(regUse_[physReg] != 0);
79 bool isPhysRegAvail(unsigned physReg) const {
80 return regUse_[physReg] == 0;
84 class RA : public MachineFunctionPass {
87 const TargetMachine* tm_;
88 const MRegisterInfo* mri_;
90 typedef std::list<LiveIntervals::Interval*> IntervalPtrs;
91 IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_;
95 typedef std::map<unsigned, unsigned> Virt2PhysMap;
98 typedef std::map<unsigned, int> Virt2StackSlotMap;
99 Virt2StackSlotMap v2ssMap_;
103 typedef std::vector<float> SpillWeights;
104 SpillWeights spillWeights_;
112 virtual const char* getPassName() const {
113 return "Linear Scan Register Allocator";
116 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
117 AU.addRequired<LiveVariables>();
118 AU.addRequired<LiveIntervals>();
119 MachineFunctionPass::getAnalysisUsage(AU);
122 /// runOnMachineFunction - register allocate the whole function
123 bool runOnMachineFunction(MachineFunction&);
125 void releaseMemory();
128 /// initIntervalSets - initializa the four interval sets:
129 /// unhandled, fixed, active and inactive
130 void initIntervalSets(LiveIntervals::Intervals& li);
132 /// processActiveIntervals - expire old intervals and move
133 /// non-overlapping ones to the incative list
134 void processActiveIntervals(IntervalPtrs::value_type cur);
136 /// processInactiveIntervals - expire old intervals and move
137 /// overlapping ones to the active list
138 void processInactiveIntervals(IntervalPtrs::value_type cur);
140 /// updateSpillWeights - updates the spill weights of the
141 /// specifed physical register and its weight
142 void updateSpillWeights(unsigned reg, SpillWeights::value_type weight);
144 /// assignRegOrStackSlotAtInterval - assign a register if one
145 /// is available, or spill.
146 void assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur);
148 /// addSpillCode - adds spill code for interval. The interval
149 /// must be modified by LiveIntervals::updateIntervalForSpill.
150 void addSpillCode(IntervalPtrs::value_type li, int slot);
153 /// register handling helpers
156 /// getFreePhysReg - return a free physical register for this
157 /// virtual register interval if we have one, otherwise return
159 unsigned getFreePhysReg(IntervalPtrs::value_type cur);
161 /// assignVirt2PhysReg - assigns the free physical register to
162 /// the virtual register passed as arguments
163 Virt2PhysMap::iterator
164 assignVirt2PhysReg(unsigned virtReg, unsigned physReg);
166 /// clearVirtReg - free the physical register associated with this
167 /// virtual register and disassociate virtual->physical and
168 /// physical->virtual mappings
169 void clearVirtReg(Virt2PhysMap::iterator it);
171 /// assignVirt2StackSlot - assigns this virtual register to a
172 /// stack slot. returns the stack slot
173 int assignVirt2StackSlot(unsigned virtReg);
175 /// getStackSlot - returns the offset of the specified
176 /// register on the stack
177 int getStackSlot(unsigned virtReg);
179 void printVirtRegAssignment() const {
180 std::cerr << "register assignment:\n";
182 for (Virt2PhysMap::const_iterator
183 i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) {
184 assert(i->second != 0);
185 std::cerr << '[' << i->first << ','
186 << mri_->getName(i->second) << "]\n";
188 for (Virt2StackSlotMap::const_iterator
189 i = v2ssMap_.begin(), e = v2ssMap_.end(); i != e; ++i) {
190 std::cerr << '[' << i->first << ",ss#" << i->second << "]\n";
195 void printIntervals(const char* const str,
196 RA::IntervalPtrs::const_iterator i,
197 RA::IntervalPtrs::const_iterator e) const {
198 if (str) std::cerr << str << " intervals:\n";
199 for (; i != e; ++i) {
200 std::cerr << "\t\t" << **i << " -> ";
201 unsigned reg = (*i)->reg;
202 if (MRegisterInfo::isVirtualRegister(reg)) {
203 Virt2PhysMap::const_iterator it = v2pMap_.find(reg);
204 reg = (it == v2pMap_.end() ? 0 : it->second);
206 std::cerr << mri_->getName(reg) << '\n';
212 void RA::releaseMemory()
223 bool RA::runOnMachineFunction(MachineFunction &fn) {
225 tm_ = &fn.getTarget();
226 mri_ = tm_->getRegisterInfo();
227 li_ = &getAnalysis<LiveIntervals>();
228 prt_ = PhysRegTracker(mf_);
230 initIntervalSets(li_->getIntervals());
232 // linear scan algorithm
233 DEBUG(std::cerr << "Machine Function\n");
235 DEBUG(printIntervals("\tunhandled", unhandled_.begin(), unhandled_.end()));
236 DEBUG(printIntervals("\tfixed", fixed_.begin(), fixed_.end()));
237 DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
238 DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
240 while (!unhandled_.empty() || !fixed_.empty()) {
241 // pick the interval with the earliest start point
242 IntervalPtrs::value_type cur;
243 if (fixed_.empty()) {
244 cur = unhandled_.front();
245 unhandled_.pop_front();
247 else if (unhandled_.empty()) {
248 cur = fixed_.front();
251 else if (unhandled_.front()->start() < fixed_.front()->start()) {
252 cur = unhandled_.front();
253 unhandled_.pop_front();
256 cur = fixed_.front();
260 DEBUG(std::cerr << *cur << '\n');
262 processActiveIntervals(cur);
263 processInactiveIntervals(cur);
265 // if this register is fixed we are done
266 if (MRegisterInfo::isPhysicalRegister(cur->reg)) {
267 prt_.addPhysRegUse(cur->reg);
268 active_.push_back(cur);
269 handled_.push_back(cur);
271 // otherwise we are allocating a virtual register. try to find
272 // a free physical register or spill an interval in order to
273 // assign it one (we could spill the current though).
275 assignRegOrStackSlotAtInterval(cur);
278 DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
279 DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end())); }
281 // expire any remaining active intervals
282 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
283 unsigned reg = (*i)->reg;
284 DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
285 if (MRegisterInfo::isVirtualRegister(reg)) {
288 prt_.delPhysRegUse(reg);
291 DEBUG(printVirtRegAssignment());
292 DEBUG(std::cerr << "finished register allocation\n");
294 const TargetInstrInfo& tii = tm_->getInstrInfo();
296 DEBUG(std::cerr << "Rewrite machine code:\n");
297 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
298 mbbi != mbbe; ++mbbi) {
301 for (MachineBasicBlock::iterator mii = mbbi->begin(), mie = mbbi->end();
303 DEBUG(std::cerr << '\t'; mii->print(std::cerr, *tm_));
305 // use our current mapping and actually replace every
306 // virtual register with its allocated physical registers
307 DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
308 "physical registers:\n");
309 for (unsigned i = 0, e = mii->getNumOperands();
311 MachineOperand& op = mii->getOperand(i);
312 if (op.isRegister() &&
313 MRegisterInfo::isVirtualRegister(op.getReg())) {
314 unsigned virtReg = op.getReg();
315 Virt2PhysMap::iterator it = v2pMap_.find(virtReg);
316 assert(it != v2pMap_.end() &&
317 "all virtual registers must be allocated");
318 unsigned physReg = it->second;
319 assert(MRegisterInfo::isPhysicalRegister(physReg));
320 DEBUG(std::cerr << "\t\t\t%reg" << virtReg
321 << " -> " << mri_->getName(physReg) << '\n');
322 mii->SetMachineOperandReg(i, physReg);
331 void RA::initIntervalSets(LiveIntervals::Intervals& li)
333 assert(unhandled_.empty() && fixed_.empty() &&
334 active_.empty() && inactive_.empty() &&
335 "interval sets should be empty on initialization");
337 for (LiveIntervals::Intervals::iterator i = li.begin(), e = li.end();
339 if (MRegisterInfo::isPhysicalRegister(i->reg))
340 fixed_.push_back(&*i);
342 unhandled_.push_back(&*i);
346 void RA::processActiveIntervals(IntervalPtrs::value_type cur)
348 DEBUG(std::cerr << "\tprocessing active intervals:\n");
349 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
350 unsigned reg = (*i)->reg;
351 // remove expired intervals
352 if ((*i)->expiredAt(cur->start())) {
353 DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
354 if (MRegisterInfo::isVirtualRegister(reg)) {
357 prt_.delPhysRegUse(reg);
358 // remove from active
359 i = active_.erase(i);
361 // move inactive intervals to inactive list
362 else if (!(*i)->liveAt(cur->start())) {
363 DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
364 if (MRegisterInfo::isVirtualRegister(reg)) {
367 prt_.delPhysRegUse(reg);
369 inactive_.push_back(*i);
370 // remove from active
371 i = active_.erase(i);
379 void RA::processInactiveIntervals(IntervalPtrs::value_type cur)
381 DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
382 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
383 unsigned reg = (*i)->reg;
385 // remove expired intervals
386 if ((*i)->expiredAt(cur->start())) {
387 DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
388 // remove from inactive
389 i = inactive_.erase(i);
391 // move re-activated intervals in active list
392 else if ((*i)->liveAt(cur->start())) {
393 DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
394 if (MRegisterInfo::isVirtualRegister(reg)) {
397 prt_.addPhysRegUse(reg);
399 active_.push_back(*i);
400 // remove from inactive
401 i = inactive_.erase(i);
409 void RA::updateSpillWeights(unsigned reg, SpillWeights::value_type weight)
411 spillWeights_[reg] += weight;
412 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
413 spillWeights_[*as] += weight;
416 void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
418 DEBUG(std::cerr << "\tallocating current interval:\n");
420 PhysRegTracker backupPrt = prt_;
422 spillWeights_.assign(mri_->getNumRegs(), 0.0);
424 // for each interval in active update spill weights
425 for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
427 unsigned reg = (*i)->reg;
428 if (MRegisterInfo::isVirtualRegister(reg))
430 updateSpillWeights(reg, (*i)->weight);
433 // for every interval in inactive we overlap with, mark the
434 // register as not free and update spill weights
435 for (IntervalPtrs::const_iterator i = inactive_.begin(),
436 e = inactive_.end(); i != e; ++i) {
437 if (cur->overlaps(**i)) {
438 unsigned reg = (*i)->reg;
439 if (MRegisterInfo::isVirtualRegister(reg))
441 prt_.addPhysRegUse(reg);
442 updateSpillWeights(reg, (*i)->weight);
446 // for every interval in fixed we overlap with,
447 // mark the register as not free and update spill weights
448 for (IntervalPtrs::const_iterator i = fixed_.begin(),
449 e = fixed_.end(); i != e; ++i) {
450 if (cur->overlaps(**i)) {
451 unsigned reg = (*i)->reg;
452 prt_.addPhysRegUse(reg);
453 updateSpillWeights(reg, (*i)->weight);
457 unsigned physReg = getFreePhysReg(cur);
458 // restore the physical register tracker
460 // if we find a free register, we are done: assign this virtual to
461 // the free physical register and add this interval to the active
464 assignVirt2PhysReg(cur->reg, physReg);
465 active_.push_back(cur);
466 handled_.push_back(cur);
470 DEBUG(std::cerr << "\t\tassigning stack slot at interval "<< *cur << ":\n");
471 // push the current interval back to unhandled since we are going
472 // to re-run at least this iteration
473 unhandled_.push_front(cur);
475 float minWeight = std::numeric_limits<float>::infinity();
477 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
478 for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
479 i != rc->allocation_order_end(*mf_); ++i) {
481 if (minWeight > spillWeights_[reg]) {
482 minWeight = spillWeights_[reg];
486 DEBUG(std::cerr << "\t\t\tregister with min weight: "
487 << mri_->getName(minReg) << " (" << minWeight << ")\n");
489 // if the current has the minimum weight, we need to modify it,
490 // push it back in unhandled and let the linear scan algorithm run
492 if (cur->weight < minWeight) {
493 DEBUG(std::cerr << "\t\t\t\tspilling(c): " << *cur;);
494 int slot = assignVirt2StackSlot(cur->reg);
495 li_->updateSpilledInterval(*cur);
496 addSpillCode(cur, slot);
497 DEBUG(std::cerr << "[ " << *cur << " ]\n");
501 // otherwise we spill all intervals aliasing the register with
502 // minimum weight, rollback to the interval with the earliest
503 // start point and let the linear scan algorithm run again
504 std::vector<bool> toSpill(mri_->getNumRegs(), false);
505 toSpill[minReg] = true;
506 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
508 unsigned earliestStart = cur->start();
510 for (IntervalPtrs::iterator i = active_.begin();
511 i != active_.end(); ++i) {
512 unsigned reg = (*i)->reg;
513 if (MRegisterInfo::isVirtualRegister(reg) &&
514 toSpill[v2pMap_[reg]] &&
515 cur->overlaps(**i)) {
516 DEBUG(std::cerr << "\t\t\t\tspilling(a): " << **i);
517 int slot = assignVirt2StackSlot((*i)->reg);
518 li_->updateSpilledInterval(**i);
519 addSpillCode(*i, slot);
520 DEBUG(std::cerr << "[ " << **i << " ]\n");
521 earliestStart = std::min(earliestStart, (*i)->start());
524 for (IntervalPtrs::iterator i = inactive_.begin();
525 i != inactive_.end(); ++i) {
526 unsigned reg = (*i)->reg;
527 if (MRegisterInfo::isVirtualRegister(reg) &&
528 toSpill[v2pMap_[reg]] &&
529 cur->overlaps(**i)) {
530 DEBUG(std::cerr << "\t\t\t\tspilling(i): " << **i << '\n');
531 int slot = assignVirt2StackSlot((*i)->reg);
532 li_->updateSpilledInterval(**i);
533 addSpillCode(*i, slot);
534 DEBUG(std::cerr << "[ " << **i << " ]\n");
535 earliestStart = std::min(earliestStart, (*i)->start());
539 DEBUG(std::cerr << "\t\t\t\trolling back to: " << earliestStart << '\n');
540 // scan handled in reverse order and undo each one, restoring the
541 // state of unhandled and fixed
542 while (!handled_.empty()) {
543 IntervalPtrs::value_type i = handled_.back();
544 // if this interval starts before t we are done
545 if (i->start() < earliestStart)
547 DEBUG(std::cerr << "\t\t\t\t\tundo changes for: " << *i << '\n');
549 IntervalPtrs::iterator it;
550 if ((it = find(active_.begin(), active_.end(), i)) != active_.end()) {
552 if (MRegisterInfo::isPhysicalRegister(i->reg)) {
553 fixed_.push_front(i);
554 prt_.delPhysRegUse(i->reg);
557 Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg);
559 unhandled_.push_front(i);
560 prt_.delPhysRegUse(v2pIt->second);
563 else if ((it = find(inactive_.begin(), inactive_.end(), i)) != inactive_.end()) {
565 if (MRegisterInfo::isPhysicalRegister(i->reg))
566 fixed_.push_front(i);
568 Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg);
570 unhandled_.push_front(i);
574 if (MRegisterInfo::isPhysicalRegister(i->reg))
575 fixed_.push_front(i);
577 Virt2PhysMap::iterator v2pIt = v2pMap_.find(i->reg);
579 unhandled_.push_front(i);
584 // scan the rest and undo each interval that expired after t and
585 // insert it in active (the next iteration of the algorithm will
586 // put it in inactive if required)
587 IntervalPtrs::iterator i = handled_.begin(), e = handled_.end();
588 for (; i != e; ++i) {
589 if (!(*i)->expiredAt(earliestStart) && (*i)->expiredAt(cur->start())) {
590 DEBUG(std::cerr << "\t\t\t\t\tundo changes for: " << **i << '\n');
591 active_.push_back(*i);
592 if (MRegisterInfo::isPhysicalRegister((*i)->reg))
593 prt_.addPhysRegUse((*i)->reg);
595 assert(v2pMap_.count((*i)->reg));
596 prt_.addPhysRegUse(v2pMap_.find((*i)->reg)->second);
602 void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
604 // We scan the instructions corresponding to each range. We load
605 // when we have a use and spill at end of basic blocks or end of
606 // ranges only if the register was modified.
607 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li->reg);
609 for (LiveIntervals::Interval::Ranges::iterator i = li->ranges.begin(),
610 e = li->ranges.end(); i != e; ++i) {
611 unsigned index = i->first & ~1;
612 unsigned end = i->second;
615 bool dirty = false, loaded = false;
617 // skip deleted instructions. getInstructionFromIndex returns
618 // null if the instruction was deleted (because of coalescing
620 while (!li_->getInstructionFromIndex(index)) index += 2;
621 MachineBasicBlock::iterator mi = li_->getInstructionFromIndex(index);
622 MachineBasicBlock* mbb = mi->getParent();
624 for (; index < end; index += 2) {
625 // ignore deleted instructions
626 while (!li_->getInstructionFromIndex(index)) index += 2;
628 // if we changed basic block we need to start over
629 mi = li_->getInstructionFromIndex(index);
630 if (mbb != mi->getParent()) {
632 mi = li_->getInstructionFromIndex(index-2);
633 assert(mbb == mi->getParent() &&
634 "rewound to wrong instruction?");
635 DEBUG(std::cerr << "add store for reg" << li->reg << " to "
636 "stack slot " << slot << " after: ";
637 mi->print(std::cerr, *tm_));
639 mri_->storeRegToStackSlot(*mi->getParent(),
640 next(mi), li->reg, slot, rc);
645 // if it is used in this instruction load it
646 for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
647 MachineOperand& mop = mi->getOperand(i);
648 if (mop.isRegister() && mop.getReg() == li->reg &&
649 mop.isUse() && !loaded) {
651 DEBUG(std::cerr << "add load for reg" << li->reg
652 << " from stack slot " << slot << " before: ";
653 mi->print(std::cerr, *tm_));
655 mri_->loadRegFromStackSlot(*mi->getParent(),
656 mi, li->reg, slot, rc);
660 // if it is defined in this instruction mark as dirty
661 for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
662 MachineOperand& mop = mi->getOperand(i);
663 if (mop.isRegister() && mop.getReg() == li->reg &&
665 dirty = loaded = true;
669 mi = li_->getInstructionFromIndex(index-2);
670 assert(mbb == mi->getParent() &&
671 "rewound to wrong instruction?");
672 DEBUG(std::cerr << "add store for reg" << li->reg << " to "
673 "stack slot " << slot << " after: ";
674 mi->print(std::cerr, *tm_));
676 mri_->storeRegToStackSlot(*mi->getParent(),
677 next(mi), li->reg, slot, rc);
682 unsigned RA::getFreePhysReg(IntervalPtrs::value_type cur)
684 DEBUG(std::cerr << "\t\tgetting free physical register: ");
685 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
687 for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
688 i != rc->allocation_order_end(*mf_); ++i) {
690 if (prt_.isPhysRegAvail(reg)) {
691 DEBUG(std::cerr << mri_->getName(reg) << '\n');
696 DEBUG(std::cerr << "no free register\n");
700 RA::Virt2PhysMap::iterator
701 RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg)
704 Virt2PhysMap::iterator it;
705 tie(it, inserted) = v2pMap_.insert(std::make_pair(virtReg, physReg));
706 assert(inserted && "attempting to assign a virt->phys mapping to an "
707 "already mapped register");
708 prt_.addPhysRegUse(physReg);
712 void RA::clearVirtReg(Virt2PhysMap::iterator it)
714 assert(it != v2pMap_.end() &&
715 "attempting to clear a not allocated virtual register");
716 unsigned physReg = it->second;
718 DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg)
723 int RA::assignVirt2StackSlot(unsigned virtReg)
725 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
726 int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc);
728 bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second;
729 assert(inserted && "attempt to assign stack slot to spilled register!");
733 int RA::getStackSlot(unsigned virtReg)
735 assert(v2ssMap_.count(virtReg) &&
736 "attempt to get stack slot for a non spilled register");
737 return v2ssMap_.find(virtReg)->second;
740 FunctionPass* llvm::createLinearScanRegisterAllocator() {