1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "regalloc"
15 #include "llvm/CodeGen/LiveVariables.h"
16 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
17 #include "PhysRegTracker.h"
18 #include "VirtRegMap.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/MRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/EquivalenceClasses.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Compiler.h"
39 STATISTIC(NumIters , "Number of iterations performed");
40 STATISTIC(NumBacktracks, "Number of times we had to backtrack");
42 static RegisterRegAlloc
43 linearscanRegAlloc("linearscan", " linear scan register allocator",
44 createLinearScanRegisterAllocator);
47 static unsigned numIterations = 0;
48 static unsigned numIntervals = 0;
50 struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
52 RA() : MachineFunctionPass((intptr_t)&ID) {}
54 typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
55 typedef std::vector<IntervalPtr> IntervalPtrs;
57 /// RelatedRegClasses - This structure is built the first time a function is
58 /// compiled, and keeps track of which register classes have registers that
59 /// belong to multiple classes or have aliases that are in other classes.
60 EquivalenceClasses<const TargetRegisterClass*> RelatedRegClasses;
61 std::map<unsigned, const TargetRegisterClass*> OneClassForEachPhysReg;
64 const TargetMachine* tm_;
65 const MRegisterInfo* mri_;
68 /// handled_ - Intervals are added to the handled_ set in the order of their
69 /// start value. This is uses for backtracking.
70 std::vector<LiveInterval*> handled_;
72 /// fixed_ - Intervals that correspond to machine registers.
76 /// active_ - Intervals that are currently being processed, and which have a
77 /// live range active for the current point.
80 /// inactive_ - Intervals that are currently being processed, but which have
81 /// a hold at the current point.
82 IntervalPtrs inactive_;
84 typedef std::priority_queue<LiveInterval*,
85 std::vector<LiveInterval*>,
86 greater_ptr<LiveInterval> > IntervalHeap;
87 IntervalHeap unhandled_;
88 std::auto_ptr<PhysRegTracker> prt_;
89 std::auto_ptr<VirtRegMap> vrm_;
90 std::auto_ptr<Spiller> spiller_;
93 virtual const char* getPassName() const {
94 return "Linear Scan Register Allocator";
97 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
98 AU.addRequired<LiveIntervals>();
99 MachineFunctionPass::getAnalysisUsage(AU);
102 /// runOnMachineFunction - register allocate the whole function
103 bool runOnMachineFunction(MachineFunction&);
106 /// linearScan - the linear scan algorithm
109 /// initIntervalSets - initialize the interval sets.
111 void initIntervalSets();
113 /// processActiveIntervals - expire old intervals and move non-overlapping
114 /// ones to the inactive list.
115 void processActiveIntervals(unsigned CurPoint);
117 /// processInactiveIntervals - expire old intervals and move overlapping
118 /// ones to the active list.
119 void processInactiveIntervals(unsigned CurPoint);
121 /// assignRegOrStackSlotAtInterval - assign a register if one
122 /// is available, or spill.
123 void assignRegOrStackSlotAtInterval(LiveInterval* cur);
126 /// register handling helpers
129 /// getFreePhysReg - return a free physical register for this virtual
130 /// register interval if we have one, otherwise return 0.
131 unsigned getFreePhysReg(LiveInterval* cur);
133 /// assignVirt2StackSlot - assigns this virtual register to a
134 /// stack slot. returns the stack slot
135 int assignVirt2StackSlot(unsigned virtReg);
137 void ComputeRelatedRegClasses();
139 template <typename ItTy>
140 void printIntervals(const char* const str, ItTy i, ItTy e) const {
141 if (str) DOUT << str << " intervals:\n";
142 for (; i != e; ++i) {
143 DOUT << "\t" << *i->first << " -> ";
144 unsigned reg = i->first->reg;
145 if (MRegisterInfo::isVirtualRegister(reg)) {
146 reg = vrm_->getPhys(reg);
148 DOUT << mri_->getName(reg) << '\n';
155 void RA::ComputeRelatedRegClasses() {
156 const MRegisterInfo &MRI = *mri_;
158 // First pass, add all reg classes to the union, and determine at least one
159 // reg class that each register is in.
160 bool HasAliases = false;
161 for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
162 E = MRI.regclass_end(); RCI != E; ++RCI) {
163 RelatedRegClasses.insert(*RCI);
164 for (TargetRegisterClass::iterator I = (*RCI)->begin(), E = (*RCI)->end();
166 HasAliases = HasAliases || *MRI.getAliasSet(*I) != 0;
168 const TargetRegisterClass *&PRC = OneClassForEachPhysReg[*I];
170 // Already processed this register. Just make sure we know that
171 // multiple register classes share a register.
172 RelatedRegClasses.unionSets(PRC, *RCI);
179 // Second pass, now that we know conservatively what register classes each reg
180 // belongs to, add info about aliases. We don't need to do this for targets
181 // without register aliases.
183 for (std::map<unsigned, const TargetRegisterClass*>::iterator
184 I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end();
186 for (const unsigned *AS = MRI.getAliasSet(I->first); *AS; ++AS)
187 RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
190 bool RA::runOnMachineFunction(MachineFunction &fn) {
192 tm_ = &fn.getTarget();
193 mri_ = tm_->getRegisterInfo();
194 li_ = &getAnalysis<LiveIntervals>();
196 // If this is the first function compiled, compute the related reg classes.
197 if (RelatedRegClasses.empty())
198 ComputeRelatedRegClasses();
200 if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
201 vrm_.reset(new VirtRegMap(*mf_));
202 if (!spiller_.get()) spiller_.reset(createSpiller());
208 // Rewrite spill code and update the PhysRegsUsed set.
209 spiller_->runOnMachineFunction(*mf_, *vrm_);
211 vrm_.reset(); // Free the VirtRegMap
214 while (!unhandled_.empty()) unhandled_.pop();
223 /// initIntervalSets - initialize the interval sets.
225 void RA::initIntervalSets()
227 assert(unhandled_.empty() && fixed_.empty() &&
228 active_.empty() && inactive_.empty() &&
229 "interval sets should be empty on initialization");
231 for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
232 if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
233 mf_->setPhysRegUsed(i->second.reg);
234 fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
236 unhandled_.push(&i->second);
240 void RA::linearScan()
242 // linear scan algorithm
243 DOUT << "********** LINEAR SCAN **********\n";
244 DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
246 // DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
247 DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
248 DEBUG(printIntervals("active", active_.begin(), active_.end()));
249 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
251 while (!unhandled_.empty()) {
252 // pick the interval with the earliest start point
253 LiveInterval* cur = unhandled_.top();
256 DOUT << "\n*** CURRENT ***: " << *cur << '\n';
258 processActiveIntervals(cur->beginNumber());
259 processInactiveIntervals(cur->beginNumber());
261 assert(MRegisterInfo::isVirtualRegister(cur->reg) &&
262 "Can only allocate virtual registers!");
264 // Allocating a virtual register. try to find a free
265 // physical register or spill an interval (possibly this one) in order to
267 assignRegOrStackSlotAtInterval(cur);
269 DEBUG(printIntervals("active", active_.begin(), active_.end()));
270 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
272 numIntervals += li_->getNumIntervals();
273 NumIters += numIterations;
275 // expire any remaining active intervals
276 for (IntervalPtrs::reverse_iterator
277 i = active_.rbegin(); i != active_.rend(); ) {
278 unsigned reg = i->first->reg;
279 DOUT << "\tinterval " << *i->first << " expired\n";
280 assert(MRegisterInfo::isVirtualRegister(reg) &&
281 "Can only allocate virtual registers!");
282 reg = vrm_->getPhys(reg);
283 prt_->delRegUse(reg);
284 i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
287 // expire any remaining inactive intervals
288 for (IntervalPtrs::reverse_iterator
289 i = inactive_.rbegin(); i != inactive_.rend(); ) {
290 DOUT << "\tinterval " << *i->first << " expired\n";
291 i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
294 // A brute force way of adding live-ins to every BB.
295 MachineFunction::iterator MBB = mf_->begin();
296 ++MBB; // Skip entry MBB.
297 for (MachineFunction::iterator E = mf_->end(); MBB != E; ++MBB) {
298 unsigned StartIdx = li_->getMBBStartIdx(MBB->getNumber());
299 for (IntervalPtrs::iterator i = fixed_.begin(), e = fixed_.end();
301 if (i->first->liveAt(StartIdx))
302 MBB->addLiveIn(i->first->reg);
304 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
305 LiveInterval *HI = handled_[i];
306 unsigned Reg = HI->reg;
307 if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) {
308 assert(MRegisterInfo::isVirtualRegister(Reg));
309 Reg = vrm_->getPhys(Reg);
318 /// processActiveIntervals - expire old intervals and move non-overlapping ones
319 /// to the inactive list.
320 void RA::processActiveIntervals(unsigned CurPoint)
322 DOUT << "\tprocessing active intervals:\n";
324 for (unsigned i = 0, e = active_.size(); i != e; ++i) {
325 LiveInterval *Interval = active_[i].first;
326 LiveInterval::iterator IntervalPos = active_[i].second;
327 unsigned reg = Interval->reg;
329 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
331 if (IntervalPos == Interval->end()) { // Remove expired intervals.
332 DOUT << "\t\tinterval " << *Interval << " expired\n";
333 assert(MRegisterInfo::isVirtualRegister(reg) &&
334 "Can only allocate virtual registers!");
335 reg = vrm_->getPhys(reg);
336 prt_->delRegUse(reg);
338 // Pop off the end of the list.
339 active_[i] = active_.back();
343 } else if (IntervalPos->start > CurPoint) {
344 // Move inactive intervals to inactive list.
345 DOUT << "\t\tinterval " << *Interval << " inactive\n";
346 assert(MRegisterInfo::isVirtualRegister(reg) &&
347 "Can only allocate virtual registers!");
348 reg = vrm_->getPhys(reg);
349 prt_->delRegUse(reg);
351 inactive_.push_back(std::make_pair(Interval, IntervalPos));
353 // Pop off the end of the list.
354 active_[i] = active_.back();
358 // Otherwise, just update the iterator position.
359 active_[i].second = IntervalPos;
364 /// processInactiveIntervals - expire old intervals and move overlapping
365 /// ones to the active list.
366 void RA::processInactiveIntervals(unsigned CurPoint)
368 DOUT << "\tprocessing inactive intervals:\n";
370 for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
371 LiveInterval *Interval = inactive_[i].first;
372 LiveInterval::iterator IntervalPos = inactive_[i].second;
373 unsigned reg = Interval->reg;
375 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
377 if (IntervalPos == Interval->end()) { // remove expired intervals.
378 DOUT << "\t\tinterval " << *Interval << " expired\n";
380 // Pop off the end of the list.
381 inactive_[i] = inactive_.back();
382 inactive_.pop_back();
384 } else if (IntervalPos->start <= CurPoint) {
385 // move re-activated intervals in active list
386 DOUT << "\t\tinterval " << *Interval << " active\n";
387 assert(MRegisterInfo::isVirtualRegister(reg) &&
388 "Can only allocate virtual registers!");
389 reg = vrm_->getPhys(reg);
390 prt_->addRegUse(reg);
392 active_.push_back(std::make_pair(Interval, IntervalPos));
394 // Pop off the end of the list.
395 inactive_[i] = inactive_.back();
396 inactive_.pop_back();
399 // Otherwise, just update the iterator position.
400 inactive_[i].second = IntervalPos;
405 /// updateSpillWeights - updates the spill weights of the specifed physical
406 /// register and its weight.
407 static void updateSpillWeights(std::vector<float> &Weights,
408 unsigned reg, float weight,
409 const MRegisterInfo *MRI) {
410 Weights[reg] += weight;
411 for (const unsigned* as = MRI->getAliasSet(reg); *as; ++as)
412 Weights[*as] += weight;
415 static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
417 for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
418 if (I->first == LI) return I;
422 static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
423 for (unsigned i = 0, e = V.size(); i != e; ++i) {
424 RA::IntervalPtr &IP = V[i];
425 LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
427 if (I != IP.first->begin()) --I;
432 /// assignRegOrStackSlotAtInterval - assign a register if one is available, or
434 void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
436 DOUT << "\tallocating current interval: ";
438 PhysRegTracker backupPrt = *prt_;
440 std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
441 unsigned StartPosition = cur->beginNumber();
442 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
443 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
445 // for every interval in inactive we overlap with, mark the
446 // register as not free and update spill weights.
447 for (IntervalPtrs::const_iterator i = inactive_.begin(),
448 e = inactive_.end(); i != e; ++i) {
449 unsigned Reg = i->first->reg;
450 assert(MRegisterInfo::isVirtualRegister(Reg) &&
451 "Can only allocate virtual registers!");
452 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(Reg);
453 // If this is not in a related reg class to the register we're allocating,
455 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
456 cur->overlapsFrom(*i->first, i->second-1)) {
457 Reg = vrm_->getPhys(Reg);
458 prt_->addRegUse(Reg);
459 SpillWeightsToAdd.push_back(std::make_pair(Reg, i->first->weight));
463 // Speculatively check to see if we can get a register right now. If not,
464 // we know we won't be able to by adding more constraints. If so, we can
465 // check to see if it is valid. Doing an exhaustive search of the fixed_ list
466 // is very bad (it contains all callee clobbered registers for any functions
467 // with a call), so we want to avoid doing that if possible.
468 unsigned physReg = getFreePhysReg(cur);
470 // We got a register. However, if it's in the fixed_ list, we might
471 // conflict with it. Check to see if we conflict with it or any of its
473 std::set<unsigned> RegAliases;
474 for (const unsigned *AS = mri_->getAliasSet(physReg); *AS; ++AS)
475 RegAliases.insert(*AS);
477 bool ConflictsWithFixed = false;
478 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
479 IntervalPtr &IP = fixed_[i];
480 if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
481 // Okay, this reg is on the fixed list. Check to see if we actually
483 LiveInterval *I = IP.first;
484 if (I->endNumber() > StartPosition) {
485 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
487 if (II != I->begin() && II->start > StartPosition)
489 if (cur->overlapsFrom(*I, II)) {
490 ConflictsWithFixed = true;
497 // Okay, the register picked by our speculative getFreePhysReg call turned
498 // out to be in use. Actually add all of the conflicting fixed registers to
499 // prt so we can do an accurate query.
500 if (ConflictsWithFixed) {
501 // For every interval in fixed we overlap with, mark the register as not
502 // free and update spill weights.
503 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
504 IntervalPtr &IP = fixed_[i];
505 LiveInterval *I = IP.first;
507 const TargetRegisterClass *RegRC = OneClassForEachPhysReg[I->reg];
508 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
509 I->endNumber() > StartPosition) {
510 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
512 if (II != I->begin() && II->start > StartPosition)
514 if (cur->overlapsFrom(*I, II)) {
515 unsigned reg = I->reg;
516 prt_->addRegUse(reg);
517 SpillWeightsToAdd.push_back(std::make_pair(reg, I->weight));
522 // Using the newly updated prt_ object, which includes conflicts in the
523 // future, see if there are any registers available.
524 physReg = getFreePhysReg(cur);
528 // Restore the physical register tracker, removing information about the
532 // if we find a free register, we are done: assign this virtual to
533 // the free physical register and add this interval to the active
536 DOUT << mri_->getName(physReg) << '\n';
537 vrm_->assignVirt2Phys(cur->reg, physReg);
538 prt_->addRegUse(physReg);
539 active_.push_back(std::make_pair(cur, cur->begin()));
540 handled_.push_back(cur);
543 DOUT << "no free registers\n";
545 // Compile the spill weights into an array that is better for scanning.
546 std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
547 for (std::vector<std::pair<unsigned, float> >::iterator
548 I = SpillWeightsToAdd.begin(), E = SpillWeightsToAdd.end(); I != E; ++I)
549 updateSpillWeights(SpillWeights, I->first, I->second, mri_);
551 // for each interval in active, update spill weights.
552 for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
554 unsigned reg = i->first->reg;
555 assert(MRegisterInfo::isVirtualRegister(reg) &&
556 "Can only allocate virtual registers!");
557 reg = vrm_->getPhys(reg);
558 updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
561 DOUT << "\tassigning stack slot at interval "<< *cur << ":\n";
563 // Find a register to spill.
564 float minWeight = HUGE_VALF;
565 unsigned minReg = cur->preference; // Try the preferred register first.
567 if (!minReg || SpillWeights[minReg] == HUGE_VALF)
568 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
569 e = RC->allocation_order_end(*mf_); i != e; ++i) {
571 if (minWeight > SpillWeights[reg]) {
572 minWeight = SpillWeights[reg];
577 // If we didn't find a register that is spillable, try aliases?
579 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
580 e = RC->allocation_order_end(*mf_); i != e; ++i) {
582 // No need to worry about if the alias register size < regsize of RC.
583 // We are going to spill all registers that alias it anyway.
584 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as) {
585 if (minWeight > SpillWeights[*as]) {
586 minWeight = SpillWeights[*as];
592 // All registers must have inf weight. Just grab one!
594 minReg = *RC->allocation_order_begin(*mf_);
597 DOUT << "\t\tregister with min weight: "
598 << mri_->getName(minReg) << " (" << minWeight << ")\n";
600 // if the current has the minimum weight, we need to spill it and
601 // add any added intervals back to unhandled, and restart
603 if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
604 DOUT << "\t\t\tspilling(c): " << *cur << '\n';
605 // if the current interval is re-materializable, remember so and don't
606 // assign it a spill slot.
608 vrm_->setVirtIsReMaterialized(cur->reg, cur->remat);
609 int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg)
610 : vrm_->assignVirt2StackSlot(cur->reg);
611 std::vector<LiveInterval*> added =
612 li_->addIntervalsForSpills(*cur, *vrm_, slot);
614 return; // Early exit if all spills were folded.
616 // Merge added with unhandled. Note that we know that
617 // addIntervalsForSpills returns intervals sorted by their starting
619 for (unsigned i = 0, e = added.size(); i != e; ++i)
620 unhandled_.push(added[i]);
626 // push the current interval back to unhandled since we are going
627 // to re-run at least this iteration. Since we didn't modify it it
628 // should go back right in the front of the list
629 unhandled_.push(cur);
631 // otherwise we spill all intervals aliasing the register with
632 // minimum weight, rollback to the interval with the earliest
633 // start point and let the linear scan algorithm run again
634 std::vector<LiveInterval*> added;
635 assert(MRegisterInfo::isPhysicalRegister(minReg) &&
636 "did not choose a register to spill?");
637 BitVector toSpill(mri_->getNumRegs());
639 // We are going to spill minReg and all its aliases.
640 toSpill[minReg] = true;
641 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
644 // the earliest start of a spilled interval indicates up to where
645 // in handled we need to roll back
646 unsigned earliestStart = cur->beginNumber();
648 // set of spilled vregs (used later to rollback properly)
649 std::set<unsigned> spilled;
651 // spill live intervals of virtual regs mapped to the physical register we
652 // want to clear (and its aliases). We only spill those that overlap with the
653 // current interval as the rest do not affect its allocation. we also keep
654 // track of the earliest start of all spilled live intervals since this will
655 // mark our rollback point.
656 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
657 unsigned reg = i->first->reg;
658 if (//MRegisterInfo::isVirtualRegister(reg) &&
659 toSpill[vrm_->getPhys(reg)] &&
660 cur->overlapsFrom(*i->first, i->second)) {
661 DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
662 earliestStart = std::min(earliestStart, i->first->beginNumber());
664 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
665 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
666 : vrm_->assignVirt2StackSlot(reg);
667 std::vector<LiveInterval*> newIs =
668 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
669 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
673 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ++i){
674 unsigned reg = i->first->reg;
675 if (//MRegisterInfo::isVirtualRegister(reg) &&
676 toSpill[vrm_->getPhys(reg)] &&
677 cur->overlapsFrom(*i->first, i->second-1)) {
678 DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
679 earliestStart = std::min(earliestStart, i->first->beginNumber());
681 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
682 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
683 : vrm_->assignVirt2StackSlot(reg);
684 std::vector<LiveInterval*> newIs =
685 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
686 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
691 DOUT << "\t\trolling back to: " << earliestStart << '\n';
693 // Scan handled in reverse order up to the earliest start of a
694 // spilled live interval and undo each one, restoring the state of
696 while (!handled_.empty()) {
697 LiveInterval* i = handled_.back();
698 // If this interval starts before t we are done.
699 if (i->beginNumber() < earliestStart)
701 DOUT << "\t\t\tundo changes for: " << *i << '\n';
704 // When undoing a live interval allocation we must know if it is active or
705 // inactive to properly update the PhysRegTracker and the VirtRegMap.
706 IntervalPtrs::iterator it;
707 if ((it = FindIntervalInVector(active_, i)) != active_.end()) {
709 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
710 if (!spilled.count(i->reg))
712 prt_->delRegUse(vrm_->getPhys(i->reg));
713 vrm_->clearVirt(i->reg);
714 } else if ((it = FindIntervalInVector(inactive_, i)) != inactive_.end()) {
716 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
717 if (!spilled.count(i->reg))
719 vrm_->clearVirt(i->reg);
721 assert(MRegisterInfo::isVirtualRegister(i->reg) &&
722 "Can only allocate virtual registers!");
723 vrm_->clearVirt(i->reg);
728 // Rewind the iterators in the active, inactive, and fixed lists back to the
729 // point we reverted to.
730 RevertVectorIteratorsTo(active_, earliestStart);
731 RevertVectorIteratorsTo(inactive_, earliestStart);
732 RevertVectorIteratorsTo(fixed_, earliestStart);
734 // scan the rest and undo each interval that expired after t and
735 // insert it in active (the next iteration of the algorithm will
736 // put it in inactive if required)
737 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
738 LiveInterval *HI = handled_[i];
739 if (!HI->expiredAt(earliestStart) &&
740 HI->expiredAt(cur->beginNumber())) {
741 DOUT << "\t\t\tundo changes for: " << *HI << '\n';
742 active_.push_back(std::make_pair(HI, HI->begin()));
743 assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
744 prt_->addRegUse(vrm_->getPhys(HI->reg));
748 // merge added with unhandled
749 for (unsigned i = 0, e = added.size(); i != e; ++i)
750 unhandled_.push(added[i]);
753 /// getFreePhysReg - return a free physical register for this virtual register
754 /// interval if we have one, otherwise return 0.
755 unsigned RA::getFreePhysReg(LiveInterval *cur) {
756 std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
757 unsigned MaxInactiveCount = 0;
759 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
760 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
762 for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
764 unsigned reg = i->first->reg;
765 assert(MRegisterInfo::isVirtualRegister(reg) &&
766 "Can only allocate virtual registers!");
768 // If this is not in a related reg class to the register we're allocating,
770 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(reg);
771 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) {
772 reg = vrm_->getPhys(reg);
773 ++inactiveCounts[reg];
774 MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]);
778 unsigned FreeReg = 0;
779 unsigned FreeRegInactiveCount = 0;
781 // If copy coalescer has assigned a "preferred" register, check if it's
784 if (prt_->isRegAvail(cur->preference)) {
785 DOUT << "\t\tassigned the preferred register: "
786 << mri_->getName(cur->preference) << "\n";
787 return cur->preference;
789 DOUT << "\t\tunable to assign the preferred register: "
790 << mri_->getName(cur->preference) << "\n";
792 // Scan for the first available register.
793 TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
794 TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
796 if (prt_->isRegAvail(*I)) {
798 FreeRegInactiveCount = inactiveCounts[FreeReg];
802 // If there are no free regs, or if this reg has the max inactive count,
803 // return this register.
804 if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg;
806 // Continue scanning the registers, looking for the one with the highest
807 // inactive count. Alkis found that this reduced register pressure very
808 // slightly on X86 (in rev 1.94 of this file), though this should probably be
810 for (; I != E; ++I) {
812 if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) {
814 FreeRegInactiveCount = inactiveCounts[Reg];
815 if (FreeRegInactiveCount == MaxInactiveCount)
816 break; // We found the one with the max inactive count.
823 FunctionPass* llvm::createLinearScanRegisterAllocator() {