lib/CodeGen/RegAllocLinearScan.cpp

   1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a linear scan register allocator.
  11 //
  12 //===----------------------------------------------------------------------===//
  13 #define DEBUG_TYPE "regalloc"
  14 #include "llvm/Function.h"
  15 #include "llvm/CodeGen/LiveIntervals.h"
  16 #include "llvm/CodeGen/LiveVariables.h"
  17 #include "llvm/CodeGen/MachineFrameInfo.h"
  18 #include "llvm/CodeGen/MachineFunctionPass.h"
  19 #include "llvm/CodeGen/MachineInstr.h"
  20 #include "llvm/CodeGen/Passes.h"
  21 #include "llvm/CodeGen/SSARegMap.h"
  22 #include "llvm/Target/MRegisterInfo.h"
  23 #include "llvm/Target/TargetInstrInfo.h"
  24 #include "llvm/Target/TargetMachine.h"
  25 #include "llvm/Target/TargetRegInfo.h"
  26 #include "llvm/Support/CFG.h"
  27 #include "Support/Debug.h"
  28 #include "Support/DepthFirstIterator.h"
  29 #include "Support/Statistic.h"
  30 #include "Support/STLExtras.h"
  31 #include <iostream>
  32
  33 using namespace llvm;
  34
  35 namespace {
  36     Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
  37
  38     class RA : public MachineFunctionPass {
  39     public:
  40         typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
  41
  42     private:
  43         MachineFunction* mf_;
  44         const TargetMachine* tm_;
  45         const MRegisterInfo* mri_;
  46         MachineBasicBlock* currentMbb_;
  47         MachineBasicBlock::iterator currentInstr_;
  48         typedef LiveIntervals::Intervals Intervals;
  49         const Intervals* li_;
  50         IntervalPtrs active_, inactive_;
  51
  52         typedef std::vector<unsigned> Regs;
  53         Regs tempUseOperands_;
  54         Regs tempDefOperands_;
  55
  56         Regs reserved_;
  57
  58         typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
  59         MachineBasicBlockPtrs mbbs_;
  60
  61         typedef std::vector<unsigned> Phys2VirtMap;
  62         Phys2VirtMap p2vMap_;
  63
  64         typedef std::map<unsigned, unsigned> Virt2PhysMap;
  65         Virt2PhysMap v2pMap_;
  66
  67         typedef std::map<unsigned, int> Virt2StackSlotMap;
  68         Virt2StackSlotMap v2ssMap_;
  69
  70         int instrAdded_;
  71
  72     public:
  73         virtual const char* getPassName() const {
  74             return "Linear Scan Register Allocator";
  75         }
  76
  77         virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  78             AU.addRequired<LiveVariables>();
  79             AU.addRequired<LiveIntervals>();
  80             MachineFunctionPass::getAnalysisUsage(AU);
  81         }
  82
  83     private:
  84         /// runOnMachineFunction - register allocate the whole function
  85         bool runOnMachineFunction(MachineFunction&);
  86
  87         /// processActiveIntervals - expire old intervals and move
  88         /// non-overlapping ones to the incative list
  89         void processActiveIntervals(Intervals::const_iterator cur);
  90
  91         /// processInactiveIntervals - expire old intervals and move
  92         /// overlapping ones to the active list
  93         void processInactiveIntervals(Intervals::const_iterator cur);
  94
  95         /// assignStackSlotAtInterval - choose and spill
  96         /// interval. Currently we spill the interval with the last
  97         /// end point in the active and inactive lists and the current
  98         /// interval
  99         void assignStackSlotAtInterval(Intervals::const_iterator cur);
 100
 101         ///
 102         /// register handling helpers
 103         ///
 104
 105         /// reservePhysReg - reserves a physical register and spills
 106         /// any value assigned to it if any
 107         void reservePhysReg(unsigned reg);
 108
 109         /// clearReservedPhysReg - marks pysical register as free for
 110         /// use
 111         void clearReservedPhysReg(unsigned reg);
 112
 113         /// physRegAvailable - returns true if the specifed physical
 114         /// register is available
 115         bool physRegAvailable(unsigned physReg);
 116
 117         /// getFreePhysReg - return a free physical register for this
 118         /// virtual register if we have one, otherwise return 0
 119         unsigned getFreePhysReg(unsigned virtReg);
 120
 121
 122         /// tempPhysRegAvailable - returns true if the specifed
 123         /// temporary physical register is available
 124         bool tempPhysRegAvailable(unsigned physReg);
 125
 126         /// getFreeTempPhysReg - return a free temprorary physical
 127         /// register for this register class if we have one (should
 128         /// never return 0)
 129         unsigned getFreeTempPhysReg(const TargetRegisterClass* rc);
 130
 131         /// getFreeTempPhysReg - return a free temprorary physical
 132         /// register for this virtual register if we have one (should
 133         /// never return 0)
 134         unsigned getFreeTempPhysReg(unsigned virtReg) {
 135             const TargetRegisterClass* rc =
 136                 mf_->getSSARegMap()->getRegClass(virtReg);
 137             return getFreeTempPhysReg(rc);
 138         }
 139
 140         /// assignVirt2PhysReg - assigns the free physical register to
 141         /// the virtual register passed as arguments
 142         void assignVirt2PhysReg(unsigned virtReg, unsigned physReg);
 143
 144         /// clearVirtReg - free the physical register associated with this
 145         /// virtual register and disassociate virtual->physical and
 146         /// physical->virtual mappings
 147         void clearVirtReg(unsigned virtReg);
 148
 149         /// assignVirt2StackSlot - assigns this virtual register to a
 150         /// stack slot
 151         void assignVirt2StackSlot(unsigned virtReg);
 152
 153         /// getStackSlot - returns the offset of the specified
 154         /// register on the stack
 155         int getStackSlot(unsigned virtReg);
 156
 157         /// spillVirtReg - spills the virtual register
 158         void spillVirtReg(unsigned virtReg);
 159
 160         /// loadPhysReg - loads to the physical register the value of
 161         /// the virtual register specifed. Virtual register must have
 162         /// an assigned stack slot
 163         void loadVirt2PhysReg(unsigned virtReg, unsigned physReg);
 164
 165         void printVirt2PhysMap() const {
 166             std::cerr << "allocated registers:\n";
 167             for (Virt2PhysMap::const_iterator
 168                      i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) {
 169                 std::cerr << '[' << i->first << ','
 170                           << mri_->getName(i->second) << "]\n";
 171             }
 172             std::cerr << '\n';
 173         }
 174         void printIntervals(const char* const str,
 175                             RA::IntervalPtrs::const_iterator i,
 176                             RA::IntervalPtrs::const_iterator e) const {
 177             if (str) std::cerr << str << " intervals:\n";
 178             for (; i != e; ++i) {
 179                 std::cerr << "\t\t" << **i << " -> ";
 180                 if ((*i)->reg < MRegisterInfo::FirstVirtualRegister) {
 181                     std::cerr << mri_->getName((*i)->reg);
 182                 }
 183                 else {
 184                     std::cerr << mri_->getName(v2pMap_.find((*i)->reg)->second);
 185                 }
 186                 std::cerr << '\n';
 187             }
 188         }
 189     };
 190 }
 191
 192 bool RA::runOnMachineFunction(MachineFunction &fn) {
 193     mf_ = &fn;
 194     tm_ = &fn.getTarget();
 195     mri_ = tm_->getRegisterInfo();
 196     li_ = &getAnalysis<LiveIntervals>().getIntervals();
 197     active_.clear();
 198     inactive_.clear();
 199     mbbs_ = getAnalysis<LiveIntervals>().getOrderedMachineBasicBlockPtrs();
 200     p2vMap_.resize(MRegisterInfo::FirstVirtualRegister-1);
 201     p2vMap_.clear();
 202     v2pMap_.clear();
 203     v2ssMap_.clear();
 204
 205     DEBUG(
 206         unsigned i = 0;
 207         for (MachineBasicBlockPtrs::iterator
 208                  mbbi = mbbs_.begin(), mbbe = mbbs_.end();
 209              mbbi != mbbe; ++mbbi) {
 210             MachineBasicBlock* mbb = *mbbi;
 211             std::cerr << mbb->getBasicBlock()->getName() << '\n';
 212             for (MachineBasicBlock::iterator
 213                      ii = mbb->begin(), ie = mbb->end();
 214                  ii != ie; ++ii) {
 215                 MachineInstr* instr = *ii;
 216
 217                 std::cerr << i++ << "\t";
 218                 instr->print(std::cerr, *tm_);
 219             }
 220         }
 221         );
 222
 223     // FIXME: this will work only for the X86 backend. I need to
 224     // device an algorthm to select the minimal (considering register
 225     // aliasing) number of temp registers to reserve so that we have 2
 226     // registers for each register class available.
 227
 228     // reserve R32: EDI, EBX,
 229     //         R16:  DI,  BX,
 230     //         R8:   DH,  BH,
 231     //         RFP: FP5, FP6
 232     reserved_.push_back(19); /* EDI */
 233     reserved_.push_back(17); /* EBX */
 234     reserved_.push_back(12); /*  DI */
 235     reserved_.push_back( 7); /*  BX */
 236     reserved_.push_back(11); /*  DH */
 237     reserved_.push_back( 4); /*  BH */
 238     reserved_.push_back(28); /* FP5 */
 239     reserved_.push_back(29); /* FP6 */
 240
 241     // liner scan algorithm
 242     for (Intervals::const_iterator
 243              i = li_->begin(), e = li_->end(); i != e; ++i) {
 244         DEBUG(std::cerr << "processing current interval: " << *i << '\n');
 245
 246         DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
 247         DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
 248
 249         processActiveIntervals(i);
 250         // processInactiveIntervals(i);
 251
 252         // if this register is preallocated, look for an interval that
 253         // overlaps with it and assign it to a memory location
 254         if (i->reg < MRegisterInfo::FirstVirtualRegister) {
 255             reservePhysReg(i->reg);
 256             active_.push_back(&*i);
 257         }
 258         // otherwise we are allocating a virtual register. try to find
 259         // a free physical register or spill an interval in order to
 260         // assign it one (we could spill the current though).
 261         else {
 262             unsigned physReg = getFreePhysReg(i->reg);
 263             if (!physReg) {
 264                 assignStackSlotAtInterval(i);
 265             }
 266             else {
 267                 assignVirt2PhysReg(i->reg, physReg);
 268                 active_.push_back(&*i);
 269             }
 270         }
 271     }
 272
 273     DEBUG(std::cerr << "finished register allocation\n");
 274     DEBUG(printVirt2PhysMap());
 275
 276     DEBUG(std::cerr << "Rewrite machine code:\n");
 277     for (MachineBasicBlockPtrs::iterator
 278              mbbi = mbbs_.begin(), mbbe = mbbs_.end(); mbbi != mbbe; ++mbbi) {
 279         instrAdded_ = 0;
 280         currentMbb_ = *mbbi;
 281
 282         for (currentInstr_ = currentMbb_->begin();
 283              currentInstr_ != currentMbb_->end(); ++currentInstr_) {
 284
 285             DEBUG(std::cerr << "\tinstruction: ";
 286                   (*currentInstr_)->print(std::cerr, *tm_););
 287
 288             // use our current mapping and actually replace and
 289             // virtual register with its allocated physical registers
 290             DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
 291                   "physical registers:\n");
 292             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 293                  i != e; ++i) {
 294                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 295                 if (op.isVirtualRegister()) {
 296                     unsigned virtReg = op.getAllocatedRegNum();
 297                     unsigned physReg = v2pMap_[virtReg];
 298                     // if this virtual registers lives on the stack,
 299                     // load it to a temporary physical register
 300                     if (physReg) {
 301                         DEBUG(std::cerr << "\t\t\t%reg" << virtReg
 302                               << " -> " << mri_->getName(physReg) << '\n');
 303                         (*currentInstr_)->SetMachineOperandReg(i, physReg);
 304                     }
 305                 }
 306             }
 307
 308             DEBUG(std::cerr << "\t\tloading temporarily used operands to "
 309                   "registers:\n");
 310             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 311                  i != e; ++i) {
 312                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 313                 if (op.isVirtualRegister() && op.opIsUse()) {
 314                     unsigned virtReg = op.getAllocatedRegNum();
 315                     unsigned physReg = v2pMap_[virtReg];
 316                     if (!physReg) {
 317                         physReg = getFreeTempPhysReg(virtReg);
 318                     }
 319                     loadVirt2PhysReg(virtReg, physReg);
 320                     tempUseOperands_.push_back(virtReg);
 321                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 322                 }
 323             }
 324
 325             DEBUG(std::cerr << "\t\tclearing temporarily used operands:\n");
 326             for (unsigned i = 0, e = tempUseOperands_.size(); i != e; ++i) {
 327                 clearVirtReg(tempUseOperands_[i]);
 328             }
 329             tempUseOperands_.clear();
 330
 331             DEBUG(std::cerr << "\t\tassigning temporarily defined operands to "
 332                   "registers:\n");
 333             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 334                  i != e; ++i) {
 335                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 336                 if (op.isVirtualRegister() && !op.opIsUse()) {
 337                     unsigned virtReg = op.getAllocatedRegNum();
 338                     unsigned physReg = v2pMap_[virtReg];
 339                     if (!physReg) {
 340                         physReg = getFreeTempPhysReg(virtReg);
 341                     }
 342                     if (op.opIsDefAndUse()) {
 343                         loadVirt2PhysReg(virtReg, physReg);
 344                     }
 345                     else {
 346                         assignVirt2PhysReg(virtReg, physReg);
 347                     }
 348                     tempDefOperands_.push_back(virtReg);
 349                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 350                 }
 351             }
 352
 353
 354             // if the instruction is a two address instruction and the
 355             // source operands are not identical we need to insert
 356             // extra instructions.
 357
 358             unsigned opcode = (*currentInstr_)->getOpcode();
 359             if (tm_->getInstrInfo().isTwoAddrInstr(opcode) &&
 360                 (*currentInstr_)->getOperand(0).getAllocatedRegNum() !=
 361                 (*currentInstr_)->getOperand(1).getAllocatedRegNum()) {
 362                 assert((*currentInstr_)->getOperand(1).isRegister() &&
 363                        (*currentInstr_)->getOperand(1).getAllocatedRegNum() &&
 364                        (*currentInstr_)->getOperand(1).opIsUse() &&
 365                        "Two address instruction invalid");
 366
 367                 unsigned regA =
 368                     (*currentInstr_)->getOperand(0).getAllocatedRegNum();
 369                 unsigned regB =
 370                     (*currentInstr_)->getOperand(1).getAllocatedRegNum();
 371                 unsigned regC =
 372                     ((*currentInstr_)->getNumOperands() > 2 &&
 373                      (*currentInstr_)->getOperand(2).isRegister()) ?
 374                     (*currentInstr_)->getOperand(2).getAllocatedRegNum() :
 375                     0;
 376
 377                 const TargetRegisterClass* rc = mri_->getRegClass(regA);
 378
 379                 // special case: "a = b op a". If b is a temporary
 380                 // reserved register rewrite as: "b = b op a; a = b"
 381                 // otherwise use a temporary reserved register t and
 382                 // rewrite as: "t = b; t = t op a; a = t"
 383                 if (regC && regA == regC) {
 384                     // b is a temp reserved register
 385                     if (find(reserved_.begin(), reserved_.end(),
 386                              regB) != reserved_.end()) {
 387                         (*currentInstr_)->SetMachineOperandReg(0, regB);
 388                         ++currentInstr_;
 389                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 390                                                           currentInstr_,
 391                                                           regA,
 392                                                           regB,
 393                                                           rc);
 394                         --currentInstr_;
 395                     }
 396                     // b is just a normal register
 397                     else {
 398                         unsigned tempReg = getFreeTempPhysReg(rc);
 399                         assert (tempReg &&
 400                                 "no free temp reserved physical register?");
 401                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 402                                                           currentInstr_,
 403                                                           tempReg,
 404                                                           regB,
 405                                                           rc);
 406                         (*currentInstr_)->SetMachineOperandReg(0, tempReg);
 407                         (*currentInstr_)->SetMachineOperandReg(1, tempReg);
 408                         ++currentInstr_;
 409                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 410                                                           currentInstr_,
 411                                                           regA,
 412                                                           tempReg,
 413                                                           rc);
 414                         --currentInstr_;
 415                     }
 416                 }
 417                 // "a = b op c" gets rewritten to "a = b; a = a op c"
 418                 else {
 419                     instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 420                                                       currentInstr_,
 421                                                       regA,
 422                                                       regB,
 423                                                       rc);
 424                     (*currentInstr_)->SetMachineOperandReg(1, regA);
 425                 }
 426             }
 427
 428             DEBUG(std::cerr << "\t\tspilling temporarily defined operands "
 429                   "of this instruction:\n");
 430             ++currentInstr_; // we want to insert after this instruction
 431             for (unsigned i = 0, e = tempDefOperands_.size(); i != e; ++i) {
 432                 spillVirtReg(tempDefOperands_[i]);
 433             }
 434             --currentInstr_; // restore currentInstr_ iterator
 435             tempDefOperands_.clear();
 436         }
 437
 438         for (unsigned i = 0, e = p2vMap_.size(); i != e; ++i) {
 439             assert(p2vMap_[i] != i &&
 440                    "reserved physical registers at end of basic block?");
 441         }
 442     }
 443
 444     return true;
 445 }
 446
 447 void RA::processActiveIntervals(Intervals::const_iterator cur)
 448 {
 449     DEBUG(std::cerr << "\tprocessing active intervals:\n");
 450     for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
 451         unsigned reg = (*i)->reg;
 452         // remove expired intervals. we expire earlier because this if
 453         // an interval expires this is going to be the last use. in
 454         // this case we can reuse the register for a def in the same
 455         // instruction
 456         if ((*i)->expired(cur->start() + 1)) {
 457             DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
 458             if (reg < MRegisterInfo::FirstVirtualRegister) {
 459                 clearReservedPhysReg(reg);
 460             }
 461             else {
 462                 p2vMap_[v2pMap_[reg]] = 0;
 463             }
 464             // remove interval from active
 465             i = active_.erase(i);
 466         }
 467         // move not active intervals to inactive list
 468 //         else if (!(*i)->overlaps(curIndex)) {
 469 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
 470 //             unmarkReg(virtReg);
 471 //             // add interval to inactive
 472 //             inactive_.push_back(*i);
 473 //             // remove interval from active
 474 //             i = active_.erase(i);
 475 //         }
 476         else {
 477             ++i;
 478         }
 479     }
 480 }
 481
 482 void RA::processInactiveIntervals(Intervals::const_iterator cur)
 483 {
 484 //     DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
 485 //     for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
 486 //         unsigned virtReg = (*i)->reg;
 487 //         // remove expired intervals
 488 //         if ((*i)->expired(curIndex)) {
 489 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
 490 //             freePhysReg(virtReg);
 491 //             // remove from inactive
 492 //             i = inactive_.erase(i);
 493 //         }
 494 //         // move re-activated intervals in active list
 495 //         else if ((*i)->overlaps(curIndex)) {
 496 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
 497 //             markReg(virtReg);
 498 //             // add to active
 499 //             active_.push_back(*i);
 500 //             // remove from inactive
 501 //             i = inactive_.erase(i);
 502 //         }
 503 //         else {
 504 //             ++i;
 505 //         }
 506 //     }
 507 }
 508
 509 void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
 510 {
 511     DEBUG(std::cerr << "\t\tassigning stack slot at interval "
 512           << *cur << ":\n");
 513     assert(!active_.empty() &&
 514            "active set cannot be empty when choosing a register to spill");
 515     const TargetRegisterClass* rcCur =
 516         mf_->getSSARegMap()->getRegClass(cur->reg);
 517
 518     // find the interval for a virtual register that ends last in
 519     // active and belongs to the same register class as the current
 520     // interval
 521     IntervalPtrs::iterator lastEndActive = active_.begin();
 522     for (IntervalPtrs::iterator e = active_.end();
 523          lastEndActive != e; ++lastEndActive) {
 524         if ((*lastEndActive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 525             const TargetRegisterClass* rc =
 526                 mri_->getRegClass(v2pMap_[(*lastEndActive)->reg]);
 527             if (rcCur == rc) {
 528                 break;
 529             }
 530         }
 531     }
 532     for (IntervalPtrs::iterator i = lastEndActive, e = active_.end();
 533          i != e; ++i) {
 534         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 535             const TargetRegisterClass* rc =
 536                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 537             if (rcCur == rc &&
 538                 (*lastEndActive)->end() < (*i)->end()) {
 539                 lastEndActive = i;
 540             }
 541         }
 542     }
 543
 544     // find the interval for a virtual register that ends last in
 545     // inactive and belongs to the same register class as the current
 546     // interval
 547     IntervalPtrs::iterator lastEndInactive = inactive_.begin();
 548     for (IntervalPtrs::iterator e = inactive_.end();
 549          lastEndInactive != e; ++lastEndInactive) {
 550         if ((*lastEndInactive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 551             const TargetRegisterClass* rc =
 552                 mri_->getRegClass(v2pMap_[(*lastEndInactive)->reg]);
 553             if (rcCur == rc) {
 554                 break;
 555             }
 556         }
 557     }
 558     for (IntervalPtrs::iterator i = lastEndInactive, e = inactive_.end();
 559          i != e; ++i) {
 560         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 561             const TargetRegisterClass* rc =
 562                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 563             if (rcCur == rc &&
 564                 (*lastEndInactive)->end() < (*i)->end()) {
 565                 lastEndInactive = i;
 566             }
 567         }
 568     }
 569
 570     unsigned lastEndActiveInactive = 0;
 571     if (lastEndActive != active_.end() &&
 572         lastEndActiveInactive < (*lastEndActive)->end()) {
 573         lastEndActiveInactive = (*lastEndActive)->end();
 574     }
 575     if (lastEndInactive != inactive_.end() &&
 576         lastEndActiveInactive < (*lastEndInactive)->end()) {
 577         lastEndActiveInactive = (*lastEndInactive)->end();
 578     }
 579
 580     if (lastEndActiveInactive > cur->end()) {
 581         if (lastEndInactive == inactive_.end() ||
 582             (*lastEndActive)->end() > (*lastEndInactive)->end()) {
 583             assignVirt2StackSlot((*lastEndActive)->reg);
 584             active_.erase(lastEndActive);
 585         }
 586         else {
 587             assignVirt2StackSlot((*lastEndInactive)->reg);
 588             inactive_.erase(lastEndInactive);
 589         }
 590         unsigned physReg = getFreePhysReg(cur->reg);
 591         assert(physReg && "no free physical register after spill?");
 592         assignVirt2PhysReg(cur->reg, physReg);
 593         active_.push_back(&*cur);
 594     }
 595     else {
 596         assignVirt2StackSlot(cur->reg);
 597     }
 598 }
 599
 600 void RA::reservePhysReg(unsigned physReg)
 601 {
 602     DEBUG(std::cerr << "\t\t\treserving physical register: "
 603           << mri_->getName(physReg) << '\n');
 604     // if this register holds a value spill it
 605     unsigned virtReg = p2vMap_[physReg];
 606     if (virtReg != 0) {
 607         assert(virtReg != physReg && "reserving an already reserved phus reg?");
 608         // remove interval from active
 609         for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
 610              i != e; ++i) {
 611             if ((*i)->reg == virtReg) {
 612                 active_.erase(i);
 613                 break;
 614             }
 615         }
 616         assignVirt2StackSlot(virtReg);
 617     }
 618     p2vMap_[physReg] = physReg; // this denotes a reserved physical register
 619 }
 620
 621 void RA::clearReservedPhysReg(unsigned physReg)
 622 {
 623     DEBUG(std::cerr << "\t\t\tclearing reserved physical register: "
 624           << mri_->getName(physReg) << '\n');
 625     assert(p2vMap_[physReg] == physReg &&
 626            "attempt to clear a non reserved physical register");
 627     p2vMap_[physReg] = 0;
 628 }
 629
 630 bool RA::physRegAvailable(unsigned physReg)
 631 {
 632     if (p2vMap_[physReg]) {
 633         return false;
 634     }
 635
 636     // if it aliases other registers it is still not free
 637     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 638         if (p2vMap_[*as]) {
 639             return false;
 640         }
 641     }
 642
 643     // if it is one of the reserved registers it is still not free
 644     if (find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()) {
 645         return false;
 646     }
 647
 648     return true;
 649 }
 650
 651 unsigned RA::getFreePhysReg(unsigned virtReg)
 652 {
 653     DEBUG(std::cerr << "\t\tgetting free physical register: ");
 654     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 655     TargetRegisterClass::iterator reg = rc->allocation_order_begin(*mf_);
 656     TargetRegisterClass::iterator regEnd = rc->allocation_order_end(*mf_);
 657
 658     for (; reg != regEnd; ++reg) {
 659         if (physRegAvailable(*reg)) {
 660             assert(*reg != 0 && "Cannot use register!");
 661             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 662             return *reg; // Found an unused register!
 663         }
 664     }
 665
 666     DEBUG(std::cerr << "no free register\n");
 667     return 0;
 668 }
 669
 670 bool RA::tempPhysRegAvailable(unsigned physReg)
 671 {
 672     assert(find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()
 673            && "cannot call this method with a non reserved temp register");
 674
 675     if (p2vMap_[physReg]) {
 676         return false;
 677     }
 678
 679     // if it aliases other registers it is still not free
 680     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 681         if (p2vMap_[*as]) {
 682             return false;
 683         }
 684     }
 685
 686     return true;
 687 }
 688
 689 unsigned RA::getFreeTempPhysReg(const TargetRegisterClass* rc)
 690 {
 691     DEBUG(std::cerr << "\t\tgetting free temporary physical register: ");
 692
 693     for (Regs::const_iterator
 694              reg = reserved_.begin(), regEnd = reserved_.end();
 695          reg != regEnd; ++reg) {
 696         if (rc == mri_->getRegClass(*reg) && tempPhysRegAvailable(*reg)) {
 697             assert(*reg != 0 && "Cannot use register!");
 698             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 699             return *reg; // Found an unused register!
 700         }
 701     }
 702     assert(0 && "no free temporary physical register?");
 703     return 0;
 704 }
 705
 706 void RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg)
 707 {
 708     assert((physRegAvailable(physReg) ||
 709             find(reserved_.begin(),
 710                  reserved_.end(),
 711                  physReg) != reserved_.end()) &&
 712            "attempt to allocate to a not available physical register");
 713     v2pMap_[virtReg] = physReg;
 714     p2vMap_[physReg] = virtReg;
 715 }
 716
 717 void RA::clearVirtReg(unsigned virtReg)
 718 {
 719     Virt2PhysMap::iterator it = v2pMap_.find(virtReg);
 720     assert(it != v2pMap_.end() &&
 721            "attempting to clear a not allocated virtual register");
 722     unsigned physReg = it->second;
 723     p2vMap_[physReg] = 0;
 724     v2pMap_[virtReg] = 0; // this marks that this virtual register
 725                           // lives on the stack
 726     DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg)
 727           << "\n");
 728 }
 729
 730 void RA::assignVirt2StackSlot(unsigned virtReg)
 731 {
 732     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 733     int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc);
 734
 735     bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second;
 736     assert(inserted &&
 737            "attempt to assign stack slot to already assigned register?");
 738     // if the virtual register was previously assigned clear the mapping
 739     // and free the virtual register
 740     if (v2pMap_.find(virtReg) != v2pMap_.end()) {
 741         clearVirtReg(virtReg);
 742     }
 743     else {
 744         v2pMap_[virtReg] = 0; // this marks that this virtual register
 745                               // lives on the stack
 746     }
 747 }
 748
 749 int RA::getStackSlot(unsigned virtReg)
 750 {
 751     // use lower_bound so that we can do a possibly O(1) insert later
 752     // if necessary
 753     Virt2StackSlotMap::iterator it = v2ssMap_.find(virtReg);
 754     assert(it != v2ssMap_.end() &&
 755            "attempt to get stack slot on register that does not live on the stack");
 756     return it->second;
 757 }
 758
 759 void RA::spillVirtReg(unsigned virtReg)
 760 {
 761     DEBUG(std::cerr << "\t\t\tspilling register: " << virtReg);
 762     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 763     int frameIndex = getStackSlot(virtReg);
 764     DEBUG(std::cerr << " to stack slot #" << frameIndex << '\n');
 765     ++numSpilled;
 766     instrAdded_ += mri_->storeRegToStackSlot(*currentMbb_, currentInstr_,
 767                                              v2pMap_[virtReg], frameIndex, rc);
 768     clearVirtReg(virtReg);
 769 }
 770
 771 void RA::loadVirt2PhysReg(unsigned virtReg, unsigned physReg)
 772 {
 773     DEBUG(std::cerr << "\t\t\tloading register: " << virtReg);
 774     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 775     int frameIndex = getStackSlot(virtReg);
 776     DEBUG(std::cerr << " from stack slot #" << frameIndex << '\n');
 777     instrAdded_ += mri_->loadRegFromStackSlot(*currentMbb_, currentInstr_,
 778                                               physReg, frameIndex, rc);
 779     assignVirt2PhysReg(virtReg, physReg);
 780 }
 781
 782 FunctionPass* llvm::createLinearScanRegisterAllocator() {
 783     return new RA();
 784 }