1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "regalloc"
15 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
16 #include "PhysRegTracker.h"
17 #include "VirtRegMap.h"
18 #include "llvm/Function.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/RegAllocRegistry.h"
23 #include "llvm/CodeGen/RegisterCoalescer.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/MRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/EquivalenceClasses.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Compiler.h"
39 STATISTIC(NumIters , "Number of iterations performed");
40 STATISTIC(NumBacktracks, "Number of times we had to backtrack");
42 static RegisterRegAlloc
43 linearscanRegAlloc("linearscan", " linear scan register allocator",
44 createLinearScanRegisterAllocator);
47 struct VISIBILITY_HIDDEN RALinScan : public MachineFunctionPass {
49 RALinScan() : MachineFunctionPass((intptr_t)&ID) {}
51 typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
52 typedef std::vector<IntervalPtr> IntervalPtrs;
54 /// RelatedRegClasses - This structure is built the first time a function is
55 /// compiled, and keeps track of which register classes have registers that
56 /// belong to multiple classes or have aliases that are in other classes.
57 EquivalenceClasses<const TargetRegisterClass*> RelatedRegClasses;
58 std::map<unsigned, const TargetRegisterClass*> OneClassForEachPhysReg;
61 const TargetMachine* tm_;
62 const MRegisterInfo* mri_;
65 /// handled_ - Intervals are added to the handled_ set in the order of their
66 /// start value. This is uses for backtracking.
67 std::vector<LiveInterval*> handled_;
69 /// fixed_ - Intervals that correspond to machine registers.
73 /// active_ - Intervals that are currently being processed, and which have a
74 /// live range active for the current point.
77 /// inactive_ - Intervals that are currently being processed, but which have
78 /// a hold at the current point.
79 IntervalPtrs inactive_;
81 typedef std::priority_queue<LiveInterval*,
82 std::vector<LiveInterval*>,
83 greater_ptr<LiveInterval> > IntervalHeap;
84 IntervalHeap unhandled_;
85 std::auto_ptr<PhysRegTracker> prt_;
86 std::auto_ptr<VirtRegMap> vrm_;
87 std::auto_ptr<Spiller> spiller_;
90 virtual const char* getPassName() const {
91 return "Linear Scan Register Allocator";
94 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
95 AU.addRequired<LiveIntervals>();
96 // Make sure PassManager knows which analyses to make available
97 // to coalescing and which analyses coalescing invalidates.
98 AU.addRequiredTransitive<RegisterCoalescer>();
99 MachineFunctionPass::getAnalysisUsage(AU);
102 /// runOnMachineFunction - register allocate the whole function
103 bool runOnMachineFunction(MachineFunction&);
106 /// linearScan - the linear scan algorithm
109 /// initIntervalSets - initialize the interval sets.
111 void initIntervalSets();
113 /// processActiveIntervals - expire old intervals and move non-overlapping
114 /// ones to the inactive list.
115 void processActiveIntervals(unsigned CurPoint);
117 /// processInactiveIntervals - expire old intervals and move overlapping
118 /// ones to the active list.
119 void processInactiveIntervals(unsigned CurPoint);
121 /// assignRegOrStackSlotAtInterval - assign a register if one
122 /// is available, or spill.
123 void assignRegOrStackSlotAtInterval(LiveInterval* cur);
126 /// register handling helpers
129 /// getFreePhysReg - return a free physical register for this virtual
130 /// register interval if we have one, otherwise return 0.
131 unsigned getFreePhysReg(LiveInterval* cur);
133 /// assignVirt2StackSlot - assigns this virtual register to a
134 /// stack slot. returns the stack slot
135 int assignVirt2StackSlot(unsigned virtReg);
137 void ComputeRelatedRegClasses();
139 template <typename ItTy>
140 void printIntervals(const char* const str, ItTy i, ItTy e) const {
141 if (str) DOUT << str << " intervals:\n";
142 for (; i != e; ++i) {
143 DOUT << "\t" << *i->first << " -> ";
144 unsigned reg = i->first->reg;
145 if (MRegisterInfo::isVirtualRegister(reg)) {
146 reg = vrm_->getPhys(reg);
148 DOUT << mri_->getName(reg) << '\n';
152 char RALinScan::ID = 0;
155 void RALinScan::ComputeRelatedRegClasses() {
156 const MRegisterInfo &MRI = *mri_;
158 // First pass, add all reg classes to the union, and determine at least one
159 // reg class that each register is in.
160 bool HasAliases = false;
161 for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
162 E = MRI.regclass_end(); RCI != E; ++RCI) {
163 RelatedRegClasses.insert(*RCI);
164 for (TargetRegisterClass::iterator I = (*RCI)->begin(), E = (*RCI)->end();
166 HasAliases = HasAliases || *MRI.getAliasSet(*I) != 0;
168 const TargetRegisterClass *&PRC = OneClassForEachPhysReg[*I];
170 // Already processed this register. Just make sure we know that
171 // multiple register classes share a register.
172 RelatedRegClasses.unionSets(PRC, *RCI);
179 // Second pass, now that we know conservatively what register classes each reg
180 // belongs to, add info about aliases. We don't need to do this for targets
181 // without register aliases.
183 for (std::map<unsigned, const TargetRegisterClass*>::iterator
184 I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end();
186 for (const unsigned *AS = MRI.getAliasSet(I->first); *AS; ++AS)
187 RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
190 bool RALinScan::runOnMachineFunction(MachineFunction &fn) {
192 tm_ = &fn.getTarget();
193 mri_ = tm_->getRegisterInfo();
194 li_ = &getAnalysis<LiveIntervals>();
196 // We don't run the coalescer here because we have no reason to
197 // interact with it. If the coalescer requires interaction, it
198 // won't do anything. If it doesn't require interaction, we assume
199 // it was run as a separate pass.
201 // If this is the first function compiled, compute the related reg classes.
202 if (RelatedRegClasses.empty())
203 ComputeRelatedRegClasses();
205 if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
206 vrm_.reset(new VirtRegMap(*mf_));
207 if (!spiller_.get()) spiller_.reset(createSpiller());
213 // Rewrite spill code and update the PhysRegsUsed set.
214 spiller_->runOnMachineFunction(*mf_, *vrm_);
215 vrm_.reset(); // Free the VirtRegMap
217 while (!unhandled_.empty()) unhandled_.pop();
226 /// initIntervalSets - initialize the interval sets.
228 void RALinScan::initIntervalSets()
230 assert(unhandled_.empty() && fixed_.empty() &&
231 active_.empty() && inactive_.empty() &&
232 "interval sets should be empty on initialization");
234 for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
235 if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
236 mf_->setPhysRegUsed(i->second.reg);
237 fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
239 unhandled_.push(&i->second);
243 void RALinScan::linearScan()
245 // linear scan algorithm
246 DOUT << "********** LINEAR SCAN **********\n";
247 DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
249 DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
251 while (!unhandled_.empty()) {
252 // pick the interval with the earliest start point
253 LiveInterval* cur = unhandled_.top();
256 DOUT << "\n*** CURRENT ***: " << *cur << '\n';
258 processActiveIntervals(cur->beginNumber());
259 processInactiveIntervals(cur->beginNumber());
261 assert(MRegisterInfo::isVirtualRegister(cur->reg) &&
262 "Can only allocate virtual registers!");
264 // Allocating a virtual register. try to find a free
265 // physical register or spill an interval (possibly this one) in order to
267 assignRegOrStackSlotAtInterval(cur);
269 DEBUG(printIntervals("active", active_.begin(), active_.end()));
270 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
273 // expire any remaining active intervals
274 while (!active_.empty()) {
275 IntervalPtr &IP = active_.back();
276 unsigned reg = IP.first->reg;
277 DOUT << "\tinterval " << *IP.first << " expired\n";
278 assert(MRegisterInfo::isVirtualRegister(reg) &&
279 "Can only allocate virtual registers!");
280 reg = vrm_->getPhys(reg);
281 prt_->delRegUse(reg);
285 // expire any remaining inactive intervals
286 DEBUG(for (IntervalPtrs::reverse_iterator
287 i = inactive_.rbegin(); i != inactive_.rend(); )
288 DOUT << "\tinterval " << *i->first << " expired\n");
291 // Add live-ins to every BB except for entry.
292 MachineFunction::iterator EntryMBB = mf_->begin();
293 for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
294 const LiveInterval &cur = i->second;
296 if (MRegisterInfo::isPhysicalRegister(cur.reg))
298 else if (vrm_->isAssignedReg(cur.reg))
299 Reg = vrm_->getPhys(cur.reg);
302 for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end();
304 const LiveRange &LR = *I;
305 SmallVector<MachineBasicBlock*, 4> LiveInMBBs;
306 if (li_->findLiveInMBBs(LR, LiveInMBBs)) {
307 for (unsigned i = 0, e = LiveInMBBs.size(); i != e; ++i)
308 if (LiveInMBBs[i] != EntryMBB)
309 LiveInMBBs[i]->addLiveIn(Reg);
317 /// processActiveIntervals - expire old intervals and move non-overlapping ones
318 /// to the inactive list.
319 void RALinScan::processActiveIntervals(unsigned CurPoint)
321 DOUT << "\tprocessing active intervals:\n";
323 for (unsigned i = 0, e = active_.size(); i != e; ++i) {
324 LiveInterval *Interval = active_[i].first;
325 LiveInterval::iterator IntervalPos = active_[i].second;
326 unsigned reg = Interval->reg;
328 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
330 if (IntervalPos == Interval->end()) { // Remove expired intervals.
331 DOUT << "\t\tinterval " << *Interval << " expired\n";
332 assert(MRegisterInfo::isVirtualRegister(reg) &&
333 "Can only allocate virtual registers!");
334 reg = vrm_->getPhys(reg);
335 prt_->delRegUse(reg);
337 // Pop off the end of the list.
338 active_[i] = active_.back();
342 } else if (IntervalPos->start > CurPoint) {
343 // Move inactive intervals to inactive list.
344 DOUT << "\t\tinterval " << *Interval << " inactive\n";
345 assert(MRegisterInfo::isVirtualRegister(reg) &&
346 "Can only allocate virtual registers!");
347 reg = vrm_->getPhys(reg);
348 prt_->delRegUse(reg);
350 inactive_.push_back(std::make_pair(Interval, IntervalPos));
352 // Pop off the end of the list.
353 active_[i] = active_.back();
357 // Otherwise, just update the iterator position.
358 active_[i].second = IntervalPos;
363 /// processInactiveIntervals - expire old intervals and move overlapping
364 /// ones to the active list.
365 void RALinScan::processInactiveIntervals(unsigned CurPoint)
367 DOUT << "\tprocessing inactive intervals:\n";
369 for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
370 LiveInterval *Interval = inactive_[i].first;
371 LiveInterval::iterator IntervalPos = inactive_[i].second;
372 unsigned reg = Interval->reg;
374 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
376 if (IntervalPos == Interval->end()) { // remove expired intervals.
377 DOUT << "\t\tinterval " << *Interval << " expired\n";
379 // Pop off the end of the list.
380 inactive_[i] = inactive_.back();
381 inactive_.pop_back();
383 } else if (IntervalPos->start <= CurPoint) {
384 // move re-activated intervals in active list
385 DOUT << "\t\tinterval " << *Interval << " active\n";
386 assert(MRegisterInfo::isVirtualRegister(reg) &&
387 "Can only allocate virtual registers!");
388 reg = vrm_->getPhys(reg);
389 prt_->addRegUse(reg);
391 active_.push_back(std::make_pair(Interval, IntervalPos));
393 // Pop off the end of the list.
394 inactive_[i] = inactive_.back();
395 inactive_.pop_back();
398 // Otherwise, just update the iterator position.
399 inactive_[i].second = IntervalPos;
404 /// updateSpillWeights - updates the spill weights of the specifed physical
405 /// register and its weight.
406 static void updateSpillWeights(std::vector<float> &Weights,
407 unsigned reg, float weight,
408 const MRegisterInfo *MRI) {
409 Weights[reg] += weight;
410 for (const unsigned* as = MRI->getAliasSet(reg); *as; ++as)
411 Weights[*as] += weight;
415 RALinScan::IntervalPtrs::iterator
416 FindIntervalInVector(RALinScan::IntervalPtrs &IP, LiveInterval *LI) {
417 for (RALinScan::IntervalPtrs::iterator I = IP.begin(), E = IP.end();
419 if (I->first == LI) return I;
423 static void RevertVectorIteratorsTo(RALinScan::IntervalPtrs &V, unsigned Point){
424 for (unsigned i = 0, e = V.size(); i != e; ++i) {
425 RALinScan::IntervalPtr &IP = V[i];
426 LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
428 if (I != IP.first->begin()) --I;
433 /// assignRegOrStackSlotAtInterval - assign a register if one is available, or
435 void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
437 DOUT << "\tallocating current interval: ";
439 PhysRegTracker backupPrt = *prt_;
441 std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
442 unsigned StartPosition = cur->beginNumber();
443 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
444 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
446 // for every interval in inactive we overlap with, mark the
447 // register as not free and update spill weights.
448 for (IntervalPtrs::const_iterator i = inactive_.begin(),
449 e = inactive_.end(); i != e; ++i) {
450 unsigned Reg = i->first->reg;
451 assert(MRegisterInfo::isVirtualRegister(Reg) &&
452 "Can only allocate virtual registers!");
453 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(Reg);
454 // If this is not in a related reg class to the register we're allocating,
456 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
457 cur->overlapsFrom(*i->first, i->second-1)) {
458 Reg = vrm_->getPhys(Reg);
459 prt_->addRegUse(Reg);
460 SpillWeightsToAdd.push_back(std::make_pair(Reg, i->first->weight));
464 // Speculatively check to see if we can get a register right now. If not,
465 // we know we won't be able to by adding more constraints. If so, we can
466 // check to see if it is valid. Doing an exhaustive search of the fixed_ list
467 // is very bad (it contains all callee clobbered registers for any functions
468 // with a call), so we want to avoid doing that if possible.
469 unsigned physReg = getFreePhysReg(cur);
471 // We got a register. However, if it's in the fixed_ list, we might
472 // conflict with it. Check to see if we conflict with it or any of its
474 std::set<unsigned> RegAliases;
475 for (const unsigned *AS = mri_->getAliasSet(physReg); *AS; ++AS)
476 RegAliases.insert(*AS);
478 bool ConflictsWithFixed = false;
479 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
480 IntervalPtr &IP = fixed_[i];
481 if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
482 // Okay, this reg is on the fixed list. Check to see if we actually
484 LiveInterval *I = IP.first;
485 if (I->endNumber() > StartPosition) {
486 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
488 if (II != I->begin() && II->start > StartPosition)
490 if (cur->overlapsFrom(*I, II)) {
491 ConflictsWithFixed = true;
498 // Okay, the register picked by our speculative getFreePhysReg call turned
499 // out to be in use. Actually add all of the conflicting fixed registers to
500 // prt so we can do an accurate query.
501 if (ConflictsWithFixed) {
502 // For every interval in fixed we overlap with, mark the register as not
503 // free and update spill weights.
504 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
505 IntervalPtr &IP = fixed_[i];
506 LiveInterval *I = IP.first;
508 const TargetRegisterClass *RegRC = OneClassForEachPhysReg[I->reg];
509 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
510 I->endNumber() > StartPosition) {
511 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
513 if (II != I->begin() && II->start > StartPosition)
515 if (cur->overlapsFrom(*I, II)) {
516 unsigned reg = I->reg;
517 prt_->addRegUse(reg);
518 SpillWeightsToAdd.push_back(std::make_pair(reg, I->weight));
523 // Using the newly updated prt_ object, which includes conflicts in the
524 // future, see if there are any registers available.
525 physReg = getFreePhysReg(cur);
529 // Restore the physical register tracker, removing information about the
533 // if we find a free register, we are done: assign this virtual to
534 // the free physical register and add this interval to the active
537 DOUT << mri_->getName(physReg) << '\n';
538 vrm_->assignVirt2Phys(cur->reg, physReg);
539 prt_->addRegUse(physReg);
540 active_.push_back(std::make_pair(cur, cur->begin()));
541 handled_.push_back(cur);
544 DOUT << "no free registers\n";
546 // Compile the spill weights into an array that is better for scanning.
547 std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
548 for (std::vector<std::pair<unsigned, float> >::iterator
549 I = SpillWeightsToAdd.begin(), E = SpillWeightsToAdd.end(); I != E; ++I)
550 updateSpillWeights(SpillWeights, I->first, I->second, mri_);
552 // for each interval in active, update spill weights.
553 for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
555 unsigned reg = i->first->reg;
556 assert(MRegisterInfo::isVirtualRegister(reg) &&
557 "Can only allocate virtual registers!");
558 reg = vrm_->getPhys(reg);
559 updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
562 DOUT << "\tassigning stack slot at interval "<< *cur << ":\n";
564 // Find a register to spill.
565 float minWeight = HUGE_VALF;
566 unsigned minReg = cur->preference; // Try the preferred register first.
568 if (!minReg || SpillWeights[minReg] == HUGE_VALF)
569 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
570 e = RC->allocation_order_end(*mf_); i != e; ++i) {
572 if (minWeight > SpillWeights[reg]) {
573 minWeight = SpillWeights[reg];
578 // If we didn't find a register that is spillable, try aliases?
580 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
581 e = RC->allocation_order_end(*mf_); i != e; ++i) {
583 // No need to worry about if the alias register size < regsize of RC.
584 // We are going to spill all registers that alias it anyway.
585 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as) {
586 if (minWeight > SpillWeights[*as]) {
587 minWeight = SpillWeights[*as];
593 // All registers must have inf weight. Just grab one!
595 minReg = *RC->allocation_order_begin(*mf_);
598 DOUT << "\t\tregister with min weight: "
599 << mri_->getName(minReg) << " (" << minWeight << ")\n";
601 // if the current has the minimum weight, we need to spill it and
602 // add any added intervals back to unhandled, and restart
604 if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
605 DOUT << "\t\t\tspilling(c): " << *cur << '\n';
606 std::vector<LiveInterval*> added =
607 li_->addIntervalsForSpills(*cur, *vrm_, cur->reg);
609 return; // Early exit if all spills were folded.
611 // Merge added with unhandled. Note that we know that
612 // addIntervalsForSpills returns intervals sorted by their starting
614 for (unsigned i = 0, e = added.size(); i != e; ++i)
615 unhandled_.push(added[i]);
621 // push the current interval back to unhandled since we are going
622 // to re-run at least this iteration. Since we didn't modify it it
623 // should go back right in the front of the list
624 unhandled_.push(cur);
626 // otherwise we spill all intervals aliasing the register with
627 // minimum weight, rollback to the interval with the earliest
628 // start point and let the linear scan algorithm run again
629 std::vector<LiveInterval*> added;
630 assert(MRegisterInfo::isPhysicalRegister(minReg) &&
631 "did not choose a register to spill?");
632 BitVector toSpill(mri_->getNumRegs());
634 // We are going to spill minReg and all its aliases.
635 toSpill[minReg] = true;
636 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
639 // the earliest start of a spilled interval indicates up to where
640 // in handled we need to roll back
641 unsigned earliestStart = cur->beginNumber();
643 // set of spilled vregs (used later to rollback properly)
644 std::set<unsigned> spilled;
646 // spill live intervals of virtual regs mapped to the physical register we
647 // want to clear (and its aliases). We only spill those that overlap with the
648 // current interval as the rest do not affect its allocation. we also keep
649 // track of the earliest start of all spilled live intervals since this will
650 // mark our rollback point.
651 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
652 unsigned reg = i->first->reg;
653 if (//MRegisterInfo::isVirtualRegister(reg) &&
654 toSpill[vrm_->getPhys(reg)] &&
655 cur->overlapsFrom(*i->first, i->second)) {
656 DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
657 earliestStart = std::min(earliestStart, i->first->beginNumber());
658 std::vector<LiveInterval*> newIs =
659 li_->addIntervalsForSpills(*i->first, *vrm_, reg);
660 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
664 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ++i){
665 unsigned reg = i->first->reg;
666 if (//MRegisterInfo::isVirtualRegister(reg) &&
667 toSpill[vrm_->getPhys(reg)] &&
668 cur->overlapsFrom(*i->first, i->second-1)) {
669 DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
670 earliestStart = std::min(earliestStart, i->first->beginNumber());
671 std::vector<LiveInterval*> newIs =
672 li_->addIntervalsForSpills(*i->first, *vrm_, reg);
673 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
678 DOUT << "\t\trolling back to: " << earliestStart << '\n';
680 // Scan handled in reverse order up to the earliest start of a
681 // spilled live interval and undo each one, restoring the state of
683 while (!handled_.empty()) {
684 LiveInterval* i = handled_.back();
685 // If this interval starts before t we are done.
686 if (i->beginNumber() < earliestStart)
688 DOUT << "\t\t\tundo changes for: " << *i << '\n';
691 // When undoing a live interval allocation we must know if it is active or
692 // inactive to properly update the PhysRegTracker and the VirtRegMap.
693 IntervalPtrs::iterator it;
694 if ((it = FindIntervalInVector(active_, i)) != active_.end()) {
696 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
697 if (!spilled.count(i->reg))
699 prt_->delRegUse(vrm_->getPhys(i->reg));
700 vrm_->clearVirt(i->reg);
701 } else if ((it = FindIntervalInVector(inactive_, i)) != inactive_.end()) {
703 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
704 if (!spilled.count(i->reg))
706 vrm_->clearVirt(i->reg);
708 assert(MRegisterInfo::isVirtualRegister(i->reg) &&
709 "Can only allocate virtual registers!");
710 vrm_->clearVirt(i->reg);
715 // Rewind the iterators in the active, inactive, and fixed lists back to the
716 // point we reverted to.
717 RevertVectorIteratorsTo(active_, earliestStart);
718 RevertVectorIteratorsTo(inactive_, earliestStart);
719 RevertVectorIteratorsTo(fixed_, earliestStart);
721 // scan the rest and undo each interval that expired after t and
722 // insert it in active (the next iteration of the algorithm will
723 // put it in inactive if required)
724 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
725 LiveInterval *HI = handled_[i];
726 if (!HI->expiredAt(earliestStart) &&
727 HI->expiredAt(cur->beginNumber())) {
728 DOUT << "\t\t\tundo changes for: " << *HI << '\n';
729 active_.push_back(std::make_pair(HI, HI->begin()));
730 assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
731 prt_->addRegUse(vrm_->getPhys(HI->reg));
735 // merge added with unhandled
736 for (unsigned i = 0, e = added.size(); i != e; ++i)
737 unhandled_.push(added[i]);
740 /// getFreePhysReg - return a free physical register for this virtual register
741 /// interval if we have one, otherwise return 0.
742 unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
743 std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
744 unsigned MaxInactiveCount = 0;
746 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
747 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
749 for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
751 unsigned reg = i->first->reg;
752 assert(MRegisterInfo::isVirtualRegister(reg) &&
753 "Can only allocate virtual registers!");
755 // If this is not in a related reg class to the register we're allocating,
757 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(reg);
758 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) {
759 reg = vrm_->getPhys(reg);
760 ++inactiveCounts[reg];
761 MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]);
765 unsigned FreeReg = 0;
766 unsigned FreeRegInactiveCount = 0;
768 // If copy coalescer has assigned a "preferred" register, check if it's
771 if (prt_->isRegAvail(cur->preference)) {
772 DOUT << "\t\tassigned the preferred register: "
773 << mri_->getName(cur->preference) << "\n";
774 return cur->preference;
776 DOUT << "\t\tunable to assign the preferred register: "
777 << mri_->getName(cur->preference) << "\n";
779 // Scan for the first available register.
780 TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
781 TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
783 if (prt_->isRegAvail(*I)) {
785 FreeRegInactiveCount = inactiveCounts[FreeReg];
789 // If there are no free regs, or if this reg has the max inactive count,
790 // return this register.
791 if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg;
793 // Continue scanning the registers, looking for the one with the highest
794 // inactive count. Alkis found that this reduced register pressure very
795 // slightly on X86 (in rev 1.94 of this file), though this should probably be
797 for (; I != E; ++I) {
799 if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) {
801 FreeRegInactiveCount = inactiveCounts[Reg];
802 if (FreeRegInactiveCount == MaxInactiveCount)
803 break; // We found the one with the max inactive count.
810 FunctionPass* llvm::createLinearScanRegisterAllocator() {
811 return new RALinScan();