1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
13 #define DEBUG_TYPE "regalloc"
14 #include "llvm/Function.h"
15 #include "llvm/CodeGen/LiveIntervals.h"
16 #include "llvm/CodeGen/LiveVariables.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/SSARegMap.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/CFG.h"
26 #include "Support/Debug.h"
27 #include "Support/DepthFirstIterator.h"
28 #include "Support/Statistic.h"
29 #include "Support/STLExtras.h"
33 Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
34 Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
36 class RA : public MachineFunctionPass {
38 typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
42 const TargetMachine* tm_;
43 const MRegisterInfo* mri_;
44 MachineBasicBlock* currentMbb_;
45 MachineBasicBlock::iterator currentInstr_;
46 typedef LiveIntervals::Intervals Intervals;
48 IntervalPtrs active_, inactive_;
50 typedef std::vector<unsigned> Regs;
51 Regs tempUseOperands_;
52 Regs tempDefOperands_;
54 typedef std::vector<bool> RegMask;
57 unsigned regUse_[MRegisterInfo::FirstVirtualRegister];
59 typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
60 MachineBasicBlockPtrs mbbs_;
62 typedef std::map<unsigned, unsigned> Virt2PhysMap;
65 typedef std::map<unsigned, int> Virt2StackSlotMap;
66 Virt2StackSlotMap v2ssMap_;
71 virtual const char* getPassName() const {
72 return "Linear Scan Register Allocator";
75 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
76 AU.addRequired<LiveVariables>();
77 AU.addRequired<LiveIntervals>();
78 MachineFunctionPass::getAnalysisUsage(AU);
82 /// runOnMachineFunction - register allocate the whole function
83 bool runOnMachineFunction(MachineFunction&);
85 /// verifyIntervals - verify that we have no inconsistencies
86 /// in the register assignments we have in active and inactive
88 bool verifyIntervals();
90 /// processActiveIntervals - expire old intervals and move
91 /// non-overlapping ones to the incative list
92 void processActiveIntervals(Intervals::const_iterator cur);
94 /// processInactiveIntervals - expire old intervals and move
95 /// overlapping ones to the active list
96 void processInactiveIntervals(Intervals::const_iterator cur);
98 /// assignStackSlotAtInterval - choose and spill
99 /// interval. Currently we spill the interval with the last
100 /// end point in the active and inactive lists and the current
102 void assignStackSlotAtInterval(Intervals::const_iterator cur);
105 /// register handling helpers
108 /// reservePhysReg - reserves a physical register and spills
109 /// any value assigned to it if any
110 void reservePhysReg(unsigned reg);
112 /// clearReservedPhysReg - marks pysical register as free for
114 void clearReservedPhysReg(unsigned reg);
116 /// getFreePhysReg - return a free physical register for this
117 /// virtual register interval if we have one, otherwise return
119 unsigned getFreePhysReg(Intervals::const_iterator cur);
121 /// physRegAvailable - returns true if the specifed physical
122 /// register is available
123 bool physRegAvailable(unsigned physReg);
125 /// tempPhysRegAvailable - returns true if the specifed
126 /// temporary physical register is available
127 bool tempPhysRegAvailable(unsigned physReg);
129 /// getFreeTempPhysReg - return a free temprorary physical
130 /// register for this virtual register if we have one (should
132 unsigned getFreeTempPhysReg(unsigned virtReg);
134 /// assignVirt2PhysReg - assigns the free physical register to
135 /// the virtual register passed as arguments
136 void assignVirt2PhysReg(unsigned virtReg, unsigned physReg);
138 /// clearVirtReg - free the physical register associated with this
139 /// virtual register and disassociate virtual->physical and
140 /// physical->virtual mappings
141 void clearVirtReg(unsigned virtReg);
143 /// assignVirt2StackSlot - assigns this virtual register to a
145 void assignVirt2StackSlot(unsigned virtReg);
147 /// getStackSlot - returns the offset of the specified
148 /// register on the stack
149 int getStackSlot(unsigned virtReg);
151 /// spillVirtReg - spills the virtual register
152 void spillVirtReg(unsigned virtReg);
154 /// loadPhysReg - loads to the physical register the value of
155 /// the virtual register specifed. Virtual register must have
156 /// an assigned stack slot
157 void loadVirt2PhysReg(unsigned virtReg, unsigned physReg);
159 void markPhysRegFree(unsigned physReg);
160 void markPhysRegNotFree(unsigned physReg);
162 void printVirt2PhysMap() const {
163 std::cerr << "allocated registers:\n";
164 for (Virt2PhysMap::const_iterator
165 i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) {
166 std::cerr << '[' << i->first << ','
167 << mri_->getName(i->second) << "]\n";
171 void printIntervals(const char* const str,
172 RA::IntervalPtrs::const_iterator i,
173 RA::IntervalPtrs::const_iterator e) const {
174 if (str) std::cerr << str << " intervals:\n";
175 for (; i != e; ++i) {
176 std::cerr << "\t\t" << **i << " -> ";
177 if ((*i)->reg < MRegisterInfo::FirstVirtualRegister) {
178 std::cerr << mri_->getName((*i)->reg);
181 std::cerr << mri_->getName(v2pMap_.find((*i)->reg)->second);
186 void printFreeRegs(const char* const str,
187 const TargetRegisterClass* rc) const {
188 if (str) std::cerr << str << ':';
189 for (TargetRegisterClass::iterator i =
190 rc->allocation_order_begin(*mf_);
191 i != rc->allocation_order_end(*mf_); ++i) {
194 std::cerr << ' ' << mri_->getName(reg);
195 if (reserved_[reg]) std::cerr << "*";
203 bool RA::runOnMachineFunction(MachineFunction &fn) {
205 tm_ = &fn.getTarget();
206 mri_ = tm_->getRegisterInfo();
207 li_ = &getAnalysis<LiveIntervals>().getIntervals();
211 mbbs_ = getAnalysis<LiveIntervals>().getOrderedMachineBasicBlockPtrs();
214 memset(regUse_, 0, sizeof(regUse_));
218 for (MachineBasicBlockPtrs::iterator
219 mbbi = mbbs_.begin(), mbbe = mbbs_.end();
220 mbbi != mbbe; ++mbbi) {
221 MachineBasicBlock* mbb = *mbbi;
222 std::cerr << mbb->getBasicBlock()->getName() << '\n';
223 for (MachineBasicBlock::iterator
224 ii = mbb->begin(), ie = mbb->end();
226 MachineInstr* instr = *ii;
228 std::cerr << i++ << "\t";
229 instr->print(std::cerr, *tm_);
234 // FIXME: this will work only for the X86 backend. I need to
235 // device an algorthm to select the minimal (considering register
236 // aliasing) number of temp registers to reserve so that we have 2
237 // registers for each register class available.
239 // reserve R32: EDI, EBX,
243 reserved_.assign(MRegisterInfo::FirstVirtualRegister, false);
244 reserved_[19] = true; /* EDI */
245 reserved_[17] = true; /* EBX */
246 reserved_[12] = true; /* DI */
247 reserved_[ 7] = true; /* BX */
248 reserved_[ 4] = true; /* BH */
249 reserved_[ 5] = true; /* BL */
250 reserved_[28] = true; /* FP5 */
251 reserved_[29] = true; /* FP6 */
253 // liner scan algorithm
254 for (Intervals::const_iterator
255 i = li_->begin(), e = li_->end(); i != e; ++i) {
256 DEBUG(std::cerr << "processing current interval: " << *i << '\n');
258 DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
259 DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
260 for (MRegisterInfo::regclass_iterator c = mri_->regclass_begin();
261 c != mri_->regclass_end(); ++c) {
262 const TargetRegisterClass* rc = *c;
263 DEBUG(printFreeRegs("\tfree registers", rc));
266 processActiveIntervals(i);
267 processInactiveIntervals(i);
269 DEBUG(std::cerr << "\tallocating current interval:\n");
270 // if this register is preallocated reserve it
271 if (i->reg < MRegisterInfo::FirstVirtualRegister) {
272 reservePhysReg(i->reg);
273 active_.push_back(&*i);
275 // otherwise we are allocating a virtual register. try to find
276 // a free physical register or spill an interval in order to
277 // assign it one (we could spill the current though).
279 unsigned physReg = getFreePhysReg(i);
281 assignStackSlotAtInterval(i);
284 assignVirt2PhysReg(i->reg, physReg);
285 active_.push_back(&*i);
289 // expire any remaining active intervals
290 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
291 unsigned reg = (*i)->reg;
292 DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
293 if (reg < MRegisterInfo::FirstVirtualRegister) {
294 markPhysRegFree(reg);
297 markPhysRegFree(v2pMap_[reg]);
300 // expire any remaining inactive intervals
301 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();
303 unsigned reg = (*i)->reg;
304 DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
305 if (reg < MRegisterInfo::FirstVirtualRegister) {
306 markPhysRegFree(reg);
309 markPhysRegFree(v2pMap_[reg]);
313 DEBUG(std::cerr << "finished register allocation\n");
314 DEBUG(printVirt2PhysMap());
316 DEBUG(std::cerr << "Rewrite machine code:\n");
317 for (MachineBasicBlockPtrs::iterator
318 mbbi = mbbs_.begin(), mbbe = mbbs_.end(); mbbi != mbbe; ++mbbi) {
322 for (currentInstr_ = currentMbb_->begin();
323 currentInstr_ != currentMbb_->end(); ++currentInstr_) {
325 DEBUG(std::cerr << "\tinstruction: ";
326 (*currentInstr_)->print(std::cerr, *tm_););
328 // use our current mapping and actually replace and
329 // virtual register with its allocated physical registers
330 DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
331 "physical registers:\n");
332 for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
334 MachineOperand& op = (*currentInstr_)->getOperand(i);
335 if (op.isVirtualRegister()) {
336 unsigned virtReg = op.getAllocatedRegNum();
337 unsigned physReg = v2pMap_[virtReg];
339 DEBUG(std::cerr << "\t\t\t%reg" << virtReg
340 << " -> " << mri_->getName(physReg) << '\n');
341 (*currentInstr_)->SetMachineOperandReg(i, physReg);
346 DEBUG(std::cerr << "\t\tloading temporarily used operands to "
348 for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
350 MachineOperand& op = (*currentInstr_)->getOperand(i);
351 if (op.isVirtualRegister() && op.isUse() && !op.isDef()) {
352 unsigned virtReg = op.getAllocatedRegNum();
353 unsigned physReg = v2pMap_[virtReg];
355 physReg = getFreeTempPhysReg(virtReg);
356 loadVirt2PhysReg(virtReg, physReg);
357 tempUseOperands_.push_back(virtReg);
359 (*currentInstr_)->SetMachineOperandReg(i, physReg);
363 DEBUG(std::cerr << "\t\tclearing temporarily used operands:\n");
364 for (unsigned i = 0, e = tempUseOperands_.size(); i != e; ++i) {
365 clearVirtReg(tempUseOperands_[i]);
367 tempUseOperands_.clear();
369 DEBUG(std::cerr << "\t\tassigning temporarily defined operands to "
371 for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
373 MachineOperand& op = (*currentInstr_)->getOperand(i);
374 if (op.isVirtualRegister() && op.isDef()) {
375 unsigned virtReg = op.getAllocatedRegNum();
376 unsigned physReg = v2pMap_[virtReg];
378 physReg = getFreeTempPhysReg(virtReg);
380 if (op.isUse()) { // def and use
381 loadVirt2PhysReg(virtReg, physReg);
384 assignVirt2PhysReg(virtReg, physReg);
386 tempDefOperands_.push_back(virtReg);
387 (*currentInstr_)->SetMachineOperandReg(i, physReg);
391 DEBUG(std::cerr << "\t\tspilling temporarily defined operands "
392 "of this instruction:\n");
393 ++currentInstr_; // we want to insert after this instruction
394 for (unsigned i = 0, e = tempDefOperands_.size(); i != e; ++i) {
395 spillVirtReg(tempDefOperands_[i]);
397 --currentInstr_; // restore currentInstr_ iterator
398 tempDefOperands_.clear();
405 void RA::processActiveIntervals(Intervals::const_iterator cur)
407 DEBUG(std::cerr << "\tprocessing active intervals:\n");
408 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
409 unsigned reg = (*i)->reg;
410 // remove expired intervals. we expire earlier because this if
411 // an interval expires this is going to be the last use. in
412 // this case we can reuse the register for a def in the same
414 if ((*i)->expiredAt(cur->start() + 1)) {
415 DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
416 if (reg < MRegisterInfo::FirstVirtualRegister) {
417 markPhysRegFree(reg);
420 markPhysRegFree(v2pMap_[reg]);
422 // remove from active
423 i = active_.erase(i);
425 // move inactive intervals to inactive list
426 else if (!(*i)->liveAt(cur->start())) {
427 DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
429 inactive_.push_back(*i);
430 // remove from active
431 i = active_.erase(i);
439 void RA::processInactiveIntervals(Intervals::const_iterator cur)
441 DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
442 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
443 unsigned reg = (*i)->reg;
445 // remove expired intervals. we expire earlier because this if
446 // an interval expires this is going to be the last use. in
447 // this case we can reuse the register for a def in the same
449 if ((*i)->expiredAt(cur->start() + 1)) {
450 DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
451 if (reg < MRegisterInfo::FirstVirtualRegister) {
452 markPhysRegFree(reg);
455 markPhysRegFree(v2pMap_[reg]);
457 // remove from inactive
458 i = inactive_.erase(i);
460 // move re-activated intervals in active list
461 else if ((*i)->liveAt(cur->start())) {
462 DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
464 active_.push_back(*i);
465 // remove from inactive
466 i = inactive_.erase(i);
475 template <typename T>
476 void updateWeight(T rw[], int reg, T w)
478 if (rw[reg] == std::numeric_limits<T>::max() ||
479 w == std::numeric_limits<T>::max())
480 rw[reg] = std::numeric_limits<T>::max();
486 void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
488 DEBUG(std::cerr << "\t\tassigning stack slot at interval "
490 assert((!active_.empty() || !inactive_.empty()) &&
491 "active and inactive sets cannot be both empty when choosing "
492 "a register to spill");
494 // set all weights to zero
495 float regWeight[MRegisterInfo::FirstVirtualRegister];
496 for (unsigned i = 0; i < MRegisterInfo::FirstVirtualRegister; ++i)
499 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
500 // if (!cur->overlaps(**i))
503 unsigned reg = (*i)->reg;
504 if (reg >= MRegisterInfo::FirstVirtualRegister) {
507 updateWeight(regWeight, reg, (*i)->weight);
508 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
509 updateWeight(regWeight, *as, (*i)->weight);
512 for (IntervalPtrs::iterator i = inactive_.begin();
513 i != inactive_.end(); ++i) {
514 // if (!cur->overlaps(**i))
517 unsigned reg = (*i)->reg;
518 if (reg >= MRegisterInfo::FirstVirtualRegister) {
521 updateWeight(regWeight, reg, (*i)->weight);
522 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
523 updateWeight(regWeight, *as, (*i)->weight);
526 float minWeight = std::numeric_limits<float>::max();
528 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
529 for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
530 i != rc->allocation_order_end(*mf_); ++i) {
532 if (!reserved_[reg] && minWeight > regWeight[reg]) {
533 minWeight = regWeight[reg];
538 if (cur->weight < minWeight) {
539 DEBUG(std::cerr << "\t\t\t\tspilling : " << mri_->getName(minReg)
540 << ", weight: " << cur->weight << '\n');
541 assignVirt2StackSlot(cur->reg);
544 std::set<unsigned> toSpill;
545 toSpill.insert(minReg);
546 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
549 for (IntervalPtrs::iterator i = active_.begin();
550 i != active_.end(); ) {
551 unsigned reg = (*i)->reg;
552 if (reg >= MRegisterInfo::FirstVirtualRegister &&
553 toSpill.find(v2pMap_[reg]) != toSpill.end()) {
554 DEBUG(std::cerr << "\t\t\t\tspilling : "
555 << mri_->getName(minReg) << ", weight: "
556 << (*i)->weight << '\n');
557 assignVirt2StackSlot(reg);
558 i = active_.erase(i);
564 for (IntervalPtrs::iterator i = inactive_.begin();
565 i != inactive_.end(); ) {
566 unsigned reg = (*i)->reg;
567 if (reg >= MRegisterInfo::FirstVirtualRegister &&
568 toSpill.find(v2pMap_[reg]) != toSpill.end()) {
569 DEBUG(std::cerr << "\t\t\t\tspilling : "
570 << mri_->getName(minReg) << ", weight: "
571 << (*i)->weight << '\n');
572 assignVirt2StackSlot(reg);
573 i = inactive_.erase(i);
580 unsigned physReg = getFreePhysReg(cur);
581 assert(physReg && "no free physical register after spill?");
582 assignVirt2PhysReg(cur->reg, physReg);
583 active_.push_back(&*cur);
587 void RA::reservePhysReg(unsigned physReg)
589 DEBUG(std::cerr << "\t\t\treserving physical register: "
590 << mri_->getName(physReg) << '\n');
593 clobbered.push_back(physReg);
594 for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
595 clobbered.push_back(*as);
598 // remove interval from active
599 for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
601 unsigned reg = (*i)->reg;
602 if (reg < MRegisterInfo::FirstVirtualRegister) {
607 if (find(clobbered.begin(), clobbered.end(), v2pMap_[reg]) !=
609 i = active_.erase(i);
610 assignVirt2StackSlot(reg);
617 for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
619 unsigned reg = (*i)->reg;
620 if (reg < MRegisterInfo::FirstVirtualRegister) {
625 if (find(clobbered.begin(), clobbered.end(), v2pMap_[reg]) !=
627 i = inactive_.erase(i);
628 assignVirt2StackSlot(reg);
635 markPhysRegNotFree(physReg);
638 void RA::clearReservedPhysReg(unsigned physReg)
640 DEBUG(std::cerr << "\t\t\tclearing reserved physical register: "
641 << mri_->getName(physReg) << '\n');
642 markPhysRegFree(physReg);
645 bool RA::physRegAvailable(unsigned physReg)
647 assert(!reserved_[physReg] &&
648 "cannot call this method with a reserved register");
650 return !regUse_[physReg];
653 unsigned RA::getFreePhysReg(Intervals::const_iterator cur)
655 DEBUG(std::cerr << "\t\tgetting free physical register: ");
657 // save the regUse counts because we are going to modify them
658 // specifically for this interval
659 unsigned regUseBackup[MRegisterInfo::FirstVirtualRegister];
660 memcpy(regUseBackup, regUse_, sizeof(regUseBackup));
662 // for every interval in inactive we don't overlap mark the
664 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();
666 unsigned reg = (*i)->reg;
667 if (reg >= MRegisterInfo::FirstVirtualRegister)
670 if (!cur->overlaps(**i)) {
671 markPhysRegFree(reg);
675 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
676 for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
677 i != rc->allocation_order_end(*mf_); ++i) {
679 if (!reserved_[reg] && !regUse_[reg]) {
680 DEBUG(std::cerr << mri_->getName(reg) << '\n');
681 memcpy(regUse_, regUseBackup, sizeof(regUseBackup));
686 DEBUG(std::cerr << "no free register\n");
687 memcpy(regUse_, regUseBackup, sizeof(regUseBackup));
691 bool RA::tempPhysRegAvailable(unsigned physReg)
693 assert(reserved_[physReg] &&
694 "cannot call this method with a not reserved temp register");
696 return !regUse_[physReg];
699 unsigned RA::getFreeTempPhysReg(unsigned virtReg)
701 DEBUG(std::cerr << "\t\tgetting free temporary physical register: ");
703 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
704 // go in reverse allocation order for the temp registers
705 for (TargetRegisterClass::iterator i = rc->allocation_order_end(*mf_) - 1;
706 i != rc->allocation_order_begin(*mf_) - 1; --i) {
708 if (reserved_[reg] && !regUse_[reg]) {
709 DEBUG(std::cerr << mri_->getName(reg) << '\n');
714 assert(0 && "no free temporary physical register?");
718 void RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg)
720 v2pMap_[virtReg] = physReg;
721 markPhysRegNotFree(physReg);
724 void RA::clearVirtReg(unsigned virtReg)
726 Virt2PhysMap::iterator it = v2pMap_.find(virtReg);
727 assert(it != v2pMap_.end() &&
728 "attempting to clear a not allocated virtual register");
729 unsigned physReg = it->second;
730 markPhysRegFree(physReg);
731 v2pMap_[virtReg] = 0; // this marks that this virtual register
732 // lives on the stack
733 DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg)
737 void RA::assignVirt2StackSlot(unsigned virtReg)
739 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
740 int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc);
742 bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second;
744 "attempt to assign stack slot to already assigned register?");
745 // if the virtual register was previously assigned clear the mapping
746 // and free the virtual register
747 if (v2pMap_.find(virtReg) != v2pMap_.end()) {
748 clearVirtReg(virtReg);
751 v2pMap_[virtReg] = 0; // this marks that this virtual register
752 // lives on the stack
756 int RA::getStackSlot(unsigned virtReg)
758 // use lower_bound so that we can do a possibly O(1) insert later
760 Virt2StackSlotMap::iterator it = v2ssMap_.find(virtReg);
761 assert(it != v2ssMap_.end() &&
762 "attempt to get stack slot on register that does not live on the stack");
766 void RA::spillVirtReg(unsigned virtReg)
768 DEBUG(std::cerr << "\t\t\tspilling register: " << virtReg);
769 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
770 int frameIndex = getStackSlot(virtReg);
771 DEBUG(std::cerr << " to stack slot #" << frameIndex << '\n');
773 instrAdded_ += mri_->storeRegToStackSlot(*currentMbb_, currentInstr_,
774 v2pMap_[virtReg], frameIndex, rc);
775 clearVirtReg(virtReg);
778 void RA::loadVirt2PhysReg(unsigned virtReg, unsigned physReg)
780 DEBUG(std::cerr << "\t\t\tloading register: " << virtReg);
781 const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
782 int frameIndex = getStackSlot(virtReg);
783 DEBUG(std::cerr << " from stack slot #" << frameIndex << '\n');
785 instrAdded_ += mri_->loadRegFromStackSlot(*currentMbb_, currentInstr_,
786 physReg, frameIndex, rc);
787 assignVirt2PhysReg(virtReg, physReg);
790 void RA::markPhysRegFree(unsigned physReg)
792 assert(regUse_[physReg] != 0);
794 for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
796 assert(regUse_[physReg] != 0);
801 void RA::markPhysRegNotFree(unsigned physReg)
804 for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
810 FunctionPass* llvm::createLinearScanRegisterAllocator() {