1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "regalloc"
15 #include "llvm/CodeGen/LiveVariables.h"
16 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
17 #include "PhysRegTracker.h"
18 #include "VirtRegMap.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/MRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/EquivalenceClasses.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Compiler.h"
39 STATISTIC(NumIters , "Number of iterations performed");
40 STATISTIC(NumBacktracks, "Number of times we had to backtrack");
42 static RegisterRegAlloc
43 linearscanRegAlloc("linearscan", " linear scan register allocator",
44 createLinearScanRegisterAllocator);
47 static unsigned numIterations = 0;
48 static unsigned numIntervals = 0;
50 struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
51 typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
52 typedef std::vector<IntervalPtr> IntervalPtrs;
54 /// RelatedRegClasses - This structure is built the first time a function is
55 /// compiled, and keeps track of which register classes have registers that
56 /// belong to multiple classes or have aliases that are in other classes.
57 EquivalenceClasses<const TargetRegisterClass*> RelatedRegClasses;
58 std::map<unsigned, const TargetRegisterClass*> OneClassForEachPhysReg;
61 const TargetMachine* tm_;
62 const MRegisterInfo* mri_;
66 /// handled_ - Intervals are added to the handled_ set in the order of their
67 /// start value. This is uses for backtracking.
68 std::vector<LiveInterval*> handled_;
70 /// fixed_ - Intervals that correspond to machine registers.
74 /// active_ - Intervals that are currently being processed, and which have a
75 /// live range active for the current point.
78 /// inactive_ - Intervals that are currently being processed, but which have
79 /// a hold at the current point.
80 IntervalPtrs inactive_;
82 typedef std::priority_queue<LiveInterval*,
83 std::vector<LiveInterval*>,
84 greater_ptr<LiveInterval> > IntervalHeap;
85 IntervalHeap unhandled_;
86 std::auto_ptr<PhysRegTracker> prt_;
87 std::auto_ptr<VirtRegMap> vrm_;
88 std::auto_ptr<Spiller> spiller_;
91 virtual const char* getPassName() const {
92 return "Linear Scan Register Allocator";
95 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
96 AU.addRequired<LiveIntervals>();
97 MachineFunctionPass::getAnalysisUsage(AU);
100 /// runOnMachineFunction - register allocate the whole function
101 bool runOnMachineFunction(MachineFunction&);
104 /// linearScan - the linear scan algorithm
107 /// initIntervalSets - initialize the interval sets.
109 void initIntervalSets();
111 /// processActiveIntervals - expire old intervals and move non-overlapping
112 /// ones to the inactive list.
113 void processActiveIntervals(unsigned CurPoint);
115 /// processInactiveIntervals - expire old intervals and move overlapping
116 /// ones to the active list.
117 void processInactiveIntervals(unsigned CurPoint);
119 /// assignRegOrStackSlotAtInterval - assign a register if one
120 /// is available, or spill.
121 void assignRegOrStackSlotAtInterval(LiveInterval* cur);
124 /// register handling helpers
127 /// getFreePhysReg - return a free physical register for this virtual
128 /// register interval if we have one, otherwise return 0.
129 unsigned getFreePhysReg(LiveInterval* cur);
131 /// assignVirt2StackSlot - assigns this virtual register to a
132 /// stack slot. returns the stack slot
133 int assignVirt2StackSlot(unsigned virtReg);
135 void ComputeRelatedRegClasses();
137 template <typename ItTy>
138 void printIntervals(const char* const str, ItTy i, ItTy e) const {
139 if (str) DOUT << str << " intervals:\n";
140 for (; i != e; ++i) {
141 DOUT << "\t" << *i->first << " -> ";
142 unsigned reg = i->first->reg;
143 if (MRegisterInfo::isVirtualRegister(reg)) {
144 reg = vrm_->getPhys(reg);
146 DOUT << mri_->getName(reg) << '\n';
152 void RA::ComputeRelatedRegClasses() {
153 const MRegisterInfo &MRI = *mri_;
155 // First pass, add all reg classes to the union, and determine at least one
156 // reg class that each register is in.
157 bool HasAliases = false;
158 for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
159 E = MRI.regclass_end(); RCI != E; ++RCI) {
160 RelatedRegClasses.insert(*RCI);
161 for (TargetRegisterClass::iterator I = (*RCI)->begin(), E = (*RCI)->end();
163 HasAliases = HasAliases || *MRI.getAliasSet(*I) != 0;
165 const TargetRegisterClass *&PRC = OneClassForEachPhysReg[*I];
167 // Already processed this register. Just make sure we know that
168 // multiple register classes share a register.
169 RelatedRegClasses.unionSets(PRC, *RCI);
176 // Second pass, now that we know conservatively what register classes each reg
177 // belongs to, add info about aliases. We don't need to do this for targets
178 // without register aliases.
180 for (std::map<unsigned, const TargetRegisterClass*>::iterator
181 I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end();
183 for (const unsigned *AS = MRI.getAliasSet(I->first); *AS; ++AS)
184 RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
187 bool RA::runOnMachineFunction(MachineFunction &fn) {
189 tm_ = &fn.getTarget();
190 mri_ = tm_->getRegisterInfo();
191 li_ = &getAnalysis<LiveIntervals>();
193 // If this is the first function compiled, compute the related reg classes.
194 if (RelatedRegClasses.empty())
195 ComputeRelatedRegClasses();
197 PhysRegsUsed = new bool[mri_->getNumRegs()];
198 std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
199 fn.setUsedPhysRegs(PhysRegsUsed);
201 if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
202 vrm_.reset(new VirtRegMap(*mf_));
203 if (!spiller_.get()) spiller_.reset(createSpiller());
209 // Rewrite spill code and update the PhysRegsUsed set.
210 spiller_->runOnMachineFunction(*mf_, *vrm_);
212 vrm_.reset(); // Free the VirtRegMap
215 while (!unhandled_.empty()) unhandled_.pop();
224 /// initIntervalSets - initialize the interval sets.
226 void RA::initIntervalSets()
228 assert(unhandled_.empty() && fixed_.empty() &&
229 active_.empty() && inactive_.empty() &&
230 "interval sets should be empty on initialization");
232 for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
233 if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
234 PhysRegsUsed[i->second.reg] = true;
235 fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
237 unhandled_.push(&i->second);
241 void RA::linearScan()
243 // linear scan algorithm
244 DOUT << "********** LINEAR SCAN **********\n";
245 DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
247 // DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
248 DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
249 DEBUG(printIntervals("active", active_.begin(), active_.end()));
250 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
252 while (!unhandled_.empty()) {
253 // pick the interval with the earliest start point
254 LiveInterval* cur = unhandled_.top();
257 DOUT << "\n*** CURRENT ***: " << *cur << '\n';
259 processActiveIntervals(cur->beginNumber());
260 processInactiveIntervals(cur->beginNumber());
262 assert(MRegisterInfo::isVirtualRegister(cur->reg) &&
263 "Can only allocate virtual registers!");
265 // Allocating a virtual register. try to find a free
266 // physical register or spill an interval (possibly this one) in order to
268 assignRegOrStackSlotAtInterval(cur);
270 DEBUG(printIntervals("active", active_.begin(), active_.end()));
271 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
273 numIntervals += li_->getNumIntervals();
274 NumIters += numIterations;
276 // expire any remaining active intervals
277 for (IntervalPtrs::reverse_iterator
278 i = active_.rbegin(); i != active_.rend(); ) {
279 unsigned reg = i->first->reg;
280 DOUT << "\tinterval " << *i->first << " expired\n";
281 assert(MRegisterInfo::isVirtualRegister(reg) &&
282 "Can only allocate virtual registers!");
283 reg = vrm_->getPhys(reg);
284 prt_->delRegUse(reg);
285 i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
288 // expire any remaining inactive intervals
289 for (IntervalPtrs::reverse_iterator
290 i = inactive_.rbegin(); i != inactive_.rend(); ) {
291 DOUT << "\tinterval " << *i->first << " expired\n";
292 i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
295 // A brute force way of adding live-ins to every BB.
296 MachineFunction::iterator MBB = mf_->begin();
297 ++MBB; // Skip entry MBB.
298 for (MachineFunction::iterator E = mf_->end(); MBB != E; ++MBB) {
299 unsigned StartIdx = li_->getMBBStartIdx(MBB->getNumber());
300 for (IntervalPtrs::iterator i = fixed_.begin(), e = fixed_.end();
302 if (i->first->liveAt(StartIdx))
303 MBB->addLiveIn(i->first->reg);
305 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
306 LiveInterval *HI = handled_[i];
307 unsigned Reg = HI->reg;
308 if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) {
309 assert(MRegisterInfo::isVirtualRegister(Reg));
310 Reg = vrm_->getPhys(Reg);
319 /// processActiveIntervals - expire old intervals and move non-overlapping ones
320 /// to the inactive list.
321 void RA::processActiveIntervals(unsigned CurPoint)
323 DOUT << "\tprocessing active intervals:\n";
325 for (unsigned i = 0, e = active_.size(); i != e; ++i) {
326 LiveInterval *Interval = active_[i].first;
327 LiveInterval::iterator IntervalPos = active_[i].second;
328 unsigned reg = Interval->reg;
330 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
332 if (IntervalPos == Interval->end()) { // Remove expired intervals.
333 DOUT << "\t\tinterval " << *Interval << " expired\n";
334 assert(MRegisterInfo::isVirtualRegister(reg) &&
335 "Can only allocate virtual registers!");
336 reg = vrm_->getPhys(reg);
337 prt_->delRegUse(reg);
339 // Pop off the end of the list.
340 active_[i] = active_.back();
344 } else if (IntervalPos->start > CurPoint) {
345 // Move inactive intervals to inactive list.
346 DOUT << "\t\tinterval " << *Interval << " inactive\n";
347 assert(MRegisterInfo::isVirtualRegister(reg) &&
348 "Can only allocate virtual registers!");
349 reg = vrm_->getPhys(reg);
350 prt_->delRegUse(reg);
352 inactive_.push_back(std::make_pair(Interval, IntervalPos));
354 // Pop off the end of the list.
355 active_[i] = active_.back();
359 // Otherwise, just update the iterator position.
360 active_[i].second = IntervalPos;
365 /// processInactiveIntervals - expire old intervals and move overlapping
366 /// ones to the active list.
367 void RA::processInactiveIntervals(unsigned CurPoint)
369 DOUT << "\tprocessing inactive intervals:\n";
371 for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
372 LiveInterval *Interval = inactive_[i].first;
373 LiveInterval::iterator IntervalPos = inactive_[i].second;
374 unsigned reg = Interval->reg;
376 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
378 if (IntervalPos == Interval->end()) { // remove expired intervals.
379 DOUT << "\t\tinterval " << *Interval << " expired\n";
381 // Pop off the end of the list.
382 inactive_[i] = inactive_.back();
383 inactive_.pop_back();
385 } else if (IntervalPos->start <= CurPoint) {
386 // move re-activated intervals in active list
387 DOUT << "\t\tinterval " << *Interval << " active\n";
388 assert(MRegisterInfo::isVirtualRegister(reg) &&
389 "Can only allocate virtual registers!");
390 reg = vrm_->getPhys(reg);
391 prt_->addRegUse(reg);
393 active_.push_back(std::make_pair(Interval, IntervalPos));
395 // Pop off the end of the list.
396 inactive_[i] = inactive_.back();
397 inactive_.pop_back();
400 // Otherwise, just update the iterator position.
401 inactive_[i].second = IntervalPos;
406 /// updateSpillWeights - updates the spill weights of the specifed physical
407 /// register and its weight.
408 static void updateSpillWeights(std::vector<float> &Weights,
409 unsigned reg, float weight,
410 const MRegisterInfo *MRI) {
411 Weights[reg] += weight;
412 for (const unsigned* as = MRI->getAliasSet(reg); *as; ++as)
413 Weights[*as] += weight;
416 static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
418 for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
419 if (I->first == LI) return I;
423 static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
424 for (unsigned i = 0, e = V.size(); i != e; ++i) {
425 RA::IntervalPtr &IP = V[i];
426 LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
428 if (I != IP.first->begin()) --I;
433 /// assignRegOrStackSlotAtInterval - assign a register if one is available, or
435 void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
437 DOUT << "\tallocating current interval: ";
439 PhysRegTracker backupPrt = *prt_;
441 std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
442 unsigned StartPosition = cur->beginNumber();
443 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
444 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
446 // for every interval in inactive we overlap with, mark the
447 // register as not free and update spill weights.
448 for (IntervalPtrs::const_iterator i = inactive_.begin(),
449 e = inactive_.end(); i != e; ++i) {
450 unsigned Reg = i->first->reg;
451 assert(MRegisterInfo::isVirtualRegister(Reg) &&
452 "Can only allocate virtual registers!");
453 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(Reg);
454 // If this is not in a related reg class to the register we're allocating,
456 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
457 cur->overlapsFrom(*i->first, i->second-1)) {
458 Reg = vrm_->getPhys(Reg);
459 prt_->addRegUse(Reg);
460 SpillWeightsToAdd.push_back(std::make_pair(Reg, i->first->weight));
464 // Speculatively check to see if we can get a register right now. If not,
465 // we know we won't be able to by adding more constraints. If so, we can
466 // check to see if it is valid. Doing an exhaustive search of the fixed_ list
467 // is very bad (it contains all callee clobbered registers for any functions
468 // with a call), so we want to avoid doing that if possible.
469 unsigned physReg = getFreePhysReg(cur);
471 // We got a register. However, if it's in the fixed_ list, we might
472 // conflict with it. Check to see if we conflict with it or any of its
474 std::set<unsigned> RegAliases;
475 for (const unsigned *AS = mri_->getAliasSet(physReg); *AS; ++AS)
476 RegAliases.insert(*AS);
478 bool ConflictsWithFixed = false;
479 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
480 IntervalPtr &IP = fixed_[i];
481 if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
482 // Okay, this reg is on the fixed list. Check to see if we actually
484 LiveInterval *I = IP.first;
485 if (I->endNumber() > StartPosition) {
486 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
488 if (II != I->begin() && II->start > StartPosition)
490 if (cur->overlapsFrom(*I, II)) {
491 ConflictsWithFixed = true;
498 // Okay, the register picked by our speculative getFreePhysReg call turned
499 // out to be in use. Actually add all of the conflicting fixed registers to
500 // prt so we can do an accurate query.
501 if (ConflictsWithFixed) {
502 // For every interval in fixed we overlap with, mark the register as not
503 // free and update spill weights.
504 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
505 IntervalPtr &IP = fixed_[i];
506 LiveInterval *I = IP.first;
508 const TargetRegisterClass *RegRC = OneClassForEachPhysReg[I->reg];
509 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
510 I->endNumber() > StartPosition) {
511 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
513 if (II != I->begin() && II->start > StartPosition)
515 if (cur->overlapsFrom(*I, II)) {
516 unsigned reg = I->reg;
517 prt_->addRegUse(reg);
518 SpillWeightsToAdd.push_back(std::make_pair(reg, I->weight));
523 // Using the newly updated prt_ object, which includes conflicts in the
524 // future, see if there are any registers available.
525 physReg = getFreePhysReg(cur);
529 // Restore the physical register tracker, removing information about the
533 // if we find a free register, we are done: assign this virtual to
534 // the free physical register and add this interval to the active
537 DOUT << mri_->getName(physReg) << '\n';
538 vrm_->assignVirt2Phys(cur->reg, physReg);
539 prt_->addRegUse(physReg);
540 active_.push_back(std::make_pair(cur, cur->begin()));
541 handled_.push_back(cur);
544 DOUT << "no free registers\n";
546 // Compile the spill weights into an array that is better for scanning.
547 std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
548 for (std::vector<std::pair<unsigned, float> >::iterator
549 I = SpillWeightsToAdd.begin(), E = SpillWeightsToAdd.end(); I != E; ++I)
550 updateSpillWeights(SpillWeights, I->first, I->second, mri_);
552 // for each interval in active, update spill weights.
553 for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
555 unsigned reg = i->first->reg;
556 assert(MRegisterInfo::isVirtualRegister(reg) &&
557 "Can only allocate virtual registers!");
558 reg = vrm_->getPhys(reg);
559 updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
562 DOUT << "\tassigning stack slot at interval "<< *cur << ":\n";
564 // Find a register to spill.
565 float minWeight = HUGE_VALF;
566 unsigned minReg = cur->preference; // Try the preferred register first.
568 if (!minReg || SpillWeights[minReg] == HUGE_VALF)
569 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
570 e = RC->allocation_order_end(*mf_); i != e; ++i) {
572 if (minWeight > SpillWeights[reg]) {
573 minWeight = SpillWeights[reg];
578 // If we didn't find a register that is spillable, try aliases?
580 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
581 e = RC->allocation_order_end(*mf_); i != e; ++i) {
583 // No need to worry about if the alias register size < regsize of RC.
584 // We are going to spill all registers that alias it anyway.
585 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as) {
586 if (minWeight > SpillWeights[*as]) {
587 minWeight = SpillWeights[*as];
593 // All registers must have inf weight. Just grab one!
595 minReg = *RC->allocation_order_begin(*mf_);
598 DOUT << "\t\tregister with min weight: "
599 << mri_->getName(minReg) << " (" << minWeight << ")\n";
601 // if the current has the minimum weight, we need to spill it and
602 // add any added intervals back to unhandled, and restart
604 if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
605 DOUT << "\t\t\tspilling(c): " << *cur << '\n';
606 // if the current interval is re-materializable, remember so and don't
607 // assign it a spill slot.
609 vrm_->setVirtIsReMaterialized(cur->reg, cur->remat);
610 int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg)
611 : vrm_->assignVirt2StackSlot(cur->reg);
612 std::vector<LiveInterval*> added =
613 li_->addIntervalsForSpills(*cur, *vrm_, slot);
615 return; // Early exit if all spills were folded.
617 // Merge added with unhandled. Note that we know that
618 // addIntervalsForSpills returns intervals sorted by their starting
620 for (unsigned i = 0, e = added.size(); i != e; ++i)
621 unhandled_.push(added[i]);
627 // push the current interval back to unhandled since we are going
628 // to re-run at least this iteration. Since we didn't modify it it
629 // should go back right in the front of the list
630 unhandled_.push(cur);
632 // otherwise we spill all intervals aliasing the register with
633 // minimum weight, rollback to the interval with the earliest
634 // start point and let the linear scan algorithm run again
635 std::vector<LiveInterval*> added;
636 assert(MRegisterInfo::isPhysicalRegister(minReg) &&
637 "did not choose a register to spill?");
638 BitVector toSpill(mri_->getNumRegs());
640 // We are going to spill minReg and all its aliases.
641 toSpill[minReg] = true;
642 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
645 // the earliest start of a spilled interval indicates up to where
646 // in handled we need to roll back
647 unsigned earliestStart = cur->beginNumber();
649 // set of spilled vregs (used later to rollback properly)
650 std::set<unsigned> spilled;
652 // spill live intervals of virtual regs mapped to the physical register we
653 // want to clear (and its aliases). We only spill those that overlap with the
654 // current interval as the rest do not affect its allocation. we also keep
655 // track of the earliest start of all spilled live intervals since this will
656 // mark our rollback point.
657 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
658 unsigned reg = i->first->reg;
659 if (//MRegisterInfo::isVirtualRegister(reg) &&
660 toSpill[vrm_->getPhys(reg)] &&
661 cur->overlapsFrom(*i->first, i->second)) {
662 DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
663 earliestStart = std::min(earliestStart, i->first->beginNumber());
665 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
666 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
667 : vrm_->assignVirt2StackSlot(reg);
668 std::vector<LiveInterval*> newIs =
669 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
670 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
674 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ++i){
675 unsigned reg = i->first->reg;
676 if (//MRegisterInfo::isVirtualRegister(reg) &&
677 toSpill[vrm_->getPhys(reg)] &&
678 cur->overlapsFrom(*i->first, i->second-1)) {
679 DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
680 earliestStart = std::min(earliestStart, i->first->beginNumber());
682 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
683 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
684 : vrm_->assignVirt2StackSlot(reg);
685 std::vector<LiveInterval*> newIs =
686 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
687 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
692 DOUT << "\t\trolling back to: " << earliestStart << '\n';
694 // Scan handled in reverse order up to the earliest start of a
695 // spilled live interval and undo each one, restoring the state of
697 while (!handled_.empty()) {
698 LiveInterval* i = handled_.back();
699 // If this interval starts before t we are done.
700 if (i->beginNumber() < earliestStart)
702 DOUT << "\t\t\tundo changes for: " << *i << '\n';
705 // When undoing a live interval allocation we must know if it is active or
706 // inactive to properly update the PhysRegTracker and the VirtRegMap.
707 IntervalPtrs::iterator it;
708 if ((it = FindIntervalInVector(active_, i)) != active_.end()) {
710 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
711 if (!spilled.count(i->reg))
713 prt_->delRegUse(vrm_->getPhys(i->reg));
714 vrm_->clearVirt(i->reg);
715 } else if ((it = FindIntervalInVector(inactive_, i)) != inactive_.end()) {
717 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
718 if (!spilled.count(i->reg))
720 vrm_->clearVirt(i->reg);
722 assert(MRegisterInfo::isVirtualRegister(i->reg) &&
723 "Can only allocate virtual registers!");
724 vrm_->clearVirt(i->reg);
729 // Rewind the iterators in the active, inactive, and fixed lists back to the
730 // point we reverted to.
731 RevertVectorIteratorsTo(active_, earliestStart);
732 RevertVectorIteratorsTo(inactive_, earliestStart);
733 RevertVectorIteratorsTo(fixed_, earliestStart);
735 // scan the rest and undo each interval that expired after t and
736 // insert it in active (the next iteration of the algorithm will
737 // put it in inactive if required)
738 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
739 LiveInterval *HI = handled_[i];
740 if (!HI->expiredAt(earliestStart) &&
741 HI->expiredAt(cur->beginNumber())) {
742 DOUT << "\t\t\tundo changes for: " << *HI << '\n';
743 active_.push_back(std::make_pair(HI, HI->begin()));
744 assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
745 prt_->addRegUse(vrm_->getPhys(HI->reg));
749 // merge added with unhandled
750 for (unsigned i = 0, e = added.size(); i != e; ++i)
751 unhandled_.push(added[i]);
754 /// getFreePhysReg - return a free physical register for this virtual register
755 /// interval if we have one, otherwise return 0.
756 unsigned RA::getFreePhysReg(LiveInterval *cur) {
757 std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
758 unsigned MaxInactiveCount = 0;
760 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
761 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
763 for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
765 unsigned reg = i->first->reg;
766 assert(MRegisterInfo::isVirtualRegister(reg) &&
767 "Can only allocate virtual registers!");
769 // If this is not in a related reg class to the register we're allocating,
771 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(reg);
772 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) {
773 reg = vrm_->getPhys(reg);
774 ++inactiveCounts[reg];
775 MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]);
779 unsigned FreeReg = 0;
780 unsigned FreeRegInactiveCount = 0;
782 // If copy coalescer has assigned a "preferred" register, check if it's
785 if (prt_->isRegAvail(cur->preference)) {
786 DOUT << "\t\tassigned the preferred register: "
787 << mri_->getName(cur->preference) << "\n";
788 return cur->preference;
790 DOUT << "\t\tunable to assign the preferred register: "
791 << mri_->getName(cur->preference) << "\n";
793 // Scan for the first available register.
794 TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
795 TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
797 if (prt_->isRegAvail(*I)) {
799 FreeRegInactiveCount = inactiveCounts[FreeReg];
803 // If there are no free regs, or if this reg has the max inactive count,
804 // return this register.
805 if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg;
807 // Continue scanning the registers, looking for the one with the highest
808 // inactive count. Alkis found that this reduced register pressure very
809 // slightly on X86 (in rev 1.94 of this file), though this should probably be
811 for (; I != E; ++I) {
813 if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) {
815 FreeRegInactiveCount = inactiveCounts[Reg];
816 if (FreeRegInactiveCount == MaxInactiveCount)
817 break; // We found the one with the max inactive count.
824 FunctionPass* llvm::createLinearScanRegisterAllocator() {