1 //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This register allocator allocates registers to a basic block at a time,
11 // attempting to keep values in registers and reusing registers as appropriate.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
16 #include "llvm/BasicBlock.h"
17 #include "llvm/CodeGen/LiveVariables.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/ADT/IndexedMap.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
37 STATISTIC(NumStores, "Number of stores added");
38 STATISTIC(NumLoads , "Number of loads added");
40 static RegisterRegAlloc
41 localRegAlloc("local", " local register allocator",
42 createLocalRegisterAllocator);
45 class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
48 RALocal() : MachineFunctionPass((intptr_t)&ID) {}
50 const TargetMachine *TM;
52 const TargetRegisterInfo *TRI;
53 const TargetInstrInfo *TII;
55 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
56 // values are spilled.
57 std::map<unsigned, int> StackSlotForVirtReg;
59 // Virt2PhysRegMap - This map contains entries for each virtual register
60 // that is currently available in a physical register.
61 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
63 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
64 return Virt2PhysRegMap[VirtReg];
67 // PhysRegsUsed - This array is effectively a map, containing entries for
68 // each physical register that currently has a value (ie, it is in
69 // Virt2PhysRegMap). The value mapped to is the virtual register
70 // corresponding to the physical register (the inverse of the
71 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
72 // because it is used by a future instruction, and to -2 if it is not
73 // allocatable. If the entry for a physical register is -1, then the
74 // physical register is "not in the map".
76 std::vector<int> PhysRegsUsed;
78 // PhysRegsUseOrder - This contains a list of the physical registers that
79 // currently have a virtual register value in them. This list provides an
80 // ordering of registers, imposing a reallocation order. This list is only
81 // used if all registers are allocated and we have to spill one, in which
82 // case we spill the least recently used register. Entries at the front of
83 // the list are the least recently used registers, entries at the back are
84 // the most recently used.
86 std::vector<unsigned> PhysRegsUseOrder;
88 // Virt2LastUseMap - This maps each virtual register to its last use
89 // (MachineInstr*, operand index pair).
90 IndexedMap<std::pair<MachineInstr*, unsigned>, VirtReg2IndexFunctor>
93 std::pair<MachineInstr*,unsigned>& getVirtRegLastUse(unsigned Reg) {
94 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
95 return Virt2LastUseMap[Reg];
98 // VirtRegModified - This bitset contains information about which virtual
99 // registers need to be spilled back to memory when their registers are
100 // scavenged. If a virtual register has simply been rematerialized, there
101 // is no reason to spill it to memory when we need the register back.
103 BitVector VirtRegModified;
105 void markVirtRegModified(unsigned Reg, bool Val = true) {
106 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
107 Reg -= TargetRegisterInfo::FirstVirtualRegister;
109 VirtRegModified.set(Reg);
111 VirtRegModified.reset(Reg);
114 bool isVirtRegModified(unsigned Reg) const {
115 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
116 assert(Reg - TargetRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
117 && "Illegal virtual register!");
118 return VirtRegModified[Reg - TargetRegisterInfo::FirstVirtualRegister];
121 void AddToPhysRegsUseOrder(unsigned Reg) {
122 std::vector<unsigned>::iterator It =
123 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), Reg);
124 if (It != PhysRegsUseOrder.end())
125 PhysRegsUseOrder.erase(It);
126 PhysRegsUseOrder.push_back(Reg);
129 void MarkPhysRegRecentlyUsed(unsigned Reg) {
130 if (PhysRegsUseOrder.empty() ||
131 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
133 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
134 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
135 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
136 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
137 // Add it to the end of the list
138 PhysRegsUseOrder.push_back(RegMatch);
140 return; // Found an exact match, exit early
145 virtual const char *getPassName() const {
146 return "Local Register Allocator";
149 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
150 AU.addRequired<LiveVariables>();
151 AU.addRequiredID(PHIEliminationID);
152 AU.addRequiredID(TwoAddressInstructionPassID);
153 MachineFunctionPass::getAnalysisUsage(AU);
157 /// runOnMachineFunction - Register allocate the whole function
158 bool runOnMachineFunction(MachineFunction &Fn);
160 /// AllocateBasicBlock - Register allocate the specified basic block.
161 void AllocateBasicBlock(MachineBasicBlock &MBB);
164 /// areRegsEqual - This method returns true if the specified registers are
165 /// related to each other. To do this, it checks to see if they are equal
166 /// or if the first register is in the alias set of the second register.
168 bool areRegsEqual(unsigned R1, unsigned R2) const {
169 if (R1 == R2) return true;
170 for (const unsigned *AliasSet = TRI->getAliasSet(R2);
171 *AliasSet; ++AliasSet) {
172 if (*AliasSet == R1) return true;
177 /// getStackSpaceFor - This returns the frame index of the specified virtual
178 /// register on the stack, allocating space if necessary.
179 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
181 /// removePhysReg - This method marks the specified physical register as no
182 /// longer being in use.
184 void removePhysReg(unsigned PhysReg);
186 /// spillVirtReg - This method spills the value specified by PhysReg into
187 /// the virtual register slot specified by VirtReg. It then updates the RA
188 /// data structures to indicate the fact that PhysReg is now available.
190 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
191 unsigned VirtReg, unsigned PhysReg);
193 /// spillPhysReg - This method spills the specified physical register into
194 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
195 /// true, then the request is ignored if the physical register does not
196 /// contain a virtual register.
198 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
199 unsigned PhysReg, bool OnlyVirtRegs = false);
201 /// assignVirtToPhysReg - This method updates local state so that we know
202 /// that PhysReg is the proper container for VirtReg now. The physical
203 /// register must not be used for anything else when this is called.
205 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
207 /// isPhysRegAvailable - Return true if the specified physical register is
208 /// free and available for use. This also includes checking to see if
209 /// aliased registers are all free...
211 bool isPhysRegAvailable(unsigned PhysReg) const;
213 /// getFreeReg - Look to see if there is a free register available in the
214 /// specified register class. If not, return 0.
216 unsigned getFreeReg(const TargetRegisterClass *RC);
218 /// getReg - Find a physical register to hold the specified virtual
219 /// register. If all compatible physical registers are used, this method
220 /// spills the last used virtual register to the stack, and uses that
223 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
226 /// reloadVirtReg - This method transforms the specified specified virtual
227 /// register use to refer to a physical register. This method may do this
228 /// in one of several ways: if the register is available in a physical
229 /// register already, it uses that physical register. If the value is not
230 /// in a physical register, and if there are physical registers available,
231 /// it loads it into a register. If register pressure is high, and it is
232 /// possible, it tries to fold the load of the virtual register into the
233 /// instruction itself. It avoids doing this if register pressure is low to
234 /// improve the chance that subsequent instructions can use the reloaded
235 /// value. This method returns the modified instruction.
237 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
241 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
244 char RALocal::ID = 0;
247 /// getStackSpaceFor - This allocates space for the specified virtual register
248 /// to be held on the stack.
249 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
250 // Find the location Reg would belong...
251 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
253 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
254 return I->second; // Already has space allocated?
256 // Allocate a new stack object for this spill location...
257 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
260 // Assign the slot...
261 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
266 /// removePhysReg - This method marks the specified physical register as no
267 /// longer being in use.
269 void RALocal::removePhysReg(unsigned PhysReg) {
270 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
272 std::vector<unsigned>::iterator It =
273 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
274 if (It != PhysRegsUseOrder.end())
275 PhysRegsUseOrder.erase(It);
279 /// spillVirtReg - This method spills the value specified by PhysReg into the
280 /// virtual register slot specified by VirtReg. It then updates the RA data
281 /// structures to indicate the fact that PhysReg is now available.
283 void RALocal::spillVirtReg(MachineBasicBlock &MBB,
284 MachineBasicBlock::iterator I,
285 unsigned VirtReg, unsigned PhysReg) {
286 assert(VirtReg && "Spilling a physical register is illegal!"
287 " Must not have appropriate kill for the register or use exists beyond"
288 " the intended one.");
289 DOUT << " Spilling register " << TRI->getName(PhysReg)
290 << " containing %reg" << VirtReg;
292 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
294 if (!isVirtRegModified(VirtReg)) {
295 DOUT << " which has not been modified, so no store necessary!";
296 std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
298 LastUse.first->getOperand(LastUse.second).setIsKill();
300 // Otherwise, there is a virtual register corresponding to this physical
301 // register. We only need to spill it into its stack slot if it has been
303 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
304 int FrameIndex = getStackSpaceFor(VirtReg, RC);
305 DOUT << " to stack slot #" << FrameIndex;
306 // If the instruction reads the register that's spilled, (e.g. this can
307 // happen if it is a move to a physical register), then the spill
308 // instruction is not a kill.
309 bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
310 TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
311 ++NumStores; // Update statistics
314 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
317 removePhysReg(PhysReg);
321 /// spillPhysReg - This method spills the specified physical register into the
322 /// virtual register slot associated with it. If OnlyVirtRegs is set to true,
323 /// then the request is ignored if the physical register does not contain a
324 /// virtual register.
326 void RALocal::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
327 unsigned PhysReg, bool OnlyVirtRegs) {
328 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
329 assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
330 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
331 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
333 // If the selected register aliases any other registers, we must make
334 // sure that one of the aliases isn't alive.
335 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
336 *AliasSet; ++AliasSet)
337 if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
338 PhysRegsUsed[*AliasSet] != -2) // If allocatable.
339 if (PhysRegsUsed[*AliasSet])
340 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
345 /// assignVirtToPhysReg - This method updates local state so that we know
346 /// that PhysReg is the proper container for VirtReg now. The physical
347 /// register must not be used for anything else when this is called.
349 void RALocal::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
350 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
351 // Update information to note the fact that this register was just used, and
353 PhysRegsUsed[PhysReg] = VirtReg;
354 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
355 AddToPhysRegsUseOrder(PhysReg); // New use of PhysReg
359 /// isPhysRegAvailable - Return true if the specified physical register is free
360 /// and available for use. This also includes checking to see if aliased
361 /// registers are all free...
363 bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
364 if (PhysRegsUsed[PhysReg] != -1) return false;
366 // If the selected register aliases any other allocated registers, it is
368 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
369 *AliasSet; ++AliasSet)
370 if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
371 return false; // Can't use this reg then.
376 /// getFreeReg - Look to see if there is a free register available in the
377 /// specified register class. If not, return 0.
379 unsigned RALocal::getFreeReg(const TargetRegisterClass *RC) {
380 // Get iterators defining the range of registers that are valid to allocate in
381 // this class, which also specifies the preferred allocation order.
382 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
383 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
385 for (; RI != RE; ++RI)
386 if (isPhysRegAvailable(*RI)) { // Is reg unused?
387 assert(*RI != 0 && "Cannot use register!");
388 return *RI; // Found an unused register!
394 /// getReg - Find a physical register to hold the specified virtual
395 /// register. If all compatible physical registers are used, this method spills
396 /// the last used virtual register to the stack, and uses that register.
398 unsigned RALocal::getReg(MachineBasicBlock &MBB, MachineInstr *I,
400 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
402 // First check to see if we have a free register of the requested type...
403 unsigned PhysReg = getFreeReg(RC);
405 // If we didn't find an unused register, scavenge one now!
407 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
409 // Loop over all of the preallocated registers from the least recently used
410 // to the most recently used. When we find one that is capable of holding
411 // our register, use it.
412 for (unsigned i = 0; PhysReg == 0; ++i) {
413 assert(i != PhysRegsUseOrder.size() &&
414 "Couldn't find a register of the appropriate class!");
416 unsigned R = PhysRegsUseOrder[i];
418 // We can only use this register if it holds a virtual register (ie, it
419 // can be spilled). Do not use it if it is an explicitly allocated
420 // physical register!
421 assert(PhysRegsUsed[R] != -1 &&
422 "PhysReg in PhysRegsUseOrder, but is not allocated?");
423 if (PhysRegsUsed[R] && PhysRegsUsed[R] != -2) {
424 // If the current register is compatible, use it.
425 if (RC->contains(R)) {
429 // If one of the registers aliased to the current register is
430 // compatible, use it.
431 for (const unsigned *AliasIt = TRI->getAliasSet(R);
432 *AliasIt; ++AliasIt) {
433 if (RC->contains(*AliasIt) &&
434 // If this is pinned down for some reason, don't use it. For
435 // example, if CL is pinned, and we run across CH, don't use
436 // CH as justification for using scavenging ECX (which will
438 PhysRegsUsed[*AliasIt] != 0 &&
440 // Make sure the register is allocatable. Don't allocate SIL on
442 PhysRegsUsed[*AliasIt] != -2) {
443 PhysReg = *AliasIt; // Take an aliased register
451 assert(PhysReg && "Physical register not assigned!?!?");
453 // At this point PhysRegsUseOrder[i] is the least recently used register of
454 // compatible register class. Spill it to memory and reap its remains.
455 spillPhysReg(MBB, I, PhysReg);
458 // Now that we know which register we need to assign this to, do it now!
459 assignVirtToPhysReg(VirtReg, PhysReg);
464 /// reloadVirtReg - This method transforms the specified specified virtual
465 /// register use to refer to a physical register. This method may do this in
466 /// one of several ways: if the register is available in a physical register
467 /// already, it uses that physical register. If the value is not in a physical
468 /// register, and if there are physical registers available, it loads it into a
469 /// register. If register pressure is high, and it is possible, it tries to
470 /// fold the load of the virtual register into the instruction itself. It
471 /// avoids doing this if register pressure is low to improve the chance that
472 /// subsequent instructions can use the reloaded value. This method returns the
473 /// modified instruction.
475 MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
477 unsigned VirtReg = MI->getOperand(OpNum).getReg();
479 // If the virtual register is already available, just update the instruction
481 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
482 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
483 MI->getOperand(OpNum).setReg(PR); // Assign the input register
484 getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
488 // Otherwise, we need to fold it into the current instruction, or reload it.
489 // If we have registers available to hold the value, use them.
490 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
491 unsigned PhysReg = getFreeReg(RC);
492 int FrameIndex = getStackSpaceFor(VirtReg, RC);
494 if (PhysReg) { // Register is available, allocate it!
495 assignVirtToPhysReg(VirtReg, PhysReg);
496 } else { // No registers available.
497 // Force some poor hapless value out of the register file to
498 // make room for the new register, and reload it.
499 PhysReg = getReg(MBB, MI, VirtReg);
502 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
504 DOUT << " Reloading %reg" << VirtReg << " into "
505 << TRI->getName(PhysReg) << "\n";
507 // Add move instruction(s)
508 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
509 TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
510 ++NumLoads; // Update statistics
512 MF->getRegInfo().setPhysRegUsed(PhysReg);
513 MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
514 getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
518 /// isReadModWriteImplicitKill - True if this is an implicit kill for a
519 /// read/mod/write register, i.e. update partial register.
520 static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
521 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
522 MachineOperand& MO = MI->getOperand(i);
523 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
524 MO.isDef() && !MO.isDead())
530 /// isReadModWriteImplicitDef - True if this is an implicit def for a
531 /// read/mod/write register, i.e. update partial register.
532 static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
533 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
534 MachineOperand& MO = MI->getOperand(i);
535 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
536 !MO.isDef() && MO.isKill())
542 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
543 // loop over each instruction
544 MachineBasicBlock::iterator MII = MBB.begin();
545 const TargetInstrInfo &TII = *TM->getInstrInfo();
547 DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
548 if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
550 // If this is the first basic block in the machine function, add live-in
551 // registers as active.
552 if (&MBB == &*MF->begin()) {
553 for (MachineRegisterInfo::livein_iterator I=MF->getRegInfo().livein_begin(),
554 E = MF->getRegInfo().livein_end(); I != E; ++I) {
555 unsigned Reg = I->first;
556 MF->getRegInfo().setPhysRegUsed(Reg);
557 PhysRegsUsed[Reg] = 0; // It is free and reserved now
558 AddToPhysRegsUseOrder(Reg);
559 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
560 *AliasSet; ++AliasSet) {
561 if (PhysRegsUsed[*AliasSet] != -2) {
562 AddToPhysRegsUseOrder(*AliasSet);
563 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
564 MF->getRegInfo().setPhysRegUsed(*AliasSet);
570 // Otherwise, sequentially allocate each instruction in the MBB.
571 while (MII != MBB.end()) {
572 MachineInstr *MI = MII++;
573 const TargetInstrDesc &TID = MI->getDesc();
574 DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
575 DOUT << " Regs have values: ";
576 for (unsigned i = 0; i != TRI->getNumRegs(); ++i)
577 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
578 DOUT << "[" << TRI->getName(i)
579 << ",%reg" << PhysRegsUsed[i] << "] ";
582 // Loop over the implicit uses, making sure that they are at the head of the
583 // use order list, so they don't get reallocated.
584 if (TID.ImplicitUses) {
585 for (const unsigned *ImplicitUses = TID.ImplicitUses;
586 *ImplicitUses; ++ImplicitUses)
587 MarkPhysRegRecentlyUsed(*ImplicitUses);
590 SmallVector<unsigned, 8> Kills;
591 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
592 MachineOperand& MO = MI->getOperand(i);
593 if (MO.isRegister() && MO.isKill()) {
594 if (!MO.isImplicit())
595 Kills.push_back(MO.getReg());
596 else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
597 // These are extra physical register kills when a sub-register
598 // is defined (def of a sub-register is a read/mod/write of the
599 // larger registers). Ignore.
600 Kills.push_back(MO.getReg());
604 // Get the used operands into registers. This has the potential to spill
605 // incoming values if we are out of registers. Note that we completely
606 // ignore physical register uses here. We assume that if an explicit
607 // physical register is referenced by the instruction, that it is guaranteed
608 // to be live-in, or the input is badly hosed.
610 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
611 MachineOperand& MO = MI->getOperand(i);
612 // here we are looking for only used operands (never def&use)
613 if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
614 TargetRegisterInfo::isVirtualRegister(MO.getReg()))
615 MI = reloadVirtReg(MBB, MI, i);
618 // If this instruction is the last user of this register, kill the
619 // value, freeing the register being used, so it doesn't need to be
620 // spilled to memory.
622 for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
623 unsigned VirtReg = Kills[i];
624 unsigned PhysReg = VirtReg;
625 if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
626 // If the virtual register was never materialized into a register, it
627 // might not be in the map, but it won't hurt to zero it out anyway.
628 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
629 PhysReg = PhysRegSlot;
631 } else if (PhysRegsUsed[PhysReg] == -2) {
632 // Unallocatable register dead, ignore.
635 assert((!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1) &&
636 "Silently clearing a virtual register?");
640 DOUT << " Last use of " << TRI->getName(PhysReg)
641 << "[%reg" << VirtReg <<"], removing it from live set\n";
642 removePhysReg(PhysReg);
643 for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg);
644 *AliasSet; ++AliasSet) {
645 if (PhysRegsUsed[*AliasSet] != -2) {
646 DOUT << " Last use of "
647 << TRI->getName(*AliasSet)
648 << "[%reg" << VirtReg <<"], removing it from live set\n";
649 removePhysReg(*AliasSet);
655 // Loop over all of the operands of the instruction, spilling registers that
656 // are defined, and marking explicit destinations in the PhysRegsUsed map.
657 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
658 MachineOperand& MO = MI->getOperand(i);
659 if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
660 TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
661 unsigned Reg = MO.getReg();
662 if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
663 // These are extra physical register defs when a sub-register
664 // is defined (def of a sub-register is a read/mod/write of the
665 // larger registers). Ignore.
666 if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
668 MF->getRegInfo().setPhysRegUsed(Reg);
669 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
670 PhysRegsUsed[Reg] = 0; // It is free and reserved now
671 AddToPhysRegsUseOrder(Reg);
673 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
674 *AliasSet; ++AliasSet) {
675 if (PhysRegsUsed[*AliasSet] != -2) {
676 MF->getRegInfo().setPhysRegUsed(*AliasSet);
677 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
678 AddToPhysRegsUseOrder(*AliasSet);
684 // Loop over the implicit defs, spilling them as well.
685 if (TID.ImplicitDefs) {
686 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
687 *ImplicitDefs; ++ImplicitDefs) {
688 unsigned Reg = *ImplicitDefs;
689 if (PhysRegsUsed[Reg] != -2) {
690 spillPhysReg(MBB, MI, Reg, true);
691 AddToPhysRegsUseOrder(Reg);
692 PhysRegsUsed[Reg] = 0; // It is free and reserved now
694 MF->getRegInfo().setPhysRegUsed(Reg);
695 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
696 *AliasSet; ++AliasSet) {
697 if (PhysRegsUsed[*AliasSet] != -2) {
698 AddToPhysRegsUseOrder(*AliasSet);
699 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
700 MF->getRegInfo().setPhysRegUsed(*AliasSet);
706 SmallVector<unsigned, 8> DeadDefs;
707 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
708 MachineOperand& MO = MI->getOperand(i);
709 if (MO.isRegister() && MO.isDead())
710 DeadDefs.push_back(MO.getReg());
713 // Okay, we have allocated all of the source operands and spilled any values
714 // that would be destroyed by defs of this instruction. Loop over the
715 // explicit defs and assign them to a register, spilling incoming values if
716 // we need to scavenge a register.
718 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
719 MachineOperand& MO = MI->getOperand(i);
720 if (MO.isRegister() && MO.isDef() && MO.getReg() &&
721 TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
722 unsigned DestVirtReg = MO.getReg();
723 unsigned DestPhysReg;
725 // If DestVirtReg already has a value, use it.
726 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
727 DestPhysReg = getReg(MBB, MI, DestVirtReg);
728 MF->getRegInfo().setPhysRegUsed(DestPhysReg);
729 markVirtRegModified(DestVirtReg);
730 getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
731 DOUT << " Assigning " << TRI->getName(DestPhysReg)
732 << " to %reg" << DestVirtReg << "\n";
733 MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
737 // If this instruction defines any registers that are immediately dead,
740 for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
741 unsigned VirtReg = DeadDefs[i];
742 unsigned PhysReg = VirtReg;
743 if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
744 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
745 PhysReg = PhysRegSlot;
746 assert(PhysReg != 0);
748 } else if (PhysRegsUsed[PhysReg] == -2) {
749 // Unallocatable register dead, ignore.
754 DOUT << " Register " << TRI->getName(PhysReg)
755 << " [%reg" << VirtReg
756 << "] is never used, removing it frame live list\n";
757 removePhysReg(PhysReg);
758 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
759 *AliasSet; ++AliasSet) {
760 if (PhysRegsUsed[*AliasSet] != -2) {
761 DOUT << " Register " << TRI->getName(*AliasSet)
762 << " [%reg" << *AliasSet
763 << "] is never used, removing it frame live list\n";
764 removePhysReg(*AliasSet);
770 // Finally, if this is a noop copy instruction, zap it.
771 unsigned SrcReg, DstReg;
772 if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
776 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
778 // Spill all physical registers holding virtual registers now.
779 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
780 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) {
781 if (unsigned VirtReg = PhysRegsUsed[i])
782 spillVirtReg(MBB, MI, VirtReg, i);
788 // This checking code is very expensive.
790 for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
791 e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
792 if (unsigned PR = Virt2PhysRegMap[i]) {
793 cerr << "Register still mapped: " << i << " -> " << PR << "\n";
796 assert(AllOk && "Virtual registers still in phys regs?");
799 // Clear any physical register which appear live at the end of the basic
800 // block, but which do not hold any virtual registers. e.g., the stack
802 PhysRegsUseOrder.clear();
806 /// runOnMachineFunction - Register allocate the whole function
808 bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
809 DOUT << "Machine Function " << "\n";
811 TM = &Fn.getTarget();
812 TRI = TM->getRegisterInfo();
813 TII = TM->getInstrInfo();
815 PhysRegsUsed.assign(TRI->getNumRegs(), -1);
817 // At various places we want to efficiently check to see whether a register
818 // is allocatable. To handle this, we mark all unallocatable registers as
819 // being pinned down, permanently.
821 BitVector Allocable = TRI->getAllocatableSet(Fn);
822 for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
824 PhysRegsUsed[i] = -2; // Mark the reg unallocable.
827 // initialize the virtual->physical register map to have a 'null'
828 // mapping for all virtual registers
829 unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
830 Virt2PhysRegMap.grow(LastVirtReg);
831 Virt2LastUseMap.grow(LastVirtReg);
832 VirtRegModified.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
834 // Loop over all of the basic blocks, eliminating virtual register references
835 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
837 AllocateBasicBlock(*MBB);
839 StackSlotForVirtReg.clear();
840 PhysRegsUsed.clear();
841 VirtRegModified.clear();
842 Virt2PhysRegMap.clear();
843 Virt2LastUseMap.clear();
847 FunctionPass *llvm::createLocalRegisterAllocator() {
848 return new RALocal();