1 //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This register allocator allocates registers to a basic block at a time,
11 // attempting to keep values in registers and reusing registers as appropriate.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
16 #include "llvm/BasicBlock.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/LiveVariables.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/ADT/IndexedMap.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
35 STATISTIC(NumStores, "Number of stores added");
36 STATISTIC(NumLoads , "Number of loads added");
37 STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
40 static RegisterRegAlloc
41 localRegAlloc("local", " local register allocator",
42 createLocalRegisterAllocator);
45 class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
48 RALocal() : MachineFunctionPass((intptr_t)&ID) {}
50 const TargetMachine *TM;
52 const MRegisterInfo *MRI;
53 const TargetInstrInfo *TII;
56 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
57 // values are spilled.
58 std::map<unsigned, int> StackSlotForVirtReg;
60 // Virt2PhysRegMap - This map contains entries for each virtual register
61 // that is currently available in a physical register.
62 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
64 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
65 return Virt2PhysRegMap[VirtReg];
68 // PhysRegsUsed - This array is effectively a map, containing entries for
69 // each physical register that currently has a value (ie, it is in
70 // Virt2PhysRegMap). The value mapped to is the virtual register
71 // corresponding to the physical register (the inverse of the
72 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
73 // because it is used by a future instruction, and to -2 if it is not
74 // allocatable. If the entry for a physical register is -1, then the
75 // physical register is "not in the map".
77 std::vector<int> PhysRegsUsed;
79 // PhysRegsUseOrder - This contains a list of the physical registers that
80 // currently have a virtual register value in them. This list provides an
81 // ordering of registers, imposing a reallocation order. This list is only
82 // used if all registers are allocated and we have to spill one, in which
83 // case we spill the least recently used register. Entries at the front of
84 // the list are the least recently used registers, entries at the back are
85 // the most recently used.
87 std::vector<unsigned> PhysRegsUseOrder;
89 // Virt2LastUseMap - This maps each virtual register to its last use
90 // (MachineInstr*, operand index pair).
91 IndexedMap<std::pair<MachineInstr*, unsigned>, VirtReg2IndexFunctor>
94 std::pair<MachineInstr*,unsigned>& getVirtRegLastUse(unsigned Reg) {
95 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
96 return Virt2LastUseMap[Reg];
99 // VirtRegModified - This bitset contains information about which virtual
100 // registers need to be spilled back to memory when their registers are
101 // scavenged. If a virtual register has simply been rematerialized, there
102 // is no reason to spill it to memory when we need the register back.
104 BitVector VirtRegModified;
106 void markVirtRegModified(unsigned Reg, bool Val = true) {
107 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
108 Reg -= MRegisterInfo::FirstVirtualRegister;
110 VirtRegModified.set(Reg);
112 VirtRegModified.reset(Reg);
115 bool isVirtRegModified(unsigned Reg) const {
116 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
117 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
118 && "Illegal virtual register!");
119 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
122 void AddToPhysRegsUseOrder(unsigned Reg) {
123 std::vector<unsigned>::iterator It =
124 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), Reg);
125 if (It != PhysRegsUseOrder.end())
126 PhysRegsUseOrder.erase(It);
127 PhysRegsUseOrder.push_back(Reg);
130 void MarkPhysRegRecentlyUsed(unsigned Reg) {
131 if (PhysRegsUseOrder.empty() ||
132 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
134 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
135 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
136 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
137 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
138 // Add it to the end of the list
139 PhysRegsUseOrder.push_back(RegMatch);
141 return; // Found an exact match, exit early
146 virtual const char *getPassName() const {
147 return "Local Register Allocator";
150 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
151 AU.addRequired<LiveVariables>();
152 AU.addRequiredID(PHIEliminationID);
153 AU.addRequiredID(TwoAddressInstructionPassID);
154 MachineFunctionPass::getAnalysisUsage(AU);
158 /// runOnMachineFunction - Register allocate the whole function
159 bool runOnMachineFunction(MachineFunction &Fn);
161 /// AllocateBasicBlock - Register allocate the specified basic block.
162 void AllocateBasicBlock(MachineBasicBlock &MBB);
165 /// areRegsEqual - This method returns true if the specified registers are
166 /// related to each other. To do this, it checks to see if they are equal
167 /// or if the first register is in the alias set of the second register.
169 bool areRegsEqual(unsigned R1, unsigned R2) const {
170 if (R1 == R2) return true;
171 for (const unsigned *AliasSet = MRI->getAliasSet(R2);
172 *AliasSet; ++AliasSet) {
173 if (*AliasSet == R1) return true;
178 /// getStackSpaceFor - This returns the frame index of the specified virtual
179 /// register on the stack, allocating space if necessary.
180 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
182 /// removePhysReg - This method marks the specified physical register as no
183 /// longer being in use.
185 void removePhysReg(unsigned PhysReg);
187 /// spillVirtReg - This method spills the value specified by PhysReg into
188 /// the virtual register slot specified by VirtReg. It then updates the RA
189 /// data structures to indicate the fact that PhysReg is now available.
191 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
192 unsigned VirtReg, unsigned PhysReg);
194 /// spillPhysReg - This method spills the specified physical register into
195 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
196 /// true, then the request is ignored if the physical register does not
197 /// contain a virtual register.
199 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
200 unsigned PhysReg, bool OnlyVirtRegs = false);
202 /// assignVirtToPhysReg - This method updates local state so that we know
203 /// that PhysReg is the proper container for VirtReg now. The physical
204 /// register must not be used for anything else when this is called.
206 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
208 /// isPhysRegAvailable - Return true if the specified physical register is
209 /// free and available for use. This also includes checking to see if
210 /// aliased registers are all free...
212 bool isPhysRegAvailable(unsigned PhysReg) const;
214 /// getFreeReg - Look to see if there is a free register available in the
215 /// specified register class. If not, return 0.
217 unsigned getFreeReg(const TargetRegisterClass *RC);
219 /// getReg - Find a physical register to hold the specified virtual
220 /// register. If all compatible physical registers are used, this method
221 /// spills the last used virtual register to the stack, and uses that
224 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
227 /// reloadVirtReg - This method transforms the specified specified virtual
228 /// register use to refer to a physical register. This method may do this
229 /// in one of several ways: if the register is available in a physical
230 /// register already, it uses that physical register. If the value is not
231 /// in a physical register, and if there are physical registers available,
232 /// it loads it into a register. If register pressure is high, and it is
233 /// possible, it tries to fold the load of the virtual register into the
234 /// instruction itself. It avoids doing this if register pressure is low to
235 /// improve the chance that subsequent instructions can use the reloaded
236 /// value. This method returns the modified instruction.
238 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
242 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
245 char RALocal::ID = 0;
248 /// getStackSpaceFor - This allocates space for the specified virtual register
249 /// to be held on the stack.
250 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
251 // Find the location Reg would belong...
252 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
254 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
255 return I->second; // Already has space allocated?
257 // Allocate a new stack object for this spill location...
258 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
261 // Assign the slot...
262 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
267 /// removePhysReg - This method marks the specified physical register as no
268 /// longer being in use.
270 void RALocal::removePhysReg(unsigned PhysReg) {
271 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
273 std::vector<unsigned>::iterator It =
274 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
275 if (It != PhysRegsUseOrder.end())
276 PhysRegsUseOrder.erase(It);
280 /// spillVirtReg - This method spills the value specified by PhysReg into the
281 /// virtual register slot specified by VirtReg. It then updates the RA data
282 /// structures to indicate the fact that PhysReg is now available.
284 void RALocal::spillVirtReg(MachineBasicBlock &MBB,
285 MachineBasicBlock::iterator I,
286 unsigned VirtReg, unsigned PhysReg) {
287 assert(VirtReg && "Spilling a physical register is illegal!"
288 " Must not have appropriate kill for the register or use exists beyond"
289 " the intended one.");
290 DOUT << " Spilling register " << MRI->getName(PhysReg)
291 << " containing %reg" << VirtReg;
293 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
295 if (!isVirtRegModified(VirtReg)) {
296 DOUT << " which has not been modified, so no store necessary!";
297 std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
299 LastUse.first->getOperand(LastUse.second).setIsKill();
302 // Otherwise, there is a virtual register corresponding to this physical
303 // register. We only need to spill it into its stack slot if it has been
305 if (isVirtRegModified(VirtReg)) {
306 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
307 int FrameIndex = getStackSpaceFor(VirtReg, RC);
308 DOUT << " to stack slot #" << FrameIndex;
309 TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
310 ++NumStores; // Update statistics
313 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
316 removePhysReg(PhysReg);
320 /// spillPhysReg - This method spills the specified physical register into the
321 /// virtual register slot associated with it. If OnlyVirtRegs is set to true,
322 /// then the request is ignored if the physical register does not contain a
323 /// virtual register.
325 void RALocal::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
326 unsigned PhysReg, bool OnlyVirtRegs) {
327 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
328 assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
329 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
330 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
332 // If the selected register aliases any other registers, we must make
333 // sure that one of the aliases isn't alive.
334 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
335 *AliasSet; ++AliasSet)
336 if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
337 PhysRegsUsed[*AliasSet] != -2) // If allocatable.
338 if (PhysRegsUsed[*AliasSet])
339 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
344 /// assignVirtToPhysReg - This method updates local state so that we know
345 /// that PhysReg is the proper container for VirtReg now. The physical
346 /// register must not be used for anything else when this is called.
348 void RALocal::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
349 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
350 // Update information to note the fact that this register was just used, and
352 PhysRegsUsed[PhysReg] = VirtReg;
353 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
354 AddToPhysRegsUseOrder(PhysReg); // New use of PhysReg
358 /// isPhysRegAvailable - Return true if the specified physical register is free
359 /// and available for use. This also includes checking to see if aliased
360 /// registers are all free...
362 bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
363 if (PhysRegsUsed[PhysReg] != -1) return false;
365 // If the selected register aliases any other allocated registers, it is
367 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
368 *AliasSet; ++AliasSet)
369 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
370 return false; // Can't use this reg then.
375 /// getFreeReg - Look to see if there is a free register available in the
376 /// specified register class. If not, return 0.
378 unsigned RALocal::getFreeReg(const TargetRegisterClass *RC) {
379 // Get iterators defining the range of registers that are valid to allocate in
380 // this class, which also specifies the preferred allocation order.
381 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
382 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
384 for (; RI != RE; ++RI)
385 if (isPhysRegAvailable(*RI)) { // Is reg unused?
386 assert(*RI != 0 && "Cannot use register!");
387 return *RI; // Found an unused register!
393 /// getReg - Find a physical register to hold the specified virtual
394 /// register. If all compatible physical registers are used, this method spills
395 /// the last used virtual register to the stack, and uses that register.
397 unsigned RALocal::getReg(MachineBasicBlock &MBB, MachineInstr *I,
399 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
401 // First check to see if we have a free register of the requested type...
402 unsigned PhysReg = getFreeReg(RC);
404 // If we didn't find an unused register, scavenge one now!
406 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
408 // Loop over all of the preallocated registers from the least recently used
409 // to the most recently used. When we find one that is capable of holding
410 // our register, use it.
411 for (unsigned i = 0; PhysReg == 0; ++i) {
412 assert(i != PhysRegsUseOrder.size() &&
413 "Couldn't find a register of the appropriate class!");
415 unsigned R = PhysRegsUseOrder[i];
417 // We can only use this register if it holds a virtual register (ie, it
418 // can be spilled). Do not use it if it is an explicitly allocated
419 // physical register!
420 assert(PhysRegsUsed[R] != -1 &&
421 "PhysReg in PhysRegsUseOrder, but is not allocated?");
422 if (PhysRegsUsed[R] && PhysRegsUsed[R] != -2) {
423 // If the current register is compatible, use it.
424 if (RC->contains(R)) {
428 // If one of the registers aliased to the current register is
429 // compatible, use it.
430 for (const unsigned *AliasIt = MRI->getAliasSet(R);
431 *AliasIt; ++AliasIt) {
432 if (RC->contains(*AliasIt) &&
433 // If this is pinned down for some reason, don't use it. For
434 // example, if CL is pinned, and we run across CH, don't use
435 // CH as justification for using scavenging ECX (which will
437 PhysRegsUsed[*AliasIt] != 0 &&
439 // Make sure the register is allocatable. Don't allocate SIL on
441 PhysRegsUsed[*AliasIt] != -2) {
442 PhysReg = *AliasIt; // Take an aliased register
450 assert(PhysReg && "Physical register not assigned!?!?");
452 // At this point PhysRegsUseOrder[i] is the least recently used register of
453 // compatible register class. Spill it to memory and reap its remains.
454 spillPhysReg(MBB, I, PhysReg);
457 // Now that we know which register we need to assign this to, do it now!
458 assignVirtToPhysReg(VirtReg, PhysReg);
463 /// reloadVirtReg - This method transforms the specified specified virtual
464 /// register use to refer to a physical register. This method may do this in
465 /// one of several ways: if the register is available in a physical register
466 /// already, it uses that physical register. If the value is not in a physical
467 /// register, and if there are physical registers available, it loads it into a
468 /// register. If register pressure is high, and it is possible, it tries to
469 /// fold the load of the virtual register into the instruction itself. It
470 /// avoids doing this if register pressure is low to improve the chance that
471 /// subsequent instructions can use the reloaded value. This method returns the
472 /// modified instruction.
474 MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
476 unsigned VirtReg = MI->getOperand(OpNum).getReg();
478 // If the virtual register is already available, just update the instruction
480 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
481 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
482 MI->getOperand(OpNum).setReg(PR); // Assign the input register
486 // Otherwise, we need to fold it into the current instruction, or reload it.
487 // If we have registers available to hold the value, use them.
488 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
489 unsigned PhysReg = getFreeReg(RC);
490 int FrameIndex = getStackSpaceFor(VirtReg, RC);
492 if (PhysReg) { // Register is available, allocate it!
493 assignVirtToPhysReg(VirtReg, PhysReg);
494 } else { // No registers available.
495 // If we can fold this spill into this instruction, do so now.
496 SmallVector<unsigned, 2> Ops;
497 Ops.push_back(OpNum);
498 if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) {
500 // Since we changed the address of MI, make sure to update live variables
501 // to know that the new instruction has the properties of the old one.
502 LV->instructionChanged(MI, FMI);
503 return MBB.insert(MBB.erase(MI), FMI);
506 // It looks like we can't fold this virtual register load into this
507 // instruction. Force some poor hapless value out of the register file to
508 // make room for the new register, and reload it.
509 PhysReg = getReg(MBB, MI, VirtReg);
512 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
514 DOUT << " Reloading %reg" << VirtReg << " into "
515 << MRI->getName(PhysReg) << "\n";
517 // Add move instruction(s)
518 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
519 TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
520 ++NumLoads; // Update statistics
522 MF->getRegInfo().setPhysRegUsed(PhysReg);
523 MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
524 getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
528 /// isReadModWriteImplicitKill - True if this is an implicit kill for a
529 /// read/mod/write register, i.e. update partial register.
530 static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
531 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
532 MachineOperand& MO = MI->getOperand(i);
533 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
534 MO.isDef() && !MO.isDead())
540 /// isReadModWriteImplicitDef - True if this is an implicit def for a
541 /// read/mod/write register, i.e. update partial register.
542 static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
543 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
544 MachineOperand& MO = MI->getOperand(i);
545 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
546 !MO.isDef() && MO.isKill())
552 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
553 // loop over each instruction
554 MachineBasicBlock::iterator MII = MBB.begin();
555 const TargetInstrInfo &TII = *TM->getInstrInfo();
557 DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
558 if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
560 // If this is the first basic block in the machine function, add live-in
561 // registers as active.
562 if (&MBB == &*MF->begin()) {
563 for (MachineRegisterInfo::livein_iterator I=MF->getRegInfo().livein_begin(),
564 E = MF->getRegInfo().livein_end(); I != E; ++I) {
565 unsigned Reg = I->first;
566 MF->getRegInfo().setPhysRegUsed(Reg);
567 PhysRegsUsed[Reg] = 0; // It is free and reserved now
568 AddToPhysRegsUseOrder(Reg);
569 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
570 *AliasSet; ++AliasSet) {
571 if (PhysRegsUsed[*AliasSet] != -2) {
572 AddToPhysRegsUseOrder(*AliasSet);
573 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
574 MF->getRegInfo().setPhysRegUsed(*AliasSet);
580 // Otherwise, sequentially allocate each instruction in the MBB.
581 while (MII != MBB.end()) {
582 MachineInstr *MI = MII++;
583 const TargetInstrDesc &TID = MI->getDesc();
584 DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
585 DOUT << " Regs have values: ";
586 for (unsigned i = 0; i != MRI->getNumRegs(); ++i)
587 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
588 DOUT << "[" << MRI->getName(i)
589 << ",%reg" << PhysRegsUsed[i] << "] ";
592 // Loop over the implicit uses, making sure that they are at the head of the
593 // use order list, so they don't get reallocated.
594 if (TID.ImplicitUses) {
595 for (const unsigned *ImplicitUses = TID.ImplicitUses;
596 *ImplicitUses; ++ImplicitUses)
597 MarkPhysRegRecentlyUsed(*ImplicitUses);
600 SmallVector<unsigned, 8> Kills;
601 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
602 MachineOperand& MO = MI->getOperand(i);
603 if (MO.isRegister() && MO.isKill()) {
604 if (!MO.isImplicit())
605 Kills.push_back(MO.getReg());
606 else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
607 // These are extra physical register kills when a sub-register
608 // is defined (def of a sub-register is a read/mod/write of the
609 // larger registers). Ignore.
610 Kills.push_back(MO.getReg());
614 // Get the used operands into registers. This has the potential to spill
615 // incoming values if we are out of registers. Note that we completely
616 // ignore physical register uses here. We assume that if an explicit
617 // physical register is referenced by the instruction, that it is guaranteed
618 // to be live-in, or the input is badly hosed.
620 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
621 MachineOperand& MO = MI->getOperand(i);
622 // here we are looking for only used operands (never def&use)
623 if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
624 MRegisterInfo::isVirtualRegister(MO.getReg()))
625 MI = reloadVirtReg(MBB, MI, i);
628 // If this instruction is the last user of this register, kill the
629 // value, freeing the register being used, so it doesn't need to be
630 // spilled to memory.
632 for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
633 unsigned VirtReg = Kills[i];
634 unsigned PhysReg = VirtReg;
635 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
636 // If the virtual register was never materialized into a register, it
637 // might not be in the map, but it won't hurt to zero it out anyway.
638 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
639 PhysReg = PhysRegSlot;
641 } else if (PhysRegsUsed[PhysReg] == -2) {
642 // Unallocatable register dead, ignore.
645 assert((!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1) &&
646 "Silently clearing a virtual register?");
650 DOUT << " Last use of " << MRI->getName(PhysReg)
651 << "[%reg" << VirtReg <<"], removing it from live set\n";
652 removePhysReg(PhysReg);
653 for (const unsigned *AliasSet = MRI->getSubRegisters(PhysReg);
654 *AliasSet; ++AliasSet) {
655 if (PhysRegsUsed[*AliasSet] != -2) {
656 DOUT << " Last use of "
657 << MRI->getName(*AliasSet)
658 << "[%reg" << VirtReg <<"], removing it from live set\n";
659 removePhysReg(*AliasSet);
665 // Loop over all of the operands of the instruction, spilling registers that
666 // are defined, and marking explicit destinations in the PhysRegsUsed map.
667 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
668 MachineOperand& MO = MI->getOperand(i);
669 if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
670 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
671 unsigned Reg = MO.getReg();
672 if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
673 // These are extra physical register defs when a sub-register
674 // is defined (def of a sub-register is a read/mod/write of the
675 // larger registers). Ignore.
676 if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
678 MF->getRegInfo().setPhysRegUsed(Reg);
679 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
680 PhysRegsUsed[Reg] = 0; // It is free and reserved now
681 AddToPhysRegsUseOrder(Reg);
683 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
684 *AliasSet; ++AliasSet) {
685 if (PhysRegsUsed[*AliasSet] != -2) {
686 MF->getRegInfo().setPhysRegUsed(*AliasSet);
687 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
688 AddToPhysRegsUseOrder(*AliasSet);
694 // Loop over the implicit defs, spilling them as well.
695 if (TID.ImplicitDefs) {
696 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
697 *ImplicitDefs; ++ImplicitDefs) {
698 unsigned Reg = *ImplicitDefs;
699 if (PhysRegsUsed[Reg] != -2) {
700 spillPhysReg(MBB, MI, Reg, true);
701 AddToPhysRegsUseOrder(Reg);
702 PhysRegsUsed[Reg] = 0; // It is free and reserved now
704 MF->getRegInfo().setPhysRegUsed(Reg);
705 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
706 *AliasSet; ++AliasSet) {
707 if (PhysRegsUsed[*AliasSet] != -2) {
708 AddToPhysRegsUseOrder(*AliasSet);
709 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
710 MF->getRegInfo().setPhysRegUsed(*AliasSet);
716 SmallVector<unsigned, 8> DeadDefs;
717 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
718 MachineOperand& MO = MI->getOperand(i);
719 if (MO.isRegister() && MO.isDead())
720 DeadDefs.push_back(MO.getReg());
723 // Okay, we have allocated all of the source operands and spilled any values
724 // that would be destroyed by defs of this instruction. Loop over the
725 // explicit defs and assign them to a register, spilling incoming values if
726 // we need to scavenge a register.
728 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
729 MachineOperand& MO = MI->getOperand(i);
730 if (MO.isRegister() && MO.isDef() && MO.getReg() &&
731 MRegisterInfo::isVirtualRegister(MO.getReg())) {
732 unsigned DestVirtReg = MO.getReg();
733 unsigned DestPhysReg;
735 // If DestVirtReg already has a value, use it.
736 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
737 DestPhysReg = getReg(MBB, MI, DestVirtReg);
738 MF->getRegInfo().setPhysRegUsed(DestPhysReg);
739 markVirtRegModified(DestVirtReg);
740 getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
741 MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
745 // If this instruction defines any registers that are immediately dead,
748 for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
749 unsigned VirtReg = DeadDefs[i];
750 unsigned PhysReg = VirtReg;
751 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
752 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
753 PhysReg = PhysRegSlot;
754 assert(PhysReg != 0);
756 } else if (PhysRegsUsed[PhysReg] == -2) {
757 // Unallocatable register dead, ignore.
762 DOUT << " Register " << MRI->getName(PhysReg)
763 << " [%reg" << VirtReg
764 << "] is never used, removing it frame live list\n";
765 removePhysReg(PhysReg);
766 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
767 *AliasSet; ++AliasSet) {
768 if (PhysRegsUsed[*AliasSet] != -2) {
769 DOUT << " Register " << MRI->getName(*AliasSet)
770 << " [%reg" << *AliasSet
771 << "] is never used, removing it frame live list\n";
772 removePhysReg(*AliasSet);
778 // Finally, if this is a noop copy instruction, zap it.
779 unsigned SrcReg, DstReg;
780 if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
781 LV->removeVirtualRegistersKilled(MI);
782 LV->removeVirtualRegistersDead(MI);
787 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
789 // Spill all physical registers holding virtual registers now.
790 for (unsigned i = 0, e = MRI->getNumRegs(); i != e; ++i)
791 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
792 if (unsigned VirtReg = PhysRegsUsed[i])
793 spillVirtReg(MBB, MI, VirtReg, i);
798 // This checking code is very expensive.
800 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
801 e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
802 if (unsigned PR = Virt2PhysRegMap[i]) {
803 cerr << "Register still mapped: " << i << " -> " << PR << "\n";
806 assert(AllOk && "Virtual registers still in phys regs?");
809 // Clear any physical register which appear live at the end of the basic
810 // block, but which do not hold any virtual registers. e.g., the stack
812 PhysRegsUseOrder.clear();
816 /// runOnMachineFunction - Register allocate the whole function
818 bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
819 DOUT << "Machine Function " << "\n";
821 TM = &Fn.getTarget();
822 MRI = TM->getRegisterInfo();
823 TII = TM->getInstrInfo();
824 LV = &getAnalysis<LiveVariables>();
826 PhysRegsUsed.assign(MRI->getNumRegs(), -1);
828 // At various places we want to efficiently check to see whether a register
829 // is allocatable. To handle this, we mark all unallocatable registers as
830 // being pinned down, permanently.
832 BitVector Allocable = MRI->getAllocatableSet(Fn);
833 for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
835 PhysRegsUsed[i] = -2; // Mark the reg unallocable.
838 // initialize the virtual->physical register map to have a 'null'
839 // mapping for all virtual registers
840 unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
841 Virt2PhysRegMap.grow(LastVirtReg);
842 Virt2LastUseMap.grow(LastVirtReg);
843 VirtRegModified.resize(LastVirtReg+1-MRegisterInfo::FirstVirtualRegister);
845 // Loop over all of the basic blocks, eliminating virtual register references
846 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
848 AllocateBasicBlock(*MBB);
850 StackSlotForVirtReg.clear();
851 PhysRegsUsed.clear();
852 VirtRegModified.clear();
853 Virt2PhysRegMap.clear();
854 Virt2LastUseMap.clear();
858 FunctionPass *llvm::createLocalRegisterAllocator() {
859 return new RALocal();