1 //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This register allocator allocates registers to a basic block at a time,
11 // attempting to keep values in registers and reusing registers as appropriate.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
16 #include "llvm/BasicBlock.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/RegAllocRegistry.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/ADT/IndexedMap.h"
29 #include "llvm/ADT/SmallVector.h"
30 #include "llvm/ADT/Statistic.h"
31 #include "llvm/ADT/STLExtras.h"
36 STATISTIC(NumStores, "Number of stores added");
37 STATISTIC(NumLoads , "Number of loads added");
39 static RegisterRegAlloc
40 localRegAlloc("local", " local register allocator",
41 createLocalRegisterAllocator);
44 class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
47 RALocal() : MachineFunctionPass((intptr_t)&ID) {}
49 const TargetMachine *TM;
51 const TargetRegisterInfo *TRI;
52 const TargetInstrInfo *TII;
54 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
55 // values are spilled.
56 std::map<unsigned, int> StackSlotForVirtReg;
58 // Virt2PhysRegMap - This map contains entries for each virtual register
59 // that is currently available in a physical register.
60 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
62 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
63 return Virt2PhysRegMap[VirtReg];
66 // PhysRegsUsed - This array is effectively a map, containing entries for
67 // each physical register that currently has a value (ie, it is in
68 // Virt2PhysRegMap). The value mapped to is the virtual register
69 // corresponding to the physical register (the inverse of the
70 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
71 // because it is used by a future instruction, and to -2 if it is not
72 // allocatable. If the entry for a physical register is -1, then the
73 // physical register is "not in the map".
75 std::vector<int> PhysRegsUsed;
77 // PhysRegsUseOrder - This contains a list of the physical registers that
78 // currently have a virtual register value in them. This list provides an
79 // ordering of registers, imposing a reallocation order. This list is only
80 // used if all registers are allocated and we have to spill one, in which
81 // case we spill the least recently used register. Entries at the front of
82 // the list are the least recently used registers, entries at the back are
83 // the most recently used.
85 std::vector<unsigned> PhysRegsUseOrder;
87 // Virt2LastUseMap - This maps each virtual register to its last use
88 // (MachineInstr*, operand index pair).
89 IndexedMap<std::pair<MachineInstr*, unsigned>, VirtReg2IndexFunctor>
92 std::pair<MachineInstr*,unsigned>& getVirtRegLastUse(unsigned Reg) {
93 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
94 return Virt2LastUseMap[Reg];
97 // VirtRegModified - This bitset contains information about which virtual
98 // registers need to be spilled back to memory when their registers are
99 // scavenged. If a virtual register has simply been rematerialized, there
100 // is no reason to spill it to memory when we need the register back.
102 BitVector VirtRegModified;
104 // UsedInMultipleBlocks - Tracks whether a particular register is used in
105 // more than one block.
106 BitVector UsedInMultipleBlocks;
108 void markVirtRegModified(unsigned Reg, bool Val = true) {
109 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
110 Reg -= TargetRegisterInfo::FirstVirtualRegister;
112 VirtRegModified.set(Reg);
114 VirtRegModified.reset(Reg);
117 bool isVirtRegModified(unsigned Reg) const {
118 assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
119 assert(Reg - TargetRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
120 && "Illegal virtual register!");
121 return VirtRegModified[Reg - TargetRegisterInfo::FirstVirtualRegister];
124 void AddToPhysRegsUseOrder(unsigned Reg) {
125 std::vector<unsigned>::iterator It =
126 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), Reg);
127 if (It != PhysRegsUseOrder.end())
128 PhysRegsUseOrder.erase(It);
129 PhysRegsUseOrder.push_back(Reg);
132 void MarkPhysRegRecentlyUsed(unsigned Reg) {
133 if (PhysRegsUseOrder.empty() ||
134 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
136 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
137 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
138 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
139 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
140 // Add it to the end of the list
141 PhysRegsUseOrder.push_back(RegMatch);
143 return; // Found an exact match, exit early
148 virtual const char *getPassName() const {
149 return "Local Register Allocator";
152 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
153 AU.addRequiredID(PHIEliminationID);
154 AU.addRequiredID(TwoAddressInstructionPassID);
155 MachineFunctionPass::getAnalysisUsage(AU);
159 /// runOnMachineFunction - Register allocate the whole function
160 bool runOnMachineFunction(MachineFunction &Fn);
162 /// AllocateBasicBlock - Register allocate the specified basic block.
163 void AllocateBasicBlock(MachineBasicBlock &MBB);
166 /// areRegsEqual - This method returns true if the specified registers are
167 /// related to each other. To do this, it checks to see if they are equal
168 /// or if the first register is in the alias set of the second register.
170 bool areRegsEqual(unsigned R1, unsigned R2) const {
171 if (R1 == R2) return true;
172 for (const unsigned *AliasSet = TRI->getAliasSet(R2);
173 *AliasSet; ++AliasSet) {
174 if (*AliasSet == R1) return true;
179 /// getStackSpaceFor - This returns the frame index of the specified virtual
180 /// register on the stack, allocating space if necessary.
181 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
183 /// removePhysReg - This method marks the specified physical register as no
184 /// longer being in use.
186 void removePhysReg(unsigned PhysReg);
188 /// spillVirtReg - This method spills the value specified by PhysReg into
189 /// the virtual register slot specified by VirtReg. It then updates the RA
190 /// data structures to indicate the fact that PhysReg is now available.
192 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
193 unsigned VirtReg, unsigned PhysReg);
195 /// spillPhysReg - This method spills the specified physical register into
196 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
197 /// true, then the request is ignored if the physical register does not
198 /// contain a virtual register.
200 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
201 unsigned PhysReg, bool OnlyVirtRegs = false);
203 /// assignVirtToPhysReg - This method updates local state so that we know
204 /// that PhysReg is the proper container for VirtReg now. The physical
205 /// register must not be used for anything else when this is called.
207 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
209 /// isPhysRegAvailable - Return true if the specified physical register is
210 /// free and available for use. This also includes checking to see if
211 /// aliased registers are all free...
213 bool isPhysRegAvailable(unsigned PhysReg) const;
215 /// getFreeReg - Look to see if there is a free register available in the
216 /// specified register class. If not, return 0.
218 unsigned getFreeReg(const TargetRegisterClass *RC);
220 /// getReg - Find a physical register to hold the specified virtual
221 /// register. If all compatible physical registers are used, this method
222 /// spills the last used virtual register to the stack, and uses that
225 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
228 /// reloadVirtReg - This method transforms the specified specified virtual
229 /// register use to refer to a physical register. This method may do this
230 /// in one of several ways: if the register is available in a physical
231 /// register already, it uses that physical register. If the value is not
232 /// in a physical register, and if there are physical registers available,
233 /// it loads it into a register. If register pressure is high, and it is
234 /// possible, it tries to fold the load of the virtual register into the
235 /// instruction itself. It avoids doing this if register pressure is low to
236 /// improve the chance that subsequent instructions can use the reloaded
237 /// value. This method returns the modified instruction.
239 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
242 /// ComputeLocalLiveness - Computes liveness of registers within a basic
243 /// block, setting the killed/dead flags as appropriate.
244 void ComputeLocalLiveness(MachineBasicBlock& MBB);
246 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
249 char RALocal::ID = 0;
252 /// getStackSpaceFor - This allocates space for the specified virtual register
253 /// to be held on the stack.
254 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
255 // Find the location Reg would belong...
256 std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
258 if (I != StackSlotForVirtReg.end())
259 return I->second; // Already has space allocated?
261 // Allocate a new stack object for this spill location...
262 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
265 // Assign the slot...
266 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
271 /// removePhysReg - This method marks the specified physical register as no
272 /// longer being in use.
274 void RALocal::removePhysReg(unsigned PhysReg) {
275 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
277 std::vector<unsigned>::iterator It =
278 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
279 if (It != PhysRegsUseOrder.end())
280 PhysRegsUseOrder.erase(It);
284 /// spillVirtReg - This method spills the value specified by PhysReg into the
285 /// virtual register slot specified by VirtReg. It then updates the RA data
286 /// structures to indicate the fact that PhysReg is now available.
288 void RALocal::spillVirtReg(MachineBasicBlock &MBB,
289 MachineBasicBlock::iterator I,
290 unsigned VirtReg, unsigned PhysReg) {
291 assert(VirtReg && "Spilling a physical register is illegal!"
292 " Must not have appropriate kill for the register or use exists beyond"
293 " the intended one.");
294 DOUT << " Spilling register " << TRI->getName(PhysReg)
295 << " containing %reg" << VirtReg;
297 if (!isVirtRegModified(VirtReg)) {
298 DOUT << " which has not been modified, so no store necessary!";
299 std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
301 LastUse.first->getOperand(LastUse.second).setIsKill();
303 // Otherwise, there is a virtual register corresponding to this physical
304 // register. We only need to spill it into its stack slot if it has been
306 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
307 int FrameIndex = getStackSpaceFor(VirtReg, RC);
308 DOUT << " to stack slot #" << FrameIndex;
309 // If the instruction reads the register that's spilled, (e.g. this can
310 // happen if it is a move to a physical register), then the spill
311 // instruction is not a kill.
312 bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
313 TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
314 ++NumStores; // Update statistics
317 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
320 removePhysReg(PhysReg);
324 /// spillPhysReg - This method spills the specified physical register into the
325 /// virtual register slot associated with it. If OnlyVirtRegs is set to true,
326 /// then the request is ignored if the physical register does not contain a
327 /// virtual register.
329 void RALocal::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
330 unsigned PhysReg, bool OnlyVirtRegs) {
331 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
332 assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
333 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
334 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
336 // If the selected register aliases any other registers, we must make
337 // sure that one of the aliases isn't alive.
338 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
339 *AliasSet; ++AliasSet)
340 if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
341 PhysRegsUsed[*AliasSet] != -2) // If allocatable.
342 if (PhysRegsUsed[*AliasSet])
343 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
348 /// assignVirtToPhysReg - This method updates local state so that we know
349 /// that PhysReg is the proper container for VirtReg now. The physical
350 /// register must not be used for anything else when this is called.
352 void RALocal::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
353 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
354 // Update information to note the fact that this register was just used, and
356 PhysRegsUsed[PhysReg] = VirtReg;
357 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
358 AddToPhysRegsUseOrder(PhysReg); // New use of PhysReg
362 /// isPhysRegAvailable - Return true if the specified physical register is free
363 /// and available for use. This also includes checking to see if aliased
364 /// registers are all free...
366 bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
367 if (PhysRegsUsed[PhysReg] != -1) return false;
369 // If the selected register aliases any other allocated registers, it is
371 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
372 *AliasSet; ++AliasSet)
373 if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
374 return false; // Can't use this reg then.
379 /// getFreeReg - Look to see if there is a free register available in the
380 /// specified register class. If not, return 0.
382 unsigned RALocal::getFreeReg(const TargetRegisterClass *RC) {
383 // Get iterators defining the range of registers that are valid to allocate in
384 // this class, which also specifies the preferred allocation order.
385 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
386 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
388 for (; RI != RE; ++RI)
389 if (isPhysRegAvailable(*RI)) { // Is reg unused?
390 assert(*RI != 0 && "Cannot use register!");
391 return *RI; // Found an unused register!
397 /// getReg - Find a physical register to hold the specified virtual
398 /// register. If all compatible physical registers are used, this method spills
399 /// the last used virtual register to the stack, and uses that register.
401 unsigned RALocal::getReg(MachineBasicBlock &MBB, MachineInstr *I,
403 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
405 // First check to see if we have a free register of the requested type...
406 unsigned PhysReg = getFreeReg(RC);
408 // If we didn't find an unused register, scavenge one now!
410 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
412 // Loop over all of the preallocated registers from the least recently used
413 // to the most recently used. When we find one that is capable of holding
414 // our register, use it.
415 for (unsigned i = 0; PhysReg == 0; ++i) {
416 assert(i != PhysRegsUseOrder.size() &&
417 "Couldn't find a register of the appropriate class!");
419 unsigned R = PhysRegsUseOrder[i];
421 // We can only use this register if it holds a virtual register (ie, it
422 // can be spilled). Do not use it if it is an explicitly allocated
423 // physical register!
424 assert(PhysRegsUsed[R] != -1 &&
425 "PhysReg in PhysRegsUseOrder, but is not allocated?");
426 if (PhysRegsUsed[R] && PhysRegsUsed[R] != -2) {
427 // If the current register is compatible, use it.
428 if (RC->contains(R)) {
432 // If one of the registers aliased to the current register is
433 // compatible, use it.
434 for (const unsigned *AliasIt = TRI->getAliasSet(R);
435 *AliasIt; ++AliasIt) {
436 if (RC->contains(*AliasIt) &&
437 // If this is pinned down for some reason, don't use it. For
438 // example, if CL is pinned, and we run across CH, don't use
439 // CH as justification for using scavenging ECX (which will
441 PhysRegsUsed[*AliasIt] != 0 &&
443 // Make sure the register is allocatable. Don't allocate SIL on
445 PhysRegsUsed[*AliasIt] != -2) {
446 PhysReg = *AliasIt; // Take an aliased register
454 assert(PhysReg && "Physical register not assigned!?!?");
456 // At this point PhysRegsUseOrder[i] is the least recently used register of
457 // compatible register class. Spill it to memory and reap its remains.
458 spillPhysReg(MBB, I, PhysReg);
461 // Now that we know which register we need to assign this to, do it now!
462 assignVirtToPhysReg(VirtReg, PhysReg);
467 /// reloadVirtReg - This method transforms the specified specified virtual
468 /// register use to refer to a physical register. This method may do this in
469 /// one of several ways: if the register is available in a physical register
470 /// already, it uses that physical register. If the value is not in a physical
471 /// register, and if there are physical registers available, it loads it into a
472 /// register. If register pressure is high, and it is possible, it tries to
473 /// fold the load of the virtual register into the instruction itself. It
474 /// avoids doing this if register pressure is low to improve the chance that
475 /// subsequent instructions can use the reloaded value. This method returns the
476 /// modified instruction.
478 MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
480 unsigned VirtReg = MI->getOperand(OpNum).getReg();
482 // If the virtual register is already available, just update the instruction
484 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
485 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
486 MI->getOperand(OpNum).setReg(PR); // Assign the input register
487 getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
491 // Otherwise, we need to fold it into the current instruction, or reload it.
492 // If we have registers available to hold the value, use them.
493 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
494 unsigned PhysReg = getFreeReg(RC);
495 int FrameIndex = getStackSpaceFor(VirtReg, RC);
497 if (PhysReg) { // Register is available, allocate it!
498 assignVirtToPhysReg(VirtReg, PhysReg);
499 } else { // No registers available.
500 // Force some poor hapless value out of the register file to
501 // make room for the new register, and reload it.
502 PhysReg = getReg(MBB, MI, VirtReg);
505 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
507 DOUT << " Reloading %reg" << VirtReg << " into "
508 << TRI->getName(PhysReg) << "\n";
510 // Add move instruction(s)
511 TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
512 ++NumLoads; // Update statistics
514 MF->getRegInfo().setPhysRegUsed(PhysReg);
515 MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
516 getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
520 /// isReadModWriteImplicitKill - True if this is an implicit kill for a
521 /// read/mod/write register, i.e. update partial register.
522 static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
523 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
524 MachineOperand& MO = MI->getOperand(i);
525 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
526 MO.isDef() && !MO.isDead())
532 /// isReadModWriteImplicitDef - True if this is an implicit def for a
533 /// read/mod/write register, i.e. update partial register.
534 static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
535 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
536 MachineOperand& MO = MI->getOperand(i);
537 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
538 !MO.isDef() && MO.isKill())
544 // precedes - Helper function to determine with MachineInstr A
545 // precedes MachineInstr B within the same MBB.
546 static bool precedes(MachineBasicBlock::iterator A,
547 MachineBasicBlock::iterator B) {
551 MachineBasicBlock::iterator I = A->getParent()->begin();
552 while (I != A->getParent()->end()) {
564 /// ComputeLocalLiveness - Computes liveness of registers within a basic
565 /// block, setting the killed/dead flags as appropriate.
566 void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
567 MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
568 // Keep track of the most recently seen previous use or def of each reg,
569 // so that we can update them with dead/kill markers.
570 std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
571 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
573 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
574 MachineOperand& MO = I->getOperand(i);
575 // Uses don't trigger any flags, but we need to save
576 // them for later. Also, we have to process these
577 // _before_ processing the defs, since an instr
578 // uses regs before it defs them.
579 if (MO.isReg() && MO.getReg() && MO.isUse())
580 LastUseDef[MO.getReg()] = std::make_pair(I, i);
583 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
584 MachineOperand& MO = I->getOperand(i);
585 // Defs others than 2-addr redefs _do_ trigger flag changes:
586 // - A def followed by a def is dead
587 // - A use followed by a def is a kill
588 if (MO.isReg() && MO.getReg() && MO.isDef()) {
589 std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
590 last = LastUseDef.find(MO.getReg());
591 if (last != LastUseDef.end()) {
592 // Check if this is a two address instruction. If so, then
593 // the def does not kill the use.
594 if (last->second.first == I) {
595 bool isTwoAddr = false;
596 for (unsigned j = i+1, je = I->getDesc().getNumOperands();
598 const MachineOperand &MO2 = I->getOperand(j);
599 if (MO2.isRegister() && MO2.isUse() &&
600 MO2.getReg() == MO.getReg() &&
601 I->getDesc().getOperandConstraint(j, TOI::TIED_TO) == (int)i)
605 if (isTwoAddr) continue;
608 MachineOperand& lastUD =
609 last->second.first->getOperand(last->second.second);
611 lastUD.setIsDead(true);
612 else if (lastUD.isUse())
613 lastUD.setIsKill(true);
616 LastUseDef[MO.getReg()] = std::make_pair(I, i);
621 // Live-out (of the function) registers contain return values of the function,
622 // so we need to make sure they are alive at return time.
623 if (!MBB.empty() && MBB.back().getDesc().isReturn()) {
624 MachineInstr* Ret = &MBB.back();
625 for (MachineRegisterInfo::liveout_iterator
626 I = MF->getRegInfo().liveout_begin(),
627 E = MF->getRegInfo().liveout_end(); I != E; ++I)
628 if (!Ret->readsRegister(*I)) {
629 Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
630 LastUseDef[*I] = std::make_pair(Ret, Ret->getNumOperands()-1);
634 // Finally, loop over the final use/def of each reg
635 // in the block and determine if it is dead.
636 for (std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
637 I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
638 MachineInstr* MI = I->second.first;
639 unsigned idx = I->second.second;
640 MachineOperand& MO = MI->getOperand(idx);
642 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(MO.getReg());
644 // A crude approximation of "live-out" calculation
645 bool usedOutsideBlock = isPhysReg ? false :
646 UsedInMultipleBlocks.test(MO.getReg() -
647 TargetRegisterInfo::FirstVirtualRegister);
648 if (!isPhysReg && !usedOutsideBlock)
649 for (MachineRegisterInfo::reg_iterator UI = MRI.reg_begin(MO.getReg()),
650 UE = MRI.reg_end(); UI != UE; ++UI)
652 // - used in another block
653 // - used in the same block before it is defined (loop)
654 if (UI->getParent() != &MBB ||
655 (MO.isDef() && UI.getOperand().isUse() && precedes(&*UI, MI))) {
656 UsedInMultipleBlocks.set(MO.getReg() -
657 TargetRegisterInfo::FirstVirtualRegister);
658 usedOutsideBlock = true;
662 // Physical registers and those that are not live-out of the block
663 // are killed/dead at their last use/def within this block.
664 if (isPhysReg || !usedOutsideBlock) {
667 else if (MI->getOperand(idx).isDef())
673 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
674 // loop over each instruction
675 MachineBasicBlock::iterator MII = MBB.begin();
677 DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
678 if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
680 // If this is the first basic block in the machine function, add live-in
681 // registers as active.
682 if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
683 for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
684 E = MBB.livein_end(); I != E; ++I) {
686 MF->getRegInfo().setPhysRegUsed(Reg);
687 PhysRegsUsed[Reg] = 0; // It is free and reserved now
688 AddToPhysRegsUseOrder(Reg);
689 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
690 *AliasSet; ++AliasSet) {
691 if (PhysRegsUsed[*AliasSet] != -2) {
692 AddToPhysRegsUseOrder(*AliasSet);
693 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
694 MF->getRegInfo().setPhysRegUsed(*AliasSet);
700 ComputeLocalLiveness(MBB);
702 // Otherwise, sequentially allocate each instruction in the MBB.
703 while (MII != MBB.end()) {
704 MachineInstr *MI = MII++;
705 const TargetInstrDesc &TID = MI->getDesc();
706 DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
707 DOUT << " Regs have values: ";
708 for (unsigned i = 0; i != TRI->getNumRegs(); ++i)
709 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
710 DOUT << "[" << TRI->getName(i)
711 << ",%reg" << PhysRegsUsed[i] << "] ";
714 // Loop over the implicit uses, making sure that they are at the head of the
715 // use order list, so they don't get reallocated.
716 if (TID.ImplicitUses) {
717 for (const unsigned *ImplicitUses = TID.ImplicitUses;
718 *ImplicitUses; ++ImplicitUses)
719 MarkPhysRegRecentlyUsed(*ImplicitUses);
722 SmallVector<unsigned, 8> Kills;
723 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
724 MachineOperand& MO = MI->getOperand(i);
725 if (MO.isRegister() && MO.isKill()) {
726 if (!MO.isImplicit())
727 Kills.push_back(MO.getReg());
728 else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
729 // These are extra physical register kills when a sub-register
730 // is defined (def of a sub-register is a read/mod/write of the
731 // larger registers). Ignore.
732 Kills.push_back(MO.getReg());
736 // Get the used operands into registers. This has the potential to spill
737 // incoming values if we are out of registers. Note that we completely
738 // ignore physical register uses here. We assume that if an explicit
739 // physical register is referenced by the instruction, that it is guaranteed
740 // to be live-in, or the input is badly hosed.
742 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
743 MachineOperand& MO = MI->getOperand(i);
744 // here we are looking for only used operands (never def&use)
745 if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
746 TargetRegisterInfo::isVirtualRegister(MO.getReg()))
747 MI = reloadVirtReg(MBB, MI, i);
750 // If this instruction is the last user of this register, kill the
751 // value, freeing the register being used, so it doesn't need to be
752 // spilled to memory.
754 for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
755 unsigned VirtReg = Kills[i];
756 unsigned PhysReg = VirtReg;
757 if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
758 // If the virtual register was never materialized into a register, it
759 // might not be in the map, but it won't hurt to zero it out anyway.
760 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
761 PhysReg = PhysRegSlot;
763 } else if (PhysRegsUsed[PhysReg] == -2) {
764 // Unallocatable register dead, ignore.
767 assert((!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1) &&
768 "Silently clearing a virtual register?");
772 DOUT << " Last use of " << TRI->getName(PhysReg)
773 << "[%reg" << VirtReg <<"], removing it from live set\n";
774 removePhysReg(PhysReg);
775 for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg);
776 *AliasSet; ++AliasSet) {
777 if (PhysRegsUsed[*AliasSet] != -2) {
778 DOUT << " Last use of "
779 << TRI->getName(*AliasSet)
780 << "[%reg" << VirtReg <<"], removing it from live set\n";
781 removePhysReg(*AliasSet);
787 // Loop over all of the operands of the instruction, spilling registers that
788 // are defined, and marking explicit destinations in the PhysRegsUsed map.
789 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
790 MachineOperand& MO = MI->getOperand(i);
791 if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
792 TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
793 unsigned Reg = MO.getReg();
794 if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
795 // These are extra physical register defs when a sub-register
796 // is defined (def of a sub-register is a read/mod/write of the
797 // larger registers). Ignore.
798 if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
800 MF->getRegInfo().setPhysRegUsed(Reg);
801 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
802 PhysRegsUsed[Reg] = 0; // It is free and reserved now
803 AddToPhysRegsUseOrder(Reg);
805 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
806 *AliasSet; ++AliasSet) {
807 if (PhysRegsUsed[*AliasSet] != -2) {
808 MF->getRegInfo().setPhysRegUsed(*AliasSet);
809 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
810 AddToPhysRegsUseOrder(*AliasSet);
816 // Loop over the implicit defs, spilling them as well.
817 if (TID.ImplicitDefs) {
818 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
819 *ImplicitDefs; ++ImplicitDefs) {
820 unsigned Reg = *ImplicitDefs;
821 if (PhysRegsUsed[Reg] != -2) {
822 spillPhysReg(MBB, MI, Reg, true);
823 AddToPhysRegsUseOrder(Reg);
824 PhysRegsUsed[Reg] = 0; // It is free and reserved now
826 MF->getRegInfo().setPhysRegUsed(Reg);
827 for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
828 *AliasSet; ++AliasSet) {
829 if (PhysRegsUsed[*AliasSet] != -2) {
830 AddToPhysRegsUseOrder(*AliasSet);
831 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
832 MF->getRegInfo().setPhysRegUsed(*AliasSet);
838 SmallVector<unsigned, 8> DeadDefs;
839 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
840 MachineOperand& MO = MI->getOperand(i);
841 if (MO.isRegister() && MO.isDead())
842 DeadDefs.push_back(MO.getReg());
845 // Okay, we have allocated all of the source operands and spilled any values
846 // that would be destroyed by defs of this instruction. Loop over the
847 // explicit defs and assign them to a register, spilling incoming values if
848 // we need to scavenge a register.
850 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
851 MachineOperand& MO = MI->getOperand(i);
852 if (MO.isRegister() && MO.isDef() && MO.getReg() &&
853 TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
854 unsigned DestVirtReg = MO.getReg();
855 unsigned DestPhysReg;
857 // If DestVirtReg already has a value, use it.
858 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
859 DestPhysReg = getReg(MBB, MI, DestVirtReg);
860 MF->getRegInfo().setPhysRegUsed(DestPhysReg);
861 markVirtRegModified(DestVirtReg);
862 getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
863 DOUT << " Assigning " << TRI->getName(DestPhysReg)
864 << " to %reg" << DestVirtReg << "\n";
865 MO.setReg(DestPhysReg); // Assign the output register
869 // If this instruction defines any registers that are immediately dead,
872 for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
873 unsigned VirtReg = DeadDefs[i];
874 unsigned PhysReg = VirtReg;
875 if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
876 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
877 PhysReg = PhysRegSlot;
878 assert(PhysReg != 0);
880 } else if (PhysRegsUsed[PhysReg] == -2) {
881 // Unallocatable register dead, ignore.
886 DOUT << " Register " << TRI->getName(PhysReg)
887 << " [%reg" << VirtReg
888 << "] is never used, removing it frame live list\n";
889 removePhysReg(PhysReg);
890 for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
891 *AliasSet; ++AliasSet) {
892 if (PhysRegsUsed[*AliasSet] != -2) {
893 DOUT << " Register " << TRI->getName(*AliasSet)
894 << " [%reg" << *AliasSet
895 << "] is never used, removing it frame live list\n";
896 removePhysReg(*AliasSet);
902 // Finally, if this is a noop copy instruction, zap it.
903 unsigned SrcReg, DstReg;
904 if (TII->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
908 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
910 // Spill all physical registers holding virtual registers now.
911 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
912 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) {
913 if (unsigned VirtReg = PhysRegsUsed[i])
914 spillVirtReg(MBB, MI, VirtReg, i);
920 // This checking code is very expensive.
922 for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
923 e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
924 if (unsigned PR = Virt2PhysRegMap[i]) {
925 cerr << "Register still mapped: " << i << " -> " << PR << "\n";
928 assert(AllOk && "Virtual registers still in phys regs?");
931 // Clear any physical register which appear live at the end of the basic
932 // block, but which do not hold any virtual registers. e.g., the stack
934 PhysRegsUseOrder.clear();
937 /// runOnMachineFunction - Register allocate the whole function
939 bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
940 DOUT << "Machine Function " << "\n";
942 TM = &Fn.getTarget();
943 TRI = TM->getRegisterInfo();
944 TII = TM->getInstrInfo();
946 PhysRegsUsed.assign(TRI->getNumRegs(), -1);
948 // At various places we want to efficiently check to see whether a register
949 // is allocatable. To handle this, we mark all unallocatable registers as
950 // being pinned down, permanently.
952 BitVector Allocable = TRI->getAllocatableSet(Fn);
953 for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
955 PhysRegsUsed[i] = -2; // Mark the reg unallocable.
958 // initialize the virtual->physical register map to have a 'null'
959 // mapping for all virtual registers
960 unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
961 Virt2PhysRegMap.grow(LastVirtReg);
962 Virt2LastUseMap.grow(LastVirtReg);
963 VirtRegModified.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
964 UsedInMultipleBlocks.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
966 // Loop over all of the basic blocks, eliminating virtual register references
967 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
969 AllocateBasicBlock(*MBB);
971 StackSlotForVirtReg.clear();
972 PhysRegsUsed.clear();
973 VirtRegModified.clear();
974 UsedInMultipleBlocks.clear();
975 Virt2PhysRegMap.clear();
976 Virt2LastUseMap.clear();
980 FunctionPass *llvm::createLocalRegisterAllocator() {
981 return new RALocal();