1 //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This register allocator allocates registers to a basic block at a time,
11 // attempting to keep values in registers and reusing registers as appropriate.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
16 #include "llvm/BasicBlock.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/SSARegMap.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/LiveVariables.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/ADT/IndexedMap.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
35 STATISTIC(NumStores, "Number of stores added");
36 STATISTIC(NumLoads , "Number of loads added");
37 STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
40 static RegisterRegAlloc
41 localRegAlloc("local", " local register allocator",
42 createLocalRegisterAllocator);
45 class VISIBILITY_HIDDEN RA : public MachineFunctionPass {
46 const TargetMachine *TM;
48 const MRegisterInfo *RegInfo;
50 bool *PhysRegsEverUsed;
52 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
53 // values are spilled.
54 std::map<unsigned, int> StackSlotForVirtReg;
56 // Virt2PhysRegMap - This map contains entries for each virtual register
57 // that is currently available in a physical register.
58 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
60 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
61 return Virt2PhysRegMap[VirtReg];
64 // PhysRegsUsed - This array is effectively a map, containing entries for
65 // each physical register that currently has a value (ie, it is in
66 // Virt2PhysRegMap). The value mapped to is the virtual register
67 // corresponding to the physical register (the inverse of the
68 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
69 // because it is used by a future instruction, and to -2 if it is not
70 // allocatable. If the entry for a physical register is -1, then the
71 // physical register is "not in the map".
73 std::vector<int> PhysRegsUsed;
75 // PhysRegsUseOrder - This contains a list of the physical registers that
76 // currently have a virtual register value in them. This list provides an
77 // ordering of registers, imposing a reallocation order. This list is only
78 // used if all registers are allocated and we have to spill one, in which
79 // case we spill the least recently used register. Entries at the front of
80 // the list are the least recently used registers, entries at the back are
81 // the most recently used.
83 std::vector<unsigned> PhysRegsUseOrder;
85 // VirtRegModified - This bitset contains information about which virtual
86 // registers need to be spilled back to memory when their registers are
87 // scavenged. If a virtual register has simply been rematerialized, there
88 // is no reason to spill it to memory when we need the register back.
90 std::vector<bool> VirtRegModified;
92 void markVirtRegModified(unsigned Reg, bool Val = true) {
93 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
94 Reg -= MRegisterInfo::FirstVirtualRegister;
95 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
96 VirtRegModified[Reg] = Val;
99 bool isVirtRegModified(unsigned Reg) const {
100 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
101 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
102 && "Illegal virtual register!");
103 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
106 void MarkPhysRegRecentlyUsed(unsigned Reg) {
107 if (PhysRegsUseOrder.empty() ||
108 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
110 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
111 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
112 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
113 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
114 // Add it to the end of the list
115 PhysRegsUseOrder.push_back(RegMatch);
117 return; // Found an exact match, exit early
122 virtual const char *getPassName() const {
123 return "Local Register Allocator";
126 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
127 AU.addRequired<LiveVariables>();
128 AU.addRequiredID(PHIEliminationID);
129 AU.addRequiredID(TwoAddressInstructionPassID);
130 MachineFunctionPass::getAnalysisUsage(AU);
134 /// runOnMachineFunction - Register allocate the whole function
135 bool runOnMachineFunction(MachineFunction &Fn);
137 /// AllocateBasicBlock - Register allocate the specified basic block.
138 void AllocateBasicBlock(MachineBasicBlock &MBB);
141 /// areRegsEqual - This method returns true if the specified registers are
142 /// related to each other. To do this, it checks to see if they are equal
143 /// or if the first register is in the alias set of the second register.
145 bool areRegsEqual(unsigned R1, unsigned R2) const {
146 if (R1 == R2) return true;
147 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
148 *AliasSet; ++AliasSet) {
149 if (*AliasSet == R1) return true;
154 /// getStackSpaceFor - This returns the frame index of the specified virtual
155 /// register on the stack, allocating space if necessary.
156 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
158 /// removePhysReg - This method marks the specified physical register as no
159 /// longer being in use.
161 void removePhysReg(unsigned PhysReg);
163 /// spillVirtReg - This method spills the value specified by PhysReg into
164 /// the virtual register slot specified by VirtReg. It then updates the RA
165 /// data structures to indicate the fact that PhysReg is now available.
167 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
168 unsigned VirtReg, unsigned PhysReg);
170 /// spillPhysReg - This method spills the specified physical register into
171 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
172 /// true, then the request is ignored if the physical register does not
173 /// contain a virtual register.
175 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
176 unsigned PhysReg, bool OnlyVirtRegs = false);
178 /// assignVirtToPhysReg - This method updates local state so that we know
179 /// that PhysReg is the proper container for VirtReg now. The physical
180 /// register must not be used for anything else when this is called.
182 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
184 /// liberatePhysReg - Make sure the specified physical register is available
185 /// for use. If there is currently a value in it, it is either moved out of
186 /// the way or spilled to memory.
188 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
191 /// isPhysRegAvailable - Return true if the specified physical register is
192 /// free and available for use. This also includes checking to see if
193 /// aliased registers are all free...
195 bool isPhysRegAvailable(unsigned PhysReg) const;
197 /// getFreeReg - Look to see if there is a free register available in the
198 /// specified register class. If not, return 0.
200 unsigned getFreeReg(const TargetRegisterClass *RC);
202 /// getReg - Find a physical register to hold the specified virtual
203 /// register. If all compatible physical registers are used, this method
204 /// spills the last used virtual register to the stack, and uses that
207 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
210 /// reloadVirtReg - This method transforms the specified specified virtual
211 /// register use to refer to a physical register. This method may do this
212 /// in one of several ways: if the register is available in a physical
213 /// register already, it uses that physical register. If the value is not
214 /// in a physical register, and if there are physical registers available,
215 /// it loads it into a register. If register pressure is high, and it is
216 /// possible, it tries to fold the load of the virtual register into the
217 /// instruction itself. It avoids doing this if register pressure is low to
218 /// improve the chance that subsequent instructions can use the reloaded
219 /// value. This method returns the modified instruction.
221 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
225 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
230 /// getStackSpaceFor - This allocates space for the specified virtual register
231 /// to be held on the stack.
232 int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
233 // Find the location Reg would belong...
234 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
236 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
237 return I->second; // Already has space allocated?
239 // Allocate a new stack object for this spill location...
240 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
243 // Assign the slot...
244 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
249 /// removePhysReg - This method marks the specified physical register as no
250 /// longer being in use.
252 void RA::removePhysReg(unsigned PhysReg) {
253 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
255 std::vector<unsigned>::iterator It =
256 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
257 if (It != PhysRegsUseOrder.end())
258 PhysRegsUseOrder.erase(It);
262 /// spillVirtReg - This method spills the value specified by PhysReg into the
263 /// virtual register slot specified by VirtReg. It then updates the RA data
264 /// structures to indicate the fact that PhysReg is now available.
266 void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
267 unsigned VirtReg, unsigned PhysReg) {
268 assert(VirtReg && "Spilling a physical register is illegal!"
269 " Must not have appropriate kill for the register or use exists beyond"
270 " the intended one.");
271 DOUT << " Spilling register " << RegInfo->getName(PhysReg)
272 << " containing %reg" << VirtReg;
273 if (!isVirtRegModified(VirtReg))
274 DOUT << " which has not been modified, so no store necessary!";
276 // Otherwise, there is a virtual register corresponding to this physical
277 // register. We only need to spill it into its stack slot if it has been
279 if (isVirtRegModified(VirtReg)) {
280 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
281 int FrameIndex = getStackSpaceFor(VirtReg, RC);
282 DOUT << " to stack slot #" << FrameIndex;
283 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
284 ++NumStores; // Update statistics
287 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
290 removePhysReg(PhysReg);
294 /// spillPhysReg - This method spills the specified physical register into the
295 /// virtual register slot associated with it. If OnlyVirtRegs is set to true,
296 /// then the request is ignored if the physical register does not contain a
297 /// virtual register.
299 void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
300 unsigned PhysReg, bool OnlyVirtRegs) {
301 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
302 assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
303 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
304 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
306 // If the selected register aliases any other registers, we must make
307 // sure that one of the aliases isn't alive.
308 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
309 *AliasSet; ++AliasSet)
310 if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
311 PhysRegsUsed[*AliasSet] != -2) // If allocatable.
312 if (PhysRegsUsed[*AliasSet] == 0) {
313 // This must have been a dead def due to something like this:
316 // No more use of %EAX, %AH, etc.
317 // %EAX isn't dead upon definition, but %AH is. However %AH isn't
318 // an operand of definition MI so it's not marked as such.
319 DOUT << " Register " << RegInfo->getName(*AliasSet)
320 << " [%reg" << *AliasSet
321 << "] is never used, removing it frame live list\n";
322 removePhysReg(*AliasSet);
324 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
329 /// assignVirtToPhysReg - This method updates local state so that we know
330 /// that PhysReg is the proper container for VirtReg now. The physical
331 /// register must not be used for anything else when this is called.
333 void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
334 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
335 // Update information to note the fact that this register was just used, and
337 PhysRegsUsed[PhysReg] = VirtReg;
338 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
339 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
343 /// isPhysRegAvailable - Return true if the specified physical register is free
344 /// and available for use. This also includes checking to see if aliased
345 /// registers are all free...
347 bool RA::isPhysRegAvailable(unsigned PhysReg) const {
348 if (PhysRegsUsed[PhysReg] != -1) return false;
350 // If the selected register aliases any other allocated registers, it is
352 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
353 *AliasSet; ++AliasSet)
354 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
355 return false; // Can't use this reg then.
360 /// getFreeReg - Look to see if there is a free register available in the
361 /// specified register class. If not, return 0.
363 unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
364 // Get iterators defining the range of registers that are valid to allocate in
365 // this class, which also specifies the preferred allocation order.
366 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
367 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
369 for (; RI != RE; ++RI)
370 if (isPhysRegAvailable(*RI)) { // Is reg unused?
371 assert(*RI != 0 && "Cannot use register!");
372 return *RI; // Found an unused register!
378 /// liberatePhysReg - Make sure the specified physical register is available for
379 /// use. If there is currently a value in it, it is either moved out of the way
380 /// or spilled to memory.
382 void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
384 spillPhysReg(MBB, I, PhysReg);
388 /// getReg - Find a physical register to hold the specified virtual
389 /// register. If all compatible physical registers are used, this method spills
390 /// the last used virtual register to the stack, and uses that register.
392 unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
394 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
396 // First check to see if we have a free register of the requested type...
397 unsigned PhysReg = getFreeReg(RC);
399 // If we didn't find an unused register, scavenge one now!
401 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
403 // Loop over all of the preallocated registers from the least recently used
404 // to the most recently used. When we find one that is capable of holding
405 // our register, use it.
406 for (unsigned i = 0; PhysReg == 0; ++i) {
407 assert(i != PhysRegsUseOrder.size() &&
408 "Couldn't find a register of the appropriate class!");
410 unsigned R = PhysRegsUseOrder[i];
412 // We can only use this register if it holds a virtual register (ie, it
413 // can be spilled). Do not use it if it is an explicitly allocated
414 // physical register!
415 assert(PhysRegsUsed[R] != -1 &&
416 "PhysReg in PhysRegsUseOrder, but is not allocated?");
417 if (PhysRegsUsed[R] && PhysRegsUsed[R] != -2) {
418 // If the current register is compatible, use it.
419 if (RC->contains(R)) {
423 // If one of the registers aliased to the current register is
424 // compatible, use it.
425 for (const unsigned *AliasIt = RegInfo->getAliasSet(R);
426 *AliasIt; ++AliasIt) {
427 if (RC->contains(*AliasIt) &&
428 // If this is pinned down for some reason, don't use it. For
429 // example, if CL is pinned, and we run across CH, don't use
430 // CH as justification for using scavenging ECX (which will
432 PhysRegsUsed[*AliasIt] != 0 &&
434 // Make sure the register is allocatable. Don't allocate SIL on
436 PhysRegsUsed[*AliasIt] != -2) {
437 PhysReg = *AliasIt; // Take an aliased register
445 assert(PhysReg && "Physical register not assigned!?!?");
447 // At this point PhysRegsUseOrder[i] is the least recently used register of
448 // compatible register class. Spill it to memory and reap its remains.
449 spillPhysReg(MBB, I, PhysReg);
452 // Now that we know which register we need to assign this to, do it now!
453 assignVirtToPhysReg(VirtReg, PhysReg);
458 /// reloadVirtReg - This method transforms the specified specified virtual
459 /// register use to refer to a physical register. This method may do this in
460 /// one of several ways: if the register is available in a physical register
461 /// already, it uses that physical register. If the value is not in a physical
462 /// register, and if there are physical registers available, it loads it into a
463 /// register. If register pressure is high, and it is possible, it tries to
464 /// fold the load of the virtual register into the instruction itself. It
465 /// avoids doing this if register pressure is low to improve the chance that
466 /// subsequent instructions can use the reloaded value. This method returns the
467 /// modified instruction.
469 MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
471 unsigned VirtReg = MI->getOperand(OpNum).getReg();
473 // If the virtual register is already available, just update the instruction
475 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
476 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
477 MI->getOperand(OpNum).setReg(PR); // Assign the input register
481 // Otherwise, we need to fold it into the current instruction, or reload it.
482 // If we have registers available to hold the value, use them.
483 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
484 unsigned PhysReg = getFreeReg(RC);
485 int FrameIndex = getStackSpaceFor(VirtReg, RC);
487 if (PhysReg) { // Register is available, allocate it!
488 assignVirtToPhysReg(VirtReg, PhysReg);
489 } else { // No registers available.
490 // If we can fold this spill into this instruction, do so now.
491 if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){
493 // Since we changed the address of MI, make sure to update live variables
494 // to know that the new instruction has the properties of the old one.
495 LV->instructionChanged(MI, FMI);
496 return MBB.insert(MBB.erase(MI), FMI);
499 // It looks like we can't fold this virtual register load into this
500 // instruction. Force some poor hapless value out of the register file to
501 // make room for the new register, and reload it.
502 PhysReg = getReg(MBB, MI, VirtReg);
505 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
507 DOUT << " Reloading %reg" << VirtReg << " into "
508 << RegInfo->getName(PhysReg) << "\n";
510 // Add move instruction(s)
511 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
512 ++NumLoads; // Update statistics
514 PhysRegsEverUsed[PhysReg] = true;
515 MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
521 void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
522 // loop over each instruction
523 MachineBasicBlock::iterator MII = MBB.begin();
524 const TargetInstrInfo &TII = *TM->getInstrInfo();
526 DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
527 if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
529 // If this is the first basic block in the machine function, add live-in
530 // registers as active.
531 if (&MBB == &*MF->begin()) {
532 for (MachineFunction::livein_iterator I = MF->livein_begin(),
533 E = MF->livein_end(); I != E; ++I) {
534 unsigned Reg = I->first;
535 PhysRegsEverUsed[Reg] = true;
536 PhysRegsUsed[Reg] = 0; // It is free and reserved now
537 PhysRegsUseOrder.push_back(Reg);
538 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
539 *AliasSet; ++AliasSet) {
540 if (PhysRegsUsed[*AliasSet] != -2) {
541 PhysRegsUseOrder.push_back(*AliasSet);
542 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
543 PhysRegsEverUsed[*AliasSet] = true;
549 // Otherwise, sequentially allocate each instruction in the MBB.
550 while (MII != MBB.end()) {
551 MachineInstr *MI = MII++;
552 const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());
553 DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
554 DOUT << " Regs have values: ";
555 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
556 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
557 DOUT << "[" << RegInfo->getName(i)
558 << ",%reg" << PhysRegsUsed[i] << "] ";
561 // Loop over the implicit uses, making sure that they are at the head of the
562 // use order list, so they don't get reallocated.
563 if (TID.ImplicitUses) {
564 for (const unsigned *ImplicitUses = TID.ImplicitUses;
565 *ImplicitUses; ++ImplicitUses)
566 MarkPhysRegRecentlyUsed(*ImplicitUses);
569 SmallVector<unsigned, 8> Kills;
570 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
571 MachineOperand& MO = MI->getOperand(i);
572 if (MO.isRegister() && MO.isKill())
573 Kills.push_back(MO.getReg());
576 // Get the used operands into registers. This has the potential to spill
577 // incoming values if we are out of registers. Note that we completely
578 // ignore physical register uses here. We assume that if an explicit
579 // physical register is referenced by the instruction, that it is guaranteed
580 // to be live-in, or the input is badly hosed.
582 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
583 MachineOperand& MO = MI->getOperand(i);
584 // here we are looking for only used operands (never def&use)
585 if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
586 MRegisterInfo::isVirtualRegister(MO.getReg()))
587 MI = reloadVirtReg(MBB, MI, i);
590 // If this instruction is the last user of this register, kill the
591 // value, freeing the register being used, so it doesn't need to be
592 // spilled to memory.
594 for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
595 unsigned VirtReg = Kills[i];
596 unsigned PhysReg = VirtReg;
597 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
598 // If the virtual register was never materialized into a register, it
599 // might not be in the map, but it won't hurt to zero it out anyway.
600 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
601 PhysReg = PhysRegSlot;
603 } else if (PhysRegsUsed[PhysReg] == -2) {
604 // Unallocatable register dead, ignore.
609 DOUT << " Last use of " << RegInfo->getName(PhysReg)
610 << "[%reg" << VirtReg <<"], removing it from live set\n";
611 removePhysReg(PhysReg);
612 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
613 *AliasSet; ++AliasSet) {
614 if (PhysRegsUsed[*AliasSet] != -2) {
615 DOUT << " Last use of "
616 << RegInfo->getName(*AliasSet)
617 << "[%reg" << VirtReg <<"], removing it from live set\n";
618 removePhysReg(*AliasSet);
624 // Loop over all of the operands of the instruction, spilling registers that
625 // are defined, and marking explicit destinations in the PhysRegsUsed map.
626 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
627 MachineOperand& MO = MI->getOperand(i);
628 if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
629 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
630 unsigned Reg = MO.getReg();
631 if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
633 PhysRegsEverUsed[Reg] = true;
634 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
635 PhysRegsUsed[Reg] = 0; // It is free and reserved now
636 PhysRegsUseOrder.push_back(Reg);
637 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
638 *AliasSet; ++AliasSet) {
639 if (PhysRegsUsed[*AliasSet] != -2) {
640 PhysRegsUseOrder.push_back(*AliasSet);
641 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
642 PhysRegsEverUsed[*AliasSet] = true;
648 // Loop over the implicit defs, spilling them as well.
649 if (TID.ImplicitDefs) {
650 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
651 *ImplicitDefs; ++ImplicitDefs) {
652 unsigned Reg = *ImplicitDefs;
653 bool IsNonAllocatable = PhysRegsUsed[Reg] == -2;
654 if (!IsNonAllocatable) {
655 spillPhysReg(MBB, MI, Reg, true);
656 PhysRegsUseOrder.push_back(Reg);
657 PhysRegsUsed[Reg] = 0; // It is free and reserved now
659 PhysRegsEverUsed[Reg] = true;
661 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
662 *AliasSet; ++AliasSet) {
663 if (PhysRegsUsed[*AliasSet] != -2) {
664 if (!IsNonAllocatable) {
665 PhysRegsUseOrder.push_back(*AliasSet);
666 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
668 PhysRegsEverUsed[*AliasSet] = true;
674 SmallVector<unsigned, 8> DeadDefs;
675 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
676 MachineOperand& MO = MI->getOperand(i);
677 if (MO.isRegister() && MO.isDead())
678 DeadDefs.push_back(MO.getReg());
681 // Okay, we have allocated all of the source operands and spilled any values
682 // that would be destroyed by defs of this instruction. Loop over the
683 // explicit defs and assign them to a register, spilling incoming values if
684 // we need to scavenge a register.
686 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
687 MachineOperand& MO = MI->getOperand(i);
688 if (MO.isRegister() && MO.isDef() && MO.getReg() &&
689 MRegisterInfo::isVirtualRegister(MO.getReg())) {
690 unsigned DestVirtReg = MO.getReg();
691 unsigned DestPhysReg;
693 // If DestVirtReg already has a value, use it.
694 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
695 DestPhysReg = getReg(MBB, MI, DestVirtReg);
696 PhysRegsEverUsed[DestPhysReg] = true;
697 markVirtRegModified(DestVirtReg);
698 MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
702 // If this instruction defines any registers that are immediately dead,
705 for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
706 unsigned VirtReg = DeadDefs[i];
707 unsigned PhysReg = VirtReg;
708 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
709 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
710 PhysReg = PhysRegSlot;
711 assert(PhysReg != 0);
713 } else if (PhysRegsUsed[PhysReg] == -2) {
714 // Unallocatable register dead, ignore.
719 DOUT << " Register " << RegInfo->getName(PhysReg)
720 << " [%reg" << VirtReg
721 << "] is never used, removing it frame live list\n";
722 removePhysReg(PhysReg);
723 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
724 *AliasSet; ++AliasSet) {
725 if (PhysRegsUsed[*AliasSet] != -2) {
726 DOUT << " Register " << RegInfo->getName(*AliasSet)
727 << " [%reg" << *AliasSet
728 << "] is never used, removing it frame live list\n";
729 removePhysReg(*AliasSet);
735 // Finally, if this is a noop copy instruction, zap it.
736 unsigned SrcReg, DstReg;
737 if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
738 LV->removeVirtualRegistersKilled(MI);
739 LV->removeVirtualRegistersDead(MI);
744 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
746 // Spill all physical registers holding virtual registers now.
747 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
748 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
749 if (unsigned VirtReg = PhysRegsUsed[i])
750 spillVirtReg(MBB, MI, VirtReg, i);
755 // This checking code is very expensive.
757 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
758 e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
759 if (unsigned PR = Virt2PhysRegMap[i]) {
760 cerr << "Register still mapped: " << i << " -> " << PR << "\n";
763 assert(AllOk && "Virtual registers still in phys regs?");
766 // Clear any physical register which appear live at the end of the basic
767 // block, but which do not hold any virtual registers. e.g., the stack
769 PhysRegsUseOrder.clear();
773 /// runOnMachineFunction - Register allocate the whole function
775 bool RA::runOnMachineFunction(MachineFunction &Fn) {
776 DOUT << "Machine Function " << "\n";
778 TM = &Fn.getTarget();
779 RegInfo = TM->getRegisterInfo();
780 LV = &getAnalysis<LiveVariables>();
782 PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
783 std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
784 Fn.setUsedPhysRegs(PhysRegsEverUsed);
786 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
788 // At various places we want to efficiently check to see whether a register
789 // is allocatable. To handle this, we mark all unallocatable registers as
790 // being pinned down, permanently.
792 BitVector Allocable = RegInfo->getAllocatableSet(Fn);
793 for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
795 PhysRegsUsed[i] = -2; // Mark the reg unallocable.
798 // initialize the virtual->physical register map to have a 'null'
799 // mapping for all virtual registers
800 Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
802 // Loop over all of the basic blocks, eliminating virtual register references
803 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
805 AllocateBasicBlock(*MBB);
807 StackSlotForVirtReg.clear();
808 PhysRegsUsed.clear();
809 VirtRegModified.clear();
810 Virt2PhysRegMap.clear();
814 FunctionPass *llvm::createLocalRegisterAllocator() {