1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register allocator. *Very* simple: It immediate
11 // spills every value right after it is computed, and it reloads all used
12 // operands from the spill area to temporary registers before each instruction.
13 // It does not keep values in registers across instructions.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "regalloc"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/ADT/STLExtras.h"
33 STATISTIC(NumStores, "Number of stores added");
34 STATISTIC(NumLoads , "Number of loads added");
37 static RegisterRegAlloc
38 simpleRegAlloc("simple", " simple register allocator",
39 createSimpleRegisterAllocator);
41 class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
44 RegAllocSimple() : MachineFunctionPass((intptr_t)&ID) {}
47 const TargetMachine *TM;
48 const TargetRegisterInfo *TRI;
50 // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
51 // these values are spilled
52 std::map<unsigned, int> StackSlotForVirtReg;
54 // RegsUsed - Keep track of what registers are currently in use. This is a
56 std::vector<bool> RegsUsed;
58 // RegClassIdx - Maps RegClass => which index we can take a register
59 // from. Since this is a simple register allocator, when we need a register
60 // of a certain class, we just take the next available one.
61 std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
64 virtual const char *getPassName() const {
65 return "Simple Register Allocator";
68 /// runOnMachineFunction - Register allocate the whole function
69 bool runOnMachineFunction(MachineFunction &Fn);
71 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
72 AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
73 MachineFunctionPass::getAnalysisUsage(AU);
76 /// AllocateBasicBlock - Register allocate the specified basic block.
77 void AllocateBasicBlock(MachineBasicBlock &MBB);
79 /// getStackSpaceFor - This returns the offset of the specified virtual
80 /// register on the stack, allocating space if necessary.
81 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
83 /// Given a virtual register, return a compatible physical register that is
86 /// Side effect: marks that register as being used until manually cleared
88 unsigned getFreeReg(unsigned virtualReg);
90 /// Moves value from memory into that register
91 unsigned reloadVirtReg(MachineBasicBlock &MBB,
92 MachineBasicBlock::iterator I, unsigned VirtReg);
94 /// Saves reg value on the stack (maps virtual register to stack value)
95 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
96 unsigned VirtReg, unsigned PhysReg);
98 char RegAllocSimple::ID = 0;
101 /// getStackSpaceFor - This allocates space for the specified virtual
102 /// register to be held on the stack.
103 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
104 const TargetRegisterClass *RC) {
105 // Find the location VirtReg would belong...
106 std::map<unsigned, int>::iterator I =
107 StackSlotForVirtReg.lower_bound(VirtReg);
109 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
110 return I->second; // Already has space allocated?
112 // Allocate a new stack object for this spill location...
113 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
116 // Assign the slot...
117 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
122 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
123 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
124 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
125 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
128 unsigned regIdx = RegClassIdx[RC]++;
129 assert(RI+regIdx != RE && "Not enough registers!");
130 unsigned PhysReg = *(RI+regIdx);
132 if (!RegsUsed[PhysReg]) {
133 MF->getRegInfo().setPhysRegUsed(PhysReg);
139 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
140 MachineBasicBlock::iterator I,
142 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
143 int FrameIdx = getStackSpaceFor(VirtReg, RC);
144 unsigned PhysReg = getFreeReg(VirtReg);
146 // Add move instruction(s)
148 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
149 TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
153 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
154 MachineBasicBlock::iterator I,
155 unsigned VirtReg, unsigned PhysReg) {
156 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
157 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
159 int FrameIdx = getStackSpaceFor(VirtReg, RC);
161 // Add move instruction(s)
163 TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
167 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
168 // loop over each instruction
169 for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
170 // Made to combat the incorrect allocation of r2 = add r1, r1
171 std::map<unsigned, unsigned> Virt2PhysRegMap;
173 RegsUsed.resize(TRI->getNumRegs());
175 // This is a preliminary pass that will invalidate any registers that are
176 // used by the instruction (including implicit uses).
177 const TargetInstrDesc &Desc = MI->getDesc();
178 const unsigned *Regs;
179 if (Desc.ImplicitUses) {
180 for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
181 RegsUsed[*Regs] = true;
184 if (Desc.ImplicitDefs) {
185 for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
186 RegsUsed[*Regs] = true;
187 MF->getRegInfo().setPhysRegUsed(*Regs);
191 // Loop over uses, move from memory into registers.
192 for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
193 MachineOperand &op = MI->getOperand(i);
195 if (op.isRegister() && op.getReg() &&
196 TargetRegisterInfo::isVirtualRegister(op.getReg())) {
197 unsigned virtualReg = (unsigned) op.getReg();
198 DOUT << "op: " << op << "\n";
199 DOUT << "\t inst[" << i << "]: ";
200 DEBUG(MI->print(*cerr.stream(), TM));
202 // make sure the same virtual register maps to the same physical
203 // register in any given instruction
204 unsigned physReg = Virt2PhysRegMap[virtualReg];
207 int TiedOp = Desc.findTiedToSrcOperand(i);
209 physReg = getFreeReg(virtualReg);
211 // must be same register number as the source operand that is
212 // tied to. This maps a = b + c into b = b + c, and saves b into
214 assert(MI->getOperand(TiedOp).isRegister() &&
215 MI->getOperand(TiedOp).getReg() &&
216 MI->getOperand(TiedOp).isUse() &&
217 "Two address instruction invalid!");
219 physReg = MI->getOperand(TiedOp).getReg();
221 spillVirtReg(MBB, next(MI), virtualReg, physReg);
223 physReg = reloadVirtReg(MBB, MI, virtualReg);
224 Virt2PhysRegMap[virtualReg] = physReg;
227 MI->getOperand(i).setReg(physReg);
228 DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
237 /// runOnMachineFunction - Register allocate the whole function
239 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
240 DOUT << "Machine Function\n";
242 TM = &MF->getTarget();
243 TRI = TM->getRegisterInfo();
245 // Loop over all of the basic blocks, eliminating virtual register references
246 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
248 AllocateBasicBlock(*MBB);
250 StackSlotForVirtReg.clear();
254 FunctionPass *llvm::createSimpleRegisterAllocator() {
255 return new RegAllocSimple();