1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register allocator. *Very* simple: It immediate
11 // spills every value right after it is computed, and it reloads all used
12 // operands from the spill area to temporary registers before each instruction.
13 // It does not keep values in registers across instructions.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "regalloc"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/SSARegMap.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "Support/Debug.h"
26 #include "Support/Statistic.h"
30 Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
31 Statistic<> NumReloaded("ra-simple", "Number of registers reloaded");
33 class RegAllocSimple : public MachineFunctionPass {
35 const TargetMachine *TM;
36 const MRegisterInfo *RegInfo;
38 // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
39 // these values are spilled
40 std::map<unsigned, int> StackSlotForVirtReg;
42 // RegsUsed - Keep track of what registers are currently in use. This is a
44 std::vector<bool> RegsUsed;
46 // RegClassIdx - Maps RegClass => which index we can take a register
47 // from. Since this is a simple register allocator, when we need a register
48 // of a certain class, we just take the next available one.
49 std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
52 virtual const char *getPassName() const {
53 return "Simple Register Allocator";
56 /// runOnMachineFunction - Register allocate the whole function
57 bool runOnMachineFunction(MachineFunction &Fn);
59 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
60 AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
61 MachineFunctionPass::getAnalysisUsage(AU);
64 /// AllocateBasicBlock - Register allocate the specified basic block.
65 void AllocateBasicBlock(MachineBasicBlock &MBB);
67 /// getStackSpaceFor - This returns the offset of the specified virtual
68 /// register on the stack, allocating space if necessary.
69 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
71 /// Given a virtual register, return a compatible physical register that is
74 /// Side effect: marks that register as being used until manually cleared
76 unsigned getFreeReg(unsigned virtualReg);
78 /// Moves value from memory into that register
79 unsigned reloadVirtReg(MachineBasicBlock &MBB,
80 MachineBasicBlock::iterator &I, unsigned VirtReg);
82 /// Saves reg value on the stack (maps virtual register to stack value)
83 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
84 unsigned VirtReg, unsigned PhysReg);
89 /// getStackSpaceFor - This allocates space for the specified virtual
90 /// register to be held on the stack.
91 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
92 const TargetRegisterClass *RC) {
93 // Find the location VirtReg would belong...
94 std::map<unsigned, int>::iterator I =
95 StackSlotForVirtReg.lower_bound(VirtReg);
97 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
98 return I->second; // Already has space allocated?
100 // Allocate a new stack object for this spill location...
101 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
103 // Assign the slot...
104 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
109 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
110 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(virtualReg);
111 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
112 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
115 unsigned regIdx = RegClassIdx[RC]++;
116 assert(RI+regIdx != RE && "Not enough registers!");
117 unsigned PhysReg = *(RI+regIdx);
119 if (!RegsUsed[PhysReg])
124 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
125 MachineBasicBlock::iterator &I,
127 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
128 int FrameIdx = getStackSpaceFor(VirtReg, RC);
129 unsigned PhysReg = getFreeReg(VirtReg);
131 // Add move instruction(s)
133 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
137 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
138 MachineBasicBlock::iterator &I,
139 unsigned VirtReg, unsigned PhysReg) {
140 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
141 int FrameIdx = getStackSpaceFor(VirtReg, RC);
143 // Add move instruction(s)
145 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
149 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
150 // loop over each instruction
151 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
152 // Made to combat the incorrect allocation of r2 = add r1, r1
153 std::map<unsigned, unsigned> Virt2PhysRegMap;
155 MachineInstr *MI = *I;
157 RegsUsed.resize(MRegisterInfo::FirstVirtualRegister);
159 // a preliminary pass that will invalidate any registers that
160 // are used by the instruction (including implicit uses)
161 unsigned Opcode = MI->getOpcode();
162 const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
163 const unsigned *Regs = Desc.ImplicitUses;
165 RegsUsed[*Regs++] = true;
167 Regs = Desc.ImplicitDefs;
169 RegsUsed[*Regs++] = true;
171 // Loop over uses, move from memory into registers
172 for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
173 MachineOperand &op = MI->getOperand(i);
175 if (op.isVirtualRegister()) {
176 unsigned virtualReg = (unsigned) op.getAllocatedRegNum();
177 DEBUG(std::cerr << "op: " << op << "\n");
178 DEBUG(std::cerr << "\t inst[" << i << "]: ";
179 MI->print(std::cerr, *TM));
181 // make sure the same virtual register maps to the same physical
182 // register in any given instruction
183 unsigned physReg = Virt2PhysRegMap[virtualReg];
185 if (op.opIsDefOnly() || op.opIsDefAndUse()) {
186 if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
187 // must be same register number as the first operand
188 // This maps a = b + c into b += c, and saves b into a's spot
189 assert(MI->getOperand(1).isRegister() &&
190 MI->getOperand(1).getAllocatedRegNum() &&
191 MI->getOperand(1).opIsUse() &&
192 "Two address instruction invalid!");
194 physReg = MI->getOperand(1).getAllocatedRegNum();
196 physReg = getFreeReg(virtualReg);
199 spillVirtReg(MBB, I, virtualReg, physReg);
202 physReg = reloadVirtReg(MBB, I, virtualReg);
203 Virt2PhysRegMap[virtualReg] = physReg;
206 MI->SetMachineOperandReg(i, physReg);
207 DEBUG(std::cerr << "virt: " << virtualReg <<
208 ", phys: " << op.getAllocatedRegNum() << "\n");
217 /// runOnMachineFunction - Register allocate the whole function
219 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
220 DEBUG(std::cerr << "Machine Function " << "\n");
222 TM = &MF->getTarget();
223 RegInfo = TM->getRegisterInfo();
225 // Loop over all of the basic blocks, eliminating virtual register references
226 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
228 AllocateBasicBlock(*MBB);
230 StackSlotForVirtReg.clear();
234 FunctionPass *createSimpleRegisterAllocator() {
235 return new RegAllocSimple();