1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register allocator. *Very* simple: It immediate
11 // spills every value right after it is computed, and it reloads all used
12 // operands from the spill area to temporary registers before each instruction.
13 // It does not keep values in registers across instructions.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "regalloc"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/SSARegMap.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/ADT/Statistic.h"
27 #include "llvm/ADT/STLExtras.h"
31 Statistic<> NumStores("ra-simple", "Number of stores added");
32 Statistic<> NumLoads ("ra-simple", "Number of loads added");
34 class RegAllocSimple : public MachineFunctionPass {
36 const TargetMachine *TM;
37 const MRegisterInfo *RegInfo;
39 // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
40 // these values are spilled
41 std::map<unsigned, int> StackSlotForVirtReg;
43 // RegsUsed - Keep track of what registers are currently in use. This is a
45 std::vector<bool> RegsUsed;
47 // RegClassIdx - Maps RegClass => which index we can take a register
48 // from. Since this is a simple register allocator, when we need a register
49 // of a certain class, we just take the next available one.
50 std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
53 virtual const char *getPassName() const {
54 return "Simple Register Allocator";
57 /// runOnMachineFunction - Register allocate the whole function
58 bool runOnMachineFunction(MachineFunction &Fn);
60 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
61 AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
62 MachineFunctionPass::getAnalysisUsage(AU);
65 /// AllocateBasicBlock - Register allocate the specified basic block.
66 void AllocateBasicBlock(MachineBasicBlock &MBB);
68 /// getStackSpaceFor - This returns the offset of the specified virtual
69 /// register on the stack, allocating space if necessary.
70 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
72 /// Given a virtual register, return a compatible physical register that is
75 /// Side effect: marks that register as being used until manually cleared
77 unsigned getFreeReg(unsigned virtualReg);
79 /// Moves value from memory into that register
80 unsigned reloadVirtReg(MachineBasicBlock &MBB,
81 MachineBasicBlock::iterator I, unsigned VirtReg);
83 /// Saves reg value on the stack (maps virtual register to stack value)
84 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
85 unsigned VirtReg, unsigned PhysReg);
90 /// getStackSpaceFor - This allocates space for the specified virtual
91 /// register to be held on the stack.
92 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
93 const TargetRegisterClass *RC) {
94 // Find the location VirtReg would belong...
95 std::map<unsigned, int>::iterator I =
96 StackSlotForVirtReg.lower_bound(VirtReg);
98 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
99 return I->second; // Already has space allocated?
101 // Allocate a new stack object for this spill location...
102 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
105 // Assign the slot...
106 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
111 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
112 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(virtualReg);
113 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
114 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
117 unsigned regIdx = RegClassIdx[RC]++;
118 assert(RI+regIdx != RE && "Not enough registers!");
119 unsigned PhysReg = *(RI+regIdx);
121 if (!RegsUsed[PhysReg])
126 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
127 MachineBasicBlock::iterator I,
129 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
130 int FrameIdx = getStackSpaceFor(VirtReg, RC);
131 unsigned PhysReg = getFreeReg(VirtReg);
133 // Add move instruction(s)
135 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx);
139 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
140 MachineBasicBlock::iterator I,
141 unsigned VirtReg, unsigned PhysReg) {
142 const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
143 int FrameIdx = getStackSpaceFor(VirtReg, RC);
145 // Add move instruction(s)
147 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx);
151 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
152 // loop over each instruction
153 for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
154 // Made to combat the incorrect allocation of r2 = add r1, r1
155 std::map<unsigned, unsigned> Virt2PhysRegMap;
157 RegsUsed.resize(RegInfo->getNumRegs());
159 // a preliminary pass that will invalidate any registers that
160 // are used by the instruction (including implicit uses)
161 unsigned Opcode = MI->getOpcode();
162 const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
163 const unsigned *Regs = Desc.ImplicitUses;
165 RegsUsed[*Regs++] = true;
167 Regs = Desc.ImplicitDefs;
169 RegsUsed[*Regs++] = true;
171 // Loop over uses, move from memory into registers
172 for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
173 MachineOperand &op = MI->getOperand(i);
175 if (op.isRegister() && op.getReg() &&
176 MRegisterInfo::isVirtualRegister(op.getReg())) {
177 unsigned virtualReg = (unsigned) op.getReg();
178 DEBUG(std::cerr << "op: " << op << "\n");
179 DEBUG(std::cerr << "\t inst[" << i << "]: ";
180 MI->print(std::cerr, TM));
182 // make sure the same virtual register maps to the same physical
183 // register in any given instruction
184 unsigned physReg = Virt2PhysRegMap[virtualReg];
187 if (!TM->getInstrInfo()->isTwoAddrInstr(MI->getOpcode()) || i) {
188 physReg = getFreeReg(virtualReg);
190 // must be same register number as the first operand
191 // This maps a = b + c into b += c, and saves b into a's spot
192 assert(MI->getOperand(1).isRegister() &&
193 MI->getOperand(1).getReg() &&
194 MI->getOperand(1).isUse() &&
195 "Two address instruction invalid!");
197 physReg = MI->getOperand(1).getReg();
198 spillVirtReg(MBB, next(MI), virtualReg, physReg);
199 MI->getOperand(1).setDef();
200 MI->RemoveOperand(0);
201 break; // This is the last operand to process
203 spillVirtReg(MBB, next(MI), virtualReg, physReg);
205 physReg = reloadVirtReg(MBB, MI, virtualReg);
206 Virt2PhysRegMap[virtualReg] = physReg;
209 MI->SetMachineOperandReg(i, physReg);
210 DEBUG(std::cerr << "virt: " << virtualReg <<
211 ", phys: " << op.getReg() << "\n");
220 /// runOnMachineFunction - Register allocate the whole function
222 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
223 DEBUG(std::cerr << "Machine Function " << "\n");
225 TM = &MF->getTarget();
226 RegInfo = TM->getRegisterInfo();
228 // Loop over all of the basic blocks, eliminating virtual register references
229 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
231 AllocateBasicBlock(*MBB);
233 StackSlotForVirtReg.clear();
237 FunctionPass *llvm::createSimpleRegisterAllocator() {
238 return new RegAllocSimple();