1 //===-- RegisterScavenging.cpp - Machine register scavenging --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the Evan Cheng and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine register scavenger. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "reg-scavenging"
18 #include "llvm/CodeGen/RegisterScavenging.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/ADT/STLExtras.h"
28 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
29 const MachineFunction &MF = *mbb->getParent();
30 const TargetMachine &TM = MF.getTarget();
31 TII = TM.getInstrInfo();
32 RegInfo = TM.getRegisterInfo();
34 assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
38 NumPhysRegs = RegInfo->getNumRegs();
39 RegsAvailable.resize(NumPhysRegs);
41 // Create reserved registers bitvector.
42 ReservedRegs = RegInfo->getReservedRegs(MF);
44 // Create callee-saved registers bitvector.
45 CalleeSavedRegs.resize(NumPhysRegs);
46 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
48 for (unsigned i = 0; CSRegs[i]; ++i)
49 CalleeSavedRegs.set(CSRegs[i]);
56 // All registers started out unused.
59 // Reserved registers are always used.
60 RegsAvailable ^= ReservedRegs;
62 // Live-in registers are in use.
63 if (!MBB->livein_empty())
64 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
65 E = MBB->livein_end(); I != E; ++I)
71 void RegScavenger::restoreScavengedReg() {
75 RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
76 ScavengingFrameIndex, ScavengedRC);
77 MachineBasicBlock::iterator II = prior(MBBI);
78 RegInfo->eliminateFrameIndex(II, 0, this);
79 setUsed(ScavengedReg);
84 void RegScavenger::forward() {
90 assert(MBBI != MBB->end() && "Already at the end of the basic block!");
94 MachineInstr *MI = MBBI;
96 // Reaching a terminator instruction. Restore a scavenged register (which
98 if (TII->isTerminatorInstr(MI->getOpcode()))
99 restoreScavengedReg();
101 // Process uses first.
102 BitVector ChangedRegs(NumPhysRegs);
103 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
104 const MachineOperand &MO = MI->getOperand(i);
105 if (!MO.isRegister() || !MO.isUse())
107 unsigned Reg = MO.getReg();
111 // Register has been scavenged. Restore it!
112 if (Reg != ScavengedReg)
113 assert(false && "Using an undefined register!");
115 restoreScavengedReg();
117 if (MO.isKill() && !isReserved(Reg))
118 ChangedRegs.set(Reg);
120 // Change states of all registers after all the uses are processed to guard
121 // against multiple uses.
122 setUnused(ChangedRegs);
125 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
126 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
127 const MachineOperand &MO = MI->getOperand(i);
128 if (!MO.isRegister() || !MO.isDef())
130 unsigned Reg = MO.getReg();
131 // If it's dead upon def, then it is now free.
136 // Skip two-address destination operand.
137 if (TID->findTiedToSrcOperand(i) != -1) {
138 assert(isUsed(Reg) && "Using an undefined register!");
141 assert((isUnused(Reg) || isReserved(Reg)) &&
142 "Re-defining a live register!");
147 void RegScavenger::backward() {
148 assert(Tracking && "Not tracking states!");
149 assert(MBBI != MBB->begin() && "Already at start of basic block!");
150 // Move ptr backward.
153 MachineInstr *MI = MBBI;
154 // Process defs first.
155 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
156 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
157 const MachineOperand &MO = MI->getOperand(i);
158 if (!MO.isRegister() || !MO.isDef())
160 // Skip two-address destination operand.
161 if (TID->findTiedToSrcOperand(i) != -1)
163 unsigned Reg = MO.getReg();
165 if (!isReserved(Reg))
170 BitVector ChangedRegs(NumPhysRegs);
171 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
172 const MachineOperand &MO = MI->getOperand(i);
173 if (!MO.isRegister() || !MO.isUse())
175 unsigned Reg = MO.getReg();
178 assert(isUnused(Reg) || isReserved(Reg));
179 ChangedRegs.set(Reg);
181 setUsed(ChangedRegs);
184 void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
186 used = ~RegsAvailable;
188 used = ~RegsAvailable & ~ReservedRegs;
191 /// CreateRegClassMask - Set the bits that represent the registers in the
192 /// TargetRegisterClass.
193 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
194 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E;
199 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
200 const BitVector &Candidates) const {
201 // Mask off the registers which are not in the TargetRegisterClass.
202 BitVector RegsAvailableCopy(NumPhysRegs, false);
203 CreateRegClassMask(RegClass, RegsAvailableCopy);
204 RegsAvailableCopy &= RegsAvailable;
206 // Restrict the search to candidates.
207 RegsAvailableCopy &= Candidates;
209 // Returns the first unused (bit is set) register, or 0 is none is found.
210 int Reg = RegsAvailableCopy.find_first();
211 return (Reg == -1) ? 0 : Reg;
214 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
215 bool ExCalleeSaved) const {
216 // Mask off the registers which are not in the TargetRegisterClass.
217 BitVector RegsAvailableCopy(NumPhysRegs, false);
218 CreateRegClassMask(RegClass, RegsAvailableCopy);
219 RegsAvailableCopy &= RegsAvailable;
221 // If looking for a non-callee-saved register, mask off all the callee-saved
224 RegsAvailableCopy &= ~CalleeSavedRegs;
226 // Returns the first unused (bit is set) register, or 0 is none is found.
227 int Reg = RegsAvailableCopy.find_first();
228 return (Reg == -1) ? 0 : Reg;
231 /// calcDistanceToUse - Calculate the distance to the first use of the
232 /// specified register.
233 static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
234 MachineBasicBlock::iterator I, unsigned Reg) {
237 while (I != MBB->end()) {
239 if (I->findRegisterUseOperandIdx(Reg) != -1)
246 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
247 MachineBasicBlock::iterator I,
249 assert(ScavengingFrameIndex >= 0 &&
250 "Cannot scavenge a register without an emergency spill slot!");
252 // Mask off the registers which are not in the TargetRegisterClass.
253 BitVector Candidates(NumPhysRegs, false);
254 CreateRegClassMask(RC, Candidates);
255 Candidates ^= ReservedRegs; // Do not include reserved registers.
257 // Exclude all the registers being used by the instruction.
258 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
259 MachineOperand &MO = I->getOperand(i);
261 Candidates.reset(MO.getReg());
264 // Find the register whose use is furtherest aaway.
266 unsigned MaxDist = 0;
267 int Reg = Candidates.find_first();
269 unsigned Dist = calcDistanceToUse(MBB, I, Reg);
270 if (Dist >= MaxDist) {
274 Reg = Candidates.find_next(Reg);
277 if (ScavengedReg != 0) {
278 // First restore previously scavenged register.
279 RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
280 ScavengingFrameIndex, ScavengedRC);
281 MachineBasicBlock::iterator II = prior(I);
282 RegInfo->eliminateFrameIndex(II, SPAdj, this);
285 RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
286 MachineBasicBlock::iterator II = prior(I);
287 RegInfo->eliminateFrameIndex(II, SPAdj, this);