1 //===-- RegisterScavenging.cpp - Machine register scavenging --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the Evan Cheng and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine register scavenger. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "reg-scavenging"
18 #include "llvm/CodeGen/RegisterScavenging.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/ADT/STLExtras.h"
28 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
29 const MachineFunction &MF = *mbb->getParent();
30 const TargetMachine &TM = MF.getTarget();
31 TII = TM.getInstrInfo();
32 RegInfo = TM.getRegisterInfo();
34 assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
38 NumPhysRegs = RegInfo->getNumRegs();
39 RegStates.resize(NumPhysRegs);
41 // Create reserved registers bitvector.
42 ReservedRegs = RegInfo->getReservedRegs(MF);
44 // Create callee-saved registers bitvector.
45 CalleeSavedRegs.resize(NumPhysRegs);
46 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
48 for (unsigned i = 0; CSRegs[i]; ++i)
49 CalleeSavedRegs.set(CSRegs[i]);
54 // All registers started out unused.
57 // Reserved registers are always used.
58 RegStates ^= ReservedRegs;
60 // Live-in registers are in use.
61 if (!MBB->livein_empty())
62 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
63 E = MBB->livein_end(); I != E; ++I)
69 void RegScavenger::restoreScavengedReg() {
73 RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
74 ScavengingFrameIndex, ScavengedRC);
75 MachineBasicBlock::iterator II = prior(MBBI);
76 RegInfo->eliminateFrameIndex(II, this);
77 setUsed(ScavengedReg);
82 void RegScavenger::forward() {
88 assert(MBBI != MBB->end() && "Already at the end of the basic block!");
92 MachineInstr *MI = MBBI;
94 // Reaching a terminator instruction. Restore a scavenged register (which
96 if (TII->isTerminatorInstr(MI->getOpcode()))
97 restoreScavengedReg();
99 // Process uses first.
100 BitVector ChangedRegs(NumPhysRegs);
101 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
102 const MachineOperand &MO = MI->getOperand(i);
103 if (!MO.isReg() || !MO.isUse())
105 unsigned Reg = MO.getReg();
109 // Register has been scavenged. Restore it!
110 if (Reg != ScavengedReg)
113 restoreScavengedReg();
115 if (MO.isKill() && !isReserved(Reg))
116 ChangedRegs.set(Reg);
118 // Change states of all registers after all the uses are processed to guard
119 // against multiple uses.
120 setUnused(ChangedRegs);
123 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
124 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
125 const MachineOperand &MO = MI->getOperand(i);
126 if (!MO.isReg() || !MO.isDef())
128 unsigned Reg = MO.getReg();
129 // If it's dead upon def, then it is now free.
134 // Skip two-address destination operand.
135 if (TID->findTiedToSrcOperand(i) != -1) {
139 assert(isUnused(Reg) || isReserved(Reg));
144 void RegScavenger::backward() {
145 assert(Tracking && "Not tracking states!");
146 assert(MBBI != MBB->begin() && "Already at start of basic block!");
147 // Move ptr backward.
150 MachineInstr *MI = MBBI;
151 // Process defs first.
152 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
153 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
154 const MachineOperand &MO = MI->getOperand(i);
155 if (!MO.isReg() || !MO.isDef())
157 // Skip two-address destination operand.
158 if (TID->findTiedToSrcOperand(i) != -1)
160 unsigned Reg = MO.getReg();
162 if (!isReserved(Reg))
167 BitVector ChangedRegs(NumPhysRegs);
168 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
169 const MachineOperand &MO = MI->getOperand(i);
170 if (!MO.isReg() || !MO.isUse())
172 unsigned Reg = MO.getReg();
175 assert(isUnused(Reg) || isReserved(Reg));
176 ChangedRegs.set(Reg);
178 setUsed(ChangedRegs);
181 /// CreateRegClassMask - Set the bits that represent the registers in the
182 /// TargetRegisterClass.
183 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
184 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E;
189 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
190 const BitVector &Candidates) const {
191 // Mask off the registers which are not in the TargetRegisterClass.
192 BitVector RegStatesCopy(NumPhysRegs, false);
193 CreateRegClassMask(RegClass, RegStatesCopy);
194 RegStatesCopy &= RegStates;
196 // Restrict the search to candidates.
197 RegStatesCopy &= Candidates;
199 // Returns the first unused (bit is set) register, or 0 is none is found.
200 int Reg = RegStatesCopy.find_first();
201 return (Reg == -1) ? 0 : Reg;
204 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
205 bool ExCalleeSaved) const {
206 // Mask off the registers which are not in the TargetRegisterClass.
207 BitVector RegStatesCopy(NumPhysRegs, false);
208 CreateRegClassMask(RegClass, RegStatesCopy);
209 RegStatesCopy &= RegStates;
211 // If looking for a non-callee-saved register, mask off all the callee-saved
214 RegStatesCopy &= ~CalleeSavedRegs;
216 // Returns the first unused (bit is set) register, or 0 is none is found.
217 int Reg = RegStatesCopy.find_first();
218 return (Reg == -1) ? 0 : Reg;
221 /// calcDistanceToUse - Calculate the distance to the first use of the
222 /// specified register.
223 static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
224 MachineBasicBlock::iterator I, unsigned Reg) {
227 while (I != MBB->end()) {
229 if (I->findRegisterUseOperand(Reg))
236 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
237 MachineBasicBlock::iterator I) {
238 assert(ScavengingFrameIndex >= 0 &&
239 "Cannot scavenge a register without an emergency spill slot!");
241 // Mask off the registers which are not in the TargetRegisterClass.
242 BitVector Candidates(NumPhysRegs, false);
243 CreateRegClassMask(RC, Candidates);
244 Candidates ^= ReservedRegs; // Do not include reserved registers.
246 // Exclude all the registers being used by the instruction.
247 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
248 MachineOperand &MO = I->getOperand(i);
250 Candidates.reset(MO.getReg());
253 // Find the register whose use is furtherest aaway.
255 unsigned MaxDist = 0;
256 int Reg = Candidates.find_first();
258 unsigned Dist = calcDistanceToUse(MBB, I, Reg);
259 if (Dist >= MaxDist) {
263 Reg = Candidates.find_next(Reg);
266 if (ScavengedReg != 0) {
267 // First restore previously scavenged register.
268 RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
269 ScavengingFrameIndex, ScavengedRC);
270 MachineBasicBlock::iterator II = prior(I);
271 RegInfo->eliminateFrameIndex(II, this);
274 RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
275 MachineBasicBlock::iterator II = prior(I);
276 RegInfo->eliminateFrameIndex(II, this);