1 //===-- RegisterScavenging.cpp - Machine register scavenging --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine register scavenger. It can provide
11 // information, such as unused registers, at any point in a machine basic block.
12 // It also provides a mechanism to make registers available by evicting them to
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "reg-scavenging"
18 #include "llvm/CodeGen/RegisterScavenging.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/ADT/SmallPtrSet.h"
29 #include "llvm/ADT/SmallVector.h"
30 #include "llvm/ADT/STLExtras.h"
33 /// setUsed - Set the register and its sub-registers as being used.
34 void RegScavenger::setUsed(unsigned Reg) {
35 RegsAvailable.reset(Reg);
37 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
38 unsigned SubReg = *SubRegs; ++SubRegs)
39 RegsAvailable.reset(SubReg);
42 /// setUnused - Set the register and its sub-registers as being unused.
43 void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) {
44 RegsAvailable.set(Reg);
46 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
47 unsigned SubReg = *SubRegs; ++SubRegs)
48 RegsAvailable.set(SubReg);
51 void RegScavenger::initRegState() {
54 ScavengeRestore = NULL;
58 // All registers started out unused.
61 // Reserved registers are always used.
62 RegsAvailable ^= ReservedRegs;
64 // Live-in registers are in use.
65 if (!MBB || MBB->livein_empty())
67 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
68 E = MBB->livein_end(); I != E; ++I)
72 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
73 MachineFunction &MF = *mbb->getParent();
74 const TargetMachine &TM = MF.getTarget();
75 TII = TM.getInstrInfo();
76 TRI = TM.getRegisterInfo();
77 MRI = &MF.getRegInfo();
79 assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
84 NumPhysRegs = TRI->getNumRegs();
85 RegsAvailable.resize(NumPhysRegs);
87 // Create reserved registers bitvector.
88 ReservedRegs = TRI->getReservedRegs(MF);
90 // Create callee-saved registers bitvector.
91 CalleeSavedRegs.resize(NumPhysRegs);
92 const unsigned *CSRegs = TRI->getCalleeSavedRegs();
94 for (unsigned i = 0; CSRegs[i]; ++i)
95 CalleeSavedRegs.set(CSRegs[i]);
98 // RS used within emit{Pro,Epi}logue()
107 void RegScavenger::restoreScavengedReg() {
108 TII->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
109 ScavengingFrameIndex, ScavengedRC);
110 MachineBasicBlock::iterator II = prior(MBBI);
111 TRI->eliminateFrameIndex(II, 0, this);
112 setUsed(ScavengedReg);
118 /// isLiveInButUnusedBefore - Return true if register is livein the MBB not
119 /// not used before it reaches the MI that defines register.
120 static bool isLiveInButUnusedBefore(unsigned Reg, MachineInstr *MI,
121 MachineBasicBlock *MBB,
122 const TargetRegisterInfo *TRI,
123 MachineRegisterInfo* MRI) {
124 // First check if register is livein.
125 bool isLiveIn = false;
126 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
127 E = MBB->livein_end(); I != E; ++I)
128 if (Reg == *I || TRI->isSuperRegister(Reg, *I)) {
135 // Is there any use of it before the specified MI?
136 SmallPtrSet<MachineInstr*, 4> UsesInMBB;
137 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
138 UE = MRI->use_end(); UI != UE; ++UI) {
139 MachineOperand &UseMO = UI.getOperand();
140 if (UseMO.isReg() && UseMO.isUndef())
142 MachineInstr *UseMI = &*UI;
143 if (UseMI->getParent() == MBB)
144 UsesInMBB.insert(UseMI);
146 if (UsesInMBB.empty())
149 for (MachineBasicBlock::iterator I = MBB->begin(), E = MI; I != E; ++I)
150 if (UsesInMBB.count(&*I))
156 void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
158 for (const unsigned *R = TRI->getSubRegisters(Reg); *R; R++)
162 void RegScavenger::addRegWithAliases(BitVector &BV, unsigned Reg) {
164 for (const unsigned *R = TRI->getAliasSet(Reg); *R; R++)
168 void RegScavenger::forward() {
174 assert(MBBI != MBB->end() && "Already at the end of the basic block!");
178 MachineInstr *MI = MBBI;
179 DistanceMap.insert(std::make_pair(MI, CurrDist++));
181 if (MI == ScavengeRestore) {
184 ScavengeRestore = NULL;
187 // Find out which registers are early clobbered, killed, defined, and marked
188 // def-dead in this instruction.
189 BitVector EarlyClobberRegs(NumPhysRegs);
190 BitVector KillRegs(NumPhysRegs);
191 BitVector DefRegs(NumPhysRegs);
192 BitVector DeadRegs(NumPhysRegs);
193 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
194 const MachineOperand &MO = MI->getOperand(i);
195 if (!MO.isReg() || MO.isUndef())
197 unsigned Reg = MO.getReg();
198 if (!Reg || isReserved(Reg))
202 // Two-address operands implicitly kill.
203 if (MO.isKill() || MI->isRegTiedToDefOperand(i))
204 addRegWithSubRegs(KillRegs, Reg);
208 addRegWithSubRegs(DeadRegs, Reg);
210 addRegWithSubRegs(DefRegs, Reg);
211 if (MO.isEarlyClobber())
212 addRegWithAliases(EarlyClobberRegs, Reg);
216 // Verify uses and defs.
217 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
218 const MachineOperand &MO = MI->getOperand(i);
219 if (!MO.isReg() || MO.isUndef())
221 unsigned Reg = MO.getReg();
222 if (!Reg || isReserved(Reg))
225 assert(isUsed(Reg) && "Using an undefined register!");
226 assert(!EarlyClobberRegs.test(Reg) &&
227 "Using an early clobbered register!");
230 assert((KillRegs.test(Reg) || isUnused(Reg) ||
231 isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&
232 "Re-defining a live register!");
236 // Commit the changes.
242 void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
244 used = ~RegsAvailable;
246 used = ~RegsAvailable & ~ReservedRegs;
249 /// CreateRegClassMask - Set the bits that represent the registers in the
250 /// TargetRegisterClass.
251 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
252 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E;
257 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
258 const BitVector &Candidates) const {
259 // Mask off the registers which are not in the TargetRegisterClass.
260 BitVector RegsAvailableCopy(NumPhysRegs, false);
261 CreateRegClassMask(RegClass, RegsAvailableCopy);
262 RegsAvailableCopy &= RegsAvailable;
264 // Restrict the search to candidates.
265 RegsAvailableCopy &= Candidates;
267 // Returns the first unused (bit is set) register, or 0 is none is found.
268 int Reg = RegsAvailableCopy.find_first();
269 return (Reg == -1) ? 0 : Reg;
272 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
273 bool ExCalleeSaved) const {
274 // Mask off the registers which are not in the TargetRegisterClass.
275 BitVector RegsAvailableCopy(NumPhysRegs, false);
276 CreateRegClassMask(RegClass, RegsAvailableCopy);
277 RegsAvailableCopy &= RegsAvailable;
279 // If looking for a non-callee-saved register, mask off all the callee-saved
282 RegsAvailableCopy &= ~CalleeSavedRegs;
284 // Returns the first unused (bit is set) register, or 0 is none is found.
285 int Reg = RegsAvailableCopy.find_first();
286 return (Reg == -1) ? 0 : Reg;
289 /// findFirstUse - Calculate the distance to the first use of the
290 /// specified register.
292 RegScavenger::findFirstUse(MachineBasicBlock *MBB,
293 MachineBasicBlock::iterator I, unsigned Reg,
295 MachineInstr *UseMI = 0;
297 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(Reg),
298 RE = MRI->reg_end(); RI != RE; ++RI) {
299 MachineInstr *UDMI = &*RI;
300 if (UDMI->getParent() != MBB)
302 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UDMI);
303 if (DI == DistanceMap.end()) {
304 // If it's not in map, it's below current MI, let's initialize the
307 unsigned Dist = CurrDist + 1;
308 while (I != MBB->end()) {
309 DistanceMap.insert(std::make_pair(I, Dist++));
313 DI = DistanceMap.find(UDMI);
314 if (DI->second > CurrDist && DI->second < Dist) {
322 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
323 MachineBasicBlock::iterator I,
325 assert(ScavengingFrameIndex >= 0 &&
326 "Cannot scavenge a register without an emergency spill slot!");
328 // Mask off the registers which are not in the TargetRegisterClass.
329 BitVector Candidates(NumPhysRegs, false);
330 CreateRegClassMask(RC, Candidates);
331 // Do not include reserved registers.
332 Candidates ^= ReservedRegs & Candidates;
334 // Exclude all the registers being used by the instruction.
335 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
336 MachineOperand &MO = I->getOperand(i);
338 Candidates.reset(MO.getReg());
341 // Find the register whose use is furthest away.
343 unsigned MaxDist = 0;
344 MachineInstr *MaxUseMI = 0;
345 int Reg = Candidates.find_first();
348 MachineInstr *UseMI = findFirstUse(MBB, I, Reg, Dist);
349 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
351 MachineInstr *AsUseMI = findFirstUse(MBB, I, *AS, AsDist);
357 if (Dist >= MaxDist) {
362 Reg = Candidates.find_next(Reg);
365 assert(ScavengedReg == 0 &&
366 "Scavenger slot is live, unable to scavenge another register!");
368 // Avoid infinite regress
371 // Make sure SReg is marked as used. It could be considered available
372 // if it is one of the callee saved registers, but hasn't been spilled.
374 MBB->addLiveIn(SReg);
378 // Spill the scavenged register before I.
379 TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
380 MachineBasicBlock::iterator II = prior(I);
381 TRI->eliminateFrameIndex(II, SPAdj, this);
383 // Restore the scavenged register before its use (or first terminator).
385 ? MachineBasicBlock::iterator(MaxUseMI) : MBB->getFirstTerminator();
386 TII->loadRegFromStackSlot(*MBB, II, SReg, ScavengingFrameIndex, RC);
387 ScavengeRestore = prior(II);
388 // Doing this here leads to infinite regress.
389 // ScavengedReg = SReg;