1 //===-- RegisterScavenging.cpp - Machine register scavenging --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the Evan Cheng and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine register scavenger. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "reg-scavenging"
18 #include "llvm/CodeGen/RegisterScavenging.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/ADT/STLExtras.h"
28 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
29 const MachineFunction &MF = *mbb->getParent();
30 const TargetMachine &TM = MF.getTarget();
31 TII = TM.getInstrInfo();
32 RegInfo = TM.getRegisterInfo();
34 assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
38 NumPhysRegs = RegInfo->getNumRegs();
39 RegStates.resize(NumPhysRegs);
41 // Create reserved registers bitvector.
42 ReservedRegs = RegInfo->getReservedRegs(MF);
44 // Create callee-saved registers bitvector.
45 CalleeSavedRegs.resize(NumPhysRegs);
46 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
48 for (unsigned i = 0; CSRegs[i]; ++i)
49 CalleeSavedRegs.set(CSRegs[i]);
56 // All registers started out unused.
59 // Reserved registers are always used.
60 RegStates ^= ReservedRegs;
62 // Live-in registers are in use.
63 if (!MBB->livein_empty())
64 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
65 E = MBB->livein_end(); I != E; ++I)
71 void RegScavenger::restoreScavengedReg() {
75 RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
76 ScavengingFrameIndex, ScavengedRC);
77 MachineBasicBlock::iterator II = prior(MBBI);
78 RegInfo->eliminateFrameIndex(II, this);
79 setUsed(ScavengedReg);
84 void RegScavenger::forward() {
90 assert(MBBI != MBB->end() && "Already at the end of the basic block!");
94 MachineInstr *MI = MBBI;
96 // Reaching a terminator instruction. Restore a scavenged register (which
98 if (TII->isTerminatorInstr(MI->getOpcode()))
99 restoreScavengedReg();
101 // Process uses first.
102 BitVector ChangedRegs(NumPhysRegs);
103 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
104 const MachineOperand &MO = MI->getOperand(i);
105 if (!MO.isReg() || !MO.isUse())
107 unsigned Reg = MO.getReg();
111 // Register has been scavenged. Restore it!
112 if (Reg != ScavengedReg)
115 restoreScavengedReg();
117 if (MO.isKill() && !isReserved(Reg))
118 ChangedRegs.set(Reg);
120 // Change states of all registers after all the uses are processed to guard
121 // against multiple uses.
122 setUnused(ChangedRegs);
125 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
126 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
127 const MachineOperand &MO = MI->getOperand(i);
128 if (!MO.isReg() || !MO.isDef())
130 unsigned Reg = MO.getReg();
131 // If it's dead upon def, then it is now free.
136 // Skip two-address destination operand.
137 if (TID->findTiedToSrcOperand(i) != -1) {
141 assert(isUnused(Reg) || isReserved(Reg));
146 void RegScavenger::backward() {
147 assert(Tracking && "Not tracking states!");
148 assert(MBBI != MBB->begin() && "Already at start of basic block!");
149 // Move ptr backward.
152 MachineInstr *MI = MBBI;
153 // Process defs first.
154 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
155 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
156 const MachineOperand &MO = MI->getOperand(i);
157 if (!MO.isReg() || !MO.isDef())
159 // Skip two-address destination operand.
160 if (TID->findTiedToSrcOperand(i) != -1)
162 unsigned Reg = MO.getReg();
164 if (!isReserved(Reg))
169 BitVector ChangedRegs(NumPhysRegs);
170 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
171 const MachineOperand &MO = MI->getOperand(i);
172 if (!MO.isReg() || !MO.isUse())
174 unsigned Reg = MO.getReg();
177 assert(isUnused(Reg) || isReserved(Reg));
178 ChangedRegs.set(Reg);
180 setUsed(ChangedRegs);
183 /// CreateRegClassMask - Set the bits that represent the registers in the
184 /// TargetRegisterClass.
185 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
186 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E;
191 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
192 const BitVector &Candidates) const {
193 // Mask off the registers which are not in the TargetRegisterClass.
194 BitVector RegStatesCopy(NumPhysRegs, false);
195 CreateRegClassMask(RegClass, RegStatesCopy);
196 RegStatesCopy &= RegStates;
198 // Restrict the search to candidates.
199 RegStatesCopy &= Candidates;
201 // Returns the first unused (bit is set) register, or 0 is none is found.
202 int Reg = RegStatesCopy.find_first();
203 return (Reg == -1) ? 0 : Reg;
206 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
207 bool ExCalleeSaved) const {
208 // Mask off the registers which are not in the TargetRegisterClass.
209 BitVector RegStatesCopy(NumPhysRegs, false);
210 CreateRegClassMask(RegClass, RegStatesCopy);
211 RegStatesCopy &= RegStates;
213 // If looking for a non-callee-saved register, mask off all the callee-saved
216 RegStatesCopy &= ~CalleeSavedRegs;
218 // Returns the first unused (bit is set) register, or 0 is none is found.
219 int Reg = RegStatesCopy.find_first();
220 return (Reg == -1) ? 0 : Reg;
223 /// calcDistanceToUse - Calculate the distance to the first use of the
224 /// specified register.
225 static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
226 MachineBasicBlock::iterator I, unsigned Reg) {
229 while (I != MBB->end()) {
231 if (I->findRegisterUseOperand(Reg))
238 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
239 MachineBasicBlock::iterator I) {
240 assert(ScavengingFrameIndex >= 0 &&
241 "Cannot scavenge a register without an emergency spill slot!");
243 // Mask off the registers which are not in the TargetRegisterClass.
244 BitVector Candidates(NumPhysRegs, false);
245 CreateRegClassMask(RC, Candidates);
246 Candidates ^= ReservedRegs; // Do not include reserved registers.
248 // Exclude all the registers being used by the instruction.
249 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
250 MachineOperand &MO = I->getOperand(i);
252 Candidates.reset(MO.getReg());
255 // Find the register whose use is furtherest aaway.
257 unsigned MaxDist = 0;
258 int Reg = Candidates.find_first();
260 unsigned Dist = calcDistanceToUse(MBB, I, Reg);
261 if (Dist >= MaxDist) {
265 Reg = Candidates.find_next(Reg);
268 if (ScavengedReg != 0) {
269 // First restore previously scavenged register.
270 RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
271 ScavengingFrameIndex, ScavengedRC);
272 MachineBasicBlock::iterator II = prior(I);
273 RegInfo->eliminateFrameIndex(II, this);
276 RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
277 MachineBasicBlock::iterator II = prior(I);
278 RegInfo->eliminateFrameIndex(II, this);