1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "function-lowering-info"
16 #include "llvm/CodeGen/FunctionLoweringInfo.h"
17 #include "llvm/DerivedTypes.h"
18 #include "llvm/Function.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/IntrinsicInst.h"
21 #include "llvm/LLVMContext.h"
22 #include "llvm/Module.h"
23 #include "llvm/Analysis/DebugInfo.h"
24 #include "llvm/CodeGen/Analysis.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineInstrBuilder.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Support/Debug.h"
36 #include "llvm/Support/ErrorHandling.h"
37 #include "llvm/Support/MathExtras.h"
41 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
42 /// PHI nodes or outside of the basic block that defines it, or used by a
43 /// switch or atomic instruction, which may expand to multiple basic blocks.
44 static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
45 if (I->use_empty()) return false;
46 if (isa<PHINode>(I)) return true;
47 const BasicBlock *BB = I->getParent();
48 for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
51 if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
57 FunctionLoweringInfo::FunctionLoweringInfo(const TargetLowering &tli)
61 void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
64 RegInfo = &MF->getRegInfo();
66 // Check whether the function can return without sret-demotion.
67 SmallVector<ISD::OutputArg, 4> Outs;
68 GetReturnInfo(Fn->getReturnType(),
69 Fn->getAttributes().getRetAttributes(), Outs, TLI);
70 CanLowerReturn = TLI.CanLowerReturn(Fn->getCallingConv(), Fn->isVarArg(),
71 Outs, Fn->getContext());
73 // Initialize the mapping of values to registers. This is only set up for
74 // instruction values that are used outside of the block that defines
76 Function::const_iterator BB = Fn->begin(), EB = Fn->end();
77 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
78 if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
79 if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
80 const Type *Ty = AI->getAllocatedType();
81 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
83 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
86 TySize *= CUI->getZExtValue(); // Get total allocated size.
87 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
89 // The object may need to be placed onto the stack near the stack
90 // protector if one exists. Determine here if this object is a suitable
91 // candidate. I.e., it would trigger the creation of a stack protector.
93 (AI->isArrayAllocation() ||
94 (TySize > 8 && isa<ArrayType>(Ty) &&
95 cast<ArrayType>(Ty)->getElementType()->isIntegerTy(8)));
97 MF->getFrameInfo()->CreateStackObject(TySize, Align, false, MayNeedSP);
100 for (; BB != EB; ++BB)
101 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
102 // Mark values used outside their block as exported, by allocating
103 // a virtual register for them.
104 if (isUsedOutsideOfDefiningBlock(I))
105 if (!isa<AllocaInst>(I) ||
106 !StaticAllocaMap.count(cast<AllocaInst>(I)))
107 InitializeRegForValue(I);
109 // Collect llvm.dbg.declare information. This is done now instead of
110 // during the initial isel pass through the IR so that it is done
111 // in a predictable order.
112 if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
113 MachineModuleInfo &MMI = MF->getMMI();
114 if (MMI.hasDebugInfo() &&
115 DIVariable(DI->getVariable()).Verify() &&
116 !DI->getDebugLoc().isUnknown()) {
117 // Don't handle byval struct arguments or VLAs, for example.
118 // Non-byval arguments are handled here (they refer to the stack
119 // temporary alloca at this point).
120 const Value *Address = DI->getAddress();
122 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
123 Address = BCI->getOperand(0);
124 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
125 DenseMap<const AllocaInst *, int>::iterator SI =
126 StaticAllocaMap.find(AI);
127 if (SI != StaticAllocaMap.end()) { // Check for VLAs.
129 MMI.setVariableDbgInfo(DI->getVariable(),
130 FI, DI->getDebugLoc());
138 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
139 // also creates the initial PHI MachineInstrs, though none of the input
140 // operands are populated.
141 for (BB = Fn->begin(); BB != EB; ++BB) {
142 MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
146 // Transfer the address-taken flag. This is necessary because there could
147 // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
148 // the first one should be marked.
149 if (BB->hasAddressTaken())
150 MBB->setHasAddressTaken();
152 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
154 for (BasicBlock::const_iterator I = BB->begin();
155 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
156 if (PN->use_empty()) continue;
158 DebugLoc DL = PN->getDebugLoc();
159 unsigned PHIReg = ValueMap[PN];
160 assert(PHIReg && "PHI node does not have an assigned virtual register!");
162 SmallVector<EVT, 4> ValueVTs;
163 ComputeValueVTs(TLI, PN->getType(), ValueVTs);
164 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
165 EVT VT = ValueVTs[vti];
166 unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
167 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
168 for (unsigned i = 0; i != NumRegisters; ++i)
169 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
170 PHIReg += NumRegisters;
175 // Mark landing pad blocks.
176 for (BB = Fn->begin(); BB != EB; ++BB)
177 if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
178 MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
181 /// clear - Clear out all the function-specific state. This returns this
182 /// FunctionLoweringInfo to an empty state, ready to be used for a
183 /// different function.
184 void FunctionLoweringInfo::clear() {
185 assert(CatchInfoFound.size() == CatchInfoLost.size() &&
186 "Not all catch info was assigned to a landing pad!");
190 StaticAllocaMap.clear();
192 CatchInfoLost.clear();
193 CatchInfoFound.clear();
195 LiveOutRegInfo.clear();
197 ArgDbgValues.clear();
198 ByValArgFrameIndexMap.clear();
202 /// CreateReg - Allocate a single virtual register for the given type.
203 unsigned FunctionLoweringInfo::CreateReg(EVT VT) {
204 return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
207 /// CreateRegs - Allocate the appropriate number of virtual registers of
208 /// the correctly promoted or expanded types. Assign these registers
209 /// consecutive vreg numbers and return the first assigned number.
211 /// In the case that the given value has struct or array type, this function
212 /// will assign registers for each member or element.
214 unsigned FunctionLoweringInfo::CreateRegs(const Type *Ty) {
215 SmallVector<EVT, 4> ValueVTs;
216 ComputeValueVTs(TLI, Ty, ValueVTs);
218 unsigned FirstReg = 0;
219 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
220 EVT ValueVT = ValueVTs[Value];
221 EVT RegisterVT = TLI.getRegisterType(Ty->getContext(), ValueVT);
223 unsigned NumRegs = TLI.getNumRegisters(Ty->getContext(), ValueVT);
224 for (unsigned i = 0; i != NumRegs; ++i) {
225 unsigned R = CreateReg(RegisterVT);
226 if (!FirstReg) FirstReg = R;
232 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
233 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
234 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
235 /// the larger bit width by zero extension. The bit width must be no smaller
236 /// than the LiveOutInfo's existing bit width.
237 const FunctionLoweringInfo::LiveOutInfo *
238 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
239 if (!LiveOutRegInfo.inBounds(Reg))
242 LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
246 if (BitWidth > LOI->KnownZero.getBitWidth()) {
247 LOI->NumSignBits = 1;
248 LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
249 LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
255 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
256 /// register based on the LiveOutInfo of its operands.
257 void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
258 const Type *Ty = PN->getType();
259 if (!Ty->isIntegerTy() || Ty->isVectorTy())
262 SmallVector<EVT, 1> ValueVTs;
263 ComputeValueVTs(TLI, Ty, ValueVTs);
264 assert(ValueVTs.size() == 1 &&
265 "PHIs with non-vector integer types should have a single VT.");
266 EVT IntVT = ValueVTs[0];
268 if (TLI.getNumRegisters(PN->getContext(), IntVT) != 1)
270 IntVT = TLI.getTypeToTransformTo(PN->getContext(), IntVT);
271 unsigned BitWidth = IntVT.getSizeInBits();
273 unsigned DestReg = ValueMap[PN];
274 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
276 LiveOutRegInfo.grow(DestReg);
277 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
279 Value *V = PN->getIncomingValue(0);
280 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
281 DestLOI.NumSignBits = 1;
282 APInt Zero(BitWidth, 0);
283 DestLOI.KnownZero = Zero;
284 DestLOI.KnownOne = Zero;
288 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
289 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
290 DestLOI.NumSignBits = Val.getNumSignBits();
291 DestLOI.KnownZero = ~Val;
292 DestLOI.KnownOne = Val;
294 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
295 "CopyToReg node was created.");
296 unsigned SrcReg = ValueMap[V];
297 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
298 DestLOI.IsValid = false;
301 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
303 DestLOI.IsValid = false;
309 assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
310 DestLOI.KnownOne.getBitWidth() == BitWidth &&
311 "Masks should have the same bit width as the type.");
313 for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
314 Value *V = PN->getIncomingValue(i);
315 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
316 DestLOI.NumSignBits = 1;
317 APInt Zero(BitWidth, 0);
318 DestLOI.KnownZero = Zero;
319 DestLOI.KnownOne = Zero;
323 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
324 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
325 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
326 DestLOI.KnownZero &= ~Val;
327 DestLOI.KnownOne &= Val;
331 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
332 "its CopyToReg node was created.");
333 unsigned SrcReg = ValueMap[V];
334 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
335 DestLOI.IsValid = false;
338 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
340 DestLOI.IsValid = false;
343 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
344 DestLOI.KnownZero &= SrcLOI->KnownZero;
345 DestLOI.KnownOne &= SrcLOI->KnownOne;
349 /// setByValArgumentFrameIndex - Record frame index for the byval
350 /// argument. This overrides previous frame index entry for this argument,
352 void FunctionLoweringInfo::setByValArgumentFrameIndex(const Argument *A,
354 assert (A->hasByValAttr() && "Argument does not have byval attribute!");
355 ByValArgFrameIndexMap[A] = FI;
358 /// getByValArgumentFrameIndex - Get frame index for the byval argument.
359 /// If the argument does not have any assigned frame index then 0 is
361 int FunctionLoweringInfo::getByValArgumentFrameIndex(const Argument *A) {
362 assert (A->hasByValAttr() && "Argument does not have byval attribute!");
363 DenseMap<const Argument *, int>::iterator I =
364 ByValArgFrameIndexMap.find(A);
365 if (I != ByValArgFrameIndexMap.end())
367 DEBUG(dbgs() << "Argument does not have assigned frame index!");
371 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
372 /// call, and add them to the specified machine basic block.
373 void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
374 MachineBasicBlock *MBB) {
375 // Inform the MachineModuleInfo of the personality for this landing pad.
376 const ConstantExpr *CE = cast<ConstantExpr>(I.getArgOperand(1));
377 assert(CE->getOpcode() == Instruction::BitCast &&
378 isa<Function>(CE->getOperand(0)) &&
379 "Personality should be a function");
380 MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
382 // Gather all the type infos for this landing pad and pass them along to
383 // MachineModuleInfo.
384 std::vector<const GlobalVariable *> TyInfo;
385 unsigned N = I.getNumArgOperands();
387 for (unsigned i = N - 1; i > 1; --i) {
388 if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(i))) {
389 unsigned FilterLength = CI->getZExtValue();
390 unsigned FirstCatch = i + FilterLength + !FilterLength;
391 assert(FirstCatch <= N && "Invalid filter length");
393 if (FirstCatch < N) {
394 TyInfo.reserve(N - FirstCatch);
395 for (unsigned j = FirstCatch; j < N; ++j)
396 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
397 MMI->addCatchTypeInfo(MBB, TyInfo);
403 MMI->addCleanup(MBB);
406 TyInfo.reserve(FilterLength - 1);
407 for (unsigned j = i + 1; j < FirstCatch; ++j)
408 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
409 MMI->addFilterTypeInfo(MBB, TyInfo);
418 TyInfo.reserve(N - 2);
419 for (unsigned j = 2; j < N; ++j)
420 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
421 MMI->addCatchTypeInfo(MBB, TyInfo);
425 void llvm::CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
426 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI) {
427 SmallPtrSet<const BasicBlock*, 4> Visited;
429 // The 'eh.selector' call may not be in the direct successor of a basic block,
430 // but could be several successors deeper. If we don't find it, try going one
431 // level further. <rdar://problem/8824861>
432 while (Visited.insert(SuccBB)) {
433 for (BasicBlock::const_iterator I = SuccBB->begin(), E = --SuccBB->end();
435 if (const EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
436 // Apply the catch info to LPad.
437 AddCatchInfo(*EHSel, MMI, FLI.MBBMap[LPad]);
439 if (!FLI.MBBMap[SuccBB]->isLandingPad())
440 FLI.CatchInfoFound.insert(EHSel);
445 const BranchInst *Br = dyn_cast<BranchInst>(SuccBB->getTerminator());
446 if (Br && Br->isUnconditional())
447 SuccBB = Br->getSuccessor(0);