1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef FUNCTIONLOWERINGINFO_H
16 #define FUNCTIONLOWERINGINFO_H
18 #include "llvm/InlineAsm.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/ADT/APInt.h"
21 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/CodeGen/ValueTypes.h"
26 #include "llvm/CodeGen/ISDOpcodes.h"
37 class MachineBasicBlock;
38 class MachineFunction;
39 class MachineModuleInfo;
40 class MachineRegisterInfo;
44 //===--------------------------------------------------------------------===//
45 /// FunctionLoweringInfo - This contains information that is global to a
46 /// function that is used when lowering a region of the function.
48 class FunctionLoweringInfo {
53 MachineRegisterInfo *RegInfo;
55 /// CanLowerReturn - true iff the function's return value can be lowered to
59 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
60 /// allocated to hold a pointer to the hidden sret parameter.
61 unsigned DemoteRegister;
63 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
64 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
66 /// ValueMap - Since we emit code for the function a basic block at a time,
67 /// we must remember which virtual registers hold the values for
68 /// cross-basic-block values.
69 DenseMap<const Value*, unsigned> ValueMap;
71 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
72 /// the entry block. This allows the allocas to be efficiently referenced
73 /// anywhere in the function.
74 DenseMap<const AllocaInst*, int> StaticAllocaMap;
77 SmallSet<const Instruction *, 8> CatchInfoLost;
78 SmallSet<const Instruction *, 8> CatchInfoFound;
83 APInt KnownOne, KnownZero;
84 LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
87 /// LiveOutRegInfo - Information about live out vregs, indexed by their
88 /// register number offset by 'FirstVirtualRegister'.
89 std::vector<LiveOutInfo> LiveOutRegInfo;
91 explicit FunctionLoweringInfo(TargetLowering &TLI);
93 /// set - Initialize this FunctionLoweringInfo with the given Function
94 /// and its associated MachineFunction.
96 void set(const Function &Fn, MachineFunction &MF, bool EnableFastISel);
98 /// clear - Clear out all the function-specific state. This returns this
99 /// FunctionLoweringInfo to an empty state, ready to be used for a
100 /// different function.
103 unsigned MakeReg(EVT VT);
105 /// isExportedInst - Return true if the specified value is an instruction
106 /// exported from its block.
107 bool isExportedInst(const Value *V) {
108 return ValueMap.count(V);
111 unsigned CreateRegForValue(const Value *V);
113 unsigned InitializeRegForValue(const Value *V) {
114 unsigned &R = ValueMap[V];
115 assert(R == 0 && "Already initialized this value register!");
116 return R = CreateRegForValue(V);
120 /// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence
121 /// of insertvalue or extractvalue indices that identify a member, return
122 /// the linearized index of the start of the member.
124 unsigned ComputeLinearIndex(const TargetLowering &TLI, const Type *Ty,
125 const unsigned *Indices,
126 const unsigned *IndicesEnd,
127 unsigned CurIndex = 0);
129 /// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
130 /// EVTs that represent all the individual underlying
131 /// non-aggregate types that comprise it.
133 /// If Offsets is non-null, it points to a vector to be filled in
134 /// with the in-memory offsets of each of the individual values.
136 void ComputeValueVTs(const TargetLowering &TLI, const Type *Ty,
137 SmallVectorImpl<EVT> &ValueVTs,
138 SmallVectorImpl<uint64_t> *Offsets = 0,
139 uint64_t StartingOffset = 0);
141 /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
142 GlobalVariable *ExtractTypeInfo(Value *V);
144 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
145 /// call, and add them to the specified machine basic block.
146 void AddCatchInfo(const CallInst &I,
147 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
149 /// CopyCatchInfo - Copy catch information from DestBB to SrcBB.
150 void CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
151 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
153 /// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
154 /// processed uses a memory 'm' constraint.
155 bool hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
156 const TargetLowering &TLI);
158 /// getFCmpCondCode - Return the ISD condition code corresponding to
159 /// the given LLVM IR floating-point condition code. This includes
160 /// consideration of global floating-point math flags.
162 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
164 /// getICmpCondCode - Return the ISD condition code corresponding to
165 /// the given LLVM IR integer condition code.
167 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
169 } // end namespace llvm