1 //===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the SelectionDAG::Legalize method.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/CodeGen/MachineConstantPool.h"
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/Target/TargetLowering.h"
19 #include "llvm/Target/TargetData.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Constants.h"
25 //===----------------------------------------------------------------------===//
26 /// SelectionDAGLegalize - This takes an arbitrary SelectionDAG as input and
27 /// hacks on it until the target machine can handle it. This involves
28 /// eliminating value sizes the machine cannot handle (promoting small sizes to
29 /// large sizes or splitting up large values into small values) as well as
30 /// eliminating operations the machine cannot handle.
32 /// This code also does a small amount of optimization and recognition of idioms
33 /// as part of its processing. For example, if a target does not support a
34 /// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
35 /// will attempt merge setcc and brc instructions into brcc's.
38 class SelectionDAGLegalize {
42 /// LegalizeAction - This enum indicates what action we should take for each
43 /// value type the can occur in the program.
45 Legal, // The target natively supports this value type.
46 Promote, // This should be promoted to the next larger type.
47 Expand, // This integer type should be broken into smaller pieces.
50 /// ValueTypeActions - This is a bitvector that contains two bits for each
51 /// value type, where the two bits correspond to the LegalizeAction enum.
52 /// This can be queried with "getTypeAction(VT)".
53 unsigned ValueTypeActions;
55 /// NeedsAnotherIteration - This is set when we expand a large integer
56 /// operation into smaller integer operations, but the smaller operations are
57 /// not set. This occurs only rarely in practice, for targets that don't have
58 /// 32-bit or larger integer registers.
59 bool NeedsAnotherIteration;
61 /// LegalizedNodes - For nodes that are of legal width, and that have more
62 /// than one use, this map indicates what regularized operand to use. This
63 /// allows us to avoid legalizing the same thing more than once.
64 std::map<SDOperand, SDOperand> LegalizedNodes;
66 /// PromotedNodes - For nodes that are below legal width, and that have more
67 /// than one use, this map indicates what promoted value to use. This allows
68 /// us to avoid promoting the same thing more than once.
69 std::map<SDOperand, SDOperand> PromotedNodes;
71 /// ExpandedNodes - For nodes that need to be expanded, and which have more
72 /// than one use, this map indicates which which operands are the expanded
73 /// version of the input. This allows us to avoid expanding the same node
75 std::map<SDOperand, std::pair<SDOperand, SDOperand> > ExpandedNodes;
77 void AddLegalizedOperand(SDOperand From, SDOperand To) {
78 bool isNew = LegalizedNodes.insert(std::make_pair(From, To)).second;
79 assert(isNew && "Got into the map somehow?");
81 void AddPromotedOperand(SDOperand From, SDOperand To) {
82 bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
83 assert(isNew && "Got into the map somehow?");
88 SelectionDAGLegalize(SelectionDAG &DAG);
90 /// Run - While there is still lowering to do, perform a pass over the DAG.
91 /// Most regularization can be done in a single pass, but targets that require
92 /// large values to be split into registers multiple times (e.g. i64 -> 4x
93 /// i16) require iteration for these values (the first iteration will demote
94 /// to i32, the second will demote to i16).
97 NeedsAnotherIteration = false;
99 } while (NeedsAnotherIteration);
102 /// getTypeAction - Return how we should legalize values of this type, either
103 /// it is already legal or we need to expand it into multiple registers of
104 /// smaller integer type, or we need to promote it to a larger type.
105 LegalizeAction getTypeAction(MVT::ValueType VT) const {
106 return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3);
109 /// isTypeLegal - Return true if this type is legal on this target.
111 bool isTypeLegal(MVT::ValueType VT) const {
112 return getTypeAction(VT) == Legal;
118 SDOperand LegalizeOp(SDOperand O);
119 void ExpandOp(SDOperand O, SDOperand &Lo, SDOperand &Hi);
120 SDOperand PromoteOp(SDOperand O);
122 SDOperand ExpandLibCall(const char *Name, SDNode *Node,
124 SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy,
126 bool ExpandShift(unsigned Opc, SDOperand Op, SDOperand Amt,
127 SDOperand &Lo, SDOperand &Hi);
128 void ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt,
129 SDOperand &Lo, SDOperand &Hi);
130 void ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
131 SDOperand &Lo, SDOperand &Hi);
133 SDOperand getIntPtrConstant(uint64_t Val) {
134 return DAG.getConstant(Val, TLI.getPointerTy());
140 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
141 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
142 ValueTypeActions(TLI.getValueTypeActions()) {
143 assert(MVT::LAST_VALUETYPE <= 16 &&
144 "Too many value types for ValueTypeActions to hold!");
147 void SelectionDAGLegalize::LegalizeDAG() {
148 SDOperand OldRoot = DAG.getRoot();
149 SDOperand NewRoot = LegalizeOp(OldRoot);
150 DAG.setRoot(NewRoot);
152 ExpandedNodes.clear();
153 LegalizedNodes.clear();
154 PromotedNodes.clear();
156 // Remove dead nodes now.
157 DAG.RemoveDeadNodes(OldRoot.Val);
160 SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
161 assert(getTypeAction(Op.getValueType()) == Legal &&
162 "Caller should expand or promote operands that are not legal!");
164 // If this operation defines any values that cannot be represented in a
165 // register on this target, make sure to expand or promote them.
166 if (Op.Val->getNumValues() > 1) {
167 for (unsigned i = 0, e = Op.Val->getNumValues(); i != e; ++i)
168 switch (getTypeAction(Op.Val->getValueType(i))) {
169 case Legal: break; // Nothing to do.
172 ExpandOp(Op.getValue(i), T1, T2);
173 assert(LegalizedNodes.count(Op) &&
174 "Expansion didn't add legal operands!");
175 return LegalizedNodes[Op];
178 PromoteOp(Op.getValue(i));
179 assert(LegalizedNodes.count(Op) &&
180 "Expansion didn't add legal operands!");
181 return LegalizedNodes[Op];
185 std::map<SDOperand, SDOperand>::iterator I = LegalizedNodes.find(Op);
186 if (I != LegalizedNodes.end()) return I->second;
188 SDOperand Tmp1, Tmp2, Tmp3;
190 SDOperand Result = Op;
191 SDNode *Node = Op.Val;
193 switch (Node->getOpcode()) {
195 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
196 assert(0 && "Do not know how to legalize this operator!");
198 case ISD::EntryToken:
199 case ISD::FrameIndex:
200 case ISD::GlobalAddress:
201 case ISD::ExternalSymbol:
202 case ISD::ConstantPool: // Nothing to do.
203 assert(getTypeAction(Node->getValueType(0)) == Legal &&
204 "This must be legal!");
206 case ISD::CopyFromReg:
207 Tmp1 = LegalizeOp(Node->getOperand(0));
208 if (Tmp1 != Node->getOperand(0))
209 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(),
210 Node->getValueType(0), Tmp1);
212 Result = Op.getValue(0);
214 // Since CopyFromReg produces two values, make sure to remember that we
215 // legalized both of them.
216 AddLegalizedOperand(Op.getValue(0), Result);
217 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
218 return Result.getValue(Op.ResNo);
219 case ISD::ImplicitDef:
220 Tmp1 = LegalizeOp(Node->getOperand(0));
221 if (Tmp1 != Node->getOperand(0))
222 Result = DAG.getImplicitDef(Tmp1, cast<RegSDNode>(Node)->getReg());
225 MVT::ValueType VT = Op.getValueType();
226 switch (TLI.getOperationAction(ISD::UNDEF, VT)) {
227 default: assert(0 && "This action is not supported yet!");
228 case TargetLowering::Expand:
229 case TargetLowering::Promote:
230 if (MVT::isInteger(VT))
231 Result = DAG.getConstant(0, VT);
232 else if (MVT::isFloatingPoint(VT))
233 Result = DAG.getConstantFP(0, VT);
235 assert(0 && "Unknown value type!");
237 case TargetLowering::Legal:
243 // We know we don't need to expand constants here, constants only have one
244 // value and we check that it is fine above.
246 // FIXME: Maybe we should handle things like targets that don't support full
247 // 32-bit immediates?
249 case ISD::ConstantFP: {
250 // Spill FP immediates to the constant pool if the target cannot directly
251 // codegen them. Targets often have some immediate values that can be
252 // efficiently generated into an FP register without a load. We explicitly
253 // leave these constants as ConstantFP nodes for the target to deal with.
255 ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
257 // Check to see if this FP immediate is already legal.
258 bool isLegal = false;
259 for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(),
260 E = TLI.legal_fpimm_end(); I != E; ++I)
261 if (CFP->isExactlyValue(*I)) {
267 // Otherwise we need to spill the constant to memory.
268 MachineConstantPool *CP = DAG.getMachineFunction().getConstantPool();
272 // If a FP immediate is precise when represented as a float, we put it
273 // into the constant pool as a float, even if it's is statically typed
275 MVT::ValueType VT = CFP->getValueType(0);
276 bool isDouble = VT == MVT::f64;
277 ConstantFP *LLVMC = ConstantFP::get(isDouble ? Type::DoubleTy :
278 Type::FloatTy, CFP->getValue());
279 if (isDouble && CFP->isExactlyValue((float)CFP->getValue()) &&
280 // Only do this if the target has a native EXTLOAD instruction from
282 TLI.getOperationAction(ISD::EXTLOAD,
283 MVT::f32) == TargetLowering::Legal) {
284 LLVMC = cast<ConstantFP>(ConstantExpr::getCast(LLVMC, Type::FloatTy));
289 SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(LLVMC),
292 Result = DAG.getNode(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), CPIdx,
295 Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx);
300 case ISD::TokenFactor: {
301 std::vector<SDOperand> Ops;
302 bool Changed = false;
303 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
304 SDOperand Op = Node->getOperand(i);
305 // Fold single-use TokenFactor nodes into this token factor as we go.
306 if (Op.getOpcode() == ISD::TokenFactor && Op.hasOneUse()) {
308 for (unsigned j = 0, e = Op.getNumOperands(); j != e; ++j)
309 Ops.push_back(LegalizeOp(Op.getOperand(j)));
311 Ops.push_back(LegalizeOp(Op)); // Legalize the operands
312 Changed |= Ops[i] != Op;
316 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Ops);
320 case ISD::ADJCALLSTACKDOWN:
321 case ISD::ADJCALLSTACKUP:
322 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
323 // There is no need to legalize the size argument (Operand #1)
324 if (Tmp1 != Node->getOperand(0))
325 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1,
326 Node->getOperand(1));
328 case ISD::DYNAMIC_STACKALLOC:
329 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
330 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size.
331 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment.
332 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
333 Tmp3 != Node->getOperand(2))
334 Result = DAG.getNode(ISD::DYNAMIC_STACKALLOC, Node->getValueType(0),
337 Result = Op.getValue(0);
339 // Since this op produces two values, make sure to remember that we
340 // legalized both of them.
341 AddLegalizedOperand(SDOperand(Node, 0), Result);
342 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
343 return Result.getValue(Op.ResNo);
346 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
347 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
349 bool Changed = false;
350 std::vector<SDOperand> Ops;
351 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
352 Ops.push_back(LegalizeOp(Node->getOperand(i)));
353 Changed |= Ops.back() != Node->getOperand(i);
356 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Changed) {
357 std::vector<MVT::ValueType> RetTyVTs;
358 RetTyVTs.reserve(Node->getNumValues());
359 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
360 RetTyVTs.push_back(Node->getValueType(i));
361 Result = SDOperand(DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops), 0);
363 Result = Result.getValue(0);
365 // Since calls produce multiple values, make sure to remember that we
366 // legalized all of them.
367 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
368 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
369 return Result.getValue(Op.ResNo);
372 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
373 if (Tmp1 != Node->getOperand(0))
374 Result = DAG.getNode(ISD::BR, MVT::Other, Tmp1, Node->getOperand(1));
378 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
380 switch (getTypeAction(Node->getOperand(1).getValueType())) {
381 case Expand: assert(0 && "It's impossible to expand bools");
383 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition.
386 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
389 // Basic block destination (Op#2) is always legal.
390 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
391 Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2,
392 Node->getOperand(2));
394 case ISD::BRCONDTWOWAY:
395 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
396 switch (getTypeAction(Node->getOperand(1).getValueType())) {
397 case Expand: assert(0 && "It's impossible to expand bools");
399 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition.
402 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
405 // If this target does not support BRCONDTWOWAY, lower it to a BRCOND/BR
407 switch (TLI.getOperationAction(ISD::BRCONDTWOWAY, MVT::Other)) {
408 case TargetLowering::Promote:
409 default: assert(0 && "This action is not supported yet!");
410 case TargetLowering::Legal:
411 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) {
412 std::vector<SDOperand> Ops;
415 Ops.push_back(Node->getOperand(2));
416 Ops.push_back(Node->getOperand(3));
417 Result = DAG.getNode(ISD::BRCONDTWOWAY, MVT::Other, Ops);
420 case TargetLowering::Expand:
421 Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2,
422 Node->getOperand(2));
423 Result = DAG.getNode(ISD::BR, MVT::Other, Result, Node->getOperand(3));
429 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
430 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
431 if (Tmp1 != Node->getOperand(0) ||
432 Tmp2 != Node->getOperand(1))
433 Result = DAG.getLoad(Node->getValueType(0), Tmp1, Tmp2);
435 Result = SDOperand(Node, 0);
437 // Since loads produce two values, make sure to remember that we legalized
439 AddLegalizedOperand(SDOperand(Node, 0), Result);
440 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
441 return Result.getValue(Op.ResNo);
446 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
447 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
448 if (Tmp1 != Node->getOperand(0) ||
449 Tmp2 != Node->getOperand(1))
450 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, Tmp2,
451 cast<MVTSDNode>(Node)->getExtraValueType());
453 Result = SDOperand(Node, 0);
455 // Since loads produce two values, make sure to remember that we legalized
457 AddLegalizedOperand(SDOperand(Node, 0), Result);
458 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
459 return Result.getValue(Op.ResNo);
461 case ISD::EXTRACT_ELEMENT:
462 // Get both the low and high parts.
463 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
464 if (cast<ConstantSDNode>(Node->getOperand(1))->getValue())
465 Result = Tmp2; // 1 -> Hi
467 Result = Tmp1; // 0 -> Lo
471 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
473 switch (getTypeAction(Node->getOperand(1).getValueType())) {
475 // Legalize the incoming value (must be legal).
476 Tmp2 = LegalizeOp(Node->getOperand(1));
477 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
478 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
481 Tmp2 = PromoteOp(Node->getOperand(1));
482 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
486 ExpandOp(Node->getOperand(1), Lo, Hi);
487 unsigned Reg = cast<RegSDNode>(Node)->getReg();
488 Lo = DAG.getCopyToReg(Tmp1, Lo, Reg);
489 Hi = DAG.getCopyToReg(Tmp1, Hi, Reg+1);
490 // Note that the copytoreg nodes are independent of each other.
491 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
492 assert(isTypeLegal(Result.getValueType()) &&
493 "Cannot expand multiple times yet (i64 -> i16)");
499 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
500 switch (Node->getNumOperands()) {
502 switch (getTypeAction(Node->getOperand(1).getValueType())) {
504 Tmp2 = LegalizeOp(Node->getOperand(1));
505 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
506 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
510 ExpandOp(Node->getOperand(1), Lo, Hi);
511 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi);
515 Tmp2 = PromoteOp(Node->getOperand(1));
516 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
521 if (Tmp1 != Node->getOperand(0))
522 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1);
524 default: { // ret <values>
525 std::vector<SDOperand> NewValues;
526 NewValues.push_back(Tmp1);
527 for (unsigned i = 1, e = Node->getNumOperands(); i != e; ++i)
528 switch (getTypeAction(Node->getOperand(i).getValueType())) {
530 NewValues.push_back(LegalizeOp(Node->getOperand(i)));
534 ExpandOp(Node->getOperand(i), Lo, Hi);
535 NewValues.push_back(Lo);
536 NewValues.push_back(Hi);
540 assert(0 && "Can't promote multiple return value yet!");
542 Result = DAG.getNode(ISD::RET, MVT::Other, NewValues);
548 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
549 Tmp2 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
551 // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
552 if (ConstantFPSDNode *CFP =dyn_cast<ConstantFPSDNode>(Node->getOperand(1))){
553 if (CFP->getValueType(0) == MVT::f32) {
558 V.F = CFP->getValue();
559 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
560 DAG.getConstant(V.I, MVT::i32), Tmp2);
562 assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
567 V.F = CFP->getValue();
568 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
569 DAG.getConstant(V.I, MVT::i64), Tmp2);
574 switch (getTypeAction(Node->getOperand(1).getValueType())) {
576 SDOperand Val = LegalizeOp(Node->getOperand(1));
577 if (Val != Node->getOperand(1) || Tmp1 != Node->getOperand(0) ||
578 Tmp2 != Node->getOperand(2))
579 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Val, Tmp2);
583 // Truncate the value and store the result.
584 Tmp3 = PromoteOp(Node->getOperand(1));
585 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp3, Tmp2,
586 Node->getOperand(1).getValueType());
591 ExpandOp(Node->getOperand(1), Lo, Hi);
593 if (!TLI.isLittleEndian())
596 Lo = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Lo, Tmp2);
598 unsigned IncrementSize = MVT::getSizeInBits(Hi.getValueType())/8;
599 Tmp2 = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2,
600 getIntPtrConstant(IncrementSize));
601 assert(isTypeLegal(Tmp2.getValueType()) &&
602 "Pointers must be legal!");
603 Hi = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Hi, Tmp2);
604 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
609 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
610 if (Tmp1 != Node->getOperand(0))
611 Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1,Node->getOperand(1));
613 case ISD::TRUNCSTORE:
614 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
615 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
617 switch (getTypeAction(Node->getOperand(1).getValueType())) {
619 Tmp2 = LegalizeOp(Node->getOperand(1));
620 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
621 Tmp3 != Node->getOperand(2))
622 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3,
623 cast<MVTSDNode>(Node)->getExtraValueType());
627 assert(0 && "Cannot handle illegal TRUNCSTORE yet!");
631 switch (getTypeAction(Node->getOperand(0).getValueType())) {
632 case Expand: assert(0 && "It's impossible to expand bools");
634 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
637 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
640 Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal
641 Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal
643 switch (TLI.getOperationAction(Node->getOpcode(), Tmp2.getValueType())) {
644 default: assert(0 && "This action is not supported yet!");
645 case TargetLowering::Legal:
646 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
647 Tmp3 != Node->getOperand(2))
648 Result = DAG.getNode(ISD::SELECT, Node->getValueType(0),
651 case TargetLowering::Promote: {
653 TLI.getTypeToPromoteTo(ISD::SELECT, Tmp2.getValueType());
654 unsigned ExtOp, TruncOp;
655 if (MVT::isInteger(Tmp2.getValueType())) {
656 ExtOp = ISD::ZERO_EXTEND;
657 TruncOp = ISD::TRUNCATE;
659 ExtOp = ISD::FP_EXTEND;
660 TruncOp = ISD::FP_ROUND;
662 // Promote each of the values to the new type.
663 Tmp2 = DAG.getNode(ExtOp, NVT, Tmp2);
664 Tmp3 = DAG.getNode(ExtOp, NVT, Tmp3);
665 // Perform the larger operation, then round down.
666 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2,Tmp3);
667 Result = DAG.getNode(TruncOp, Node->getValueType(0), Result);
673 switch (getTypeAction(Node->getOperand(0).getValueType())) {
675 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
676 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
677 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
678 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
679 Node->getValueType(0), Tmp1, Tmp2);
682 Tmp1 = PromoteOp(Node->getOperand(0)); // LHS
683 Tmp2 = PromoteOp(Node->getOperand(1)); // RHS
685 // If this is an FP compare, the operands have already been extended.
686 if (MVT::isInteger(Node->getOperand(0).getValueType())) {
687 MVT::ValueType VT = Node->getOperand(0).getValueType();
688 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
690 // Otherwise, we have to insert explicit sign or zero extends. Note
691 // that we could insert sign extends for ALL conditions, but zero extend
692 // is cheaper on many machines (an AND instead of two shifts), so prefer
694 switch (cast<SetCCSDNode>(Node)->getCondition()) {
695 default: assert(0 && "Unknown integer comparison!");
702 // ALL of these operations will work if we either sign or zero extend
703 // the operands (including the unsigned comparisons!). Zero extend is
704 // usually a simpler/cheaper operation, so prefer it.
705 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
706 Tmp2 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp2, VT);
712 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
713 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2, VT);
718 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
719 Node->getValueType(0), Tmp1, Tmp2);
722 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
723 ExpandOp(Node->getOperand(0), LHSLo, LHSHi);
724 ExpandOp(Node->getOperand(1), RHSLo, RHSHi);
725 switch (cast<SetCCSDNode>(Node)->getCondition()) {
728 Tmp1 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSLo, RHSLo);
729 Tmp2 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSHi, RHSHi);
730 Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2);
731 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
732 Node->getValueType(0), Tmp1,
733 DAG.getConstant(0, Tmp1.getValueType()));
736 // FIXME: This generated code sucks.
738 switch (cast<SetCCSDNode>(Node)->getCondition()) {
739 default: assert(0 && "Unknown integer setcc!");
741 case ISD::SETULT: LowCC = ISD::SETULT; break;
743 case ISD::SETUGT: LowCC = ISD::SETUGT; break;
745 case ISD::SETULE: LowCC = ISD::SETULE; break;
747 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
750 // Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison
751 // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands
752 // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
754 // NOTE: on targets without efficient SELECT of bools, we can always use
755 // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
756 Tmp1 = DAG.getSetCC(LowCC, Node->getValueType(0), LHSLo, RHSLo);
757 Tmp2 = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
758 Node->getValueType(0), LHSHi, RHSHi);
759 Result = DAG.getSetCC(ISD::SETEQ, Node->getValueType(0), LHSHi, RHSHi);
760 Result = DAG.getNode(ISD::SELECT, Tmp1.getValueType(),
770 Tmp1 = LegalizeOp(Node->getOperand(0)); // Chain
771 Tmp2 = LegalizeOp(Node->getOperand(1)); // Pointer
773 if (Node->getOpcode() == ISD::MEMSET) { // memset = ubyte
774 switch (getTypeAction(Node->getOperand(2).getValueType())) {
775 case Expand: assert(0 && "Cannot expand a byte!");
777 Tmp3 = LegalizeOp(Node->getOperand(2));
780 Tmp3 = PromoteOp(Node->getOperand(2));
784 Tmp3 = LegalizeOp(Node->getOperand(2)); // memcpy/move = pointer,
788 switch (getTypeAction(Node->getOperand(3).getValueType())) {
789 case Expand: assert(0 && "Cannot expand this yet!");
791 Tmp4 = LegalizeOp(Node->getOperand(3));
794 Tmp4 = PromoteOp(Node->getOperand(3));
799 switch (getTypeAction(Node->getOperand(4).getValueType())) { // uint
800 case Expand: assert(0 && "Cannot expand this yet!");
802 Tmp5 = LegalizeOp(Node->getOperand(4));
805 Tmp5 = PromoteOp(Node->getOperand(4));
809 switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) {
810 default: assert(0 && "This action not implemented for this operation!");
811 case TargetLowering::Legal:
812 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
813 Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3) ||
814 Tmp5 != Node->getOperand(4)) {
815 std::vector<SDOperand> Ops;
816 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
817 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
818 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
821 case TargetLowering::Expand: {
822 // Otherwise, the target does not support this operation. Lower the
823 // operation to an explicit libcall as appropriate.
824 MVT::ValueType IntPtr = TLI.getPointerTy();
825 const Type *IntPtrTy = TLI.getTargetData().getIntPtrType();
826 std::vector<std::pair<SDOperand, const Type*> > Args;
828 const char *FnName = 0;
829 if (Node->getOpcode() == ISD::MEMSET) {
830 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
831 // Extend the ubyte argument to be an int value for the call.
832 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3);
833 Args.push_back(std::make_pair(Tmp3, Type::IntTy));
834 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
837 } else if (Node->getOpcode() == ISD::MEMCPY ||
838 Node->getOpcode() == ISD::MEMMOVE) {
839 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
840 Args.push_back(std::make_pair(Tmp3, IntPtrTy));
841 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
842 FnName = Node->getOpcode() == ISD::MEMMOVE ? "memmove" : "memcpy";
844 assert(0 && "Unknown op!");
846 std::pair<SDOperand,SDOperand> CallResult =
847 TLI.LowerCallTo(Tmp1, Type::VoidTy, false,
848 DAG.getExternalSymbol(FnName, IntPtr), Args, DAG);
849 Result = LegalizeOp(CallResult.second);
852 case TargetLowering::Custom:
853 std::vector<SDOperand> Ops;
854 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
855 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
856 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
857 Result = TLI.LowerOperation(Result);
858 Result = LegalizeOp(Result);
867 case ISD::SRL_PARTS: {
868 std::vector<SDOperand> Ops;
869 bool Changed = false;
870 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
871 Ops.push_back(LegalizeOp(Node->getOperand(i)));
872 Changed |= Ops.back() != Node->getOperand(i);
875 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Ops);
877 // Since these produce multiple values, make sure to remember that we
878 // legalized all of them.
879 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
880 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
881 return Result.getValue(Op.ResNo);
896 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
897 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
898 if (Tmp1 != Node->getOperand(0) ||
899 Tmp2 != Node->getOperand(1))
900 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2);
905 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
906 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
907 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
908 case TargetLowering::Legal:
909 if (Tmp1 != Node->getOperand(0) ||
910 Tmp2 != Node->getOperand(1))
911 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
914 case TargetLowering::Promote:
915 case TargetLowering::Custom:
916 assert(0 && "Cannot promote/custom handle this yet!");
917 case TargetLowering::Expand: {
918 MVT::ValueType VT = Node->getValueType(0);
919 unsigned Opc = (Node->getOpcode() == ISD::UREM) ? ISD::UDIV : ISD::SDIV;
920 Result = DAG.getNode(Opc, VT, Tmp1, Tmp2);
921 Result = DAG.getNode(ISD::MUL, VT, Result, Tmp2);
922 Result = DAG.getNode(ISD::SUB, VT, Tmp1, Result);
931 Tmp1 = LegalizeOp(Node->getOperand(0));
932 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
933 case TargetLowering::Legal:
934 if (Tmp1 != Node->getOperand(0))
935 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
937 case TargetLowering::Promote:
938 case TargetLowering::Custom:
939 assert(0 && "Cannot promote/custom handle this yet!");
940 case TargetLowering::Expand:
941 if (Node->getOpcode() == ISD::FNEG) {
942 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
943 Tmp2 = DAG.getConstantFP(-0.0, Node->getValueType(0));
944 Result = LegalizeOp(DAG.getNode(ISD::SUB, Node->getValueType(0),
946 } else if (Node->getOpcode() == ISD::FABS) {
947 // Expand Y = FABS(X) -> Y = (X >u 0.0) ? X : fneg(X).
948 MVT::ValueType VT = Node->getValueType(0);
949 Tmp2 = DAG.getConstantFP(0.0, VT);
950 Tmp2 = DAG.getSetCC(ISD::SETUGT, TLI.getSetCCResultTy(), Tmp1, Tmp2);
951 Tmp3 = DAG.getNode(ISD::FNEG, VT, Tmp1);
952 Result = DAG.getNode(ISD::SELECT, VT, Tmp2, Tmp1, Tmp3);
953 Result = LegalizeOp(Result);
955 assert(0 && "Unreachable!");
961 // Conversion operators. The source and destination have different types.
962 case ISD::ZERO_EXTEND:
963 case ISD::SIGN_EXTEND:
967 case ISD::FP_TO_SINT:
968 case ISD::FP_TO_UINT:
969 case ISD::SINT_TO_FP:
970 case ISD::UINT_TO_FP:
971 switch (getTypeAction(Node->getOperand(0).getValueType())) {
973 Tmp1 = LegalizeOp(Node->getOperand(0));
974 if (Tmp1 != Node->getOperand(0))
975 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
978 if (Node->getOpcode() == ISD::SINT_TO_FP ||
979 Node->getOpcode() == ISD::UINT_TO_FP) {
980 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP,
981 Node->getValueType(0), Node->getOperand(0));
982 Result = LegalizeOp(Result);
984 } else if (Node->getOpcode() == ISD::TRUNCATE) {
985 // In the expand case, we must be dealing with a truncate, because
986 // otherwise the result would be larger than the source.
987 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
989 // Since the result is legal, we should just be able to truncate the low
990 // part of the source.
991 Result = DAG.getNode(ISD::TRUNCATE, Node->getValueType(0), Tmp1);
994 assert(0 && "Shouldn't need to expand other operators here!");
997 switch (Node->getOpcode()) {
998 case ISD::ZERO_EXTEND:
999 Result = PromoteOp(Node->getOperand(0));
1000 // NOTE: Any extend would work here...
1001 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
1002 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Op.getValueType(),
1003 Result, Node->getOperand(0).getValueType());
1005 case ISD::SIGN_EXTEND:
1006 Result = PromoteOp(Node->getOperand(0));
1007 // NOTE: Any extend would work here...
1008 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
1009 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1010 Result, Node->getOperand(0).getValueType());
1013 Result = PromoteOp(Node->getOperand(0));
1014 Result = DAG.getNode(ISD::TRUNCATE, Op.getValueType(), Result);
1016 case ISD::FP_EXTEND:
1017 Result = PromoteOp(Node->getOperand(0));
1018 if (Result.getValueType() != Op.getValueType())
1019 // Dynamically dead while we have only 2 FP types.
1020 Result = DAG.getNode(ISD::FP_EXTEND, Op.getValueType(), Result);
1023 case ISD::FP_TO_SINT:
1024 case ISD::FP_TO_UINT:
1025 Result = PromoteOp(Node->getOperand(0));
1026 Result = DAG.getNode(Node->getOpcode(), Op.getValueType(), Result);
1028 case ISD::SINT_TO_FP:
1029 Result = PromoteOp(Node->getOperand(0));
1030 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1031 Result, Node->getOperand(0).getValueType());
1032 Result = DAG.getNode(ISD::SINT_TO_FP, Op.getValueType(), Result);
1034 case ISD::UINT_TO_FP:
1035 Result = PromoteOp(Node->getOperand(0));
1036 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Result.getValueType(),
1037 Result, Node->getOperand(0).getValueType());
1038 Result = DAG.getNode(ISD::UINT_TO_FP, Op.getValueType(), Result);
1043 case ISD::FP_ROUND_INREG:
1044 case ISD::SIGN_EXTEND_INREG:
1045 case ISD::ZERO_EXTEND_INREG: {
1046 Tmp1 = LegalizeOp(Node->getOperand(0));
1047 MVT::ValueType ExtraVT = cast<MVTSDNode>(Node)->getExtraValueType();
1049 // If this operation is not supported, convert it to a shl/shr or load/store
1051 switch (TLI.getOperationAction(Node->getOpcode(), ExtraVT)) {
1052 default: assert(0 && "This action not supported for this op yet!");
1053 case TargetLowering::Legal:
1054 if (Tmp1 != Node->getOperand(0))
1055 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
1058 case TargetLowering::Expand:
1059 // If this is an integer extend and shifts are supported, do that.
1060 if (Node->getOpcode() == ISD::ZERO_EXTEND_INREG) {
1061 // NOTE: we could fall back on load/store here too for targets without
1062 // AND. However, it is doubtful that any exist.
1063 // AND out the appropriate bits.
1065 DAG.getConstant((1ULL << MVT::getSizeInBits(ExtraVT))-1,
1066 Node->getValueType(0));
1067 Result = DAG.getNode(ISD::AND, Node->getValueType(0),
1068 Node->getOperand(0), Mask);
1069 } else if (Node->getOpcode() == ISD::SIGN_EXTEND_INREG) {
1070 // NOTE: we could fall back on load/store here too for targets without
1071 // SAR. However, it is doubtful that any exist.
1072 unsigned BitsDiff = MVT::getSizeInBits(Node->getValueType(0)) -
1073 MVT::getSizeInBits(ExtraVT);
1074 SDOperand ShiftCst = DAG.getConstant(BitsDiff, TLI.getShiftAmountTy());
1075 Result = DAG.getNode(ISD::SHL, Node->getValueType(0),
1076 Node->getOperand(0), ShiftCst);
1077 Result = DAG.getNode(ISD::SRA, Node->getValueType(0),
1079 } else if (Node->getOpcode() == ISD::FP_ROUND_INREG) {
1080 // The only way we can lower this is to turn it into a STORETRUNC,
1081 // EXTLOAD pair, targetting a temporary location (a stack slot).
1083 // NOTE: there is a choice here between constantly creating new stack
1084 // slots and always reusing the same one. We currently always create
1085 // new ones, as reuse may inhibit scheduling.
1086 const Type *Ty = MVT::getTypeForValueType(ExtraVT);
1087 unsigned TySize = (unsigned)TLI.getTargetData().getTypeSize(Ty);
1088 unsigned Align = TLI.getTargetData().getTypeAlignment(Ty);
1089 MachineFunction &MF = DAG.getMachineFunction();
1091 MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
1092 SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
1093 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, DAG.getEntryNode(),
1094 Node->getOperand(0), StackSlot, ExtraVT);
1095 Result = DAG.getNode(ISD::EXTLOAD, Node->getValueType(0),
1096 Result, StackSlot, ExtraVT);
1098 assert(0 && "Unknown op");
1100 Result = LegalizeOp(Result);
1107 if (!Op.Val->hasOneUse())
1108 AddLegalizedOperand(Op, Result);
1113 /// PromoteOp - Given an operation that produces a value in an invalid type,
1114 /// promote it to compute the value into a larger type. The produced value will
1115 /// have the correct bits for the low portion of the register, but no guarantee
1116 /// is made about the top bits: it may be zero, sign-extended, or garbage.
1117 SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
1118 MVT::ValueType VT = Op.getValueType();
1119 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1120 assert(getTypeAction(VT) == Promote &&
1121 "Caller should expand or legalize operands that are not promotable!");
1122 assert(NVT > VT && MVT::isInteger(NVT) == MVT::isInteger(VT) &&
1123 "Cannot promote to smaller type!");
1125 std::map<SDOperand, SDOperand>::iterator I = PromotedNodes.find(Op);
1126 if (I != PromotedNodes.end()) return I->second;
1128 SDOperand Tmp1, Tmp2, Tmp3;
1131 SDNode *Node = Op.Val;
1133 // Promotion needs an optimization step to clean up after it, and is not
1134 // careful to avoid operations the target does not support. Make sure that
1135 // all generated operations are legalized in the next iteration.
1136 NeedsAnotherIteration = true;
1138 switch (Node->getOpcode()) {
1140 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
1141 assert(0 && "Do not know how to promote this operator!");
1144 Result = DAG.getNode(ISD::UNDEF, NVT);
1147 Result = DAG.getNode(ISD::ZERO_EXTEND, NVT, Op);
1148 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold zext?");
1150 case ISD::ConstantFP:
1151 Result = DAG.getNode(ISD::FP_EXTEND, NVT, Op);
1152 assert(isa<ConstantFPSDNode>(Result) && "Didn't constant fold fp_extend?");
1154 case ISD::CopyFromReg:
1155 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(), NVT,
1156 Node->getOperand(0));
1157 // Remember that we legalized the chain.
1158 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1162 assert(getTypeAction(TLI.getSetCCResultTy()) == Legal &&
1163 "SetCC type is not legal??");
1164 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1165 TLI.getSetCCResultTy(), Node->getOperand(0),
1166 Node->getOperand(1));
1167 Result = LegalizeOp(Result);
1171 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1173 Result = LegalizeOp(Node->getOperand(0));
1174 assert(Result.getValueType() >= NVT &&
1175 "This truncation doesn't make sense!");
1176 if (Result.getValueType() > NVT) // Truncate to NVT instead of VT
1177 Result = DAG.getNode(ISD::TRUNCATE, NVT, Result);
1180 // The truncation is not required, because we don't guarantee anything
1181 // about high bits anyway.
1182 Result = PromoteOp(Node->getOperand(0));
1185 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
1186 // Truncate the low part of the expanded value to the result type
1187 Result = DAG.getNode(ISD::TRUNCATE, VT, Tmp1);
1190 case ISD::SIGN_EXTEND:
1191 case ISD::ZERO_EXTEND:
1192 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1193 case Expand: assert(0 && "BUG: Smaller reg should have been promoted!");
1195 // Input is legal? Just do extend all the way to the larger type.
1196 Result = LegalizeOp(Node->getOperand(0));
1197 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1200 // Promote the reg if it's smaller.
1201 Result = PromoteOp(Node->getOperand(0));
1202 // The high bits are not guaranteed to be anything. Insert an extend.
1203 if (Node->getOpcode() == ISD::SIGN_EXTEND)
1204 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Result,
1205 Node->getOperand(0).getValueType());
1207 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Result,
1208 Node->getOperand(0).getValueType());
1213 case ISD::FP_EXTEND:
1214 assert(0 && "Case not implemented. Dynamically dead with 2 FP types!");
1216 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1217 case Expand: assert(0 && "BUG: Cannot expand FP regs!");
1218 case Promote: assert(0 && "Unreachable with 2 FP types!");
1220 // Input is legal? Do an FP_ROUND_INREG.
1221 Result = LegalizeOp(Node->getOperand(0));
1222 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1227 case ISD::SINT_TO_FP:
1228 case ISD::UINT_TO_FP:
1229 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1231 Result = LegalizeOp(Node->getOperand(0));
1232 // No extra round required here.
1233 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1237 Result = PromoteOp(Node->getOperand(0));
1238 if (Node->getOpcode() == ISD::SINT_TO_FP)
1239 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1240 Result, Node->getOperand(0).getValueType());
1242 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Result.getValueType(),
1243 Result, Node->getOperand(0).getValueType());
1244 // No extra round required here.
1245 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1248 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, NVT,
1249 Node->getOperand(0));
1250 Result = LegalizeOp(Result);
1252 // Round if we cannot tolerate excess precision.
1253 if (NoExcessFPPrecision)
1254 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1259 case ISD::FP_TO_SINT:
1260 case ISD::FP_TO_UINT:
1261 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1263 Tmp1 = LegalizeOp(Node->getOperand(0));
1266 // The input result is prerounded, so we don't have to do anything
1268 Tmp1 = PromoteOp(Node->getOperand(0));
1271 assert(0 && "not implemented");
1273 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1278 Tmp1 = PromoteOp(Node->getOperand(0));
1279 assert(Tmp1.getValueType() == NVT);
1280 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1281 // NOTE: we do not have to do any extra rounding here for
1282 // NoExcessFPPrecision, because we know the input will have the appropriate
1283 // precision, and these operations don't modify precision at all.
1292 // The input may have strange things in the top bits of the registers, but
1293 // these operations don't care. They may have wierd bits going out, but
1294 // that too is okay if they are integer operations.
1295 Tmp1 = PromoteOp(Node->getOperand(0));
1296 Tmp2 = PromoteOp(Node->getOperand(1));
1297 assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT);
1298 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1300 // However, if this is a floating point operation, they will give excess
1301 // precision that we may not be able to tolerate. If we DO allow excess
1302 // precision, just leave it, otherwise excise it.
1303 // FIXME: Why would we need to round FP ops more than integer ones?
1304 // Is Round(Add(Add(A,B),C)) != Round(Add(Round(Add(A,B)), C))
1305 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1306 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1311 // These operators require that their input be sign extended.
1312 Tmp1 = PromoteOp(Node->getOperand(0));
1313 Tmp2 = PromoteOp(Node->getOperand(1));
1314 if (MVT::isInteger(NVT)) {
1315 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
1316 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2, VT);
1318 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1320 // Perform FP_ROUND: this is probably overly pessimistic.
1321 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1322 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1327 // These operators require that their input be zero extended.
1328 Tmp1 = PromoteOp(Node->getOperand(0));
1329 Tmp2 = PromoteOp(Node->getOperand(1));
1330 assert(MVT::isInteger(NVT) && "Operators don't apply to FP!");
1331 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
1332 Tmp2 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp2, VT);
1333 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1337 Tmp1 = PromoteOp(Node->getOperand(0));
1338 Tmp2 = LegalizeOp(Node->getOperand(1));
1339 Result = DAG.getNode(ISD::SHL, NVT, Tmp1, Tmp2);
1342 // The input value must be properly sign extended.
1343 Tmp1 = PromoteOp(Node->getOperand(0));
1344 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
1345 Tmp2 = LegalizeOp(Node->getOperand(1));
1346 Result = DAG.getNode(ISD::SRA, NVT, Tmp1, Tmp2);
1349 // The input value must be properly zero extended.
1350 Tmp1 = PromoteOp(Node->getOperand(0));
1351 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
1352 Tmp2 = LegalizeOp(Node->getOperand(1));
1353 Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2);
1356 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1357 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
1358 Result = DAG.getNode(ISD::EXTLOAD, NVT, Tmp1, Tmp2, VT);
1360 // Remember that we legalized the chain.
1361 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1364 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1365 case Expand: assert(0 && "It's impossible to expand bools");
1367 Tmp1 = LegalizeOp(Node->getOperand(0));// Legalize the condition.
1370 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
1373 Tmp2 = PromoteOp(Node->getOperand(1)); // Legalize the op0
1374 Tmp3 = PromoteOp(Node->getOperand(2)); // Legalize the op1
1375 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2, Tmp3);
1378 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1379 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
1381 std::vector<SDOperand> Ops;
1382 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i)
1383 Ops.push_back(LegalizeOp(Node->getOperand(i)));
1385 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
1386 "Can only promote single result calls");
1387 std::vector<MVT::ValueType> RetTyVTs;
1388 RetTyVTs.reserve(2);
1389 RetTyVTs.push_back(NVT);
1390 RetTyVTs.push_back(MVT::Other);
1391 SDNode *NC = DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops);
1392 Result = SDOperand(NC, 0);
1394 // Insert the new chain mapping.
1395 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1400 assert(Result.Val && "Didn't set a result!");
1401 AddPromotedOperand(Op, Result);
1405 /// ExpandAddSub - Find a clever way to expand this add operation into
1407 void SelectionDAGLegalize::
1408 ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
1409 SDOperand &Lo, SDOperand &Hi) {
1410 // Expand the subcomponents.
1411 SDOperand LHSL, LHSH, RHSL, RHSH;
1412 ExpandOp(LHS, LHSL, LHSH);
1413 ExpandOp(RHS, RHSL, RHSH);
1415 // Convert this add to the appropriate ADDC pair. The low part has no carry
1417 std::vector<SDOperand> Ops;
1418 Ops.push_back(LHSL);
1419 Ops.push_back(LHSH);
1420 Ops.push_back(RHSL);
1421 Ops.push_back(RHSH);
1422 Lo = DAG.getNode(NodeOp, LHSL.getValueType(), Ops);
1423 Hi = Lo.getValue(1);
1426 void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
1427 SDOperand Op, SDOperand Amt,
1428 SDOperand &Lo, SDOperand &Hi) {
1429 // Expand the subcomponents.
1430 SDOperand LHSL, LHSH;
1431 ExpandOp(Op, LHSL, LHSH);
1433 std::vector<SDOperand> Ops;
1434 Ops.push_back(LHSL);
1435 Ops.push_back(LHSH);
1437 Lo = DAG.getNode(NodeOp, LHSL.getValueType(), Ops);
1438 Hi = Lo.getValue(1);
1442 /// ExpandShift - Try to find a clever way to expand this shift operation out to
1443 /// smaller elements. If we can't find a way that is more efficient than a
1444 /// libcall on this target, return false. Otherwise, return true with the
1445 /// low-parts expanded into Lo and Hi.
1446 bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
1447 SDOperand &Lo, SDOperand &Hi) {
1448 assert((Opc == ISD::SHL || Opc == ISD::SRA || Opc == ISD::SRL) &&
1449 "This is not a shift!");
1451 MVT::ValueType NVT = TLI.getTypeToTransformTo(Op.getValueType());
1452 SDOperand ShAmt = LegalizeOp(Amt);
1453 MVT::ValueType ShTy = ShAmt.getValueType();
1454 unsigned VTBits = MVT::getSizeInBits(Op.getValueType());
1455 unsigned NVTBits = MVT::getSizeInBits(NVT);
1457 // Handle the case when Amt is an immediate. Other cases are currently broken
1458 // and are disabled.
1459 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Amt.Val)) {
1460 unsigned Cst = CN->getValue();
1461 // Expand the incoming operand to be shifted, so that we have its parts
1463 ExpandOp(Op, InL, InH);
1467 Lo = DAG.getConstant(0, NVT);
1468 Hi = DAG.getConstant(0, NVT);
1469 } else if (Cst > NVTBits) {
1470 Lo = DAG.getConstant(0, NVT);
1471 Hi = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst-NVTBits,ShTy));
1473 Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst, ShTy));
1474 Hi = DAG.getNode(ISD::OR, NVT,
1475 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(Cst, ShTy)),
1476 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(NVTBits-Cst, ShTy)));
1481 Lo = DAG.getConstant(0, NVT);
1482 Hi = DAG.getConstant(0, NVT);
1483 } else if (Cst > NVTBits) {
1484 Lo = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst-NVTBits,ShTy));
1485 Hi = DAG.getConstant(0, NVT);
1487 Lo = DAG.getNode(ISD::OR, NVT,
1488 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),
1489 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(NVTBits-Cst, ShTy)));
1490 Hi = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst, ShTy));
1495 Hi = Lo = DAG.getNode(ISD::SRA, NVT, InH,
1496 DAG.getConstant(NVTBits-1, ShTy));
1497 } else if (Cst > NVTBits) {
1498 Lo = DAG.getNode(ISD::SRA, NVT, InH,
1499 DAG.getConstant(Cst-NVTBits, ShTy));
1500 Hi = DAG.getNode(ISD::SRA, NVT, InH,
1501 DAG.getConstant(NVTBits-1, ShTy));
1503 Lo = DAG.getNode(ISD::OR, NVT,
1504 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),
1505 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(NVTBits-Cst, ShTy)));
1506 Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(Cst, ShTy));
1511 // FIXME: The following code for expanding shifts using ISD::SELECT is buggy,
1512 // so disable it for now. Currently targets are handling this via SHL_PARTS
1516 // If we have an efficient select operation (or if the selects will all fold
1517 // away), lower to some complex code, otherwise just emit the libcall.
1518 if (TLI.getOperationAction(ISD::SELECT, NVT) != TargetLowering::Legal &&
1519 !isa<ConstantSDNode>(Amt))
1523 ExpandOp(Op, InL, InH);
1524 SDOperand NAmt = DAG.getNode(ISD::SUB, ShTy, // NAmt = 32-ShAmt
1525 DAG.getConstant(NVTBits, ShTy), ShAmt);
1527 // Compare the unmasked shift amount against 32.
1528 SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), ShAmt,
1529 DAG.getConstant(NVTBits, ShTy));
1531 if (TLI.getShiftAmountFlavor() != TargetLowering::Mask) {
1532 ShAmt = DAG.getNode(ISD::AND, ShTy, ShAmt, // ShAmt &= 31
1533 DAG.getConstant(NVTBits-1, ShTy));
1534 NAmt = DAG.getNode(ISD::AND, ShTy, NAmt, // NAmt &= 31
1535 DAG.getConstant(NVTBits-1, ShTy));
1538 if (Opc == ISD::SHL) {
1539 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << Amt) | (Lo >> NAmt)
1540 DAG.getNode(ISD::SHL, NVT, InH, ShAmt),
1541 DAG.getNode(ISD::SRL, NVT, InL, NAmt));
1542 SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31
1544 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
1545 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2);
1547 SDOperand HiLoPart = DAG.getNode(ISD::SELECT, NVT,
1548 DAG.getSetCC(ISD::SETEQ,
1549 TLI.getSetCCResultTy(), NAmt,
1550 DAG.getConstant(32, ShTy)),
1551 DAG.getConstant(0, NVT),
1552 DAG.getNode(ISD::SHL, NVT, InH, NAmt));
1553 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << NAmt) | (Lo >> Amt)
1555 DAG.getNode(ISD::SRL, NVT, InL, ShAmt));
1556 SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt); // T2 = InH >> ShAmt&31
1559 if (Opc == ISD::SRA)
1560 HiPart = DAG.getNode(ISD::SRA, NVT, InH,
1561 DAG.getConstant(NVTBits-1, ShTy));
1563 HiPart = DAG.getConstant(0, NVT);
1564 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
1565 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart, T2);
1570 /// FindLatestAdjCallStackDown - Scan up the dag to find the latest (highest
1571 /// NodeDepth) node that is an AdjCallStackDown operation and occurs later than
1573 static void FindLatestAdjCallStackDown(SDNode *Node, SDNode *&Found) {
1574 if (Node->getNodeDepth() <= Found->getNodeDepth()) return;
1576 // If we found an ADJCALLSTACKDOWN, we already know this node occurs later
1577 // than the Found node. Just remember this node and return.
1578 if (Node->getOpcode() == ISD::ADJCALLSTACKDOWN) {
1583 // Otherwise, scan the operands of Node to see if any of them is a call.
1584 assert(Node->getNumOperands() != 0 &&
1585 "All leaves should have depth equal to the entry node!");
1586 for (unsigned i = 0, e = Node->getNumOperands()-1; i != e; ++i)
1587 FindLatestAdjCallStackDown(Node->getOperand(i).Val, Found);
1589 // Tail recurse for the last iteration.
1590 FindLatestAdjCallStackDown(Node->getOperand(Node->getNumOperands()-1).Val,
1595 /// FindEarliestAdjCallStackUp - Scan down the dag to find the earliest (lowest
1596 /// NodeDepth) node that is an AdjCallStackUp operation and occurs more recent
1598 static void FindEarliestAdjCallStackUp(SDNode *Node, SDNode *&Found) {
1599 if (Found && Node->getNodeDepth() >= Found->getNodeDepth()) return;
1601 // If we found an ADJCALLSTACKUP, we already know this node occurs earlier
1602 // than the Found node. Just remember this node and return.
1603 if (Node->getOpcode() == ISD::ADJCALLSTACKUP) {
1608 // Otherwise, scan the operands of Node to see if any of them is a call.
1609 SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
1610 if (UI == E) return;
1611 for (--E; UI != E; ++UI)
1612 FindEarliestAdjCallStackUp(*UI, Found);
1614 // Tail recurse for the last iteration.
1615 FindEarliestAdjCallStackUp(*UI, Found);
1618 /// FindAdjCallStackUp - Given a chained node that is part of a call sequence,
1619 /// find the ADJCALLSTACKUP node that terminates the call sequence.
1620 static SDNode *FindAdjCallStackUp(SDNode *Node) {
1621 if (Node->getOpcode() == ISD::ADJCALLSTACKUP)
1623 if (Node->use_empty())
1624 return 0; // No adjcallstackup
1626 if (Node->hasOneUse()) // Simple case, only has one user to check.
1627 return FindAdjCallStackUp(*Node->use_begin());
1629 SDOperand TheChain(Node, Node->getNumValues()-1);
1630 assert(TheChain.getValueType() == MVT::Other && "Is not a token chain!");
1632 for (SDNode::use_iterator UI = Node->use_begin(),
1633 E = Node->use_end(); ; ++UI) {
1634 assert(UI != E && "Didn't find a user of the tokchain, no ADJCALLSTACKUP!");
1636 // Make sure to only follow users of our token chain.
1638 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
1639 if (User->getOperand(i) == TheChain)
1640 return FindAdjCallStackUp(User);
1642 assert(0 && "Unreachable");
1646 /// FindInputOutputChains - If we are replacing an operation with a call we need
1647 /// to find the call that occurs before and the call that occurs after it to
1648 /// properly serialize the calls in the block.
1649 static SDOperand FindInputOutputChains(SDNode *OpNode, SDNode *&OutChain,
1651 SDNode *LatestAdjCallStackDown = Entry.Val;
1652 FindLatestAdjCallStackDown(OpNode, LatestAdjCallStackDown);
1653 //std::cerr << "Found node: "; LatestAdjCallStackDown->dump(); std::cerr <<"\n";
1655 SDNode *LatestAdjCallStackUp = FindAdjCallStackUp(LatestAdjCallStackDown);
1658 SDNode *EarliestAdjCallStackUp = 0;
1659 FindEarliestAdjCallStackUp(OpNode, EarliestAdjCallStackUp);
1661 if (EarliestAdjCallStackUp) {
1662 //std::cerr << "Found node: ";
1663 //EarliestAdjCallStackUp->dump(); std::cerr <<"\n";
1666 return SDOperand(LatestAdjCallStackUp, 0);
1671 // ExpandLibCall - Expand a node into a call to a libcall. If the result value
1672 // does not fit into a register, return the lo part and set the hi part to the
1673 // by-reg argument. If it does fit into a single register, return the result
1674 // and leave the Hi part unset.
1675 SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node,
1678 SDOperand InChain = FindInputOutputChains(Node, OutChain,
1679 DAG.getEntryNode());
1680 if (InChain.Val == 0)
1681 InChain = DAG.getEntryNode();
1683 TargetLowering::ArgListTy Args;
1684 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
1685 MVT::ValueType ArgVT = Node->getOperand(i).getValueType();
1686 const Type *ArgTy = MVT::getTypeForValueType(ArgVT);
1687 Args.push_back(std::make_pair(Node->getOperand(i), ArgTy));
1689 SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy());
1691 // We don't care about token chains for libcalls. We just use the entry
1692 // node as our input and ignore the output chain. This allows us to place
1693 // calls wherever we need them to satisfy data dependences.
1694 const Type *RetTy = MVT::getTypeForValueType(Node->getValueType(0));
1695 SDOperand Result = TLI.LowerCallTo(InChain, RetTy, false, Callee,
1697 switch (getTypeAction(Result.getValueType())) {
1698 default: assert(0 && "Unknown thing");
1702 assert(0 && "Cannot promote this yet!");
1705 ExpandOp(Result, Lo, Hi);
1711 /// ExpandIntToFP - Expand a [US]INT_TO_FP operation, assuming that the
1712 /// destination type is legal.
1713 SDOperand SelectionDAGLegalize::
1714 ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
1715 assert(getTypeAction(DestTy) == Legal && "Destination type is not legal!");
1716 assert(getTypeAction(Source.getValueType()) == Expand &&
1717 "This is not an expansion!");
1718 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
1721 SDOperand InChain = FindInputOutputChains(Source.Val, OutChain,
1722 DAG.getEntryNode());
1724 const char *FnName = 0;
1726 if (DestTy == MVT::f32)
1727 FnName = "__floatdisf";
1729 assert(DestTy == MVT::f64 && "Unknown fp value type!");
1730 FnName = "__floatdidf";
1733 // If this is unsigned, and not supported, first perform the conversion to
1734 // signed, then adjust the result if the sign bit is set.
1735 SDOperand SignedConv = ExpandIntToFP(false, DestTy, Source);
1737 assert(0 && "Unsigned casts not supported yet!");
1739 SDOperand Callee = DAG.getExternalSymbol(FnName, TLI.getPointerTy());
1741 TargetLowering::ArgListTy Args;
1742 const Type *ArgTy = MVT::getTypeForValueType(Source.getValueType());
1743 Args.push_back(std::make_pair(Source, ArgTy));
1745 // We don't care about token chains for libcalls. We just use the entry
1746 // node as our input and ignore the output chain. This allows us to place
1747 // calls wherever we need them to satisfy data dependences.
1748 const Type *RetTy = MVT::getTypeForValueType(DestTy);
1749 return TLI.LowerCallTo(InChain, RetTy, false, Callee, Args, DAG).first;
1755 /// ExpandOp - Expand the specified SDOperand into its two component pieces
1756 /// Lo&Hi. Note that the Op MUST be an expanded type. As a result of this, the
1757 /// LegalizeNodes map is filled in for any results that are not expanded, the
1758 /// ExpandedNodes map is filled in for any results that are expanded, and the
1759 /// Lo/Hi values are returned.
1760 void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
1761 MVT::ValueType VT = Op.getValueType();
1762 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1763 SDNode *Node = Op.Val;
1764 assert(getTypeAction(VT) == Expand && "Not an expanded type!");
1765 assert(MVT::isInteger(VT) && "Cannot expand FP values!");
1766 assert(MVT::isInteger(NVT) && NVT < VT &&
1767 "Cannot expand to FP value or to larger int value!");
1769 // If there is more than one use of this, see if we already expanded it.
1770 // There is no use remembering values that only have a single use, as the map
1771 // entries will never be reused.
1772 if (!Node->hasOneUse()) {
1773 std::map<SDOperand, std::pair<SDOperand, SDOperand> >::iterator I
1774 = ExpandedNodes.find(Op);
1775 if (I != ExpandedNodes.end()) {
1776 Lo = I->second.first;
1777 Hi = I->second.second;
1782 // Expanding to multiple registers needs to perform an optimization step, and
1783 // is not careful to avoid operations the target does not support. Make sure
1784 // that all generated operations are legalized in the next iteration.
1785 NeedsAnotherIteration = true;
1787 switch (Node->getOpcode()) {
1789 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
1790 assert(0 && "Do not know how to expand this operator!");
1793 Lo = DAG.getNode(ISD::UNDEF, NVT);
1794 Hi = DAG.getNode(ISD::UNDEF, NVT);
1796 case ISD::Constant: {
1797 uint64_t Cst = cast<ConstantSDNode>(Node)->getValue();
1798 Lo = DAG.getConstant(Cst, NVT);
1799 Hi = DAG.getConstant(Cst >> MVT::getSizeInBits(NVT), NVT);
1803 case ISD::CopyFromReg: {
1804 unsigned Reg = cast<RegSDNode>(Node)->getReg();
1805 // Aggregate register values are always in consequtive pairs.
1806 Lo = DAG.getCopyFromReg(Reg, NVT, Node->getOperand(0));
1807 Hi = DAG.getCopyFromReg(Reg+1, NVT, Lo.getValue(1));
1809 // Remember that we legalized the chain.
1810 AddLegalizedOperand(Op.getValue(1), Hi.getValue(1));
1812 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
1816 case ISD::BUILD_PAIR:
1817 // Legalize both operands. FIXME: in the future we should handle the case
1818 // where the two elements are not legal.
1819 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
1820 Lo = LegalizeOp(Node->getOperand(0));
1821 Hi = LegalizeOp(Node->getOperand(1));
1825 SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1826 SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
1827 Lo = DAG.getLoad(NVT, Ch, Ptr);
1829 // Increment the pointer to the other half.
1830 unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8;
1831 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
1832 getIntPtrConstant(IncrementSize));
1833 Hi = DAG.getLoad(NVT, Ch, Ptr);
1835 // Build a factor node to remember that this load is independent of the
1837 SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
1840 // Remember that we legalized the chain.
1841 AddLegalizedOperand(Op.getValue(1), TF);
1842 if (!TLI.isLittleEndian())
1847 SDOperand Chain = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1848 SDOperand Callee = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
1850 bool Changed = false;
1851 std::vector<SDOperand> Ops;
1852 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
1853 Ops.push_back(LegalizeOp(Node->getOperand(i)));
1854 Changed |= Ops.back() != Node->getOperand(i);
1857 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
1858 "Can only expand a call once so far, not i64 -> i16!");
1860 std::vector<MVT::ValueType> RetTyVTs;
1861 RetTyVTs.reserve(3);
1862 RetTyVTs.push_back(NVT);
1863 RetTyVTs.push_back(NVT);
1864 RetTyVTs.push_back(MVT::Other);
1865 SDNode *NC = DAG.getCall(RetTyVTs, Chain, Callee, Ops);
1866 Lo = SDOperand(NC, 0);
1867 Hi = SDOperand(NC, 1);
1869 // Insert the new chain mapping.
1870 AddLegalizedOperand(Op.getValue(1), Hi.getValue(2));
1875 case ISD::XOR: { // Simple logical operators -> two trivial pieces.
1876 SDOperand LL, LH, RL, RH;
1877 ExpandOp(Node->getOperand(0), LL, LH);
1878 ExpandOp(Node->getOperand(1), RL, RH);
1879 Lo = DAG.getNode(Node->getOpcode(), NVT, LL, RL);
1880 Hi = DAG.getNode(Node->getOpcode(), NVT, LH, RH);
1884 SDOperand C, LL, LH, RL, RH;
1886 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1887 case Expand: assert(0 && "It's impossible to expand bools");
1889 C = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
1892 C = PromoteOp(Node->getOperand(0)); // Promote the condition.
1895 ExpandOp(Node->getOperand(1), LL, LH);
1896 ExpandOp(Node->getOperand(2), RL, RH);
1897 Lo = DAG.getNode(ISD::SELECT, NVT, C, LL, RL);
1898 Hi = DAG.getNode(ISD::SELECT, NVT, C, LH, RH);
1901 case ISD::SIGN_EXTEND: {
1903 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1904 case Expand: assert(0 && "expand-expand not implemented yet!");
1905 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
1907 In = PromoteOp(Node->getOperand(0));
1908 // Emit the appropriate sign_extend_inreg to get the value we want.
1909 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(), In,
1910 Node->getOperand(0).getValueType());
1914 // The low part is just a sign extension of the input (which degenerates to
1916 Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In);
1918 // The high part is obtained by SRA'ing all but one of the bits of the lo
1920 unsigned LoSize = MVT::getSizeInBits(Lo.getValueType());
1921 Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1,
1922 TLI.getShiftAmountTy()));
1925 case ISD::ZERO_EXTEND: {
1927 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1928 case Expand: assert(0 && "expand-expand not implemented yet!");
1929 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
1931 In = PromoteOp(Node->getOperand(0));
1932 // Emit the appropriate zero_extend_inreg to get the value we want.
1933 In = DAG.getNode(ISD::ZERO_EXTEND_INREG, In.getValueType(), In,
1934 Node->getOperand(0).getValueType());
1938 // The low part is just a zero extension of the input (which degenerates to
1940 Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, LegalizeOp(Node->getOperand(0)));
1942 // The high part is just a zero.
1943 Hi = DAG.getConstant(0, NVT);
1946 // These operators cannot be expanded directly, emit them as calls to
1947 // library functions.
1948 case ISD::FP_TO_SINT:
1949 if (Node->getOperand(0).getValueType() == MVT::f32)
1950 Lo = ExpandLibCall("__fixsfdi", Node, Hi);
1952 Lo = ExpandLibCall("__fixdfdi", Node, Hi);
1954 case ISD::FP_TO_UINT:
1955 if (Node->getOperand(0).getValueType() == MVT::f32)
1956 Lo = ExpandLibCall("__fixunssfdi", Node, Hi);
1958 Lo = ExpandLibCall("__fixunsdfdi", Node, Hi);
1962 // If we can emit an efficient shift operation, do so now.
1963 if (ExpandShift(ISD::SHL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1966 // If this target supports SHL_PARTS, use it.
1967 if (TLI.getOperationAction(ISD::SHL_PARTS, NVT) == TargetLowering::Legal) {
1968 ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), Node->getOperand(1),
1973 // Otherwise, emit a libcall.
1974 Lo = ExpandLibCall("__ashldi3", Node, Hi);
1978 // If we can emit an efficient shift operation, do so now.
1979 if (ExpandShift(ISD::SRA, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1982 // If this target supports SRA_PARTS, use it.
1983 if (TLI.getOperationAction(ISD::SRA_PARTS, NVT) == TargetLowering::Legal) {
1984 ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), Node->getOperand(1),
1989 // Otherwise, emit a libcall.
1990 Lo = ExpandLibCall("__ashrdi3", Node, Hi);
1993 // If we can emit an efficient shift operation, do so now.
1994 if (ExpandShift(ISD::SRL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1997 // If this target supports SRL_PARTS, use it.
1998 if (TLI.getOperationAction(ISD::SRL_PARTS, NVT) == TargetLowering::Legal) {
1999 ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), Node->getOperand(1),
2004 // Otherwise, emit a libcall.
2005 Lo = ExpandLibCall("__lshrdi3", Node, Hi);
2009 ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1),
2013 ExpandByParts(ISD::SUB_PARTS, Node->getOperand(0), Node->getOperand(1),
2016 case ISD::MUL: Lo = ExpandLibCall("__muldi3" , Node, Hi); break;
2017 case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, Hi); break;
2018 case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break;
2019 case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break;
2020 case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break;
2023 // Remember in a map if the values will be reused later.
2024 if (!Node->hasOneUse()) {
2025 bool isNew = ExpandedNodes.insert(std::make_pair(Op,
2026 std::make_pair(Lo, Hi))).second;
2027 assert(isNew && "Value already expanded?!?");
2032 // SelectionDAG::Legalize - This is the entry point for the file.
2034 void SelectionDAG::Legalize() {
2035 /// run - This is the main entry point to this class.
2037 SelectionDAGLegalize(*this).Run();