1 //===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the SelectionDAG::Legalize method.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/CodeGen/MachineConstantPool.h"
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/Target/TargetLowering.h"
19 #include "llvm/Target/TargetData.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Constants.h"
25 //===----------------------------------------------------------------------===//
26 /// SelectionDAGLegalize - This takes an arbitrary SelectionDAG as input and
27 /// hacks on it until the target machine can handle it. This involves
28 /// eliminating value sizes the machine cannot handle (promoting small sizes to
29 /// large sizes or splitting up large values into small values) as well as
30 /// eliminating operations the machine cannot handle.
32 /// This code also does a small amount of optimization and recognition of idioms
33 /// as part of its processing. For example, if a target does not support a
34 /// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
35 /// will attempt merge setcc and brc instructions into brcc's.
38 class SelectionDAGLegalize {
42 /// LegalizeAction - This enum indicates what action we should take for each
43 /// value type the can occur in the program.
45 Legal, // The target natively supports this value type.
46 Promote, // This should be promoted to the next larger type.
47 Expand, // This integer type should be broken into smaller pieces.
50 /// ValueTypeActions - This is a bitvector that contains two bits for each
51 /// value type, where the two bits correspond to the LegalizeAction enum.
52 /// This can be queried with "getTypeAction(VT)".
53 unsigned ValueTypeActions;
55 /// NeedsAnotherIteration - This is set when we expand a large integer
56 /// operation into smaller integer operations, but the smaller operations are
57 /// not set. This occurs only rarely in practice, for targets that don't have
58 /// 32-bit or larger integer registers.
59 bool NeedsAnotherIteration;
61 /// LegalizedNodes - For nodes that are of legal width, and that have more
62 /// than one use, this map indicates what regularized operand to use. This
63 /// allows us to avoid legalizing the same thing more than once.
64 std::map<SDOperand, SDOperand> LegalizedNodes;
66 /// PromotedNodes - For nodes that are below legal width, and that have more
67 /// than one use, this map indicates what promoted value to use. This allows
68 /// us to avoid promoting the same thing more than once.
69 std::map<SDOperand, SDOperand> PromotedNodes;
71 /// ExpandedNodes - For nodes that need to be expanded, and which have more
72 /// than one use, this map indicates which which operands are the expanded
73 /// version of the input. This allows us to avoid expanding the same node
75 std::map<SDOperand, std::pair<SDOperand, SDOperand> > ExpandedNodes;
77 void AddLegalizedOperand(SDOperand From, SDOperand To) {
78 bool isNew = LegalizedNodes.insert(std::make_pair(From, To)).second;
79 assert(isNew && "Got into the map somehow?");
81 void AddPromotedOperand(SDOperand From, SDOperand To) {
82 bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
83 assert(isNew && "Got into the map somehow?");
88 SelectionDAGLegalize(SelectionDAG &DAG);
90 /// Run - While there is still lowering to do, perform a pass over the DAG.
91 /// Most regularization can be done in a single pass, but targets that require
92 /// large values to be split into registers multiple times (e.g. i64 -> 4x
93 /// i16) require iteration for these values (the first iteration will demote
94 /// to i32, the second will demote to i16).
97 NeedsAnotherIteration = false;
99 } while (NeedsAnotherIteration);
102 /// getTypeAction - Return how we should legalize values of this type, either
103 /// it is already legal or we need to expand it into multiple registers of
104 /// smaller integer type, or we need to promote it to a larger type.
105 LegalizeAction getTypeAction(MVT::ValueType VT) const {
106 return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3);
109 /// isTypeLegal - Return true if this type is legal on this target.
111 bool isTypeLegal(MVT::ValueType VT) const {
112 return getTypeAction(VT) == Legal;
118 SDOperand LegalizeOp(SDOperand O);
119 void ExpandOp(SDOperand O, SDOperand &Lo, SDOperand &Hi);
120 SDOperand PromoteOp(SDOperand O);
122 SDOperand ExpandLibCall(const char *Name, SDNode *Node,
124 SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy,
126 bool ExpandShift(unsigned Opc, SDOperand Op, SDOperand Amt,
127 SDOperand &Lo, SDOperand &Hi);
128 void ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt,
129 SDOperand &Lo, SDOperand &Hi);
130 void ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
131 SDOperand &Lo, SDOperand &Hi);
133 SDOperand getIntPtrConstant(uint64_t Val) {
134 return DAG.getConstant(Val, TLI.getPointerTy());
140 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
141 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
142 ValueTypeActions(TLI.getValueTypeActions()) {
143 assert(MVT::LAST_VALUETYPE <= 16 &&
144 "Too many value types for ValueTypeActions to hold!");
147 void SelectionDAGLegalize::LegalizeDAG() {
148 SDOperand OldRoot = DAG.getRoot();
149 SDOperand NewRoot = LegalizeOp(OldRoot);
150 DAG.setRoot(NewRoot);
152 ExpandedNodes.clear();
153 LegalizedNodes.clear();
154 PromotedNodes.clear();
156 // Remove dead nodes now.
157 DAG.RemoveDeadNodes(OldRoot.Val);
160 SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
161 assert(getTypeAction(Op.getValueType()) == Legal &&
162 "Caller should expand or promote operands that are not legal!");
164 // If this operation defines any values that cannot be represented in a
165 // register on this target, make sure to expand or promote them.
166 if (Op.Val->getNumValues() > 1) {
167 for (unsigned i = 0, e = Op.Val->getNumValues(); i != e; ++i)
168 switch (getTypeAction(Op.Val->getValueType(i))) {
169 case Legal: break; // Nothing to do.
172 ExpandOp(Op.getValue(i), T1, T2);
173 assert(LegalizedNodes.count(Op) &&
174 "Expansion didn't add legal operands!");
175 return LegalizedNodes[Op];
178 PromoteOp(Op.getValue(i));
179 assert(LegalizedNodes.count(Op) &&
180 "Expansion didn't add legal operands!");
181 return LegalizedNodes[Op];
185 std::map<SDOperand, SDOperand>::iterator I = LegalizedNodes.find(Op);
186 if (I != LegalizedNodes.end()) return I->second;
188 SDOperand Tmp1, Tmp2, Tmp3;
190 SDOperand Result = Op;
191 SDNode *Node = Op.Val;
193 switch (Node->getOpcode()) {
195 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
196 assert(0 && "Do not know how to legalize this operator!");
198 case ISD::EntryToken:
199 case ISD::FrameIndex:
200 case ISD::GlobalAddress:
201 case ISD::ExternalSymbol:
202 case ISD::ConstantPool: // Nothing to do.
203 assert(getTypeAction(Node->getValueType(0)) == Legal &&
204 "This must be legal!");
206 case ISD::CopyFromReg:
207 Tmp1 = LegalizeOp(Node->getOperand(0));
208 if (Tmp1 != Node->getOperand(0))
209 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(),
210 Node->getValueType(0), Tmp1);
212 Result = Op.getValue(0);
214 // Since CopyFromReg produces two values, make sure to remember that we
215 // legalized both of them.
216 AddLegalizedOperand(Op.getValue(0), Result);
217 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
218 return Result.getValue(Op.ResNo);
219 case ISD::ImplicitDef:
220 Tmp1 = LegalizeOp(Node->getOperand(0));
221 if (Tmp1 != Node->getOperand(0))
222 Result = DAG.getImplicitDef(Tmp1, cast<RegSDNode>(Node)->getReg());
225 MVT::ValueType VT = Op.getValueType();
226 switch (TLI.getOperationAction(ISD::UNDEF, VT)) {
227 default: assert(0 && "This action is not supported yet!");
228 case TargetLowering::Expand:
229 case TargetLowering::Promote:
230 if (MVT::isInteger(VT))
231 Result = DAG.getConstant(0, VT);
232 else if (MVT::isFloatingPoint(VT))
233 Result = DAG.getConstantFP(0, VT);
235 assert(0 && "Unknown value type!");
237 case TargetLowering::Legal:
243 // We know we don't need to expand constants here, constants only have one
244 // value and we check that it is fine above.
246 // FIXME: Maybe we should handle things like targets that don't support full
247 // 32-bit immediates?
249 case ISD::ConstantFP: {
250 // Spill FP immediates to the constant pool if the target cannot directly
251 // codegen them. Targets often have some immediate values that can be
252 // efficiently generated into an FP register without a load. We explicitly
253 // leave these constants as ConstantFP nodes for the target to deal with.
255 ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
257 // Check to see if this FP immediate is already legal.
258 bool isLegal = false;
259 for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(),
260 E = TLI.legal_fpimm_end(); I != E; ++I)
261 if (CFP->isExactlyValue(*I)) {
267 // Otherwise we need to spill the constant to memory.
268 MachineConstantPool *CP = DAG.getMachineFunction().getConstantPool();
272 // If a FP immediate is precise when represented as a float, we put it
273 // into the constant pool as a float, even if it's is statically typed
275 MVT::ValueType VT = CFP->getValueType(0);
276 bool isDouble = VT == MVT::f64;
277 ConstantFP *LLVMC = ConstantFP::get(isDouble ? Type::DoubleTy :
278 Type::FloatTy, CFP->getValue());
279 if (isDouble && CFP->isExactlyValue((float)CFP->getValue()) &&
280 // Only do this if the target has a native EXTLOAD instruction from
282 TLI.getOperationAction(ISD::EXTLOAD,
283 MVT::f32) == TargetLowering::Legal) {
284 LLVMC = cast<ConstantFP>(ConstantExpr::getCast(LLVMC, Type::FloatTy));
289 SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(LLVMC),
292 Result = DAG.getNode(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), CPIdx,
295 Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx);
300 case ISD::TokenFactor: {
301 std::vector<SDOperand> Ops;
302 bool Changed = false;
303 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
304 SDOperand Op = Node->getOperand(i);
305 // Fold single-use TokenFactor nodes into this token factor as we go.
306 if (Op.getOpcode() == ISD::TokenFactor && Op.hasOneUse()) {
308 for (unsigned j = 0, e = Op.getNumOperands(); j != e; ++j)
309 Ops.push_back(LegalizeOp(Op.getOperand(j)));
311 Ops.push_back(LegalizeOp(Op)); // Legalize the operands
312 Changed |= Ops[i] != Op;
316 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Ops);
320 case ISD::ADJCALLSTACKDOWN:
321 case ISD::ADJCALLSTACKUP:
322 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
323 // There is no need to legalize the size argument (Operand #1)
324 if (Tmp1 != Node->getOperand(0))
325 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1,
326 Node->getOperand(1));
328 case ISD::DYNAMIC_STACKALLOC:
329 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
330 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size.
331 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment.
332 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
333 Tmp3 != Node->getOperand(2))
334 Result = DAG.getNode(ISD::DYNAMIC_STACKALLOC, Node->getValueType(0),
337 Result = Op.getValue(0);
339 // Since this op produces two values, make sure to remember that we
340 // legalized both of them.
341 AddLegalizedOperand(SDOperand(Node, 0), Result);
342 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
343 return Result.getValue(Op.ResNo);
346 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
347 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
349 bool Changed = false;
350 std::vector<SDOperand> Ops;
351 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
352 Ops.push_back(LegalizeOp(Node->getOperand(i)));
353 Changed |= Ops.back() != Node->getOperand(i);
356 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Changed) {
357 std::vector<MVT::ValueType> RetTyVTs;
358 RetTyVTs.reserve(Node->getNumValues());
359 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
360 RetTyVTs.push_back(Node->getValueType(i));
361 Result = SDOperand(DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops), 0);
363 Result = Result.getValue(0);
365 // Since calls produce multiple values, make sure to remember that we
366 // legalized all of them.
367 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
368 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
369 return Result.getValue(Op.ResNo);
372 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
373 if (Tmp1 != Node->getOperand(0))
374 Result = DAG.getNode(ISD::BR, MVT::Other, Tmp1, Node->getOperand(1));
378 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
380 switch (getTypeAction(Node->getOperand(1).getValueType())) {
381 case Expand: assert(0 && "It's impossible to expand bools");
383 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition.
386 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
389 // Basic block destination (Op#2) is always legal.
390 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
391 Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2,
392 Node->getOperand(2));
396 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
397 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
398 if (Tmp1 != Node->getOperand(0) ||
399 Tmp2 != Node->getOperand(1))
400 Result = DAG.getLoad(Node->getValueType(0), Tmp1, Tmp2);
402 Result = SDOperand(Node, 0);
404 // Since loads produce two values, make sure to remember that we legalized
406 AddLegalizedOperand(SDOperand(Node, 0), Result);
407 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
408 return Result.getValue(Op.ResNo);
413 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
414 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
415 if (Tmp1 != Node->getOperand(0) ||
416 Tmp2 != Node->getOperand(1))
417 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, Tmp2,
418 cast<MVTSDNode>(Node)->getExtraValueType());
420 Result = SDOperand(Node, 0);
422 // Since loads produce two values, make sure to remember that we legalized
424 AddLegalizedOperand(SDOperand(Node, 0), Result);
425 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
426 return Result.getValue(Op.ResNo);
428 case ISD::EXTRACT_ELEMENT:
429 // Get both the low and high parts.
430 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
431 if (cast<ConstantSDNode>(Node->getOperand(1))->getValue())
432 Result = Tmp2; // 1 -> Hi
434 Result = Tmp1; // 0 -> Lo
438 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
440 switch (getTypeAction(Node->getOperand(1).getValueType())) {
442 // Legalize the incoming value (must be legal).
443 Tmp2 = LegalizeOp(Node->getOperand(1));
444 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
445 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
448 Tmp2 = PromoteOp(Node->getOperand(1));
449 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
453 ExpandOp(Node->getOperand(1), Lo, Hi);
454 unsigned Reg = cast<RegSDNode>(Node)->getReg();
455 Lo = DAG.getCopyToReg(Tmp1, Lo, Reg);
456 Hi = DAG.getCopyToReg(Tmp1, Hi, Reg+1);
457 // Note that the copytoreg nodes are independent of each other.
458 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
459 assert(isTypeLegal(Result.getValueType()) &&
460 "Cannot expand multiple times yet (i64 -> i16)");
466 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
467 switch (Node->getNumOperands()) {
469 switch (getTypeAction(Node->getOperand(1).getValueType())) {
471 Tmp2 = LegalizeOp(Node->getOperand(1));
472 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
473 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
477 ExpandOp(Node->getOperand(1), Lo, Hi);
478 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi);
482 Tmp2 = PromoteOp(Node->getOperand(1));
483 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
488 if (Tmp1 != Node->getOperand(0))
489 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1);
491 default: { // ret <values>
492 std::vector<SDOperand> NewValues;
493 NewValues.push_back(Tmp1);
494 for (unsigned i = 1, e = Node->getNumOperands(); i != e; ++i)
495 switch (getTypeAction(Node->getOperand(i).getValueType())) {
497 NewValues.push_back(LegalizeOp(Node->getOperand(i)));
501 ExpandOp(Node->getOperand(i), Lo, Hi);
502 NewValues.push_back(Lo);
503 NewValues.push_back(Hi);
507 assert(0 && "Can't promote multiple return value yet!");
509 Result = DAG.getNode(ISD::RET, MVT::Other, NewValues);
515 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
516 Tmp2 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
518 // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
519 if (ConstantFPSDNode *CFP =dyn_cast<ConstantFPSDNode>(Node->getOperand(1))){
520 if (CFP->getValueType(0) == MVT::f32) {
525 V.F = CFP->getValue();
526 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
527 DAG.getConstant(V.I, MVT::i32), Tmp2);
529 assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
534 V.F = CFP->getValue();
535 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
536 DAG.getConstant(V.I, MVT::i64), Tmp2);
541 switch (getTypeAction(Node->getOperand(1).getValueType())) {
543 SDOperand Val = LegalizeOp(Node->getOperand(1));
544 if (Val != Node->getOperand(1) || Tmp1 != Node->getOperand(0) ||
545 Tmp2 != Node->getOperand(2))
546 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Val, Tmp2);
550 // Truncate the value and store the result.
551 Tmp3 = PromoteOp(Node->getOperand(1));
552 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp3, Tmp2,
553 Node->getOperand(1).getValueType());
558 ExpandOp(Node->getOperand(1), Lo, Hi);
560 if (!TLI.isLittleEndian())
563 Lo = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Lo, Tmp2);
565 unsigned IncrementSize = MVT::getSizeInBits(Hi.getValueType())/8;
566 Tmp2 = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2,
567 getIntPtrConstant(IncrementSize));
568 assert(isTypeLegal(Tmp2.getValueType()) &&
569 "Pointers must be legal!");
570 Hi = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Hi, Tmp2);
571 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
576 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
577 if (Tmp1 != Node->getOperand(0))
578 Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1,Node->getOperand(1));
580 case ISD::TRUNCSTORE:
581 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
582 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
584 switch (getTypeAction(Node->getOperand(1).getValueType())) {
586 Tmp2 = LegalizeOp(Node->getOperand(1));
587 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
588 Tmp3 != Node->getOperand(2))
589 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3,
590 cast<MVTSDNode>(Node)->getExtraValueType());
594 assert(0 && "Cannot handle illegal TRUNCSTORE yet!");
598 switch (getTypeAction(Node->getOperand(0).getValueType())) {
599 case Expand: assert(0 && "It's impossible to expand bools");
601 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
604 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
607 Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal
608 Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal
610 switch (TLI.getOperationAction(Node->getOpcode(), Tmp2.getValueType())) {
611 default: assert(0 && "This action is not supported yet!");
612 case TargetLowering::Legal:
613 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
614 Tmp3 != Node->getOperand(2))
615 Result = DAG.getNode(ISD::SELECT, Node->getValueType(0),
618 case TargetLowering::Promote: {
620 TLI.getTypeToPromoteTo(ISD::SELECT, Tmp2.getValueType());
621 unsigned ExtOp, TruncOp;
622 if (MVT::isInteger(Tmp2.getValueType())) {
623 ExtOp = ISD::ZERO_EXTEND;
624 TruncOp = ISD::TRUNCATE;
626 ExtOp = ISD::FP_EXTEND;
627 TruncOp = ISD::FP_ROUND;
629 // Promote each of the values to the new type.
630 Tmp2 = DAG.getNode(ExtOp, NVT, Tmp2);
631 Tmp3 = DAG.getNode(ExtOp, NVT, Tmp3);
632 // Perform the larger operation, then round down.
633 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2,Tmp3);
634 Result = DAG.getNode(TruncOp, Node->getValueType(0), Result);
640 switch (getTypeAction(Node->getOperand(0).getValueType())) {
642 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
643 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
644 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
645 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
646 Node->getValueType(0), Tmp1, Tmp2);
649 Tmp1 = PromoteOp(Node->getOperand(0)); // LHS
650 Tmp2 = PromoteOp(Node->getOperand(1)); // RHS
652 // If this is an FP compare, the operands have already been extended.
653 if (MVT::isInteger(Node->getOperand(0).getValueType())) {
654 MVT::ValueType VT = Node->getOperand(0).getValueType();
655 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
657 // Otherwise, we have to insert explicit sign or zero extends. Note
658 // that we could insert sign extends for ALL conditions, but zero extend
659 // is cheaper on many machines (an AND instead of two shifts), so prefer
661 switch (cast<SetCCSDNode>(Node)->getCondition()) {
662 default: assert(0 && "Unknown integer comparison!");
669 // ALL of these operations will work if we either sign or zero extend
670 // the operands (including the unsigned comparisons!). Zero extend is
671 // usually a simpler/cheaper operation, so prefer it.
672 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
673 Tmp2 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp2, VT);
679 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
680 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2, VT);
685 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
686 Node->getValueType(0), Tmp1, Tmp2);
689 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
690 ExpandOp(Node->getOperand(0), LHSLo, LHSHi);
691 ExpandOp(Node->getOperand(1), RHSLo, RHSHi);
692 switch (cast<SetCCSDNode>(Node)->getCondition()) {
695 Tmp1 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSLo, RHSLo);
696 Tmp2 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSHi, RHSHi);
697 Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2);
698 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
699 Node->getValueType(0), Tmp1,
700 DAG.getConstant(0, Tmp1.getValueType()));
703 // FIXME: This generated code sucks.
705 switch (cast<SetCCSDNode>(Node)->getCondition()) {
706 default: assert(0 && "Unknown integer setcc!");
708 case ISD::SETULT: LowCC = ISD::SETULT; break;
710 case ISD::SETUGT: LowCC = ISD::SETUGT; break;
712 case ISD::SETULE: LowCC = ISD::SETULE; break;
714 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
717 // Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison
718 // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands
719 // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
721 // NOTE: on targets without efficient SELECT of bools, we can always use
722 // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
723 Tmp1 = DAG.getSetCC(LowCC, Node->getValueType(0), LHSLo, RHSLo);
724 Tmp2 = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
725 Node->getValueType(0), LHSHi, RHSHi);
726 Result = DAG.getSetCC(ISD::SETEQ, Node->getValueType(0), LHSHi, RHSHi);
727 Result = DAG.getNode(ISD::SELECT, Tmp1.getValueType(),
737 Tmp1 = LegalizeOp(Node->getOperand(0)); // Chain
738 Tmp2 = LegalizeOp(Node->getOperand(1)); // Pointer
740 if (Node->getOpcode() == ISD::MEMSET) { // memset = ubyte
741 switch (getTypeAction(Node->getOperand(2).getValueType())) {
742 case Expand: assert(0 && "Cannot expand a byte!");
744 Tmp3 = LegalizeOp(Node->getOperand(2));
747 Tmp3 = PromoteOp(Node->getOperand(2));
751 Tmp3 = LegalizeOp(Node->getOperand(2)); // memcpy/move = pointer,
755 switch (getTypeAction(Node->getOperand(3).getValueType())) {
756 case Expand: assert(0 && "Cannot expand this yet!");
758 Tmp4 = LegalizeOp(Node->getOperand(3));
761 Tmp4 = PromoteOp(Node->getOperand(3));
766 switch (getTypeAction(Node->getOperand(4).getValueType())) { // uint
767 case Expand: assert(0 && "Cannot expand this yet!");
769 Tmp5 = LegalizeOp(Node->getOperand(4));
772 Tmp5 = PromoteOp(Node->getOperand(4));
776 switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) {
777 default: assert(0 && "This action not implemented for this operation!");
778 case TargetLowering::Legal:
779 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
780 Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3) ||
781 Tmp5 != Node->getOperand(4)) {
782 std::vector<SDOperand> Ops;
783 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
784 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
785 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
788 case TargetLowering::Expand: {
789 // Otherwise, the target does not support this operation. Lower the
790 // operation to an explicit libcall as appropriate.
791 MVT::ValueType IntPtr = TLI.getPointerTy();
792 const Type *IntPtrTy = TLI.getTargetData().getIntPtrType();
793 std::vector<std::pair<SDOperand, const Type*> > Args;
795 const char *FnName = 0;
796 if (Node->getOpcode() == ISD::MEMSET) {
797 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
798 // Extend the ubyte argument to be an int value for the call.
799 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3);
800 Args.push_back(std::make_pair(Tmp3, Type::IntTy));
801 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
804 } else if (Node->getOpcode() == ISD::MEMCPY ||
805 Node->getOpcode() == ISD::MEMMOVE) {
806 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
807 Args.push_back(std::make_pair(Tmp3, IntPtrTy));
808 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
809 FnName = Node->getOpcode() == ISD::MEMMOVE ? "memmove" : "memcpy";
811 assert(0 && "Unknown op!");
813 std::pair<SDOperand,SDOperand> CallResult =
814 TLI.LowerCallTo(Tmp1, Type::VoidTy, false,
815 DAG.getExternalSymbol(FnName, IntPtr), Args, DAG);
816 Result = LegalizeOp(CallResult.second);
819 case TargetLowering::Custom:
820 std::vector<SDOperand> Ops;
821 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
822 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
823 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
824 Result = TLI.LowerOperation(Result);
825 Result = LegalizeOp(Result);
834 case ISD::SRL_PARTS: {
835 std::vector<SDOperand> Ops;
836 bool Changed = false;
837 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
838 Ops.push_back(LegalizeOp(Node->getOperand(i)));
839 Changed |= Ops.back() != Node->getOperand(i);
842 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Ops);
844 // Since these produce multiple values, make sure to remember that we
845 // legalized all of them.
846 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
847 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
848 return Result.getValue(Op.ResNo);
865 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
866 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
867 if (Tmp1 != Node->getOperand(0) ||
868 Tmp2 != Node->getOperand(1))
869 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2);
875 Tmp1 = LegalizeOp(Node->getOperand(0));
876 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
877 case TargetLowering::Legal:
878 if (Tmp1 != Node->getOperand(0))
879 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
881 case TargetLowering::Promote:
882 case TargetLowering::Custom:
883 assert(0 && "Cannot promote/custom handle this yet!");
884 case TargetLowering::Expand:
885 if (Node->getOpcode() == ISD::FNEG) {
886 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
887 Tmp2 = DAG.getConstantFP(-0.0, Node->getValueType(0));
888 Result = LegalizeOp(DAG.getNode(ISD::SUB, Node->getValueType(0),
890 } else if (Node->getOpcode() == ISD::FABS) {
891 // Expand Y = FABS(X) -> Y = (X >u 0.0) ? X : fneg(X).
892 MVT::ValueType VT = Node->getValueType(0);
893 Tmp2 = DAG.getConstantFP(0.0, VT);
894 Tmp2 = DAG.getSetCC(ISD::SETUGT, TLI.getSetCCResultTy(), Tmp1, Tmp2);
895 Tmp3 = DAG.getNode(ISD::FNEG, VT, Tmp1);
896 Result = DAG.getNode(ISD::SELECT, VT, Tmp2, Tmp1, Tmp3);
897 Result = LegalizeOp(Result);
899 assert(0 && "Unreachable!");
905 // Conversion operators. The source and destination have different types.
906 case ISD::ZERO_EXTEND:
907 case ISD::SIGN_EXTEND:
911 case ISD::FP_TO_SINT:
912 case ISD::FP_TO_UINT:
913 case ISD::SINT_TO_FP:
914 case ISD::UINT_TO_FP:
915 switch (getTypeAction(Node->getOperand(0).getValueType())) {
917 Tmp1 = LegalizeOp(Node->getOperand(0));
918 if (Tmp1 != Node->getOperand(0))
919 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
922 if (Node->getOpcode() == ISD::SINT_TO_FP ||
923 Node->getOpcode() == ISD::UINT_TO_FP) {
924 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP,
925 Node->getValueType(0), Node->getOperand(0));
926 Result = LegalizeOp(Result);
928 } else if (Node->getOpcode() == ISD::TRUNCATE) {
929 // In the expand case, we must be dealing with a truncate, because
930 // otherwise the result would be larger than the source.
931 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
933 // Since the result is legal, we should just be able to truncate the low
934 // part of the source.
935 Result = DAG.getNode(ISD::TRUNCATE, Node->getValueType(0), Tmp1);
938 assert(0 && "Shouldn't need to expand other operators here!");
941 switch (Node->getOpcode()) {
942 case ISD::ZERO_EXTEND:
943 Result = PromoteOp(Node->getOperand(0));
944 // NOTE: Any extend would work here...
945 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
946 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Op.getValueType(),
947 Result, Node->getOperand(0).getValueType());
949 case ISD::SIGN_EXTEND:
950 Result = PromoteOp(Node->getOperand(0));
951 // NOTE: Any extend would work here...
952 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
953 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
954 Result, Node->getOperand(0).getValueType());
957 Result = PromoteOp(Node->getOperand(0));
958 Result = DAG.getNode(ISD::TRUNCATE, Op.getValueType(), Result);
961 Result = PromoteOp(Node->getOperand(0));
962 if (Result.getValueType() != Op.getValueType())
963 // Dynamically dead while we have only 2 FP types.
964 Result = DAG.getNode(ISD::FP_EXTEND, Op.getValueType(), Result);
967 case ISD::FP_TO_SINT:
968 case ISD::FP_TO_UINT:
969 Result = PromoteOp(Node->getOperand(0));
970 Result = DAG.getNode(Node->getOpcode(), Op.getValueType(), Result);
972 case ISD::SINT_TO_FP:
973 Result = PromoteOp(Node->getOperand(0));
974 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
975 Result, Node->getOperand(0).getValueType());
976 Result = DAG.getNode(ISD::SINT_TO_FP, Op.getValueType(), Result);
978 case ISD::UINT_TO_FP:
979 Result = PromoteOp(Node->getOperand(0));
980 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Result.getValueType(),
981 Result, Node->getOperand(0).getValueType());
982 Result = DAG.getNode(ISD::UINT_TO_FP, Op.getValueType(), Result);
987 case ISD::FP_ROUND_INREG:
988 case ISD::SIGN_EXTEND_INREG:
989 case ISD::ZERO_EXTEND_INREG: {
990 Tmp1 = LegalizeOp(Node->getOperand(0));
991 MVT::ValueType ExtraVT = cast<MVTSDNode>(Node)->getExtraValueType();
993 // If this operation is not supported, convert it to a shl/shr or load/store
995 switch (TLI.getOperationAction(Node->getOpcode(), ExtraVT)) {
996 default: assert(0 && "This action not supported for this op yet!");
997 case TargetLowering::Legal:
998 if (Tmp1 != Node->getOperand(0))
999 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
1002 case TargetLowering::Expand:
1003 // If this is an integer extend and shifts are supported, do that.
1004 if (Node->getOpcode() == ISD::ZERO_EXTEND_INREG) {
1005 // NOTE: we could fall back on load/store here too for targets without
1006 // AND. However, it is doubtful that any exist.
1007 // AND out the appropriate bits.
1009 DAG.getConstant((1ULL << MVT::getSizeInBits(ExtraVT))-1,
1010 Node->getValueType(0));
1011 Result = DAG.getNode(ISD::AND, Node->getValueType(0),
1012 Node->getOperand(0), Mask);
1013 } else if (Node->getOpcode() == ISD::SIGN_EXTEND_INREG) {
1014 // NOTE: we could fall back on load/store here too for targets without
1015 // SAR. However, it is doubtful that any exist.
1016 unsigned BitsDiff = MVT::getSizeInBits(Node->getValueType(0)) -
1017 MVT::getSizeInBits(ExtraVT);
1018 SDOperand ShiftCst = DAG.getConstant(BitsDiff, TLI.getShiftAmountTy());
1019 Result = DAG.getNode(ISD::SHL, Node->getValueType(0),
1020 Node->getOperand(0), ShiftCst);
1021 Result = DAG.getNode(ISD::SRA, Node->getValueType(0),
1023 } else if (Node->getOpcode() == ISD::FP_ROUND_INREG) {
1024 // The only way we can lower this is to turn it into a STORETRUNC,
1025 // EXTLOAD pair, targetting a temporary location (a stack slot).
1027 // NOTE: there is a choice here between constantly creating new stack
1028 // slots and always reusing the same one. We currently always create
1029 // new ones, as reuse may inhibit scheduling.
1030 const Type *Ty = MVT::getTypeForValueType(ExtraVT);
1031 unsigned TySize = (unsigned)TLI.getTargetData().getTypeSize(Ty);
1032 unsigned Align = TLI.getTargetData().getTypeAlignment(Ty);
1033 MachineFunction &MF = DAG.getMachineFunction();
1035 MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
1036 SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
1037 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, DAG.getEntryNode(),
1038 Node->getOperand(0), StackSlot, ExtraVT);
1039 Result = DAG.getNode(ISD::EXTLOAD, Node->getValueType(0),
1040 Result, StackSlot, ExtraVT);
1042 assert(0 && "Unknown op");
1044 Result = LegalizeOp(Result);
1051 if (!Op.Val->hasOneUse())
1052 AddLegalizedOperand(Op, Result);
1057 /// PromoteOp - Given an operation that produces a value in an invalid type,
1058 /// promote it to compute the value into a larger type. The produced value will
1059 /// have the correct bits for the low portion of the register, but no guarantee
1060 /// is made about the top bits: it may be zero, sign-extended, or garbage.
1061 SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
1062 MVT::ValueType VT = Op.getValueType();
1063 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1064 assert(getTypeAction(VT) == Promote &&
1065 "Caller should expand or legalize operands that are not promotable!");
1066 assert(NVT > VT && MVT::isInteger(NVT) == MVT::isInteger(VT) &&
1067 "Cannot promote to smaller type!");
1069 std::map<SDOperand, SDOperand>::iterator I = PromotedNodes.find(Op);
1070 if (I != PromotedNodes.end()) return I->second;
1072 SDOperand Tmp1, Tmp2, Tmp3;
1075 SDNode *Node = Op.Val;
1077 // Promotion needs an optimization step to clean up after it, and is not
1078 // careful to avoid operations the target does not support. Make sure that
1079 // all generated operations are legalized in the next iteration.
1080 NeedsAnotherIteration = true;
1082 switch (Node->getOpcode()) {
1084 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
1085 assert(0 && "Do not know how to promote this operator!");
1088 Result = DAG.getNode(ISD::UNDEF, NVT);
1091 Result = DAG.getNode(ISD::ZERO_EXTEND, NVT, Op);
1092 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold zext?");
1094 case ISD::ConstantFP:
1095 Result = DAG.getNode(ISD::FP_EXTEND, NVT, Op);
1096 assert(isa<ConstantFPSDNode>(Result) && "Didn't constant fold fp_extend?");
1098 case ISD::CopyFromReg:
1099 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(), NVT,
1100 Node->getOperand(0));
1101 // Remember that we legalized the chain.
1102 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1106 assert(getTypeAction(TLI.getSetCCResultTy()) == Legal &&
1107 "SetCC type is not legal??");
1108 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1109 TLI.getSetCCResultTy(), Node->getOperand(0),
1110 Node->getOperand(1));
1111 Result = LegalizeOp(Result);
1115 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1117 Result = LegalizeOp(Node->getOperand(0));
1118 assert(Result.getValueType() >= NVT &&
1119 "This truncation doesn't make sense!");
1120 if (Result.getValueType() > NVT) // Truncate to NVT instead of VT
1121 Result = DAG.getNode(ISD::TRUNCATE, NVT, Result);
1124 // The truncation is not required, because we don't guarantee anything
1125 // about high bits anyway.
1126 Result = PromoteOp(Node->getOperand(0));
1129 assert(0 && "Cannot handle expand yet");
1132 case ISD::SIGN_EXTEND:
1133 case ISD::ZERO_EXTEND:
1134 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1135 case Expand: assert(0 && "BUG: Smaller reg should have been promoted!");
1137 // Input is legal? Just do extend all the way to the larger type.
1138 Result = LegalizeOp(Node->getOperand(0));
1139 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1142 // Promote the reg if it's smaller.
1143 Result = PromoteOp(Node->getOperand(0));
1144 // The high bits are not guaranteed to be anything. Insert an extend.
1145 if (Node->getOpcode() == ISD::SIGN_EXTEND)
1146 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Result,
1147 Node->getOperand(0).getValueType());
1149 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Result,
1150 Node->getOperand(0).getValueType());
1155 case ISD::FP_EXTEND:
1156 assert(0 && "Case not implemented. Dynamically dead with 2 FP types!");
1158 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1159 case Expand: assert(0 && "BUG: Cannot expand FP regs!");
1160 case Promote: assert(0 && "Unreachable with 2 FP types!");
1162 // Input is legal? Do an FP_ROUND_INREG.
1163 Result = LegalizeOp(Node->getOperand(0));
1164 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1169 case ISD::SINT_TO_FP:
1170 case ISD::UINT_TO_FP:
1171 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1173 Result = LegalizeOp(Node->getOperand(0));
1174 // No extra round required here.
1175 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1179 Result = PromoteOp(Node->getOperand(0));
1180 if (Node->getOpcode() == ISD::SINT_TO_FP)
1181 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1182 Result, Node->getOperand(0).getValueType());
1184 Result = DAG.getNode(ISD::ZERO_EXTEND_INREG, Result.getValueType(),
1185 Result, Node->getOperand(0).getValueType());
1186 // No extra round required here.
1187 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1190 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, NVT,
1191 Node->getOperand(0));
1192 Result = LegalizeOp(Result);
1194 // Round if we cannot tolerate excess precision.
1195 if (NoExcessFPPrecision)
1196 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1201 case ISD::FP_TO_SINT:
1202 case ISD::FP_TO_UINT:
1203 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1205 Tmp1 = LegalizeOp(Node->getOperand(0));
1208 // The input result is prerounded, so we don't have to do anything
1210 Tmp1 = PromoteOp(Node->getOperand(0));
1213 assert(0 && "not implemented");
1215 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1220 Tmp1 = PromoteOp(Node->getOperand(0));
1221 assert(Tmp1.getValueType() == NVT);
1222 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1223 // NOTE: we do not have to do any extra rounding here for
1224 // NoExcessFPPrecision, because we know the input will have the appropriate
1225 // precision, and these operations don't modify precision at all.
1234 // The input may have strange things in the top bits of the registers, but
1235 // these operations don't care. They may have wierd bits going out, but
1236 // that too is okay if they are integer operations.
1237 Tmp1 = PromoteOp(Node->getOperand(0));
1238 Tmp2 = PromoteOp(Node->getOperand(1));
1239 assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT);
1240 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1242 // However, if this is a floating point operation, they will give excess
1243 // precision that we may not be able to tolerate. If we DO allow excess
1244 // precision, just leave it, otherwise excise it.
1245 // FIXME: Why would we need to round FP ops more than integer ones?
1246 // Is Round(Add(Add(A,B),C)) != Round(Add(Round(Add(A,B)), C))
1247 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1248 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1253 // These operators require that their input be sign extended.
1254 Tmp1 = PromoteOp(Node->getOperand(0));
1255 Tmp2 = PromoteOp(Node->getOperand(1));
1256 if (MVT::isInteger(NVT)) {
1257 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
1258 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2, VT);
1260 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1262 // Perform FP_ROUND: this is probably overly pessimistic.
1263 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1264 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
1269 // These operators require that their input be zero extended.
1270 Tmp1 = PromoteOp(Node->getOperand(0));
1271 Tmp2 = PromoteOp(Node->getOperand(1));
1272 assert(MVT::isInteger(NVT) && "Operators don't apply to FP!");
1273 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
1274 Tmp2 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp2, VT);
1275 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1279 Tmp1 = PromoteOp(Node->getOperand(0));
1280 Tmp2 = LegalizeOp(Node->getOperand(1));
1281 Result = DAG.getNode(ISD::SHL, NVT, Tmp1, Tmp2);
1284 // The input value must be properly sign extended.
1285 Tmp1 = PromoteOp(Node->getOperand(0));
1286 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1, VT);
1287 Tmp2 = LegalizeOp(Node->getOperand(1));
1288 Result = DAG.getNode(ISD::SRA, NVT, Tmp1, Tmp2);
1291 // The input value must be properly zero extended.
1292 Tmp1 = PromoteOp(Node->getOperand(0));
1293 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND_INREG, NVT, Tmp1, VT);
1294 Tmp2 = LegalizeOp(Node->getOperand(1));
1295 Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2);
1298 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1299 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
1300 Result = DAG.getNode(ISD::EXTLOAD, NVT, Tmp1, Tmp2, VT);
1302 // Remember that we legalized the chain.
1303 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1306 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1307 case Expand: assert(0 && "It's impossible to expand bools");
1309 Tmp1 = LegalizeOp(Node->getOperand(0));// Legalize the condition.
1312 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
1315 Tmp2 = PromoteOp(Node->getOperand(1)); // Legalize the op0
1316 Tmp3 = PromoteOp(Node->getOperand(2)); // Legalize the op1
1317 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2, Tmp3);
1320 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1321 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
1323 std::vector<SDOperand> Ops;
1324 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i)
1325 Ops.push_back(LegalizeOp(Node->getOperand(i)));
1327 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
1328 "Can only promote single result calls");
1329 std::vector<MVT::ValueType> RetTyVTs;
1330 RetTyVTs.reserve(2);
1331 RetTyVTs.push_back(NVT);
1332 RetTyVTs.push_back(MVT::Other);
1333 SDNode *NC = DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops);
1334 Result = SDOperand(NC, 0);
1336 // Insert the new chain mapping.
1337 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1342 assert(Result.Val && "Didn't set a result!");
1343 AddPromotedOperand(Op, Result);
1347 /// ExpandAddSub - Find a clever way to expand this add operation into
1349 void SelectionDAGLegalize::
1350 ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
1351 SDOperand &Lo, SDOperand &Hi) {
1352 // Expand the subcomponents.
1353 SDOperand LHSL, LHSH, RHSL, RHSH;
1354 ExpandOp(LHS, LHSL, LHSH);
1355 ExpandOp(RHS, RHSL, RHSH);
1357 // Convert this add to the appropriate ADDC pair. The low part has no carry
1359 std::vector<SDOperand> Ops;
1360 Ops.push_back(LHSL);
1361 Ops.push_back(LHSH);
1362 Ops.push_back(RHSL);
1363 Ops.push_back(RHSH);
1364 Lo = DAG.getNode(NodeOp, LHSL.getValueType(), Ops);
1365 Hi = Lo.getValue(1);
1368 void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
1369 SDOperand Op, SDOperand Amt,
1370 SDOperand &Lo, SDOperand &Hi) {
1371 // Expand the subcomponents.
1372 SDOperand LHSL, LHSH;
1373 ExpandOp(Op, LHSL, LHSH);
1375 std::vector<SDOperand> Ops;
1376 Ops.push_back(LHSL);
1377 Ops.push_back(LHSH);
1379 Lo = DAG.getNode(NodeOp, LHSL.getValueType(), Ops);
1380 Hi = Lo.getValue(1);
1384 /// ExpandShift - Try to find a clever way to expand this shift operation out to
1385 /// smaller elements. If we can't find a way that is more efficient than a
1386 /// libcall on this target, return false. Otherwise, return true with the
1387 /// low-parts expanded into Lo and Hi.
1388 bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
1389 SDOperand &Lo, SDOperand &Hi) {
1390 // FIXME: This code is buggy, disable it for now. Note that we should at
1391 // least handle the case when Amt is an immediate here.
1394 assert((Opc == ISD::SHL || Opc == ISD::SRA || Opc == ISD::SRL) &&
1395 "This is not a shift!");
1396 MVT::ValueType NVT = TLI.getTypeToTransformTo(Op.getValueType());
1398 // If we have an efficient select operation (or if the selects will all fold
1399 // away), lower to some complex code, otherwise just emit the libcall.
1400 if (TLI.getOperationAction(ISD::SELECT, NVT) != TargetLowering::Legal &&
1401 !isa<ConstantSDNode>(Amt))
1405 ExpandOp(Op, InL, InH);
1406 SDOperand ShAmt = LegalizeOp(Amt);
1407 MVT::ValueType ShTy = ShAmt.getValueType();
1409 unsigned NVTBits = MVT::getSizeInBits(NVT);
1410 SDOperand NAmt = DAG.getNode(ISD::SUB, ShTy, // NAmt = 32-ShAmt
1411 DAG.getConstant(NVTBits, ShTy), ShAmt);
1413 // Compare the unmasked shift amount against 32.
1414 SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), ShAmt,
1415 DAG.getConstant(NVTBits, ShTy));
1417 if (TLI.getShiftAmountFlavor() != TargetLowering::Mask) {
1418 ShAmt = DAG.getNode(ISD::AND, ShTy, ShAmt, // ShAmt &= 31
1419 DAG.getConstant(NVTBits-1, ShTy));
1420 NAmt = DAG.getNode(ISD::AND, ShTy, NAmt, // NAmt &= 31
1421 DAG.getConstant(NVTBits-1, ShTy));
1424 if (Opc == ISD::SHL) {
1425 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << Amt) | (Lo >> NAmt)
1426 DAG.getNode(ISD::SHL, NVT, InH, ShAmt),
1427 DAG.getNode(ISD::SRL, NVT, InL, NAmt));
1428 SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31
1430 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
1431 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2);
1433 SDOperand HiLoPart = DAG.getNode(ISD::SELECT, NVT,
1434 DAG.getSetCC(ISD::SETEQ,
1435 TLI.getSetCCResultTy(), NAmt,
1436 DAG.getConstant(32, ShTy)),
1437 DAG.getConstant(0, NVT),
1438 DAG.getNode(ISD::SHL, NVT, InH, NAmt));
1439 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << NAmt) | (Lo >> Amt)
1441 DAG.getNode(ISD::SRL, NVT, InL, ShAmt));
1442 SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt); // T2 = InH >> ShAmt&31
1445 if (Opc == ISD::SRA)
1446 HiPart = DAG.getNode(ISD::SRA, NVT, InH,
1447 DAG.getConstant(NVTBits-1, ShTy));
1449 HiPart = DAG.getConstant(0, NVT);
1450 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
1451 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart, T2);
1456 /// FindLatestAdjCallStackDown - Scan up the dag to find the latest (highest
1457 /// NodeDepth) node that is an AdjCallStackDown operation and occurs later than
1459 static void FindLatestAdjCallStackDown(SDNode *Node, SDNode *&Found) {
1460 if (Node->getNodeDepth() <= Found->getNodeDepth()) return;
1462 // If we found an ADJCALLSTACKDOWN, we already know this node occurs later
1463 // than the Found node. Just remember this node and return.
1464 if (Node->getOpcode() == ISD::ADJCALLSTACKDOWN) {
1469 // Otherwise, scan the operands of Node to see if any of them is a call.
1470 assert(Node->getNumOperands() != 0 &&
1471 "All leaves should have depth equal to the entry node!");
1472 for (unsigned i = 0, e = Node->getNumOperands()-1; i != e; ++i)
1473 FindLatestAdjCallStackDown(Node->getOperand(i).Val, Found);
1475 // Tail recurse for the last iteration.
1476 FindLatestAdjCallStackDown(Node->getOperand(Node->getNumOperands()-1).Val,
1481 /// FindEarliestAdjCallStackUp - Scan down the dag to find the earliest (lowest
1482 /// NodeDepth) node that is an AdjCallStackUp operation and occurs more recent
1484 static void FindEarliestAdjCallStackUp(SDNode *Node, SDNode *&Found) {
1485 if (Found && Node->getNodeDepth() >= Found->getNodeDepth()) return;
1487 // If we found an ADJCALLSTACKUP, we already know this node occurs earlier
1488 // than the Found node. Just remember this node and return.
1489 if (Node->getOpcode() == ISD::ADJCALLSTACKUP) {
1494 // Otherwise, scan the operands of Node to see if any of them is a call.
1495 SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
1496 if (UI == E) return;
1497 for (--E; UI != E; ++UI)
1498 FindEarliestAdjCallStackUp(*UI, Found);
1500 // Tail recurse for the last iteration.
1501 FindEarliestAdjCallStackUp(*UI, Found);
1504 /// FindAdjCallStackUp - Given a chained node that is part of a call sequence,
1505 /// find the ADJCALLSTACKUP node that terminates the call sequence.
1506 static SDNode *FindAdjCallStackUp(SDNode *Node) {
1507 if (Node->getOpcode() == ISD::ADJCALLSTACKUP)
1509 if (Node->use_empty())
1510 return 0; // No adjcallstackup
1512 if (Node->hasOneUse()) // Simple case, only has one user to check.
1513 return FindAdjCallStackUp(*Node->use_begin());
1515 SDOperand TheChain(Node, Node->getNumValues()-1);
1516 assert(TheChain.getValueType() == MVT::Other && "Is not a token chain!");
1518 for (SDNode::use_iterator UI = Node->use_begin(),
1519 E = Node->use_end(); ; ++UI) {
1520 assert(UI != E && "Didn't find a user of the tokchain, no ADJCALLSTACKUP!");
1522 // Make sure to only follow users of our token chain.
1524 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
1525 if (User->getOperand(i) == TheChain)
1526 return FindAdjCallStackUp(User);
1528 assert(0 && "Unreachable");
1532 /// FindInputOutputChains - If we are replacing an operation with a call we need
1533 /// to find the call that occurs before and the call that occurs after it to
1534 /// properly serialize the calls in the block.
1535 static SDOperand FindInputOutputChains(SDNode *OpNode, SDNode *&OutChain,
1537 SDNode *LatestAdjCallStackDown = Entry.Val;
1538 FindLatestAdjCallStackDown(OpNode, LatestAdjCallStackDown);
1539 //std::cerr << "Found node: "; LatestAdjCallStackDown->dump(); std::cerr <<"\n";
1541 SDNode *LatestAdjCallStackUp = FindAdjCallStackUp(LatestAdjCallStackDown);
1544 SDNode *EarliestAdjCallStackUp = 0;
1545 FindEarliestAdjCallStackUp(OpNode, EarliestAdjCallStackUp);
1547 if (EarliestAdjCallStackUp) {
1548 //std::cerr << "Found node: ";
1549 //EarliestAdjCallStackUp->dump(); std::cerr <<"\n";
1552 return SDOperand(LatestAdjCallStackUp, 0);
1557 // ExpandLibCall - Expand a node into a call to a libcall. If the result value
1558 // does not fit into a register, return the lo part and set the hi part to the
1559 // by-reg argument. If it does fit into a single register, return the result
1560 // and leave the Hi part unset.
1561 SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node,
1564 SDOperand InChain = FindInputOutputChains(Node, OutChain,
1565 DAG.getEntryNode());
1566 if (InChain.Val == 0)
1567 InChain = DAG.getEntryNode();
1569 TargetLowering::ArgListTy Args;
1570 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
1571 MVT::ValueType ArgVT = Node->getOperand(i).getValueType();
1572 const Type *ArgTy = MVT::getTypeForValueType(ArgVT);
1573 Args.push_back(std::make_pair(Node->getOperand(i), ArgTy));
1575 SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy());
1577 // We don't care about token chains for libcalls. We just use the entry
1578 // node as our input and ignore the output chain. This allows us to place
1579 // calls wherever we need them to satisfy data dependences.
1580 const Type *RetTy = MVT::getTypeForValueType(Node->getValueType(0));
1581 SDOperand Result = TLI.LowerCallTo(InChain, RetTy, false, Callee,
1583 switch (getTypeAction(Result.getValueType())) {
1584 default: assert(0 && "Unknown thing");
1588 assert(0 && "Cannot promote this yet!");
1591 ExpandOp(Result, Lo, Hi);
1597 /// ExpandIntToFP - Expand a [US]INT_TO_FP operation, assuming that the
1598 /// destination type is legal.
1599 SDOperand SelectionDAGLegalize::
1600 ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
1601 assert(getTypeAction(DestTy) == Legal && "Destination type is not legal!");
1602 assert(getTypeAction(Source.getValueType()) == Expand &&
1603 "This is not an expansion!");
1604 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
1607 SDOperand InChain = FindInputOutputChains(Source.Val, OutChain,
1608 DAG.getEntryNode());
1610 const char *FnName = 0;
1612 if (DestTy == MVT::f32)
1613 FnName = "__floatdisf";
1615 assert(DestTy == MVT::f64 && "Unknown fp value type!");
1616 FnName = "__floatdidf";
1619 // If this is unsigned, and not supported, first perform the conversion to
1620 // signed, then adjust the result if the sign bit is set.
1621 SDOperand SignedConv = ExpandIntToFP(false, DestTy, Source);
1623 assert(0 && "Unsigned casts not supported yet!");
1625 SDOperand Callee = DAG.getExternalSymbol(FnName, TLI.getPointerTy());
1627 TargetLowering::ArgListTy Args;
1628 const Type *ArgTy = MVT::getTypeForValueType(Source.getValueType());
1629 Args.push_back(std::make_pair(Source, ArgTy));
1631 // We don't care about token chains for libcalls. We just use the entry
1632 // node as our input and ignore the output chain. This allows us to place
1633 // calls wherever we need them to satisfy data dependences.
1634 const Type *RetTy = MVT::getTypeForValueType(DestTy);
1635 return TLI.LowerCallTo(InChain, RetTy, false, Callee, Args, DAG).first;
1641 /// ExpandOp - Expand the specified SDOperand into its two component pieces
1642 /// Lo&Hi. Note that the Op MUST be an expanded type. As a result of this, the
1643 /// LegalizeNodes map is filled in for any results that are not expanded, the
1644 /// ExpandedNodes map is filled in for any results that are expanded, and the
1645 /// Lo/Hi values are returned.
1646 void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
1647 MVT::ValueType VT = Op.getValueType();
1648 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1649 SDNode *Node = Op.Val;
1650 assert(getTypeAction(VT) == Expand && "Not an expanded type!");
1651 assert(MVT::isInteger(VT) && "Cannot expand FP values!");
1652 assert(MVT::isInteger(NVT) && NVT < VT &&
1653 "Cannot expand to FP value or to larger int value!");
1655 // If there is more than one use of this, see if we already expanded it.
1656 // There is no use remembering values that only have a single use, as the map
1657 // entries will never be reused.
1658 if (!Node->hasOneUse()) {
1659 std::map<SDOperand, std::pair<SDOperand, SDOperand> >::iterator I
1660 = ExpandedNodes.find(Op);
1661 if (I != ExpandedNodes.end()) {
1662 Lo = I->second.first;
1663 Hi = I->second.second;
1668 // Expanding to multiple registers needs to perform an optimization step, and
1669 // is not careful to avoid operations the target does not support. Make sure
1670 // that all generated operations are legalized in the next iteration.
1671 NeedsAnotherIteration = true;
1673 switch (Node->getOpcode()) {
1675 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
1676 assert(0 && "Do not know how to expand this operator!");
1679 Lo = DAG.getNode(ISD::UNDEF, NVT);
1680 Hi = DAG.getNode(ISD::UNDEF, NVT);
1682 case ISD::Constant: {
1683 uint64_t Cst = cast<ConstantSDNode>(Node)->getValue();
1684 Lo = DAG.getConstant(Cst, NVT);
1685 Hi = DAG.getConstant(Cst >> MVT::getSizeInBits(NVT), NVT);
1689 case ISD::CopyFromReg: {
1690 unsigned Reg = cast<RegSDNode>(Node)->getReg();
1691 // Aggregate register values are always in consequtive pairs.
1692 Lo = DAG.getCopyFromReg(Reg, NVT, Node->getOperand(0));
1693 Hi = DAG.getCopyFromReg(Reg+1, NVT, Lo.getValue(1));
1695 // Remember that we legalized the chain.
1696 AddLegalizedOperand(Op.getValue(1), Hi.getValue(1));
1698 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
1702 case ISD::BUILD_PAIR:
1703 // Legalize both operands. FIXME: in the future we should handle the case
1704 // where the two elements are not legal.
1705 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
1706 Lo = LegalizeOp(Node->getOperand(0));
1707 Hi = LegalizeOp(Node->getOperand(1));
1711 SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1712 SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
1713 Lo = DAG.getLoad(NVT, Ch, Ptr);
1715 // Increment the pointer to the other half.
1716 unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8;
1717 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
1718 getIntPtrConstant(IncrementSize));
1719 Hi = DAG.getLoad(NVT, Ch, Ptr);
1721 // Build a factor node to remember that this load is independent of the
1723 SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
1726 // Remember that we legalized the chain.
1727 AddLegalizedOperand(Op.getValue(1), TF);
1728 if (!TLI.isLittleEndian())
1733 SDOperand Chain = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1734 SDOperand Callee = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
1736 bool Changed = false;
1737 std::vector<SDOperand> Ops;
1738 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
1739 Ops.push_back(LegalizeOp(Node->getOperand(i)));
1740 Changed |= Ops.back() != Node->getOperand(i);
1743 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
1744 "Can only expand a call once so far, not i64 -> i16!");
1746 std::vector<MVT::ValueType> RetTyVTs;
1747 RetTyVTs.reserve(3);
1748 RetTyVTs.push_back(NVT);
1749 RetTyVTs.push_back(NVT);
1750 RetTyVTs.push_back(MVT::Other);
1751 SDNode *NC = DAG.getCall(RetTyVTs, Chain, Callee, Ops);
1752 Lo = SDOperand(NC, 0);
1753 Hi = SDOperand(NC, 1);
1755 // Insert the new chain mapping.
1756 AddLegalizedOperand(Op.getValue(1), Hi.getValue(2));
1761 case ISD::XOR: { // Simple logical operators -> two trivial pieces.
1762 SDOperand LL, LH, RL, RH;
1763 ExpandOp(Node->getOperand(0), LL, LH);
1764 ExpandOp(Node->getOperand(1), RL, RH);
1765 Lo = DAG.getNode(Node->getOpcode(), NVT, LL, RL);
1766 Hi = DAG.getNode(Node->getOpcode(), NVT, LH, RH);
1770 SDOperand C, LL, LH, RL, RH;
1772 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1773 case Expand: assert(0 && "It's impossible to expand bools");
1775 C = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
1778 C = PromoteOp(Node->getOperand(0)); // Promote the condition.
1781 ExpandOp(Node->getOperand(1), LL, LH);
1782 ExpandOp(Node->getOperand(2), RL, RH);
1783 Lo = DAG.getNode(ISD::SELECT, NVT, C, LL, RL);
1784 Hi = DAG.getNode(ISD::SELECT, NVT, C, LH, RH);
1787 case ISD::SIGN_EXTEND: {
1789 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1790 case Expand: assert(0 && "expand-expand not implemented yet!");
1791 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
1793 In = PromoteOp(Node->getOperand(0));
1794 // Emit the appropriate sign_extend_inreg to get the value we want.
1795 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(), In,
1796 Node->getOperand(0).getValueType());
1800 // The low part is just a sign extension of the input (which degenerates to
1802 Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In);
1804 // The high part is obtained by SRA'ing all but one of the bits of the lo
1806 unsigned LoSize = MVT::getSizeInBits(Lo.getValueType());
1807 Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1,
1808 TLI.getShiftAmountTy()));
1811 case ISD::ZERO_EXTEND: {
1813 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1814 case Expand: assert(0 && "expand-expand not implemented yet!");
1815 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
1817 In = PromoteOp(Node->getOperand(0));
1818 // Emit the appropriate zero_extend_inreg to get the value we want.
1819 In = DAG.getNode(ISD::ZERO_EXTEND_INREG, In.getValueType(), In,
1820 Node->getOperand(0).getValueType());
1824 // The low part is just a zero extension of the input (which degenerates to
1826 Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, LegalizeOp(Node->getOperand(0)));
1828 // The high part is just a zero.
1829 Hi = DAG.getConstant(0, NVT);
1832 // These operators cannot be expanded directly, emit them as calls to
1833 // library functions.
1834 case ISD::FP_TO_SINT:
1835 if (Node->getOperand(0).getValueType() == MVT::f32)
1836 Lo = ExpandLibCall("__fixsfdi", Node, Hi);
1838 Lo = ExpandLibCall("__fixdfdi", Node, Hi);
1840 case ISD::FP_TO_UINT:
1841 if (Node->getOperand(0).getValueType() == MVT::f32)
1842 Lo = ExpandLibCall("__fixunssfdi", Node, Hi);
1844 Lo = ExpandLibCall("__fixunsdfdi", Node, Hi);
1848 // If we can emit an efficient shift operation, do so now.
1849 if (ExpandShift(ISD::SHL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1852 // If this target supports SHL_PARTS, use it.
1853 if (TLI.getOperationAction(ISD::SHL_PARTS, NVT) == TargetLowering::Legal) {
1854 ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), Node->getOperand(1),
1859 // Otherwise, emit a libcall.
1860 Lo = ExpandLibCall("__ashldi3", Node, Hi);
1864 // If we can emit an efficient shift operation, do so now.
1865 if (ExpandShift(ISD::SRA, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1868 // If this target supports SRA_PARTS, use it.
1869 if (TLI.getOperationAction(ISD::SRA_PARTS, NVT) == TargetLowering::Legal) {
1870 ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), Node->getOperand(1),
1875 // Otherwise, emit a libcall.
1876 Lo = ExpandLibCall("__ashrdi3", Node, Hi);
1879 // If we can emit an efficient shift operation, do so now.
1880 if (ExpandShift(ISD::SRL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
1883 // If this target supports SRL_PARTS, use it.
1884 if (TLI.getOperationAction(ISD::SRL_PARTS, NVT) == TargetLowering::Legal) {
1885 ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), Node->getOperand(1),
1890 // Otherwise, emit a libcall.
1891 Lo = ExpandLibCall("__lshrdi3", Node, Hi);
1895 ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1),
1899 ExpandByParts(ISD::SUB_PARTS, Node->getOperand(0), Node->getOperand(1),
1902 case ISD::MUL: Lo = ExpandLibCall("__muldi3" , Node, Hi); break;
1903 case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, Hi); break;
1904 case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break;
1905 case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break;
1906 case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break;
1909 // Remember in a map if the values will be reused later.
1910 if (!Node->hasOneUse()) {
1911 bool isNew = ExpandedNodes.insert(std::make_pair(Op,
1912 std::make_pair(Lo, Hi))).second;
1913 assert(isNew && "Value already expanded?!?");
1918 // SelectionDAG::Legalize - This is the entry point for the file.
1920 void SelectionDAG::Legalize() {
1921 /// run - This is the main entry point to this class.
1923 SelectionDAGLegalize(*this).Run();