1 //===-- LegalizeDAGTypes.cpp - Implement SelectionDAG::LegalizeTypes ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the SelectionDAG::LegalizeTypes method. It transforms
11 // an arbitrary well-formed SelectionDAG to only consist of legal types.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "legalize-types"
16 #include "llvm/CodeGen/SelectionDAG.h"
17 #include "llvm/Constants.h"
18 #include "llvm/DerivedTypes.h"
19 #include "llvm/Target/TargetLowering.h"
20 #include "llvm/ADT/DenseMap.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/Debug.h"
25 //===----------------------------------------------------------------------===//
26 /// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and
27 /// hacks on it until the target machine can handle it. This involves
28 /// eliminating value sizes the machine cannot handle (promoting small sizes to
29 /// large sizes or splitting up large values into small values) as well as
30 /// eliminating operations the machine cannot handle.
32 /// This code also does a small amount of optimization and recognition of idioms
33 /// as part of its processing. For example, if a target does not support a
34 /// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
35 /// will attempt merge setcc and brc instructions into brcc's.
38 class VISIBILITY_HIDDEN DAGTypeLegalizer {
42 // NodeIDFlags - This pass uses the NodeID on the SDNodes to hold information
43 // about the state of the node. The enum has all the values.
45 /// ReadyToProcess - All operands have been processed, so this node is ready
49 /// NewNode - This is a new node that was created in the process of
50 /// legalizing some other node.
53 /// Processed - This is a node that has already been processed.
56 // 1+ - This is a node which has this many unlegalized operands.
60 Legal, // The target natively supports this type.
61 Promote, // This type should be executed in a larger type.
62 Expand // This type should be split into two types of half the size.
65 /// ValueTypeActions - This is a bitvector that contains two bits for each
66 /// simple value type, where the two bits correspond to the LegalizeAction
67 /// enum. This can be queried with "getTypeAction(VT)".
68 TargetLowering::ValueTypeActionImpl ValueTypeActions;
70 /// getTypeAction - Return how we should legalize values of this type, either
71 /// it is already legal or we need to expand it into multiple registers of
72 /// smaller integer type, or we need to promote it to a larger type.
73 LegalizeAction getTypeAction(MVT::ValueType VT) const {
74 return (LegalizeAction)ValueTypeActions.getTypeAction(VT);
77 /// isTypeLegal - Return true if this type is legal on this target.
79 bool isTypeLegal(MVT::ValueType VT) const {
80 return getTypeAction(VT) == Legal;
83 SDOperand getIntPtrConstant(uint64_t Val) {
84 return DAG.getConstant(Val, TLI.getPointerTy());
87 /// PromotedNodes - For nodes that are below legal width, and that have more
88 /// than one use, this map indicates what promoted value to use.
89 DenseMap<SDOperand, SDOperand> PromotedNodes;
91 /// ExpandedNodes - For nodes that need to be expanded this map indicates
92 /// which operands are the expanded version of the input.
93 DenseMap<SDOperand, std::pair<SDOperand, SDOperand> > ExpandedNodes;
95 /// Worklist - This defines a worklist of nodes to process. In order to be
96 /// pushed onto this worklist, all operands of a node must have already been
98 SmallVector<SDNode*, 128> Worklist;
101 DAGTypeLegalizer(SelectionDAG &dag)
102 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
103 ValueTypeActions(TLI.getValueTypeActions()) {
104 assert(MVT::LAST_VALUETYPE <= 32 &&
105 "Too many value types for ValueTypeActions to hold!");
111 void MarkNewNodes(SDNode *N);
113 void ReplaceLegalValueWith(SDOperand From, SDOperand To);
115 SDOperand GetPromotedOp(SDOperand Op) {
116 Op = PromotedNodes[Op];
117 assert(Op.Val && "Operand wasn't promoted?");
120 void SetPromotedOp(SDOperand Op, SDOperand Result);
122 /// GetPromotedZExtOp - Get a promoted operand and zero extend it to the final
124 SDOperand GetPromotedZExtOp(SDOperand Op) {
125 MVT::ValueType OldVT = Op.getValueType();
126 Op = GetPromotedOp(Op);
127 return DAG.getZeroExtendInReg(Op, OldVT);
130 void GetExpandedOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi);
131 void SetExpandedOp(SDOperand Op, SDOperand Lo, SDOperand Hi);
134 SDOperand CreateStackStoreLoad(SDOperand Op, MVT::ValueType DestVT);
135 SDOperand HandleMemIntrinsic(SDNode *N);
138 void PromoteResult(SDNode *N, unsigned ResNo);
139 SDOperand PromoteResult_UNDEF(SDNode *N);
140 SDOperand PromoteResult_Constant(SDNode *N);
141 SDOperand PromoteResult_TRUNCATE(SDNode *N);
142 SDOperand PromoteResult_INT_EXTEND(SDNode *N);
143 SDOperand PromoteResult_FP_ROUND(SDNode *N);
144 SDOperand PromoteResult_SETCC(SDNode *N);
145 SDOperand PromoteResult_LOAD(LoadSDNode *N);
146 SDOperand PromoteResult_SimpleIntBinOp(SDNode *N);
147 SDOperand PromoteResult_SHL(SDNode *N);
148 SDOperand PromoteResult_SRA(SDNode *N);
149 SDOperand PromoteResult_SRL(SDNode *N);
150 SDOperand PromoteResult_SELECT (SDNode *N);
151 SDOperand PromoteResult_SELECT_CC(SDNode *N);
154 void ExpandResult(SDNode *N, unsigned ResNo);
155 void ExpandResult_UNDEF (SDNode *N, SDOperand &Lo, SDOperand &Hi);
156 void ExpandResult_Constant (SDNode *N, SDOperand &Lo, SDOperand &Hi);
157 void ExpandResult_BUILD_PAIR (SDNode *N, SDOperand &Lo, SDOperand &Hi);
158 void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
159 void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
160 void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
161 void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
162 void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
163 void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
165 void ExpandResult_Logical (SDNode *N, SDOperand &Lo, SDOperand &Hi);
166 void ExpandResult_BSWAP (SDNode *N, SDOperand &Lo, SDOperand &Hi);
167 void ExpandResult_ADDSUB (SDNode *N, SDOperand &Lo, SDOperand &Hi);
168 void ExpandResult_ADDSUBC (SDNode *N, SDOperand &Lo, SDOperand &Hi);
169 void ExpandResult_ADDSUBE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
170 void ExpandResult_SELECT (SDNode *N, SDOperand &Lo, SDOperand &Hi);
171 void ExpandResult_SELECT_CC (SDNode *N, SDOperand &Lo, SDOperand &Hi);
172 void ExpandResult_MUL (SDNode *N, SDOperand &Lo, SDOperand &Hi);
173 void ExpandResult_Shift (SDNode *N, SDOperand &Lo, SDOperand &Hi);
175 void ExpandShiftByConstant(SDNode *N, unsigned Amt,
176 SDOperand &Lo, SDOperand &Hi);
177 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi);
179 // Operand Promotion.
180 bool PromoteOperand(SDNode *N, unsigned OperandNo);
181 SDOperand PromoteOperand_ANY_EXTEND(SDNode *N);
182 SDOperand PromoteOperand_ZERO_EXTEND(SDNode *N);
183 SDOperand PromoteOperand_SIGN_EXTEND(SDNode *N);
184 SDOperand PromoteOperand_TRUNCATE(SDNode *N);
185 SDOperand PromoteOperand_FP_EXTEND(SDNode *N);
186 SDOperand PromoteOperand_FP_ROUND(SDNode *N);
187 SDOperand PromoteOperand_SELECT(SDNode *N, unsigned OpNo);
188 SDOperand PromoteOperand_BRCOND(SDNode *N, unsigned OpNo);
189 SDOperand PromoteOperand_BR_CC(SDNode *N, unsigned OpNo);
190 SDOperand PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo);
192 void PromoteSetCCOperands(SDOperand &LHS,SDOperand &RHS, ISD::CondCode Code);
194 // Operand Expansion.
195 bool ExpandOperand(SDNode *N, unsigned OperandNo);
196 SDOperand ExpandOperand_TRUNCATE(SDNode *N);
197 SDOperand ExpandOperand_BIT_CONVERT(SDNode *N);
198 SDOperand ExpandOperand_UINT_TO_FP(SDOperand Source, MVT::ValueType DestTy);
199 SDOperand ExpandOperand_SINT_TO_FP(SDOperand Source, MVT::ValueType DestTy);
200 SDOperand ExpandOperand_EXTRACT_ELEMENT(SDNode *N);
201 SDOperand ExpandOperand_SETCC(SDNode *N);
202 SDOperand ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo);
204 void ExpandSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
205 ISD::CondCode &CCCode);
207 } // end anonymous namespace
211 /// run - This is the main entry point for the type legalizer. This does a
212 /// top-down traversal of the dag, legalizing types as it goes.
213 void DAGTypeLegalizer::run() {
214 // Create a dummy node (which is not added to allnodes), that adds a reference
215 // to the root node, preventing it from being deleted, and tracking any
216 // changes of the root.
217 HandleSDNode Dummy(DAG.getRoot());
219 // The root of the dag may dangle to deleted nodes until the type legalizer is
220 // done. Set it to null to avoid confusion.
221 DAG.setRoot(SDOperand());
223 // Walk all nodes in the graph, assigning them a NodeID of 'ReadyToProcess'
224 // (and remembering them) if they are leaves and assigning 'NewNode' if
226 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
227 E = DAG.allnodes_end(); I != E; ++I) {
228 if (I->getNumOperands() == 0) {
229 I->setNodeId(ReadyToProcess);
230 Worklist.push_back(I);
232 I->setNodeId(NewNode);
236 // Now that we have a set of nodes to process, handle them all.
237 while (!Worklist.empty()) {
238 SDNode *N = Worklist.back();
240 assert(N->getNodeId() == ReadyToProcess &&
241 "Node should be ready if on worklist!");
243 // Scan the values produced by the node, checking to see if any result
244 // types are illegal.
246 unsigned NumResults = N->getNumValues();
248 LegalizeAction Action = getTypeAction(N->getValueType(i));
249 if (Action == Promote) {
252 } else if (Action == Expand) {
256 assert(Action == Legal && "Unknown action!");
258 } while (++i < NumResults);
260 // Scan the operand list for the node, handling any nodes with operands that
263 unsigned NumOperands = N->getNumOperands();
264 bool NeedsRevisit = false;
265 for (i = 0; i != NumOperands; ++i) {
266 LegalizeAction Action = getTypeAction(N->getOperand(i).getValueType());
267 if (Action == Promote) {
268 NeedsRevisit = PromoteOperand(N, i);
270 } else if (Action == Expand) {
271 NeedsRevisit = ExpandOperand(N, i);
274 assert(Action == Legal && "Unknown action!");
278 // If the node needs revisiting, don't add all users to the worklist etc.
282 if (i == NumOperands)
283 DEBUG(cerr << "Legally typed node: "; N->dump(&DAG); cerr << "\n");
287 // If we reach here, the node was processed, potentially creating new nodes.
288 // Mark it as processed and add its users to the worklist as appropriate.
289 N->setNodeId(Processed);
291 for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
294 int NodeID = User->getNodeId();
295 assert(NodeID != ReadyToProcess && NodeID != Processed &&
296 "Invalid node id for user of unprocessed node!");
298 // This node has two options: it can either be a new node or its Node ID
299 // may be a count of the number of operands it has that are not ready.
301 User->setNodeId(NodeID-1);
303 // If this was the last use it was waiting on, add it to the ready list.
304 if (NodeID-1 == ReadyToProcess)
305 Worklist.push_back(User);
309 // Otherwise, this node is new: this is the first operand of it that
310 // became ready. Its new NodeID is the number of operands it has minus 1
311 // (as this node is now processed).
312 assert(NodeID == NewNode && "Unknown node ID!");
313 User->setNodeId(User->getNumOperands()-1);
315 // If the node only has a single operand, it is now ready.
316 if (User->getNumOperands() == 1)
317 Worklist.push_back(User);
321 // If the root changed (e.g. it was a dead load, update the root).
322 DAG.setRoot(Dummy.getValue());
326 // Remove dead nodes. This is important to do for cleanliness but also before
327 // the checking loop below. Implicit folding by the DAG.getNode operators can
328 // cause unreachable nodes to be around with their flags set to new.
329 DAG.RemoveDeadNodes();
331 // In a debug build, scan all the nodes to make sure we found them all. This
332 // ensures that there are no cycles and that everything got processed.
334 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
335 E = DAG.allnodes_end(); I != E; ++I) {
336 if (I->getNodeId() == Processed)
338 cerr << "Unprocessed node: ";
339 I->dump(&DAG); cerr << "\n";
341 if (I->getNodeId() == NewNode)
342 cerr << "New node not 'noticed'?\n";
343 else if (I->getNodeId() > 0)
344 cerr << "Operand not processed?\n";
345 else if (I->getNodeId() == ReadyToProcess)
346 cerr << "Not added to worklist?\n";
352 /// MarkNewNodes - The specified node is the root of a subtree of potentially
353 /// new nodes. Add the correct NodeId to mark it.
354 void DAGTypeLegalizer::MarkNewNodes(SDNode *N) {
355 // If this was an existing node that is already done, we're done.
356 if (N->getNodeId() != NewNode)
359 // Okay, we know that this node is new. Recursively walk all of its operands
360 // to see if they are new also. The depth of this walk is bounded by the size
361 // of the new tree that was constructed (usually 2-3 nodes), so we don't worry
362 // about revisiting of nodes.
364 // As we walk the operands, keep track of the number of nodes that are
365 // processed. If non-zero, this will become the new nodeid of this node.
366 unsigned NumProcessed = 0;
367 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
368 int OpId = N->getOperand(i).Val->getNodeId();
370 MarkNewNodes(N->getOperand(i).Val);
371 else if (OpId == Processed)
375 N->setNodeId(N->getNumOperands()-NumProcessed);
376 if (N->getNodeId() == ReadyToProcess)
377 Worklist.push_back(N);
380 /// ReplaceLegalValueWith - The specified value with a legal type was legalized
381 /// to the specified other value. If they are different, update the DAG and
382 /// NodeIDs replacing any uses of From to use To instead.
383 void DAGTypeLegalizer::ReplaceLegalValueWith(SDOperand From, SDOperand To) {
384 if (From == To) return;
386 // If expansion produced new nodes, make sure they are properly marked.
387 if (To.Val->getNodeId() == NewNode)
388 MarkNewNodes(To.Val);
390 // Anything that used the old node should now use the new one. Note that this
391 // can potentially cause recursive merging.
392 DAG.ReplaceAllUsesOfValueWith(From, To);
394 // Since we just made an unstructured update to the DAG, which could wreak
395 // general havoc on anything that once used N and now uses Res, walk all users
396 // of the result, updating their flags.
397 for (SDNode::use_iterator I = To.Val->use_begin(), E = To.Val->use_end();
400 // If the node isn't already processed or in the worklist, mark it as new,
401 // then use MarkNewNodes to recompute its ID.
402 int NodeId = User->getNodeId();
403 if (NodeId != ReadyToProcess && NodeId != Processed) {
404 User->setNodeId(NewNode);
410 void DAGTypeLegalizer::SetPromotedOp(SDOperand Op, SDOperand Result) {
411 if (Result.Val->getNodeId() == NewNode)
412 MarkNewNodes(Result.Val);
414 SDOperand &OpEntry = PromotedNodes[Op];
415 assert(OpEntry.Val == 0 && "Node is already promoted!");
419 void DAGTypeLegalizer::GetExpandedOp(SDOperand Op, SDOperand &Lo,
421 std::pair<SDOperand, SDOperand> &Entry = ExpandedNodes[Op];
422 assert(Entry.first.Val && "Operand isn't expanded");
427 void DAGTypeLegalizer::SetExpandedOp(SDOperand Op, SDOperand Lo,
429 // Remember that this is the result of the node.
430 std::pair<SDOperand, SDOperand> &Entry = ExpandedNodes[Op];
431 assert(Entry.first.Val == 0 && "Node already expanded");
435 // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
436 if (Lo.Val->getNodeId() == NewNode)
437 MarkNewNodes(Lo.Val);
438 if (Hi.Val->getNodeId() == NewNode)
439 MarkNewNodes(Hi.Val);
442 SDOperand DAGTypeLegalizer::CreateStackStoreLoad(SDOperand Op,
443 MVT::ValueType DestVT) {
444 // Create the stack frame object.
445 SDOperand FIPtr = DAG.CreateStackTemporary(DestVT);
447 // Emit a store to the stack slot.
448 SDOperand Store = DAG.getStore(DAG.getEntryNode(), Op, FIPtr, NULL, 0);
449 // Result is a load from the stack slot.
450 return DAG.getLoad(DestVT, Store, FIPtr, NULL, 0);
454 /// HandleMemIntrinsic - This handles memcpy/memset/memmove with invalid
455 /// operands. This promotes or expands the operands as required.
456 SDOperand DAGTypeLegalizer::HandleMemIntrinsic(SDNode *N) {
457 // The chain and pointer [operands #0 and #1] are always valid types.
458 SDOperand Chain = N->getOperand(0);
459 SDOperand Ptr = N->getOperand(1);
460 SDOperand Op2 = N->getOperand(2);
462 // Op #2 is either a value (memset) or a pointer. Promote it if required.
463 switch (getTypeAction(Op2.getValueType())) {
464 default: assert(0 && "Unknown action for pointer/value operand");
466 case Promote: Op2 = GetPromotedOp(Op2); break;
469 // The length could have any action required.
470 SDOperand Length = N->getOperand(3);
471 switch (getTypeAction(Length.getValueType())) {
472 default: assert(0 && "Unknown action for memop operand");
474 case Promote: Length = GetPromotedZExtOp(Length); break;
476 SDOperand Dummy; // discard the high part.
477 GetExpandedOp(Length, Length, Dummy);
481 SDOperand Align = N->getOperand(4);
482 switch (getTypeAction(Align.getValueType())) {
483 default: assert(0 && "Unknown action for memop operand");
485 case Promote: Align = GetPromotedZExtOp(Align); break;
488 SDOperand AlwaysInline = N->getOperand(5);
489 switch (getTypeAction(AlwaysInline.getValueType())) {
490 default: assert(0 && "Unknown action for memop operand");
492 case Promote: AlwaysInline = GetPromotedZExtOp(AlwaysInline); break;
495 SDOperand Ops[] = { Chain, Ptr, Op2, Length, Align, AlwaysInline };
496 return DAG.UpdateNodeOperands(SDOperand(N, 0), Ops, 6);
499 //===----------------------------------------------------------------------===//
501 //===----------------------------------------------------------------------===//
503 /// PromoteResult - This method is called when a result of a node is found to be
504 /// in need of promotion to a larger type. At this point, the node may also
505 /// have invalid operands or may have other results that need expansion, we just
506 /// know that (at least) one result needs promotion.
507 void DAGTypeLegalizer::PromoteResult(SDNode *N, unsigned ResNo) {
508 DEBUG(cerr << "Promote node result: "; N->dump(&DAG); cerr << "\n");
509 SDOperand Result = SDOperand();
511 switch (N->getOpcode()) {
514 cerr << "PromoteResult #" << ResNo << ": ";
515 N->dump(&DAG); cerr << "\n";
517 assert(0 && "Do not know how to promote this operator!");
519 case ISD::UNDEF: Result = PromoteResult_UNDEF(N); break;
520 case ISD::Constant: Result = PromoteResult_Constant(N); break;
522 case ISD::TRUNCATE: Result = PromoteResult_TRUNCATE(N); break;
523 case ISD::SIGN_EXTEND:
524 case ISD::ZERO_EXTEND:
525 case ISD::ANY_EXTEND: Result = PromoteResult_INT_EXTEND(N); break;
526 case ISD::FP_ROUND: Result = PromoteResult_FP_ROUND(N); break;
528 case ISD::SETCC: Result = PromoteResult_SETCC(N); break;
529 case ISD::LOAD: Result = PromoteResult_LOAD(cast<LoadSDNode>(N)); break;
536 case ISD::MUL: Result = PromoteResult_SimpleIntBinOp(N); break;
538 case ISD::SHL: Result = PromoteResult_SHL(N); break;
539 case ISD::SRA: Result = PromoteResult_SRA(N); break;
540 case ISD::SRL: Result = PromoteResult_SRL(N); break;
542 case ISD::SELECT: Result = PromoteResult_SELECT(N); break;
543 case ISD::SELECT_CC: Result = PromoteResult_SELECT_CC(N); break;
547 // If Result is null, the sub-method took care of registering the result.
549 SetPromotedOp(SDOperand(N, ResNo), Result);
552 SDOperand DAGTypeLegalizer::PromoteResult_UNDEF(SDNode *N) {
553 return DAG.getNode(ISD::UNDEF, TLI.getTypeToTransformTo(N->getValueType(0)));
556 SDOperand DAGTypeLegalizer::PromoteResult_Constant(SDNode *N) {
557 MVT::ValueType VT = N->getValueType(0);
558 // Zero extend things like i1, sign extend everything else. It shouldn't
559 // matter in theory which one we pick, but this tends to give better code?
560 unsigned Opc = VT != MVT::i1 ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
561 SDOperand Result = DAG.getNode(Opc, TLI.getTypeToTransformTo(VT),
563 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold ext?");
567 SDOperand DAGTypeLegalizer::PromoteResult_TRUNCATE(SDNode *N) {
570 switch (getTypeAction(N->getOperand(0).getValueType())) {
571 default: assert(0 && "Unknown type action!");
574 Res = N->getOperand(0);
577 Res = GetPromotedOp(N->getOperand(0));
581 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
582 assert(MVT::getSizeInBits(Res.getValueType()) >= MVT::getSizeInBits(NVT) &&
583 "Truncation doesn't make sense!");
584 if (Res.getValueType() == NVT)
587 // Truncate to NVT instead of VT
588 return DAG.getNode(ISD::TRUNCATE, NVT, Res);
591 SDOperand DAGTypeLegalizer::PromoteResult_INT_EXTEND(SDNode *N) {
592 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
594 if (getTypeAction(N->getOperand(0).getValueType()) == Promote) {
595 SDOperand Res = GetPromotedOp(N->getOperand(0));
596 assert(MVT::getSizeInBits(Res.getValueType()) <= MVT::getSizeInBits(NVT) &&
597 "Extension doesn't make sense!");
599 // If the result and operand types are the same after promotion, simplify
600 // to an in-register extension.
601 if (NVT == Res.getValueType()) {
602 // The high bits are not guaranteed to be anything. Insert an extend.
603 if (N->getOpcode() == ISD::SIGN_EXTEND)
604 return DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res,
605 DAG.getValueType(N->getOperand(0).getValueType()));
606 if (N->getOpcode() == ISD::ZERO_EXTEND)
607 return DAG.getZeroExtendInReg(Res, N->getOperand(0).getValueType());
608 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!");
613 // Otherwise, just extend the original operand all the way to the larger type.
614 return DAG.getNode(N->getOpcode(), NVT, N->getOperand(0));
617 SDOperand DAGTypeLegalizer::PromoteResult_FP_ROUND(SDNode *N) {
618 // NOTE: Assumes input is legal.
619 return DAG.getNode(ISD::FP_ROUND_INREG, N->getOperand(0).getValueType(),
620 N->getOperand(0), DAG.getValueType(N->getValueType(0)));
623 SDOperand DAGTypeLegalizer::PromoteResult_SETCC(SDNode *N) {
624 assert(isTypeLegal(TLI.getSetCCResultTy()) && "SetCC type is not legal??");
625 return DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), N->getOperand(0),
626 N->getOperand(1), N->getOperand(2));
629 SDOperand DAGTypeLegalizer::PromoteResult_LOAD(LoadSDNode *N) {
630 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
631 ISD::LoadExtType ExtType =
632 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
633 SDOperand Res = DAG.getExtLoad(ExtType, NVT, N->getChain(), N->getBasePtr(),
634 N->getSrcValue(), N->getSrcValueOffset(),
635 N->getLoadedVT(), N->isVolatile(),
638 // Legalized the chain result - switch anything that used the old chain to
640 ReplaceLegalValueWith(SDOperand(N, 1), Res.getValue(1));
644 SDOperand DAGTypeLegalizer::PromoteResult_SimpleIntBinOp(SDNode *N) {
645 // The input may have strange things in the top bits of the registers, but
646 // these operations don't care. They may have weird bits going out, but
647 // that too is okay if they are integer operations.
648 SDOperand LHS = GetPromotedOp(N->getOperand(0));
649 SDOperand RHS = GetPromotedOp(N->getOperand(1));
650 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
653 SDOperand DAGTypeLegalizer::PromoteResult_SHL(SDNode *N) {
654 return DAG.getNode(ISD::SHL, TLI.getTypeToTransformTo(N->getValueType(0)),
655 GetPromotedOp(N->getOperand(0)), N->getOperand(1));
658 SDOperand DAGTypeLegalizer::PromoteResult_SRA(SDNode *N) {
659 // The input value must be properly sign extended.
660 MVT::ValueType VT = N->getValueType(0);
661 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
662 SDOperand Res = GetPromotedOp(N->getOperand(0));
663 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res, DAG.getValueType(VT));
664 return DAG.getNode(ISD::SRA, NVT, Res, N->getOperand(1));
667 SDOperand DAGTypeLegalizer::PromoteResult_SRL(SDNode *N) {
668 // The input value must be properly zero extended.
669 MVT::ValueType VT = N->getValueType(0);
670 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
671 SDOperand Res = GetPromotedZExtOp(N->getOperand(0));
672 return DAG.getNode(ISD::SRL, NVT, Res, N->getOperand(1));
675 SDOperand DAGTypeLegalizer::PromoteResult_SELECT(SDNode *N) {
676 SDOperand LHS = GetPromotedOp(N->getOperand(1));
677 SDOperand RHS = GetPromotedOp(N->getOperand(2));
678 return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
681 SDOperand DAGTypeLegalizer::PromoteResult_SELECT_CC(SDNode *N) {
682 SDOperand LHS = GetPromotedOp(N->getOperand(2));
683 SDOperand RHS = GetPromotedOp(N->getOperand(3));
684 return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
685 N->getOperand(1), LHS, RHS, N->getOperand(4));
688 //===----------------------------------------------------------------------===//
690 //===----------------------------------------------------------------------===//
692 /// ExpandResult - This method is called when the specified result of the
693 /// specified node is found to need expansion. At this point, the node may also
694 /// have invalid operands or may have other results that need promotion, we just
695 /// know that (at least) one result needs expansion.
696 void DAGTypeLegalizer::ExpandResult(SDNode *N, unsigned ResNo) {
697 DEBUG(cerr << "Expand node result: "; N->dump(&DAG); cerr << "\n");
699 Lo = Hi = SDOperand();
701 // If this is a single-result node, see if the target wants to custom expand
703 if (N->getNumValues() == 1 &&
704 TLI.getOperationAction(N->getOpcode(),
705 N->getValueType(0)) == TargetLowering::Custom) {
706 // If the target wants to, allow it to lower this itself.
707 std::pair<SDOperand,SDOperand> P = TLI.ExpandOperationResult(N, DAG);
715 switch (N->getOpcode()) {
718 cerr << "ExpandResult #" << ResNo << ": ";
719 N->dump(&DAG); cerr << "\n";
721 assert(0 && "Do not know how to expand this operator!");
724 case ISD::UNDEF: ExpandResult_UNDEF(N, Lo, Hi); break;
725 case ISD::Constant: ExpandResult_Constant(N, Lo, Hi); break;
726 case ISD::BUILD_PAIR: ExpandResult_BUILD_PAIR(N, Lo, Hi); break;
727 case ISD::ANY_EXTEND: ExpandResult_ANY_EXTEND(N, Lo, Hi); break;
728 case ISD::ZERO_EXTEND: ExpandResult_ZERO_EXTEND(N, Lo, Hi); break;
729 case ISD::SIGN_EXTEND: ExpandResult_SIGN_EXTEND(N, Lo, Hi); break;
730 case ISD::BIT_CONVERT: ExpandResult_BIT_CONVERT(N, Lo, Hi); break;
731 case ISD::SIGN_EXTEND_INREG: ExpandResult_SIGN_EXTEND_INREG(N, Lo, Hi); break;
732 case ISD::LOAD: ExpandResult_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
736 case ISD::XOR: ExpandResult_Logical(N, Lo, Hi); break;
737 case ISD::BSWAP: ExpandResult_BSWAP(N, Lo, Hi); break;
739 case ISD::SUB: ExpandResult_ADDSUB(N, Lo, Hi); break;
741 case ISD::SUBC: ExpandResult_ADDSUBC(N, Lo, Hi); break;
743 case ISD::SUBE: ExpandResult_ADDSUBE(N, Lo, Hi); break;
744 case ISD::SELECT: ExpandResult_SELECT(N, Lo, Hi); break;
745 case ISD::SELECT_CC: ExpandResult_SELECT_CC(N, Lo, Hi); break;
746 case ISD::MUL: ExpandResult_MUL(N, Lo, Hi); break;
749 case ISD::SRL: ExpandResult_Shift(N, Lo, Hi); break;
753 // If Lo/Hi is null, the sub-method took care of registering results etc.
755 SetExpandedOp(SDOperand(N, ResNo), Lo, Hi);
758 void DAGTypeLegalizer::ExpandResult_UNDEF(SDNode *N,
759 SDOperand &Lo, SDOperand &Hi) {
760 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
761 Lo = Hi = DAG.getNode(ISD::UNDEF, NVT);
764 void DAGTypeLegalizer::ExpandResult_Constant(SDNode *N,
765 SDOperand &Lo, SDOperand &Hi) {
766 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
767 uint64_t Cst = cast<ConstantSDNode>(N)->getValue();
768 Lo = DAG.getConstant(Cst, NVT);
769 Hi = DAG.getConstant(Cst >> MVT::getSizeInBits(NVT), NVT);
772 void DAGTypeLegalizer::ExpandResult_BUILD_PAIR(SDNode *N,
773 SDOperand &Lo, SDOperand &Hi) {
774 // Return the operands.
775 Lo = N->getOperand(0);
776 Hi = N->getOperand(1);
779 void DAGTypeLegalizer::ExpandResult_ANY_EXTEND(SDNode *N,
780 SDOperand &Lo, SDOperand &Hi) {
782 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
783 // The low part is any extension of the input (which degenerates to a copy).
784 Lo = DAG.getNode(ISD::ANY_EXTEND, NVT, N->getOperand(0));
785 Hi = DAG.getNode(ISD::UNDEF, NVT); // The high part is undefined.
788 void DAGTypeLegalizer::ExpandResult_ZERO_EXTEND(SDNode *N,
789 SDOperand &Lo, SDOperand &Hi) {
790 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
791 // The low part is zero extension of the input (which degenerates to a copy).
792 Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, N->getOperand(0));
793 Hi = DAG.getConstant(0, NVT); // The high part is just a zero.
796 void DAGTypeLegalizer::ExpandResult_SIGN_EXTEND(SDNode *N,
797 SDOperand &Lo, SDOperand &Hi) {
798 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
799 // The low part is sign extension of the input (which degenerates to a copy).
800 Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, N->getOperand(0));
802 // The high part is obtained by SRA'ing all but one of the bits of low part.
803 unsigned LoSize = MVT::getSizeInBits(NVT);
804 Hi = DAG.getNode(ISD::SRA, NVT, Lo,
805 DAG.getConstant(LoSize-1, TLI.getShiftAmountTy()));
808 void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N,
809 SDOperand &Lo, SDOperand &Hi) {
810 // Lower the bit-convert to a store/load from the stack, then expand the load.
811 SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
812 ExpandResult_LOAD(cast<LoadSDNode>(Op.Val), Lo, Hi);
815 void DAGTypeLegalizer::
816 ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
817 GetExpandedOp(N->getOperand(0), Lo, Hi);
819 // sext_inreg the low part if needed.
820 Lo = DAG.getNode(ISD::SIGN_EXTEND_INREG, Lo.getValueType(), Lo,
823 // The high part gets the sign extension from the lo-part. This handles
824 // things like sextinreg V:i64 from i8.
825 Hi = DAG.getNode(ISD::SRA, Hi.getValueType(), Lo,
826 DAG.getConstant(MVT::getSizeInBits(Hi.getValueType())-1,
827 TLI.getShiftAmountTy()));
831 void DAGTypeLegalizer::ExpandResult_LOAD(LoadSDNode *N,
832 SDOperand &Lo, SDOperand &Hi) {
833 MVT::ValueType VT = N->getValueType(0);
834 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
835 SDOperand Ch = N->getChain(); // Legalize the chain.
836 SDOperand Ptr = N->getBasePtr(); // Legalize the pointer.
837 ISD::LoadExtType ExtType = N->getExtensionType();
838 int SVOffset = N->getSrcValueOffset();
839 unsigned Alignment = N->getAlignment();
840 bool isVolatile = N->isVolatile();
842 if (ExtType == ISD::NON_EXTLOAD) {
843 Lo = DAG.getLoad(NVT, Ch, Ptr, N->getSrcValue(), SVOffset,
844 isVolatile, Alignment);
845 // Increment the pointer to the other half.
846 unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8;
847 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
848 getIntPtrConstant(IncrementSize));
849 Hi = DAG.getLoad(NVT, Ch, Ptr, N->getSrcValue(), SVOffset+IncrementSize,
850 isVolatile, std::max(Alignment, IncrementSize));
852 // Build a factor node to remember that this load is independent of the
854 Ch = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
857 // Handle endianness of the load.
858 if (!TLI.isLittleEndian())
861 MVT::ValueType EVT = N->getLoadedVT();
864 Lo = DAG.getLoad(NVT, Ch, Ptr, N->getSrcValue(),
865 SVOffset, isVolatile, Alignment);
867 Lo = DAG.getExtLoad(ExtType, NVT, Ch, Ptr, N->getSrcValue(),
868 SVOffset, EVT, isVolatile,
870 // Remember the chain.
873 if (ExtType == ISD::SEXTLOAD) {
874 // The high part is obtained by SRA'ing all but one of the bits of the
876 unsigned LoSize = MVT::getSizeInBits(Lo.getValueType());
877 Hi = DAG.getNode(ISD::SRA, NVT, Lo,
878 DAG.getConstant(LoSize-1, TLI.getShiftAmountTy()));
879 } else if (ExtType == ISD::ZEXTLOAD) {
880 // The high part is just a zero.
881 Hi = DAG.getConstant(0, NVT);
883 assert(ExtType == ISD::EXTLOAD && "Unknown extload!");
884 // The high part is undefined.
885 Hi = DAG.getNode(ISD::UNDEF, NVT);
889 // Legalized the chain result - switch anything that used the old chain to
891 ReplaceLegalValueWith(SDOperand(N, 1), Ch);
895 void DAGTypeLegalizer::ExpandResult_Logical(SDNode *N,
896 SDOperand &Lo, SDOperand &Hi) {
897 SDOperand LL, LH, RL, RH;
898 GetExpandedOp(N->getOperand(0), LL, LH);
899 GetExpandedOp(N->getOperand(1), RL, RH);
900 Lo = DAG.getNode(N->getOpcode(), LL.getValueType(), LL, RL);
901 Hi = DAG.getNode(N->getOpcode(), LL.getValueType(), LH, RH);
904 void DAGTypeLegalizer::ExpandResult_BSWAP(SDNode *N,
905 SDOperand &Lo, SDOperand &Hi) {
906 GetExpandedOp(N->getOperand(0), Hi, Lo); // Note swapped operands.
907 Lo = DAG.getNode(ISD::BSWAP, Lo.getValueType(), Lo);
908 Hi = DAG.getNode(ISD::BSWAP, Hi.getValueType(), Hi);
912 void DAGTypeLegalizer::ExpandResult_SELECT(SDNode *N,
913 SDOperand &Lo, SDOperand &Hi) {
914 SDOperand LL, LH, RL, RH;
915 GetExpandedOp(N->getOperand(1), LL, LH);
916 GetExpandedOp(N->getOperand(2), RL, RH);
917 Lo = DAG.getNode(ISD::SELECT, LL.getValueType(), N->getOperand(0), LL, RL);
919 assert(N->getOperand(0).getValueType() != MVT::f32 &&
920 "FIXME: softfp shouldn't use expand!");
921 Hi = DAG.getNode(ISD::SELECT, LL.getValueType(), N->getOperand(0), LH, RH);
924 void DAGTypeLegalizer::ExpandResult_SELECT_CC(SDNode *N,
925 SDOperand &Lo, SDOperand &Hi) {
926 SDOperand LL, LH, RL, RH;
927 GetExpandedOp(N->getOperand(2), LL, LH);
928 GetExpandedOp(N->getOperand(3), RL, RH);
929 Lo = DAG.getNode(ISD::SELECT_CC, LL.getValueType(), N->getOperand(0),
930 N->getOperand(1), LL, RL, N->getOperand(4));
932 assert(N->getOperand(0).getValueType() != MVT::f32 &&
933 "FIXME: softfp shouldn't use expand!");
934 Hi = DAG.getNode(ISD::SELECT_CC, LL.getValueType(), N->getOperand(0),
935 N->getOperand(1), LH, RH, N->getOperand(4));
938 void DAGTypeLegalizer::ExpandResult_ADDSUB(SDNode *N,
939 SDOperand &Lo, SDOperand &Hi) {
940 // Expand the subcomponents.
941 SDOperand LHSL, LHSH, RHSL, RHSH;
942 GetExpandedOp(N->getOperand(0), LHSL, LHSH);
943 GetExpandedOp(N->getOperand(1), RHSL, RHSH);
944 SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
945 SDOperand LoOps[2] = { LHSL, RHSL };
946 SDOperand HiOps[3] = { LHSH, RHSH };
948 if (N->getOpcode() == ISD::ADD) {
949 Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
950 HiOps[2] = Lo.getValue(1);
951 Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
953 Lo = DAG.getNode(ISD::SUBC, VTList, LoOps, 2);
954 HiOps[2] = Lo.getValue(1);
955 Hi = DAG.getNode(ISD::SUBE, VTList, HiOps, 3);
959 void DAGTypeLegalizer::ExpandResult_ADDSUBC(SDNode *N,
960 SDOperand &Lo, SDOperand &Hi) {
961 // Expand the subcomponents.
962 SDOperand LHSL, LHSH, RHSL, RHSH;
963 GetExpandedOp(N->getOperand(0), LHSL, LHSH);
964 GetExpandedOp(N->getOperand(1), RHSL, RHSH);
965 SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
966 SDOperand LoOps[2] = { LHSL, RHSL };
967 SDOperand HiOps[3] = { LHSH, RHSH };
969 if (N->getOpcode() == ISD::ADDC) {
970 Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
971 HiOps[2] = Lo.getValue(1);
972 Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
974 Lo = DAG.getNode(ISD::SUBC, VTList, LoOps, 2);
975 HiOps[2] = Lo.getValue(1);
976 Hi = DAG.getNode(ISD::SUBE, VTList, HiOps, 3);
979 // Legalized the flag result - switch anything that used the old flag to
981 ReplaceLegalValueWith(SDOperand(N, 1), Hi.getValue(1));
984 void DAGTypeLegalizer::ExpandResult_ADDSUBE(SDNode *N,
985 SDOperand &Lo, SDOperand &Hi) {
986 // Expand the subcomponents.
987 SDOperand LHSL, LHSH, RHSL, RHSH;
988 GetExpandedOp(N->getOperand(0), LHSL, LHSH);
989 GetExpandedOp(N->getOperand(1), RHSL, RHSH);
990 SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
991 SDOperand LoOps[3] = { LHSL, RHSL, N->getOperand(2) };
992 SDOperand HiOps[3] = { LHSH, RHSH };
994 Lo = DAG.getNode(N->getOpcode(), VTList, LoOps, 3);
995 HiOps[2] = Lo.getValue(1);
996 Hi = DAG.getNode(N->getOpcode(), VTList, HiOps, 3);
998 // Legalized the flag result - switch anything that used the old flag to
1000 ReplaceLegalValueWith(SDOperand(N, 1), Hi.getValue(1));
1003 void DAGTypeLegalizer::ExpandResult_MUL(SDNode *N,
1004 SDOperand &Lo, SDOperand &Hi) {
1005 MVT::ValueType VT = N->getValueType(0);
1006 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1008 bool HasMULHS = TLI.isOperationLegal(ISD::MULHS, NVT);
1009 bool HasMULHU = TLI.isOperationLegal(ISD::MULHU, NVT);
1010 bool HasSMUL_LOHI = TLI.isOperationLegal(ISD::SMUL_LOHI, NVT);
1011 bool HasUMUL_LOHI = TLI.isOperationLegal(ISD::UMUL_LOHI, NVT);
1012 if (HasMULHU || HasMULHS || HasUMUL_LOHI || HasSMUL_LOHI) {
1013 SDOperand LL, LH, RL, RH;
1014 GetExpandedOp(N->getOperand(0), LL, LH);
1015 GetExpandedOp(N->getOperand(1), RL, RH);
1016 unsigned BitSize = MVT::getSizeInBits(RH.getValueType());
1017 unsigned LHSSB = DAG.ComputeNumSignBits(N->getOperand(0));
1018 unsigned RHSSB = DAG.ComputeNumSignBits(N->getOperand(1));
1020 // FIXME: generalize this to handle other bit sizes
1021 if (LHSSB == 32 && RHSSB == 32 &&
1022 DAG.MaskedValueIsZero(N->getOperand(0), 0xFFFFFFFF00000000ULL) &&
1023 DAG.MaskedValueIsZero(N->getOperand(1), 0xFFFFFFFF00000000ULL)) {
1024 // The inputs are both zero-extended.
1026 // We can emit a umul_lohi.
1027 Lo = DAG.getNode(ISD::UMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL);
1028 Hi = SDOperand(Lo.Val, 1);
1032 // We can emit a mulhu+mul.
1033 Lo = DAG.getNode(ISD::MUL, NVT, LL, RL);
1034 Hi = DAG.getNode(ISD::MULHU, NVT, LL, RL);
1038 if (LHSSB > BitSize && RHSSB > BitSize) {
1039 // The input values are both sign-extended.
1041 // We can emit a smul_lohi.
1042 Lo = DAG.getNode(ISD::SMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL);
1043 Hi = SDOperand(Lo.Val, 1);
1047 // We can emit a mulhs+mul.
1048 Lo = DAG.getNode(ISD::MUL, NVT, LL, RL);
1049 Hi = DAG.getNode(ISD::MULHS, NVT, LL, RL);
1054 // Lo,Hi = umul LHS, RHS.
1055 SDOperand UMulLOHI = DAG.getNode(ISD::UMUL_LOHI,
1056 DAG.getVTList(NVT, NVT), LL, RL);
1058 Hi = UMulLOHI.getValue(1);
1059 RH = DAG.getNode(ISD::MUL, NVT, LL, RH);
1060 LH = DAG.getNode(ISD::MUL, NVT, LH, RL);
1061 Hi = DAG.getNode(ISD::ADD, NVT, Hi, RH);
1062 Hi = DAG.getNode(ISD::ADD, NVT, Hi, LH);
1069 // If nothing else, we can make a libcall.
1070 Lo = ExpandLibCall(TLI.getLibcallName(RTLIB::MUL_I64), N,
1071 false/*sign irrelevant*/, Hi);
1076 void DAGTypeLegalizer::ExpandResult_Shift(SDNode *N,
1077 SDOperand &Lo, SDOperand &Hi) {
1078 MVT::ValueType VT = N->getValueType(0);
1080 // If we can emit an efficient shift operation, do so now. Check to see if
1081 // the RHS is a constant.
1082 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
1083 return ExpandShiftByConstant(N, CN->getValue(), Lo, Hi);
1085 // If we can determine that the high bit of the shift is zero or one, even if
1086 // the low bits are variable, emit this shift in an optimized form.
1087 if (ExpandShiftWithKnownAmountBit(N, Lo, Hi))
1090 // If this target supports shift_PARTS, use it. First, map to the _PARTS opc.
1092 if (N->getOpcode() == ISD::SHL)
1093 PartsOpc = ISD::SHL_PARTS;
1094 else if (N->getOpcode() == ISD::SRL)
1095 PartsOpc = ISD::SRL_PARTS;
1097 assert(N->getOpcode() == ISD::SRA && "Unknown shift!");
1098 PartsOpc = ISD::SRA_PARTS;
1101 // Next check to see if the target supports this SHL_PARTS operation or if it
1102 // will custom expand it.
1103 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1104 TargetLowering::LegalizeAction Action = TLI.getOperationAction(PartsOpc, NVT);
1105 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
1106 Action == TargetLowering::Custom) {
1107 // Expand the subcomponents.
1108 SDOperand LHSL, LHSH;
1109 GetExpandedOp(N->getOperand(0), LHSL, LHSH);
1111 SDOperand Ops[] = { LHSL, LHSH, N->getOperand(1) };
1112 MVT::ValueType VT = LHSL.getValueType();
1113 Lo = DAG.getNode(PartsOpc, DAG.getNodeValueTypes(VT, VT), 2, Ops, 3);
1114 Hi = Lo.getValue(1);
1120 // Otherwise, emit a libcall.
1121 unsigned RuntimeCode = ; // SRL -> SRL_I64 etc.
1123 Lo = ExpandLibCall(TLI.getLibcallName(RTLIB::SRL_I64), N,
1124 false/*lshr is unsigned*/, Hi);
1129 /// ExpandShiftByConstant - N is a shift by a value that needs to be expanded,
1130 /// and the shift amount is a constant 'Amt'. Expand the operation.
1131 void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
1132 SDOperand &Lo, SDOperand &Hi) {
1133 // Expand the incoming operand to be shifted, so that we have its parts
1135 GetExpandedOp(N->getOperand(0), InL, InH);
1137 MVT::ValueType NVT = InL.getValueType();
1138 unsigned VTBits = MVT::getSizeInBits(N->getValueType(0));
1139 unsigned NVTBits = MVT::getSizeInBits(NVT);
1140 MVT::ValueType ShTy = N->getOperand(1).getValueType();
1142 if (N->getOpcode() == ISD::SHL) {
1144 Lo = Hi = DAG.getConstant(0, NVT);
1145 } else if (Amt > NVTBits) {
1146 Lo = DAG.getConstant(0, NVT);
1147 Hi = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Amt-NVTBits,ShTy));
1148 } else if (Amt == NVTBits) {
1149 Lo = DAG.getConstant(0, NVT);
1152 Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Amt, ShTy));
1153 Hi = DAG.getNode(ISD::OR, NVT,
1154 DAG.getNode(ISD::SHL, NVT, InH,
1155 DAG.getConstant(Amt, ShTy)),
1156 DAG.getNode(ISD::SRL, NVT, InL,
1157 DAG.getConstant(NVTBits-Amt, ShTy)));
1162 if (N->getOpcode() == ISD::SRL) {
1164 Lo = DAG.getConstant(0, NVT);
1165 Hi = DAG.getConstant(0, NVT);
1166 } else if (Amt > NVTBits) {
1167 Lo = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy));
1168 Hi = DAG.getConstant(0, NVT);
1169 } else if (Amt == NVTBits) {
1171 Hi = DAG.getConstant(0, NVT);
1173 Lo = DAG.getNode(ISD::OR, NVT,
1174 DAG.getNode(ISD::SRL, NVT, InL,
1175 DAG.getConstant(Amt, ShTy)),
1176 DAG.getNode(ISD::SHL, NVT, InH,
1177 DAG.getConstant(NVTBits-Amt, ShTy)));
1178 Hi = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Amt, ShTy));
1183 assert(N->getOpcode() == ISD::SRA && "Unknown shift!");
1185 Hi = Lo = DAG.getNode(ISD::SRA, NVT, InH,
1186 DAG.getConstant(NVTBits-1, ShTy));
1187 } else if (Amt > NVTBits) {
1188 Lo = DAG.getNode(ISD::SRA, NVT, InH,
1189 DAG.getConstant(Amt-NVTBits, ShTy));
1190 Hi = DAG.getNode(ISD::SRA, NVT, InH,
1191 DAG.getConstant(NVTBits-1, ShTy));
1192 } else if (Amt == NVTBits) {
1194 Hi = DAG.getNode(ISD::SRA, NVT, InH,
1195 DAG.getConstant(NVTBits-1, ShTy));
1197 Lo = DAG.getNode(ISD::OR, NVT,
1198 DAG.getNode(ISD::SRL, NVT, InL,
1199 DAG.getConstant(Amt, ShTy)),
1200 DAG.getNode(ISD::SHL, NVT, InH,
1201 DAG.getConstant(NVTBits-Amt, ShTy)));
1202 Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(Amt, ShTy));
1206 /// ExpandShiftWithKnownAmountBit - Try to determine whether we can simplify
1207 /// this shift based on knowledge of the high bit of the shift amount. If we
1208 /// can tell this, we know that it is >= 32 or < 32, without knowing the actual
1210 bool DAGTypeLegalizer::
1211 ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
1212 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
1213 unsigned NVTBits = MVT::getSizeInBits(NVT);
1215 uint64_t HighBitMask = NVTBits, KnownZero, KnownOne;
1216 DAG.ComputeMaskedBits(N->getOperand(1), HighBitMask, KnownZero, KnownOne);
1218 // If we don't know anything about the high bit, exit.
1219 if (((KnownZero|KnownOne) & HighBitMask) == 0)
1222 // Get the incoming operand to be shifted.
1224 GetExpandedOp(N->getOperand(0), InL, InH);
1225 SDOperand Amt = N->getOperand(1);
1227 // If we know that the high bit of the shift amount is one, then we can do
1228 // this as a couple of simple shifts.
1229 if (KnownOne & HighBitMask) {
1230 // Mask out the high bit, which we know is set.
1231 Amt = DAG.getNode(ISD::AND, Amt.getValueType(), Amt,
1232 DAG.getConstant(NVTBits-1, Amt.getValueType()));
1234 switch (N->getOpcode()) {
1235 default: assert(0 && "Unknown shift");
1237 Lo = DAG.getConstant(0, NVT); // Low part is zero.
1238 Hi = DAG.getNode(ISD::SHL, NVT, InL, Amt); // High part from Lo part.
1241 Hi = DAG.getConstant(0, NVT); // Hi part is zero.
1242 Lo = DAG.getNode(ISD::SRL, NVT, InH, Amt); // Lo part from Hi part.
1245 Hi = DAG.getNode(ISD::SRA, NVT, InH, // Sign extend high part.
1246 DAG.getConstant(NVTBits-1, Amt.getValueType()));
1247 Lo = DAG.getNode(ISD::SRA, NVT, InH, Amt); // Lo part from Hi part.
1252 // If we know that the high bit of the shift amount is zero, then we can do
1253 // this as a couple of simple shifts.
1254 assert((KnownZero & HighBitMask) && "Bad mask computation above");
1257 SDOperand Amt2 = DAG.getNode(ISD::SUB, Amt.getValueType(),
1258 DAG.getConstant(NVTBits, Amt.getValueType()),
1261 switch (N->getOpcode()) {
1262 default: assert(0 && "Unknown shift");
1263 case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break;
1265 case ISD::SRA: Op1 = ISD::SRL; Op2 = ISD::SHL; break;
1268 Lo = DAG.getNode(N->getOpcode(), NVT, InL, Amt);
1269 Hi = DAG.getNode(ISD::OR, NVT,
1270 DAG.getNode(Op1, NVT, InH, Amt),
1271 DAG.getNode(Op2, NVT, InL, Amt2));
1275 //===----------------------------------------------------------------------===//
1276 // Operand Promotion
1277 //===----------------------------------------------------------------------===//
1279 /// PromoteOperand - This method is called when the specified operand of the
1280 /// specified node is found to need promotion. At this point, all of the result
1281 /// types of the node are known to be legal, but other operands of the node may
1282 /// need promotion or expansion as well as the specified one.
1283 bool DAGTypeLegalizer::PromoteOperand(SDNode *N, unsigned OpNo) {
1284 DEBUG(cerr << "Promote node operand: "; N->dump(&DAG); cerr << "\n");
1286 switch (N->getOpcode()) {
1289 cerr << "PromoteOperand Op #" << OpNo << ": ";
1290 N->dump(&DAG); cerr << "\n";
1292 assert(0 && "Do not know how to promote this operator's operand!");
1295 case ISD::ANY_EXTEND: Res = PromoteOperand_ANY_EXTEND(N); break;
1296 case ISD::ZERO_EXTEND: Res = PromoteOperand_ZERO_EXTEND(N); break;
1297 case ISD::SIGN_EXTEND: Res = PromoteOperand_SIGN_EXTEND(N); break;
1298 case ISD::TRUNCATE: Res = PromoteOperand_TRUNCATE(N); break;
1299 case ISD::FP_EXTEND: Res = PromoteOperand_FP_EXTEND(N); break;
1300 case ISD::FP_ROUND: Res = PromoteOperand_FP_ROUND(N); break;
1302 case ISD::SELECT: Res = PromoteOperand_SELECT(N, OpNo); break;
1303 case ISD::BRCOND: Res = PromoteOperand_BRCOND(N, OpNo); break;
1304 case ISD::BR_CC: Res = PromoteOperand_BR_CC(N, OpNo); break;
1306 case ISD::STORE: Res = PromoteOperand_STORE(cast<StoreSDNode>(N),
1310 case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break;
1313 // If the result is null, the sub-method took care of registering results etc.
1314 if (!Res.Val) return false;
1315 // If the result is N, the sub-method updated N in place.
1317 // Mark N as new and remark N and its operands. This allows us to correctly
1318 // revisit N if it needs another step of promotion and allows us to visit
1319 // any new operands to N.
1320 N->setNodeId(NewNode);
1325 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1326 "Invalid operand expansion");
1328 ReplaceLegalValueWith(SDOperand(N, 0), Res);
1332 SDOperand DAGTypeLegalizer::PromoteOperand_ANY_EXTEND(SDNode *N) {
1333 SDOperand Op = GetPromotedOp(N->getOperand(0));
1334 return DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
1337 SDOperand DAGTypeLegalizer::PromoteOperand_ZERO_EXTEND(SDNode *N) {
1338 SDOperand Op = GetPromotedOp(N->getOperand(0));
1339 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
1340 return DAG.getZeroExtendInReg(Op, N->getOperand(0).getValueType());
1343 SDOperand DAGTypeLegalizer::PromoteOperand_SIGN_EXTEND(SDNode *N) {
1344 SDOperand Op = GetPromotedOp(N->getOperand(0));
1345 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
1346 return DAG.getNode(ISD::SIGN_EXTEND_INREG, Op.getValueType(),
1347 Op, DAG.getValueType(N->getOperand(0).getValueType()));
1350 SDOperand DAGTypeLegalizer::PromoteOperand_TRUNCATE(SDNode *N) {
1351 SDOperand Op = GetPromotedOp(N->getOperand(0));
1352 return DAG.getNode(ISD::TRUNCATE, N->getValueType(0), Op);
1355 SDOperand DAGTypeLegalizer::PromoteOperand_FP_EXTEND(SDNode *N) {
1356 SDOperand Op = GetPromotedOp(N->getOperand(0));
1357 return DAG.getNode(ISD::FP_EXTEND, N->getValueType(0), Op);
1360 SDOperand DAGTypeLegalizer::PromoteOperand_FP_ROUND(SDNode *N) {
1361 SDOperand Op = GetPromotedOp(N->getOperand(0));
1362 return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Op);
1366 SDOperand DAGTypeLegalizer::PromoteOperand_SELECT(SDNode *N, unsigned OpNo) {
1367 assert(OpNo == 0 && "Only know how to promote condition");
1368 SDOperand Cond = GetPromotedOp(N->getOperand(0)); // Promote the condition.
1370 // The top bits of the promoted condition are not necessarily zero, ensure
1371 // that the value is properly zero extended.
1372 if (!DAG.MaskedValueIsZero(Cond,
1373 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
1374 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
1375 MarkNewNodes(Cond.Val);
1378 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
1379 return DAG.UpdateNodeOperands(SDOperand(N, 0), Cond, N->getOperand(1),
1384 SDOperand DAGTypeLegalizer::PromoteOperand_BRCOND(SDNode *N, unsigned OpNo) {
1385 assert(OpNo == 1 && "only know how to promote condition");
1386 SDOperand Cond = GetPromotedOp(N->getOperand(1)); // Promote the condition.
1388 // The top bits of the promoted condition are not necessarily zero, ensure
1389 // that the value is properly zero extended.
1390 if (!DAG.MaskedValueIsZero(Cond,
1391 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
1392 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
1393 MarkNewNodes(Cond.Val);
1396 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
1397 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), Cond,
1401 SDOperand DAGTypeLegalizer::PromoteOperand_BR_CC(SDNode *N, unsigned OpNo) {
1402 assert(OpNo == 2 && "Don't know how to promote this operand");
1404 SDOperand LHS = N->getOperand(2);
1405 SDOperand RHS = N->getOperand(3);
1406 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(1))->get());
1408 // The chain (Op#0), CC (#1) and basic block destination (Op#4) are always
1410 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
1411 N->getOperand(1), LHS, RHS, N->getOperand(4));
1414 /// PromoteSetCCOperands - Promote the operands of a comparison. This code is
1415 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
1416 void DAGTypeLegalizer::PromoteSetCCOperands(SDOperand &NewLHS,SDOperand &NewRHS,
1417 ISD::CondCode CCCode) {
1418 MVT::ValueType VT = NewLHS.getValueType();
1420 // Get the promoted values.
1421 NewLHS = GetPromotedOp(NewLHS);
1422 NewRHS = GetPromotedOp(NewRHS);
1424 // If this is an FP compare, the operands have already been extended.
1425 if (!MVT::isInteger(NewLHS.getValueType()))
1428 // Otherwise, we have to insert explicit sign or zero extends. Note
1429 // that we could insert sign extends for ALL conditions, but zero extend
1430 // is cheaper on many machines (an AND instead of two shifts), so prefer
1433 default: assert(0 && "Unknown integer comparison!");
1440 // ALL of these operations will work if we either sign or zero extend
1441 // the operands (including the unsigned comparisons!). Zero extend is
1442 // usually a simpler/cheaper operation, so prefer it.
1443 NewLHS = DAG.getZeroExtendInReg(NewLHS, VT);
1444 NewRHS = DAG.getZeroExtendInReg(NewRHS, VT);
1450 NewLHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewLHS.getValueType(), NewLHS,
1451 DAG.getValueType(VT));
1452 NewRHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewRHS.getValueType(), NewRHS,
1453 DAG.getValueType(VT));
1459 SDOperand DAGTypeLegalizer::PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo){
1460 SDOperand Ch = N->getChain(), Ptr = N->getBasePtr();
1461 int SVOffset = N->getSrcValueOffset();
1462 unsigned Alignment = N->getAlignment();
1463 bool isVolatile = N->isVolatile();
1465 SDOperand Val = GetPromotedOp(N->getValue()); // Get promoted value.
1467 assert(!N->isTruncatingStore() && "Cannot promote this store operand!");
1469 // Truncate the value and store the result.
1470 return DAG.getTruncStore(Ch, Val, Ptr, N->getSrcValue(),
1471 SVOffset, N->getStoredVT(),
1472 isVolatile, Alignment);
1476 //===----------------------------------------------------------------------===//
1477 // Operand Expansion
1478 //===----------------------------------------------------------------------===//
1480 /// ExpandOperand - This method is called when the specified operand of the
1481 /// specified node is found to need expansion. At this point, all of the result
1482 /// types of the node are known to be legal, but other operands of the node may
1483 /// need promotion or expansion as well as the specified one.
1484 bool DAGTypeLegalizer::ExpandOperand(SDNode *N, unsigned OpNo) {
1485 DEBUG(cerr << "Expand node operand: "; N->dump(&DAG); cerr << "\n");
1487 switch (N->getOpcode()) {
1490 cerr << "ExpandOperand Op #" << OpNo << ": ";
1491 N->dump(&DAG); cerr << "\n";
1493 assert(0 && "Do not know how to expand this operator's operand!");
1496 case ISD::TRUNCATE: Res = ExpandOperand_TRUNCATE(N); break;
1497 case ISD::BIT_CONVERT: Res = ExpandOperand_BIT_CONVERT(N); break;
1499 case ISD::SINT_TO_FP:
1500 Res = ExpandOperand_SINT_TO_FP(N->getOperand(0), N->getValueType(0));
1502 case ISD::UINT_TO_FP:
1503 Res = ExpandOperand_UINT_TO_FP(N->getOperand(0), N->getValueType(0));
1505 case ISD::EXTRACT_ELEMENT: Res = ExpandOperand_EXTRACT_ELEMENT(N); break;
1506 case ISD::SETCC: Res = ExpandOperand_SETCC(N); break;
1508 case ISD::STORE: Res = ExpandOperand_STORE(cast<StoreSDNode>(N), OpNo); break;
1511 case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break;
1514 // If the result is null, the sub-method took care of registering results etc.
1515 if (!Res.Val) return false;
1516 // If the result is N, the sub-method updated N in place. Check to see if any
1517 // operands are new, and if so, mark them.
1519 // Mark N as new and remark N and its operands. This allows us to correctly
1520 // revisit N if it needs another step of promotion and allows us to visit
1521 // any new operands to N.
1522 N->setNodeId(NewNode);
1527 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1528 "Invalid operand expansion");
1530 ReplaceLegalValueWith(SDOperand(N, 0), Res);
1534 SDOperand DAGTypeLegalizer::ExpandOperand_TRUNCATE(SDNode *N) {
1536 GetExpandedOp(N->getOperand(0), InL, InH);
1537 // Just truncate the low part of the source.
1538 return DAG.getNode(ISD::TRUNCATE, N->getValueType(0), InL);
1541 SDOperand DAGTypeLegalizer::ExpandOperand_BIT_CONVERT(SDNode *N) {
1542 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
1545 SDOperand DAGTypeLegalizer::ExpandOperand_SINT_TO_FP(SDOperand Source,
1546 MVT::ValueType DestTy) {
1547 // We know the destination is legal, but that the input needs to be expanded.
1548 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
1550 // Check to see if the target has a custom way to lower this. If so, use it.
1551 switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) {
1552 default: assert(0 && "This action not implemented for this operation!");
1553 case TargetLowering::Legal:
1554 case TargetLowering::Expand:
1555 break; // This case is handled below.
1556 case TargetLowering::Custom:
1557 SDOperand NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, DestTy,
1559 if (NV.Val) return NV;
1560 break; // The target lowered this.
1564 if (DestTy == MVT::f32)
1565 LC = RTLIB::SINTTOFP_I64_F32;
1567 assert(DestTy == MVT::f64 && "Unknown fp value type!");
1568 LC = RTLIB::SINTTOFP_I64_F64;
1571 assert(0 && "FIXME: no libcalls yet!");
1574 assert(TLI.getLibcallName(LC) && "Don't know how to expand this SINT_TO_FP!");
1575 Source = DAG.getNode(ISD::SINT_TO_FP, DestTy, Source);
1576 SDOperand UnusedHiPart;
1577 return ExpandLibCall(TLI.getLibcallName(LC), Source.Val, true, UnusedHiPart);
1581 SDOperand DAGTypeLegalizer::ExpandOperand_UINT_TO_FP(SDOperand Source,
1582 MVT::ValueType DestTy) {
1583 // We know the destination is legal, but that the input needs to be expanded.
1584 assert(getTypeAction(Source.getValueType()) == Expand &&
1585 "This is not an expansion!");
1586 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
1588 // If this is unsigned, and not supported, first perform the conversion to
1589 // signed, then adjust the result if the sign bit is set.
1590 SDOperand SignedConv = ExpandOperand_SINT_TO_FP(Source, DestTy);
1592 // The 64-bit value loaded will be incorrectly if the 'sign bit' of the
1593 // incoming integer is set. To handle this, we dynamically test to see if
1594 // it is set, and, if so, add a fudge factor.
1596 GetExpandedOp(Source, Lo, Hi);
1598 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Hi,
1599 DAG.getConstant(0, Hi.getValueType()),
1601 SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4);
1602 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
1603 SignSet, Four, Zero);
1604 uint64_t FF = 0x5f800000ULL;
1605 if (TLI.isLittleEndian()) FF <<= 32;
1606 Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
1608 SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
1609 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
1610 SDOperand FudgeInReg;
1611 if (DestTy == MVT::f32)
1612 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
1613 else if (MVT::getSizeInBits(DestTy) > MVT::getSizeInBits(MVT::f32))
1614 // FIXME: Avoid the extend by construction the right constantpool?
1615 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestTy, DAG.getEntryNode(),
1616 CPIdx, NULL, 0, MVT::f32);
1618 assert(0 && "Unexpected conversion");
1620 return DAG.getNode(ISD::FADD, DestTy, SignedConv, FudgeInReg);
1624 SDOperand DAGTypeLegalizer::ExpandOperand_EXTRACT_ELEMENT(SDNode *N) {
1626 GetExpandedOp(N->getOperand(0), Lo, Hi);
1627 return cast<ConstantSDNode>(N->getOperand(1))->getValue() ? Hi : Lo;
1630 SDOperand DAGTypeLegalizer::ExpandOperand_SETCC(SDNode *N) {
1631 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1632 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1633 ExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1635 // If ExpandSetCCOperands returned a scalar, use it.
1636 if (NewRHS.Val == 0) return NewLHS;
1638 // Otherwise, update N to have the operands specified.
1639 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1640 DAG.getCondCode(CCCode));
1643 /// ExpandSetCCOperands - Expand the operands of a comparison. This code is
1644 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
1645 void DAGTypeLegalizer::ExpandSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
1646 ISD::CondCode &CCCode) {
1647 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
1648 GetExpandedOp(NewLHS, LHSLo, LHSHi);
1649 GetExpandedOp(NewRHS, RHSLo, RHSHi);
1651 MVT::ValueType VT = NewLHS.getValueType();
1652 if (VT == MVT::f32 || VT == MVT::f64) {
1653 assert(0 && "FIXME: softfp not implemented yet! should be promote not exp");
1656 if (VT == MVT::ppcf128) {
1657 // FIXME: This generated code sucks. We want to generate
1658 // FCMP crN, hi1, hi2
1660 // FCMP crN, lo1, lo2
1661 // The following can be improved, but not that much.
1662 SDOperand Tmp1, Tmp2, Tmp3;
1663 Tmp1 = DAG.getSetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi, ISD::SETEQ);
1664 Tmp2 = DAG.getSetCC(TLI.getSetCCResultTy(), LHSLo, RHSLo, CCCode);
1665 Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1666 Tmp1 = DAG.getSetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi, ISD::SETNE);
1667 Tmp2 = DAG.getSetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi, CCCode);
1668 Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1669 NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
1670 NewRHS = SDOperand(); // LHS is the result, not a compare.
1675 if (CCCode == ISD::SETEQ || CCCode == ISD::SETNE) {
1677 if (ConstantSDNode *RHSCST = dyn_cast<ConstantSDNode>(RHSLo))
1678 if (RHSCST->isAllOnesValue()) {
1679 // Equality comparison to -1.
1680 NewLHS = DAG.getNode(ISD::AND, LHSLo.getValueType(), LHSLo, LHSHi);
1685 NewLHS = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSLo, RHSLo);
1686 NewRHS = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSHi, RHSHi);
1687 NewLHS = DAG.getNode(ISD::OR, NewLHS.getValueType(), NewLHS, NewRHS);
1688 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1692 // If this is a comparison of the sign bit, just look at the top part.
1694 if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(NewRHS))
1695 if ((CCCode == ISD::SETLT && CST->getValue() == 0) || // X < 0
1696 (CCCode == ISD::SETGT && CST->isAllOnesValue())) { // X > -1
1702 // FIXME: This generated code sucks.
1703 ISD::CondCode LowCC;
1705 default: assert(0 && "Unknown integer setcc!");
1707 case ISD::SETULT: LowCC = ISD::SETULT; break;
1709 case ISD::SETUGT: LowCC = ISD::SETUGT; break;
1711 case ISD::SETULE: LowCC = ISD::SETULE; break;
1713 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
1716 // Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison
1717 // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands
1718 // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
1720 // NOTE: on targets without efficient SELECT of bools, we can always use
1721 // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
1722 TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, false, true, NULL);
1723 SDOperand Tmp1, Tmp2;
1724 Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultTy(), LHSLo, RHSLo, LowCC,
1725 false, DagCombineInfo);
1727 Tmp1 = DAG.getSetCC(TLI.getSetCCResultTy(), LHSLo, RHSLo, LowCC);
1728 Tmp2 = TLI.SimplifySetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi,
1729 CCCode, false, DagCombineInfo);
1731 Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), LHSHi, RHSHi,
1732 DAG.getCondCode(CCCode));
1734 ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.Val);
1735 ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.Val);
1736 if ((Tmp1C && Tmp1C->getValue() == 0) ||
1737 (Tmp2C && Tmp2C->getValue() == 0 &&
1738 (CCCode == ISD::SETLE || CCCode == ISD::SETGE ||
1739 CCCode == ISD::SETUGE || CCCode == ISD::SETULE)) ||
1740 (Tmp2C && Tmp2C->getValue() == 1 &&
1741 (CCCode == ISD::SETLT || CCCode == ISD::SETGT ||
1742 CCCode == ISD::SETUGT || CCCode == ISD::SETULT))) {
1743 // low part is known false, returns high part.
1744 // For LE / GE, if high part is known false, ignore the low part.
1745 // For LT / GT, if high part is known true, ignore the low part.
1747 NewRHS = SDOperand();
1751 NewLHS = TLI.SimplifySetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi,
1752 ISD::SETEQ, false, DagCombineInfo);
1754 NewLHS = DAG.getSetCC(TLI.getSetCCResultTy(), LHSHi, RHSHi, ISD::SETEQ);
1755 NewLHS = DAG.getNode(ISD::SELECT, Tmp1.getValueType(),
1756 NewLHS, Tmp1, Tmp2);
1757 NewRHS = SDOperand();
1761 SDOperand DAGTypeLegalizer::ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo) {
1762 assert(OpNo == 1 && "Can only expand the stored value so far");
1763 assert(!N->isTruncatingStore() && "Can't expand truncstore!");
1765 unsigned IncrementSize = 0;
1768 // If this is a vector type, then we have to calculate the increment as
1769 // the product of the element size in bytes, and the number of elements
1770 // in the high half of the vector.
1771 if (MVT::isVector(N->getValue().getValueType())) {
1772 assert(0 && "Vectors not supported yet");
1774 SDNode *InVal = ST->getValue().Val;
1775 unsigned NumElems = MVT::getVectorNumElements(InVal->getValueType(0));
1776 MVT::ValueType EVT = MVT::getVectorElementType(InVal->getValueType(0));
1778 // Figure out if there is a simple type corresponding to this Vector
1779 // type. If so, convert to the vector type.
1780 MVT::ValueType TVT = MVT::getVectorType(EVT, NumElems);
1781 if (TLI.isTypeLegal(TVT)) {
1782 // Turn this into a normal store of the vector type.
1783 Tmp3 = LegalizeOp(Node->getOperand(1));
1784 Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
1785 SVOffset, isVolatile, Alignment);
1786 Result = LegalizeOp(Result);
1788 } else if (NumElems == 1) {
1789 // Turn this into a normal store of the scalar type.
1790 Tmp3 = ScalarizeVectorOp(Node->getOperand(1));
1791 Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
1792 SVOffset, isVolatile, Alignment);
1793 // The scalarized value type may not be legal, e.g. it might require
1794 // promotion or expansion. Relegalize the scalar store.
1795 return LegalizeOp(Result);
1797 SplitVectorOp(Node->getOperand(1), Lo, Hi);
1798 IncrementSize = NumElems/2 * MVT::getSizeInBits(EVT)/8;
1802 GetExpandedOp(N->getValue(), Lo, Hi);
1803 IncrementSize = Hi.Val ? MVT::getSizeInBits(Hi.getValueType())/8 : 0;
1805 if (!TLI.isLittleEndian())
1809 SDOperand Chain = N->getChain();
1810 SDOperand Ptr = N->getBasePtr();
1811 int SVOffset = N->getSrcValueOffset();
1812 unsigned Alignment = N->getAlignment();
1813 bool isVolatile = N->isVolatile();
1815 Lo = DAG.getStore(Chain, Lo, Ptr, N->getSrcValue(),
1816 SVOffset, isVolatile, Alignment);
1818 assert(Hi.Val && "FIXME: int <-> float should be handled with promote!");
1820 if (Hi.Val == NULL) {
1821 // Must be int <-> float one-to-one expansion.
1826 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
1827 getIntPtrConstant(IncrementSize));
1828 assert(isTypeLegal(Ptr.getValueType()) && "Pointers must be legal!");
1829 Hi = DAG.getStore(Chain, Hi, Ptr, N->getSrcValue(), SVOffset+IncrementSize,
1830 isVolatile, std::max(Alignment, IncrementSize));
1831 return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
1834 //===----------------------------------------------------------------------===//
1836 //===----------------------------------------------------------------------===//
1838 /// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that
1839 /// only uses types natively supported by the target.
1841 /// Note that this is an involved process that may invalidate pointers into
1843 void SelectionDAG::LegalizeTypes() {
1844 DAGTypeLegalizer(*this).run();