1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
20 //===----------------------------------------------------------------------===//
22 #include "LegalizeTypes.h"
25 /// GetFPLibCall - Return the right libcall for the given floating point type.
26 static RTLIB::Libcall GetFPLibCall(MVT VT,
27 RTLIB::Libcall Call_F32,
28 RTLIB::Libcall Call_F64,
29 RTLIB::Libcall Call_F80,
30 RTLIB::Libcall Call_PPCF128) {
32 VT == MVT::f32 ? Call_F32 :
33 VT == MVT::f64 ? Call_F64 :
34 VT == MVT::f80 ? Call_F80 :
35 VT == MVT::ppcf128 ? Call_PPCF128 :
36 RTLIB::UNKNOWN_LIBCALL;
39 //===----------------------------------------------------------------------===//
40 // Result Float to Integer Conversion.
41 //===----------------------------------------------------------------------===//
43 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
44 DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
46 SDOperand R = SDOperand();
48 switch (N->getOpcode()) {
51 cerr << "SoftenFloatResult #" << ResNo << ": ";
52 N->dump(&DAG); cerr << "\n";
54 assert(0 && "Do not know how to soften the result of this operator!");
57 case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
58 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
60 R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
62 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
63 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break;
64 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
65 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
66 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
67 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
68 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
69 case ISD::LOAD: R = SoftenFloatRes_LOAD(N); break;
70 case ISD::SELECT: R = SoftenFloatRes_SELECT(N); break;
71 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
72 case ISD::SINT_TO_FP: R = SoftenFloatRes_SINT_TO_FP(N); break;
73 case ISD::UINT_TO_FP: R = SoftenFloatRes_UINT_TO_FP(N); break;
76 // If R is null, the sub-method took care of registering the result.
78 SetSoftenedFloat(SDOperand(N, ResNo), R);
81 SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
82 return BitConvertToInteger(N->getOperand(0));
85 SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
86 // Convert the inputs to integers, and build a new pair out of them.
87 return DAG.getNode(ISD::BUILD_PAIR,
88 TLI.getTypeToTransformTo(N->getValueType(0)),
89 BitConvertToInteger(N->getOperand(0)),
90 BitConvertToInteger(N->getOperand(1)));
93 SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
94 return DAG.getConstant(N->getValueAPF().convertToAPInt(),
95 TLI.getTypeToTransformTo(N->getValueType(0)));
98 SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
99 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
100 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
101 GetSoftenedFloat(N->getOperand(1)) };
102 return MakeLibCall(GetFPLibCall(N->getValueType(0),
110 SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
111 SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
112 SDOperand RHS = BitConvertToInteger(N->getOperand(1));
114 MVT LVT = LHS.getValueType();
115 MVT RVT = RHS.getValueType();
117 unsigned LSize = LVT.getSizeInBits();
118 unsigned RSize = RVT.getSizeInBits();
120 // First get the sign bit of second operand.
121 SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
122 DAG.getConstant(RSize - 1,
123 TLI.getShiftAmountTy()));
124 SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
126 // Shift right or sign-extend it if the two operands have different types.
127 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
129 SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
130 DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
131 SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
132 } else if (SizeDiff < 0) {
133 SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
134 SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
135 DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
138 // Clear the sign bit of the first operand.
139 SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
140 DAG.getConstant(LSize - 1,
141 TLI.getShiftAmountTy()));
142 Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
143 LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
145 // Or the value with the sign bit.
146 return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
149 SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
150 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
151 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
152 GetSoftenedFloat(N->getOperand(1)) };
153 return MakeLibCall(GetFPLibCall(N->getValueType(0),
161 SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
162 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
163 SDOperand Op = N->getOperand(0);
165 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
166 switch (Op.getValueType().getSimpleVT()) {
168 assert(false && "Unsupported FP_EXTEND!");
170 switch (N->getValueType(0).getSimpleVT()) {
172 assert(false && "Unsupported FP_EXTEND!");
174 LC = RTLIB::FPEXT_F32_F64;
178 return MakeLibCall(LC, NVT, &Op, 1, false);
181 SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
182 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
183 SDOperand Op = N->getOperand(0);
185 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
186 switch (Op.getValueType().getSimpleVT()) {
188 assert(false && "Unsupported FP_ROUND!");
190 switch (N->getValueType(0).getSimpleVT()) {
192 assert(false && "Unsupported FP_ROUND!");
194 LC = RTLIB::FPROUND_F64_F32;
198 return MakeLibCall(LC, NVT, &Op, 1, false);
201 SDOperand DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
202 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
203 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
204 return MakeLibCall(GetFPLibCall(N->getValueType(0),
208 RTLIB::POWI_PPCF128),
212 SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
213 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
214 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215 GetSoftenedFloat(N->getOperand(1)) };
216 return MakeLibCall(GetFPLibCall(N->getValueType(0),
224 SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
225 LoadSDNode *L = cast<LoadSDNode>(N);
226 MVT VT = N->getValueType(0);
227 MVT NVT = TLI.getTypeToTransformTo(VT);
230 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
231 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
232 NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
233 L->getSrcValue(), L->getSrcValueOffset(), NVT,
234 L->isVolatile(), L->getAlignment());
235 // Legalized the chain result - switch anything that used the old chain to
237 ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
241 // Do a non-extending load followed by FP_EXTEND.
242 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
243 L->getMemoryVT(), L->getChain(),
244 L->getBasePtr(), L->getOffset(),
245 L->getSrcValue(), L->getSrcValueOffset(),
247 L->isVolatile(), L->getAlignment());
248 // Legalized the chain result - switch anything that used the old chain to
250 ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
251 return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NewL));
254 SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
255 SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
256 SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
257 return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
260 SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
261 SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
262 SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
263 return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
264 N->getOperand(1), LHS, RHS, N->getOperand(4));
267 SDOperand DAGTypeLegalizer::SoftenFloatRes_SINT_TO_FP(SDNode *N) {
268 SDOperand Op = N->getOperand(0);
269 MVT RVT = N->getValueType(0);
271 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
272 switch (Op.getValueType().getSimpleVT()) {
274 switch (RVT.getSimpleVT()) {
276 LC = RTLIB::SINTTOFP_I32_F32;
279 LC = RTLIB::SINTTOFP_I32_F64;
286 switch (RVT.getSimpleVT()) {
288 LC = RTLIB::SINTTOFP_I64_F32;
291 LC = RTLIB::SINTTOFP_I64_F64;
294 LC = RTLIB::SINTTOFP_I64_F80;
297 LC = RTLIB::SINTTOFP_I64_PPCF128;
304 switch (RVT.getSimpleVT()) {
306 LC = RTLIB::SINTTOFP_I128_F32;
309 LC = RTLIB::SINTTOFP_I128_F64;
312 LC = RTLIB::SINTTOFP_I128_F80;
315 LC = RTLIB::SINTTOFP_I128_PPCF128;
324 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SINT_TO_FP!");
326 return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
329 SDOperand DAGTypeLegalizer::SoftenFloatRes_UINT_TO_FP(SDNode *N) {
330 SDOperand Op = N->getOperand(0);
331 MVT RVT = N->getValueType(0);
333 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
334 switch (Op.getValueType().getSimpleVT()) {
336 switch (RVT.getSimpleVT()) {
338 LC = RTLIB::UINTTOFP_I32_F32;
341 LC = RTLIB::UINTTOFP_I32_F64;
348 switch (RVT.getSimpleVT()) {
350 LC = RTLIB::UINTTOFP_I64_F32;
353 LC = RTLIB::UINTTOFP_I64_F64;
362 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UINT_TO_FP!");
364 return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
368 //===----------------------------------------------------------------------===//
369 // Operand Float to Integer Conversion..
370 //===----------------------------------------------------------------------===//
372 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
373 DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
375 SDOperand Res = SDOperand();
377 switch (N->getOpcode()) {
380 cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
381 N->dump(&DAG); cerr << "\n";
383 assert(0 && "Do not know how to soften this operator's operand!");
386 case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
387 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
388 case ISD::FP_TO_SINT: Res = SoftenFloatOp_FP_TO_SINT(N); break;
389 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break;
390 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
391 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
392 case ISD::STORE: Res = SoftenFloatOp_STORE(N, OpNo); break;
395 // If the result is null, the sub-method took care of registering results etc.
396 if (!Res.Val) return false;
398 // If the result is N, the sub-method updated N in place. Check to see if any
399 // operands are new, and if so, mark them.
401 // Mark N as new and remark N and its operands. This allows us to correctly
402 // revisit N if it needs another step of promotion and allows us to visit
403 // any new operands to N.
408 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
409 "Invalid operand expansion");
411 ReplaceValueWith(SDOperand(N, 0), Res);
415 /// SoftenSetCCOperands - Soften the operands of a comparison. This code is
416 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
417 void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
418 ISD::CondCode &CCCode) {
419 SDOperand LHSInt = GetSoftenedFloat(NewLHS);
420 SDOperand RHSInt = GetSoftenedFloat(NewRHS);
421 MVT VT = NewLHS.getValueType();
423 assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
425 // Expand into one or more soft-fp libcall(s).
426 RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
430 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
434 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
438 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
442 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
446 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
450 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
453 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
456 LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
459 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
462 // SETONE = SETOLT | SETOGT
463 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
466 LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
469 LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
472 LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
475 LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
478 LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
480 default: assert(false && "Do not know how to soften this setcc!");
484 MVT RetVT = MVT::i32; // FIXME: is this the correct return type?
485 SDOperand Ops[2] = { LHSInt, RHSInt };
486 NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/);
487 NewRHS = DAG.getConstant(0, RetVT);
488 CCCode = TLI.getCmpLibcallCC(LC1);
489 if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
490 SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
491 NewLHS, NewRHS, DAG.getCondCode(CCCode));
492 NewLHS = MakeLibCall(LC2, RetVT, Ops, 2, false/*sign irrelevant*/);
493 NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
494 NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
495 NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
496 NewRHS = SDOperand();
500 SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
501 return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
502 GetSoftenedFloat(N->getOperand(0)));
505 SDOperand DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
506 SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
507 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
508 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
510 // If SoftenSetCCOperands returned a scalar, we need to compare the result
511 // against zero to select between true and false values.
512 if (NewRHS.Val == 0) {
513 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
517 // Update N to have the operands specified.
518 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
519 DAG.getCondCode(CCCode), NewLHS, NewRHS,
523 SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_SINT(SDNode *N) {
524 MVT SVT = N->getOperand(0).getValueType();
525 MVT RVT = N->getValueType(0);
527 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
528 switch (RVT.getSimpleVT()) {
530 switch (SVT.getSimpleVT()) {
532 LC = RTLIB::FPTOSINT_F32_I32;
535 LC = RTLIB::FPTOSINT_F64_I32;
538 LC = RTLIB::FPTOSINT_F80_I32;
541 LC = RTLIB::FPTOSINT_PPCF128_I32;
548 switch (SVT.getSimpleVT()) {
550 LC = RTLIB::FPTOSINT_F32_I64;
553 LC = RTLIB::FPTOSINT_F64_I64;
556 LC = RTLIB::FPTOSINT_F80_I64;
559 LC = RTLIB::FPTOSINT_PPCF128_I64;
566 switch (SVT.getSimpleVT()) {
568 LC = RTLIB::FPTOSINT_F32_I128;
571 LC = RTLIB::FPTOSINT_F64_I128;
574 LC = RTLIB::FPTOSINT_F80_I128;
577 LC = RTLIB::FPTOSINT_PPCF128_I128;
586 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
588 SDOperand Op = GetSoftenedFloat(N->getOperand(0));
589 return MakeLibCall(LC, RVT, &Op, 1, false);
592 SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_UINT(SDNode *N) {
593 MVT SVT = N->getOperand(0).getValueType();
594 MVT RVT = N->getValueType(0);
596 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
597 switch (RVT.getSimpleVT()) {
599 switch (SVT.getSimpleVT()) {
601 LC = RTLIB::FPTOUINT_F32_I32;
604 LC = RTLIB::FPTOUINT_F64_I32;
607 LC = RTLIB::FPTOUINT_F80_I32;
610 LC = RTLIB::FPTOUINT_PPCF128_I32;
617 switch (SVT.getSimpleVT()) {
619 LC = RTLIB::FPTOUINT_F32_I64;
622 LC = RTLIB::FPTOUINT_F64_I64;
625 LC = RTLIB::FPTOUINT_F80_I64;
628 LC = RTLIB::FPTOUINT_PPCF128_I64;
635 switch (SVT.getSimpleVT()) {
637 LC = RTLIB::FPTOUINT_F32_I128;
640 LC = RTLIB::FPTOUINT_F64_I128;
643 LC = RTLIB::FPTOUINT_F80_I128;
646 LC = RTLIB::FPTOUINT_PPCF128_I128;
655 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
657 SDOperand Op = GetSoftenedFloat(N->getOperand(0));
658 return MakeLibCall(LC, RVT, &Op, 1, false);
661 SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
662 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
663 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
664 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
666 // If SoftenSetCCOperands returned a scalar, we need to compare the result
667 // against zero to select between true and false values.
668 if (NewRHS.Val == 0) {
669 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
673 // Update N to have the operands specified.
674 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
675 N->getOperand(2), N->getOperand(3),
676 DAG.getCondCode(CCCode));
679 SDOperand DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
680 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
681 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
682 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
684 // If SoftenSetCCOperands returned a scalar, use it.
685 if (NewRHS.Val == 0) {
686 assert(NewLHS.getValueType() == N->getValueType(0) &&
687 "Unexpected setcc expansion!");
691 // Otherwise, update N to have the operands specified.
692 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
693 DAG.getCondCode(CCCode));
696 SDOperand DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
697 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
698 assert(OpNo == 1 && "Can only soften the stored value!");
699 StoreSDNode *ST = cast<StoreSDNode>(N);
700 SDOperand Val = ST->getValue();
702 if (ST->isTruncatingStore())
703 // Do an FP_ROUND followed by a non-truncating store.
704 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, ST->getMemoryVT(),
705 Val, DAG.getIntPtrConstant(0)));
707 Val = GetSoftenedFloat(Val);
709 return DAG.getStore(ST->getChain(), Val, ST->getBasePtr(),
710 ST->getSrcValue(), ST->getSrcValueOffset(),
711 ST->isVolatile(), ST->getAlignment());
715 //===----------------------------------------------------------------------===//
716 // Float Result Expansion
717 //===----------------------------------------------------------------------===//
719 /// ExpandFloatResult - This method is called when the specified result of the
720 /// specified node is found to need expansion. At this point, the node may also
721 /// have invalid operands or may have other results that need promotion, we just
722 /// know that (at least) one result needs expansion.
723 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
724 DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
726 Lo = Hi = SDOperand();
728 // See if the target wants to custom expand this node.
729 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
730 TargetLowering::Custom) {
731 // If the target wants to, allow it to lower this itself.
732 if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
733 // Everything that once used N now uses P. We are guaranteed that the
734 // result value types of N and the result value types of P match.
735 ReplaceNodeWith(N, P);
740 switch (N->getOpcode()) {
743 cerr << "ExpandFloatResult #" << ResNo << ": ";
744 N->dump(&DAG); cerr << "\n";
746 assert(0 && "Do not know how to expand the result of this operator!");
749 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
750 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
751 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
752 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
754 case ISD::BIT_CONVERT: ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
755 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
756 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
757 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
759 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
760 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
761 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
762 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
763 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
764 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
765 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
766 case ISD::SINT_TO_FP:
767 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
770 // If Lo/Hi is null, the sub-method took care of registering results etc.
772 SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
775 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo,
777 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
778 assert(NVT.getSizeInBits() == integerPartWidth &&
779 "Do not know how to expand this float constant!");
780 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().convertToAPInt();
781 Lo = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
782 &C.getRawData()[1])), NVT);
783 Hi = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
784 &C.getRawData()[0])), NVT);
787 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
789 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
790 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
795 N->getValueType(0), Ops, 2,
797 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
798 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
801 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDOperand &Lo,
803 assert(N->getValueType(0) == MVT::ppcf128 &&
804 "Logic only correct for ppcf128!");
806 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
807 Hi = DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp);
808 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
809 Lo = DAG.getNode(ISD::SELECT_CC, Lo.getValueType(), Tmp, Hi, Lo,
810 DAG.getNode(ISD::FNEG, Lo.getValueType(), Lo),
811 DAG.getCondCode(ISD::SETEQ));
814 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
816 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
817 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
822 N->getValueType(0), Ops, 2,
824 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
825 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
828 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDOperand &Lo,
830 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
831 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
836 N->getValueType(0), Ops, 2,
838 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
839 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
842 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDOperand &Lo,
844 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
845 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
850 N->getValueType(0), Ops, 2,
852 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
853 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
856 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
858 if (ISD::isNormalLoad(N)) {
859 ExpandRes_NormalLoad(N, Lo, Hi);
863 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
864 LoadSDNode *LD = cast<LoadSDNode>(N);
865 SDOperand Chain = LD->getChain();
866 SDOperand Ptr = LD->getBasePtr();
868 MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
869 assert(NVT.isByteSized() && "Expanded type not byte sized!");
870 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
872 Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr,
873 LD->getSrcValue(), LD->getSrcValueOffset(),
875 LD->isVolatile(), LD->getAlignment());
877 // Remember the chain.
878 Chain = Lo.getValue(1);
880 // The high part is undefined.
881 Hi = DAG.getNode(ISD::UNDEF, NVT);
883 // Modified the chain - switch anything that used the old chain to use the
885 ReplaceValueWith(SDOperand(LD, 1), Chain);
888 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
890 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
891 MVT VT = N->getValueType(0);
892 MVT NVT = TLI.getTypeToTransformTo(VT);
893 SDOperand Src = N->getOperand(0);
894 MVT SrcVT = Src.getValueType();
896 // First do an SINT_TO_FP, whether the original was signed or unsigned.
897 if (SrcVT.bitsLE(MVT::i32)) {
898 // The integer can be represented exactly in an f64.
899 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
900 Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
901 Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
903 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
904 if (SrcVT.bitsLE(MVT::i64)) {
905 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
906 LC = RTLIB::SINTTOFP_I64_PPCF128;
907 } else if (SrcVT.bitsLE(MVT::i128)) {
908 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
909 LC = RTLIB::SINTTOFP_I128_PPCF128;
911 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
913 Hi = MakeLibCall(LC, VT, &Src, 1, true);
914 assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
915 Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
918 if (N->getOpcode() == ISD::SINT_TO_FP)
921 // Unsigned - fix up the SINT_TO_FP value just calculated.
922 Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi);
923 SrcVT = Src.getValueType();
925 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
926 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
927 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
928 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
929 const uint64_t *Parts = 0;
931 switch (SrcVT.getSimpleVT()) {
933 assert(false && "Unsupported UINT_TO_FP!");
942 Lo = DAG.getNode(ISD::FADD, VT, Hi,
943 DAG.getConstantFP(APFloat(APInt(128, 2, Parts)),
945 Lo = DAG.getNode(ISD::SELECT_CC, VT, Src, DAG.getConstant(0, SrcVT), Lo, Hi,
946 DAG.getCondCode(ISD::SETLT));
947 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
948 DAG.getConstant(1, TLI.getPointerTy()));
949 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
950 DAG.getConstant(0, TLI.getPointerTy()));
954 //===----------------------------------------------------------------------===//
955 // Float Operand Expansion
956 //===----------------------------------------------------------------------===//
958 /// ExpandFloatOperand - This method is called when the specified operand of the
959 /// specified node is found to need expansion. At this point, all of the result
960 /// types of the node are known to be legal, but other operands of the node may
961 /// need promotion or expansion as well as the specified one.
962 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
963 DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
964 SDOperand Res = SDOperand();
966 if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
967 == TargetLowering::Custom)
968 Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
971 switch (N->getOpcode()) {
974 cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
975 N->dump(&DAG); cerr << "\n";
977 assert(0 && "Do not know how to expand this operator's operand!");
980 case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
981 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
982 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
984 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
985 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
986 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
987 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
988 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
989 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
990 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
995 // If the result is null, the sub-method took care of registering results etc.
996 if (!Res.Val) return false;
997 // If the result is N, the sub-method updated N in place. Check to see if any
998 // operands are new, and if so, mark them.
1000 // Mark N as new and remark N and its operands. This allows us to correctly
1001 // revisit N if it needs another step of expansion and allows us to visit
1002 // any new operands to N.
1007 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1008 "Invalid operand expansion");
1010 ReplaceValueWith(SDOperand(N, 0), Res);
1014 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1015 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1016 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDOperand &NewLHS,
1018 ISD::CondCode &CCCode) {
1019 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
1020 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1021 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1023 MVT VT = NewLHS.getValueType();
1024 assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
1026 // FIXME: This generated code sucks. We want to generate
1027 // FCMP crN, hi1, hi2
1029 // FCMP crN, lo1, lo2
1030 // The following can be improved, but not that much.
1031 SDOperand Tmp1, Tmp2, Tmp3;
1032 Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ);
1033 Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode);
1034 Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1035 Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE);
1036 Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode);
1037 Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1038 NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
1039 NewRHS = SDOperand(); // LHS is the result, not a compare.
1042 SDOperand DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1043 SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1044 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1045 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1047 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1048 // against zero to select between true and false values.
1049 if (NewRHS.Val == 0) {
1050 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1051 CCCode = ISD::SETNE;
1054 // Update N to have the operands specified.
1055 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
1056 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1060 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1061 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1062 "Logic only correct for ppcf128!");
1064 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1065 // Round it the rest of the way (e.g. to f32) if needed.
1066 return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Hi, N->getOperand(1));
1069 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1070 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1071 "Unsupported FP_TO_SINT!");
1073 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1074 switch (N->getValueType(0).getSimpleVT()) {
1076 assert(false && "Unsupported FP_TO_SINT!");
1078 LC = RTLIB::FPTOSINT_PPCF128_I32;
1080 LC = RTLIB::FPTOSINT_PPCF128_I64;
1083 LC = RTLIB::FPTOSINT_PPCF128_I64;
1087 return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1090 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1091 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1092 "Unsupported FP_TO_UINT!");
1094 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1095 switch (N->getValueType(0).getSimpleVT()) {
1097 assert(false && "Unsupported FP_TO_UINT!");
1099 LC = RTLIB::FPTOUINT_PPCF128_I32;
1102 LC = RTLIB::FPTOUINT_PPCF128_I64;
1105 LC = RTLIB::FPTOUINT_PPCF128_I128;
1109 return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1112 SDOperand DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1113 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1114 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1115 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1117 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1118 // against zero to select between true and false values.
1119 if (NewRHS.Val == 0) {
1120 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1121 CCCode = ISD::SETNE;
1124 // Update N to have the operands specified.
1125 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1126 N->getOperand(2), N->getOperand(3),
1127 DAG.getCondCode(CCCode));
1130 SDOperand DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1131 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1132 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1133 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1135 // If ExpandSetCCOperands returned a scalar, use it.
1136 if (NewRHS.Val == 0) {
1137 assert(NewLHS.getValueType() == N->getValueType(0) &&
1138 "Unexpected setcc expansion!");
1142 // Otherwise, update N to have the operands specified.
1143 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1144 DAG.getCondCode(CCCode));
1147 SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1148 if (ISD::isNormalStore(N))
1149 return ExpandOp_NormalStore(N, OpNo);
1151 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1152 assert(OpNo == 1 && "Can only expand the stored value so far");
1153 StoreSDNode *ST = cast<StoreSDNode>(N);
1155 SDOperand Chain = ST->getChain();
1156 SDOperand Ptr = ST->getBasePtr();
1158 MVT NVT = TLI.getTypeToTransformTo(ST->getValue().getValueType());
1159 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1160 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1163 GetExpandedOp(ST->getValue(), Lo, Hi);
1165 return DAG.getTruncStore(Chain, Lo, Ptr,
1166 ST->getSrcValue(), ST->getSrcValueOffset(),
1168 ST->isVolatile(), ST->getAlignment());