1 //===-- LegalizeTypes.h - Definition of the DAG Type Legalizer class ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the DAGTypeLegalizer class. This is a private interface
11 // shared between the code that implements the SelectionDAG::LegalizeTypes
14 //===----------------------------------------------------------------------===//
16 #ifndef SELECTIONDAG_LEGALIZETYPES_H
17 #define SELECTIONDAG_LEGALIZETYPES_H
19 #define DEBUG_TYPE "legalize-types"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/DenseSet.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Support/Debug.h"
29 //===----------------------------------------------------------------------===//
30 /// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks
31 /// on it until only value types the target machine can handle are left. This
32 /// involves promoting small sizes to large sizes or splitting up large values
33 /// into small values.
35 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
36 const TargetLowering &TLI;
39 // NodeIdFlags - This pass uses the NodeId on the SDNodes to hold information
40 // about the state of the node. The enum has all the values.
42 /// ReadyToProcess - All operands have been processed, so this node is ready
46 /// NewNode - This is a new node, not before seen, that was created in the
47 /// process of legalizing some other node.
50 /// Unanalyzed - This node's ID needs to be set to the number of its
51 /// unprocessed operands.
54 /// Processed - This is a node that has already been processed.
57 // 1+ - This is a node which has this many unprocessed operands.
61 Legal, // The target natively supports this type.
62 PromoteInteger, // Replace this integer type with a larger one.
63 ExpandInteger, // Split this integer type into two of half the size.
64 SoftenFloat, // Convert this float type to a same size integer type.
65 ExpandFloat, // Split this float type into two of half the size.
66 ScalarizeVector, // Replace this one-element vector with its element type.
67 SplitVector, // Split this vector type into two of half the size.
68 WidenVector // This vector type should be widened into a larger vector.
71 /// ValueTypeActions - This is a bitvector that contains two bits for each
72 /// simple value type, where the two bits correspond to the LegalizeAction
73 /// enum from TargetLowering. This can be queried with "getTypeAction(VT)".
74 TargetLowering::ValueTypeActionImpl ValueTypeActions;
76 /// getTypeAction - Return how we should legalize values of this type.
77 LegalizeAction getTypeAction(EVT VT) const {
78 switch (ValueTypeActions.getTypeAction(*DAG.getContext(), VT)) {
80 assert(false && "Unknown legalize action!");
81 case TargetLowering::Legal:
83 case TargetLowering::Promote:
85 // 1) For integers, use a larger integer type (e.g. i8 -> i32).
86 // 2) For vectors, use a wider vector type (e.g. v3i32 -> v4i32).
88 return PromoteInteger;
90 case TargetLowering::Expand:
92 // 1) split scalar in half, 2) convert a float to an integer,
93 // 3) scalarize a single-element vector, 4) split a vector in two.
97 if (VT.getSizeInBits() ==
98 TLI.getTypeToTransformTo(*DAG.getContext(), VT).getSizeInBits())
103 if (VT.getVectorNumElements() == 1)
104 return ScalarizeVector;
109 /// isTypeLegal - Return true if this type is legal on this target.
110 bool isTypeLegal(EVT VT) const {
111 return (ValueTypeActions.getTypeAction(*DAG.getContext(), VT) ==
112 TargetLowering::Legal);
115 /// IgnoreNodeResults - Pretend all of this node's results are legal.
116 bool IgnoreNodeResults(SDNode *N) const {
117 return N->getOpcode() == ISD::TargetConstant;
120 /// PromotedIntegers - For integer nodes that are below legal width, this map
121 /// indicates what promoted value to use.
122 DenseMap<SDValue, SDValue> PromotedIntegers;
124 /// ExpandedIntegers - For integer nodes that need to be expanded this map
125 /// indicates which operands are the expanded version of the input.
126 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedIntegers;
128 /// SoftenedFloats - For floating point nodes converted to integers of
129 /// the same size, this map indicates the converted value to use.
130 DenseMap<SDValue, SDValue> SoftenedFloats;
132 /// ExpandedFloats - For float nodes that need to be expanded this map
133 /// indicates which operands are the expanded version of the input.
134 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedFloats;
136 /// ScalarizedVectors - For nodes that are <1 x ty>, this map indicates the
137 /// scalar value of type 'ty' to use.
138 DenseMap<SDValue, SDValue> ScalarizedVectors;
140 /// SplitVectors - For nodes that need to be split this map indicates
141 /// which operands are the expanded version of the input.
142 DenseMap<SDValue, std::pair<SDValue, SDValue> > SplitVectors;
144 /// WidenedVectors - For vector nodes that need to be widened, indicates
145 /// the widened value to use.
146 DenseMap<SDValue, SDValue> WidenedVectors;
148 /// ReplacedValues - For values that have been replaced with another,
149 /// indicates the replacement value to use.
150 DenseMap<SDValue, SDValue> ReplacedValues;
152 /// Worklist - This defines a worklist of nodes to process. In order to be
153 /// pushed onto this worklist, all operands of a node must have already been
155 SmallVector<SDNode*, 128> Worklist;
158 explicit DAGTypeLegalizer(SelectionDAG &dag)
159 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
160 ValueTypeActions(TLI.getValueTypeActions()) {
161 assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
162 "Too many value types for ValueTypeActions to hold!");
165 /// run - This is the main entry point for the type legalizer. This does a
166 /// top-down traversal of the dag, legalizing types as it goes. Returns
167 /// "true" if it made any changes.
170 void NoteDeletion(SDNode *Old, SDNode *New) {
173 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i)
174 ReplacedValues[SDValue(Old, i)] = SDValue(New, i);
178 SDNode *AnalyzeNewNode(SDNode *N);
179 void AnalyzeNewValue(SDValue &Val);
180 void ExpungeNode(SDNode *N);
181 void PerformExpensiveChecks();
182 void RemapValue(SDValue &N);
185 SDValue BitConvertToInteger(SDValue Op);
186 SDValue BitConvertVectorToIntegerVector(SDValue Op);
187 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
188 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
189 bool CustomWidenLowerNode(SDNode *N, EVT VT);
190 SDValue GetVectorElementPointer(SDValue VecPtr, EVT EltVT, SDValue Index);
191 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
192 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);
193 SDValue MakeLibCall(RTLIB::Libcall LC, EVT RetVT,
194 const SDValue *Ops, unsigned NumOps, bool isSigned,
196 SDValue PromoteTargetBoolean(SDValue Bool, EVT VT);
197 void ReplaceValueWith(SDValue From, SDValue To);
198 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
199 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
200 SDValue &Lo, SDValue &Hi);
202 //===--------------------------------------------------------------------===//
203 // Integer Promotion Support: LegalizeIntegerTypes.cpp
204 //===--------------------------------------------------------------------===//
206 /// GetPromotedInteger - Given a processed operand Op which was promoted to a
207 /// larger integer type, this returns the promoted value. The low bits of the
208 /// promoted value corresponding to the original type are exactly equal to Op.
209 /// The extra bits contain rubbish, so the promoted value may need to be zero-
210 /// or sign-extended from the original type before it is usable (the helpers
211 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
212 /// For example, if Op is an i16 and was promoted to an i32, then this method
213 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
214 /// 16 bits of which contain rubbish.
215 SDValue GetPromotedInteger(SDValue Op) {
216 SDValue &PromotedOp = PromotedIntegers[Op];
217 RemapValue(PromotedOp);
218 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
221 void SetPromotedInteger(SDValue Op, SDValue Result);
223 /// SExtPromotedInteger - Get a promoted operand and sign extend it to the
225 SDValue SExtPromotedInteger(SDValue Op) {
226 EVT OldVT = Op.getValueType();
227 DebugLoc dl = Op.getDebugLoc();
228 Op = GetPromotedInteger(Op);
229 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
230 DAG.getValueType(OldVT));
233 /// ZExtPromotedInteger - Get a promoted operand and zero extend it to the
235 SDValue ZExtPromotedInteger(SDValue Op) {
236 EVT OldVT = Op.getValueType();
237 DebugLoc dl = Op.getDebugLoc();
238 Op = GetPromotedInteger(Op);
239 return DAG.getZeroExtendInReg(Op, dl, OldVT);
242 // Integer Result Promotion.
243 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
244 SDValue PromoteIntRes_AssertSext(SDNode *N);
245 SDValue PromoteIntRes_AssertZext(SDNode *N);
246 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
247 SDValue PromoteIntRes_Atomic2(AtomicSDNode *N);
248 SDValue PromoteIntRes_BIT_CONVERT(SDNode *N);
249 SDValue PromoteIntRes_BSWAP(SDNode *N);
250 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
251 SDValue PromoteIntRes_Constant(SDNode *N);
252 SDValue PromoteIntRes_CONVERT_RNDSAT(SDNode *N);
253 SDValue PromoteIntRes_CTLZ(SDNode *N);
254 SDValue PromoteIntRes_CTPOP(SDNode *N);
255 SDValue PromoteIntRes_CTTZ(SDNode *N);
256 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
257 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
258 SDValue PromoteIntRes_FP32_TO_FP16(SDNode *N);
259 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
260 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
261 SDValue PromoteIntRes_Overflow(SDNode *N);
262 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
263 SDValue PromoteIntRes_SDIV(SDNode *N);
264 SDValue PromoteIntRes_SELECT(SDNode *N);
265 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
266 SDValue PromoteIntRes_SETCC(SDNode *N);
267 SDValue PromoteIntRes_SHL(SDNode *N);
268 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
269 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
270 SDValue PromoteIntRes_SRA(SDNode *N);
271 SDValue PromoteIntRes_SRL(SDNode *N);
272 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
273 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
274 SDValue PromoteIntRes_UDIV(SDNode *N);
275 SDValue PromoteIntRes_UNDEF(SDNode *N);
276 SDValue PromoteIntRes_VAARG(SDNode *N);
277 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
279 // Integer Operand Promotion.
280 bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo);
281 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
282 SDValue PromoteIntOp_BIT_CONVERT(SDNode *N);
283 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
284 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
285 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
286 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
287 SDValue PromoteIntOp_CONVERT_RNDSAT(SDNode *N);
288 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
289 SDValue PromoteIntOp_MEMBARRIER(SDNode *N);
290 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
291 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
292 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
293 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
294 SDValue PromoteIntOp_Shift(SDNode *N);
295 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
296 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
297 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
298 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
299 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
300 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
302 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
304 //===--------------------------------------------------------------------===//
305 // Integer Expansion Support: LegalizeIntegerTypes.cpp
306 //===--------------------------------------------------------------------===//
308 /// GetExpandedInteger - Given a processed operand Op which was expanded into
309 /// two integers of half the size, this returns the two halves. The low bits
310 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
311 /// For example, if Op is an i64 which was expanded into two i32's, then this
312 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
313 /// Op, and Hi being equal to the upper 32 bits.
314 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
315 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
317 // Integer Result Expansion.
318 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
319 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
320 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
321 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
322 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
323 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
324 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
325 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
326 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
327 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
328 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
329 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
330 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
331 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
332 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
334 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
335 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
336 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
337 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
338 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
339 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
340 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
341 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
342 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
343 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
344 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
346 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
347 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
349 void ExpandShiftByConstant(SDNode *N, unsigned Amt,
350 SDValue &Lo, SDValue &Hi);
351 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
352 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
354 // Integer Operand Expansion.
355 bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo);
356 SDValue ExpandIntOp_BIT_CONVERT(SDNode *N);
357 SDValue ExpandIntOp_BR_CC(SDNode *N);
358 SDValue ExpandIntOp_BUILD_VECTOR(SDNode *N);
359 SDValue ExpandIntOp_EXTRACT_ELEMENT(SDNode *N);
360 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
361 SDValue ExpandIntOp_SETCC(SDNode *N);
362 SDValue ExpandIntOp_Shift(SDNode *N);
363 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
364 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
365 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
366 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
367 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
369 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
370 ISD::CondCode &CCCode, DebugLoc dl);
372 //===--------------------------------------------------------------------===//
373 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
374 //===--------------------------------------------------------------------===//
376 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
377 /// integer of the same size, this returns the integer. The integer contains
378 /// exactly the same bits as Op - only the type changed. For example, if Op
379 /// is an f32 which was softened to an i32, then this method returns an i32,
380 /// the bits of which coincide with those of Op.
381 SDValue GetSoftenedFloat(SDValue Op) {
382 SDValue &SoftenedOp = SoftenedFloats[Op];
383 RemapValue(SoftenedOp);
384 assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?");
387 void SetSoftenedFloat(SDValue Op, SDValue Result);
389 // Result Float to Integer Conversion.
390 void SoftenFloatResult(SDNode *N, unsigned OpNo);
391 SDValue SoftenFloatRes_BIT_CONVERT(SDNode *N);
392 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
393 SDValue SoftenFloatRes_ConstantFP(ConstantFPSDNode *N);
394 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
395 SDValue SoftenFloatRes_FABS(SDNode *N);
396 SDValue SoftenFloatRes_FADD(SDNode *N);
397 SDValue SoftenFloatRes_FCEIL(SDNode *N);
398 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
399 SDValue SoftenFloatRes_FCOS(SDNode *N);
400 SDValue SoftenFloatRes_FDIV(SDNode *N);
401 SDValue SoftenFloatRes_FEXP(SDNode *N);
402 SDValue SoftenFloatRes_FEXP2(SDNode *N);
403 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
404 SDValue SoftenFloatRes_FLOG(SDNode *N);
405 SDValue SoftenFloatRes_FLOG2(SDNode *N);
406 SDValue SoftenFloatRes_FLOG10(SDNode *N);
407 SDValue SoftenFloatRes_FMUL(SDNode *N);
408 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
409 SDValue SoftenFloatRes_FNEG(SDNode *N);
410 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
411 SDValue SoftenFloatRes_FP16_TO_FP32(SDNode *N);
412 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
413 SDValue SoftenFloatRes_FPOW(SDNode *N);
414 SDValue SoftenFloatRes_FPOWI(SDNode *N);
415 SDValue SoftenFloatRes_FREM(SDNode *N);
416 SDValue SoftenFloatRes_FRINT(SDNode *N);
417 SDValue SoftenFloatRes_FSIN(SDNode *N);
418 SDValue SoftenFloatRes_FSQRT(SDNode *N);
419 SDValue SoftenFloatRes_FSUB(SDNode *N);
420 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
421 SDValue SoftenFloatRes_LOAD(SDNode *N);
422 SDValue SoftenFloatRes_SELECT(SDNode *N);
423 SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
424 SDValue SoftenFloatRes_UNDEF(SDNode *N);
425 SDValue SoftenFloatRes_VAARG(SDNode *N);
426 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
428 // Operand Float to Integer Conversion.
429 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
430 SDValue SoftenFloatOp_BIT_CONVERT(SDNode *N);
431 SDValue SoftenFloatOp_BR_CC(SDNode *N);
432 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
433 SDValue SoftenFloatOp_FP_TO_SINT(SDNode *N);
434 SDValue SoftenFloatOp_FP_TO_UINT(SDNode *N);
435 SDValue SoftenFloatOp_FP32_TO_FP16(SDNode *N);
436 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
437 SDValue SoftenFloatOp_SETCC(SDNode *N);
438 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
440 void SoftenSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
441 ISD::CondCode &CCCode, DebugLoc dl);
443 //===--------------------------------------------------------------------===//
444 // Float Expansion Support: LegalizeFloatTypes.cpp
445 //===--------------------------------------------------------------------===//
447 /// GetExpandedFloat - Given a processed operand Op which was expanded into
448 /// two floating point values of half the size, this returns the two halves.
449 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
450 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
451 /// into two f64's, then this method returns the two f64's, with Lo being
452 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
453 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
454 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
456 // Float Result Expansion.
457 void ExpandFloatResult(SDNode *N, unsigned ResNo);
458 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
459 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
460 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
461 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
462 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
463 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
464 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
465 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
466 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
467 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
468 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
469 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
470 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
471 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
472 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
473 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
474 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
475 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
476 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
477 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
478 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
479 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
480 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
481 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
482 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
483 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
485 // Float Operand Expansion.
486 bool ExpandFloatOperand(SDNode *N, unsigned OperandNo);
487 SDValue ExpandFloatOp_BR_CC(SDNode *N);
488 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
489 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
490 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
491 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
492 SDValue ExpandFloatOp_SETCC(SDNode *N);
493 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
495 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
496 ISD::CondCode &CCCode, DebugLoc dl);
498 //===--------------------------------------------------------------------===//
499 // Scalarization Support: LegalizeVectorTypes.cpp
500 //===--------------------------------------------------------------------===//
502 /// GetScalarizedVector - Given a processed one-element vector Op which was
503 /// scalarized to its element type, this returns the element. For example,
504 /// if Op is a v1i32, Op = < i32 val >, this method returns val, an i32.
505 SDValue GetScalarizedVector(SDValue Op) {
506 SDValue &ScalarizedOp = ScalarizedVectors[Op];
507 RemapValue(ScalarizedOp);
508 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
511 void SetScalarizedVector(SDValue Op, SDValue Result);
513 // Vector Result Scalarization: <1 x ty> -> ty.
514 void ScalarizeVectorResult(SDNode *N, unsigned OpNo);
515 SDValue ScalarizeVecRes_BinOp(SDNode *N);
516 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
517 SDValue ScalarizeVecRes_InregOp(SDNode *N);
519 SDValue ScalarizeVecRes_BIT_CONVERT(SDNode *N);
520 SDValue ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N);
521 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
522 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
523 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
524 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
525 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
526 SDValue ScalarizeVecRes_SIGN_EXTEND_INREG(SDNode *N);
527 SDValue ScalarizeVecRes_SELECT(SDNode *N);
528 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
529 SDValue ScalarizeVecRes_SETCC(SDNode *N);
530 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
531 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
532 SDValue ScalarizeVecRes_VSETCC(SDNode *N);
534 // Vector Operand Scalarization: <1 x ty> -> ty.
535 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
536 SDValue ScalarizeVecOp_BIT_CONVERT(SDNode *N);
537 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
538 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
539 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
541 //===--------------------------------------------------------------------===//
542 // Vector Splitting Support: LegalizeVectorTypes.cpp
543 //===--------------------------------------------------------------------===//
545 /// GetSplitVector - Given a processed vector Op which was split into vectors
546 /// of half the size, this method returns the halves. The first elements of
547 /// Op coincide with the elements of Lo; the remaining elements of Op coincide
548 /// with the elements of Hi: Op is what you would get by concatenating Lo and
549 /// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then
550 /// this method returns the two v4i32's, with Lo corresponding to the first 4
551 /// elements of Op, and Hi to the last 4 elements.
552 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
553 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
555 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
556 void SplitVectorResult(SDNode *N, unsigned OpNo);
557 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
558 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
559 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
561 void SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo, SDValue &Hi);
562 void SplitVecRes_BUILD_PAIR(SDNode *N, SDValue &Lo, SDValue &Hi);
563 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
564 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
565 void SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo, SDValue &Hi);
566 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
567 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
568 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
569 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi);
570 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
571 void SplitVecRes_SIGN_EXTEND_INREG(SDNode *N, SDValue &Lo, SDValue &Hi);
572 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
573 void SplitVecRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi);
574 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
577 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
578 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
579 SDValue SplitVecOp_UnaryOp(SDNode *N);
581 SDValue SplitVecOp_BIT_CONVERT(SDNode *N);
582 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
583 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
584 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
586 //===--------------------------------------------------------------------===//
587 // Vector Widening Support: LegalizeVectorTypes.cpp
588 //===--------------------------------------------------------------------===//
590 /// GetWidenedVector - Given a processed vector Op which was widened into a
591 /// larger vector, this method returns the larger vector. The elements of
592 /// the returned vector consist of the elements of Op followed by elements
593 /// containing rubbish. For example, if Op is a v2i32 that was widened to a
594 /// v4i32, then this method returns a v4i32 for which the first two elements
595 /// are the same as those of Op, while the last two elements contain rubbish.
596 SDValue GetWidenedVector(SDValue Op) {
597 SDValue &WidenedOp = WidenedVectors[Op];
598 RemapValue(WidenedOp);
599 assert(WidenedOp.getNode() && "Operand wasn't widened?");
602 void SetWidenedVector(SDValue Op, SDValue Result);
604 // Widen Vector Result Promotion.
605 void WidenVectorResult(SDNode *N, unsigned ResNo);
606 SDValue WidenVecRes_BIT_CONVERT(SDNode* N);
607 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
608 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
609 SDValue WidenVecRes_CONVERT_RNDSAT(SDNode* N);
610 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
611 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
612 SDValue WidenVecRes_LOAD(SDNode* N);
613 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N);
614 SDValue WidenVecRes_SIGN_EXTEND_INREG(SDNode* N);
615 SDValue WidenVecRes_SELECT(SDNode* N);
616 SDValue WidenVecRes_SELECT_CC(SDNode* N);
617 SDValue WidenVecRes_SETCC(SDNode* N);
618 SDValue WidenVecRes_UNDEF(SDNode *N);
619 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
620 SDValue WidenVecRes_VSETCC(SDNode* N);
622 SDValue WidenVecRes_Binary(SDNode *N);
623 SDValue WidenVecRes_Convert(SDNode *N);
624 SDValue WidenVecRes_POWI(SDNode *N);
625 SDValue WidenVecRes_Shift(SDNode *N);
626 SDValue WidenVecRes_Unary(SDNode *N);
627 SDValue WidenVecRes_InregOp(SDNode *N);
629 // Widen Vector Operand.
630 bool WidenVectorOperand(SDNode *N, unsigned ResNo);
631 SDValue WidenVecOp_BIT_CONVERT(SDNode *N);
632 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
633 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
634 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
635 SDValue WidenVecOp_STORE(SDNode* N);
637 SDValue WidenVecOp_Convert(SDNode *N);
639 //===--------------------------------------------------------------------===//
640 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
641 //===--------------------------------------------------------------------===//
643 /// Helper GenWidenVectorLoads - Helper function to generate a set of
644 /// loads to load a vector with a resulting wider type. It takes
645 /// LdChain: list of chains for the load to be generated.
646 /// Ld: load to widen
647 SDValue GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
650 /// GenWidenVectorExtLoads - Helper function to generate a set of extension
651 /// loads to load a ector with a resulting wider type. It takes
652 /// LdChain: list of chains for the load to be generated.
653 /// Ld: load to widen
654 /// ExtType: extension element type
655 SDValue GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
656 LoadSDNode *LD, ISD::LoadExtType ExtType);
658 /// Helper genWidenVectorStores - Helper function to generate a set of
659 /// stores to store a widen vector into non widen memory
660 /// StChain: list of chains for the stores we have generated
661 /// ST: store of a widen value
662 void GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, StoreSDNode *ST);
664 /// Helper genWidenVectorTruncStores - Helper function to generate a set of
665 /// stores to store a truncate widen vector into non widen memory
666 /// StChain: list of chains for the stores we have generated
667 /// ST: store of a widen value
668 void GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
671 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
672 /// input vector must have the same element type as NVT.
673 SDValue ModifyToType(SDValue InOp, EVT WidenVT);
676 //===--------------------------------------------------------------------===//
677 // Generic Splitting: LegalizeTypesGeneric.cpp
678 //===--------------------------------------------------------------------===//
680 // Legalization methods which only use that the illegal type is split into two
681 // not necessarily identical types. As such they can be used for splitting
682 // vectors and expanding integers and floats.
684 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
685 if (Op.getValueType().isVector())
686 GetSplitVector(Op, Lo, Hi);
687 else if (Op.getValueType().isInteger())
688 GetExpandedInteger(Op, Lo, Hi);
690 GetExpandedFloat(Op, Lo, Hi);
693 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
694 /// which is split (or expanded) into two not necessarily identical pieces.
695 void GetSplitDestVTs(EVT InVT, EVT &LoVT, EVT &HiVT);
697 /// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and
698 /// high parts of the given value.
699 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
701 // Generic Result Splitting.
702 void SplitRes_MERGE_VALUES(SDNode *N, SDValue &Lo, SDValue &Hi);
703 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi);
704 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
705 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
707 //===--------------------------------------------------------------------===//
708 // Generic Expansion: LegalizeTypesGeneric.cpp
709 //===--------------------------------------------------------------------===//
711 // Legalization methods which only use that the illegal type is split into two
712 // identical types of half the size, and that the Lo/Hi part is stored first
713 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
714 // such they can be used for expanding integers and floats.
716 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
717 if (Op.getValueType().isInteger())
718 GetExpandedInteger(Op, Lo, Hi);
720 GetExpandedFloat(Op, Lo, Hi);
723 // Generic Result Expansion.
724 void ExpandRes_BIT_CONVERT (SDNode *N, SDValue &Lo, SDValue &Hi);
725 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
726 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
727 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
728 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
729 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
731 // Generic Operand Expansion.
732 SDValue ExpandOp_BIT_CONVERT (SDNode *N);
733 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
734 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
735 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
736 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
737 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
740 } // end namespace llvm.