1 //===-- LegalizeTypesFloatToInt.cpp - LegalizeTypes float to int support --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float to integer conversion for LegalizeTypes. This
11 // is the act of turning a computation in an invalid floating point type into
12 // a computation in an integer type of the same size. For example, turning
13 // f32 arithmetic into operations using i32. Also known as "soft float".
14 // The result is equivalent to bitcasting the float value to the integer type.
16 //===----------------------------------------------------------------------===//
18 #include "llvm/CodeGen/PseudoSourceValue.h"
19 #include "llvm/DerivedTypes.h"
20 #include "LegalizeTypes.h"
23 /// GetFPLibCall - Return the right libcall for the given floating point type.
24 static RTLIB::Libcall GetFPLibCall(MVT VT,
25 RTLIB::Libcall Call_F32,
26 RTLIB::Libcall Call_F64,
27 RTLIB::Libcall Call_F80,
28 RTLIB::Libcall Call_PPCF128) {
30 VT == MVT::f32 ? Call_F32 :
31 VT == MVT::f64 ? Call_F64 :
32 VT == MVT::f80 ? Call_F80 :
33 VT == MVT::ppcf128 ? Call_PPCF128 :
34 RTLIB::UNKNOWN_LIBCALL;
37 //===----------------------------------------------------------------------===//
38 // Result Float to Integer Conversion.
39 //===----------------------------------------------------------------------===//
41 void DAGTypeLegalizer::FloatToIntResult(SDNode *N, unsigned ResNo) {
42 DEBUG(cerr << "FloatToInt node result " << ResNo << ": "; N->dump(&DAG);
44 SDOperand R = SDOperand();
46 // FIXME: Custom lowering for float-to-int?
48 // See if the target wants to custom convert this node to an integer.
49 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
50 TargetLowering::Custom) {
51 // If the target wants to, allow it to lower this itself.
52 if (SDNode *P = TLI.FloatToIntOperationResult(N, DAG)) {
53 // Everything that once used N now uses P. We are guaranteed that the
54 // result value types of N and the result value types of P match.
55 ReplaceNodeWith(N, P);
61 switch (N->getOpcode()) {
64 cerr << "FloatToIntResult #" << ResNo << ": ";
65 N->dump(&DAG); cerr << "\n";
67 assert(0 && "Do not know how to convert the result of this operator!");
70 case ISD::BIT_CONVERT: R = FloatToIntRes_BIT_CONVERT(N); break;
71 case ISD::BUILD_PAIR: R = FloatToIntRes_BUILD_PAIR(N); break;
73 R = FloatToIntRes_ConstantFP(cast<ConstantFPSDNode>(N));
75 case ISD::FCOPYSIGN: R = FloatToIntRes_FCOPYSIGN(N); break;
76 case ISD::LOAD: R = FloatToIntRes_LOAD(N); break;
78 case ISD::UINT_TO_FP: R = FloatToIntRes_XINT_TO_FP(N); break;
80 case ISD::FADD: R = FloatToIntRes_FADD(N); break;
81 case ISD::FMUL: R = FloatToIntRes_FMUL(N); break;
82 case ISD::FSUB: R = FloatToIntRes_FSUB(N); break;
85 // If R is null, the sub-method took care of registering the result.
87 SetIntegerOp(SDOperand(N, ResNo), R);
90 SDOperand DAGTypeLegalizer::FloatToIntRes_BIT_CONVERT(SDNode *N) {
91 return BitConvertToInteger(N->getOperand(0));
94 SDOperand DAGTypeLegalizer::FloatToIntRes_BUILD_PAIR(SDNode *N) {
95 // Convert the inputs to integers, and build a new pair out of them.
96 return DAG.getNode(ISD::BUILD_PAIR,
97 TLI.getTypeToTransformTo(N->getValueType(0)),
98 BitConvertToInteger(N->getOperand(0)),
99 BitConvertToInteger(N->getOperand(1)));
102 SDOperand DAGTypeLegalizer::FloatToIntRes_ConstantFP(ConstantFPSDNode *N) {
103 return DAG.getConstant(N->getValueAPF().convertToAPInt(),
104 TLI.getTypeToTransformTo(N->getValueType(0)));
107 SDOperand DAGTypeLegalizer::FloatToIntRes_FADD(SDNode *N) {
108 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
109 SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
110 GetIntegerOp(N->getOperand(1)) };
111 return MakeLibCall(GetFPLibCall(N->getValueType(0),
116 NVT, Ops, 2, false/*sign irrelevant*/);
119 SDOperand DAGTypeLegalizer::FloatToIntRes_FCOPYSIGN(SDNode *N) {
120 SDOperand LHS = GetIntegerOp(N->getOperand(0));
121 SDOperand RHS = BitConvertToInteger(N->getOperand(1));
123 MVT LVT = LHS.getValueType();
124 MVT RVT = RHS.getValueType();
126 unsigned LSize = LVT.getSizeInBits();
127 unsigned RSize = RVT.getSizeInBits();
129 // First get the sign bit of second operand.
130 SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
131 DAG.getConstant(RSize - 1,
132 TLI.getShiftAmountTy()));
133 SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
135 // Shift right or sign-extend it if the two operands have different types.
136 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
138 SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
139 DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
140 SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
141 } else if (SizeDiff < 0) {
142 SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
143 SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
144 DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
147 // Clear the sign bit of the first operand.
148 SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
149 DAG.getConstant(LSize - 1,
150 TLI.getShiftAmountTy()));
151 Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
152 LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
154 // Or the value with the sign bit.
155 return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
158 SDOperand DAGTypeLegalizer::FloatToIntRes_FMUL(SDNode *N) {
159 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
160 SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
161 GetIntegerOp(N->getOperand(1)) };
162 return MakeLibCall(GetFPLibCall(N->getValueType(0),
167 NVT, Ops, 2, false/*sign irrelevant*/);
170 SDOperand DAGTypeLegalizer::FloatToIntRes_FSUB(SDNode *N) {
171 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
172 SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
173 GetIntegerOp(N->getOperand(1)) };
174 return MakeLibCall(GetFPLibCall(N->getValueType(0),
179 NVT, Ops, 2, false/*sign irrelevant*/);
182 SDOperand DAGTypeLegalizer::FloatToIntRes_LOAD(SDNode *N) {
183 LoadSDNode *L = cast<LoadSDNode>(N);
184 MVT VT = N->getValueType(0);
185 MVT NVT = TLI.getTypeToTransformTo(VT);
187 if (L->getExtensionType() == ISD::NON_EXTLOAD)
188 return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
189 NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
190 L->getSrcValue(), L->getSrcValueOffset(), NVT,
191 L->isVolatile(), L->getAlignment());
193 // Do a non-extending load followed by FP_EXTEND.
194 SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
195 L->getMemoryVT(), L->getChain(),
196 L->getBasePtr(), L->getOffset(),
197 L->getSrcValue(), L->getSrcValueOffset(),
199 L->isVolatile(), L->getAlignment());
200 return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
203 SDOperand DAGTypeLegalizer::FloatToIntRes_XINT_TO_FP(SDNode *N) {
204 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
205 MVT DestVT = N->getValueType(0);
206 SDOperand Op = N->getOperand(0);
208 if (Op.getValueType() == MVT::i32) {
209 // simple 32-bit [signed|unsigned] integer to float/double expansion
211 // Get the stack frame index of a 8 byte buffer.
212 SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
214 // word offset constant for Hi/Lo address computation
216 DAG.getConstant(MVT(MVT::i32).getSizeInBits() / 8,
218 // set up Hi and Lo (into buffer) address based on endian
219 SDOperand Hi = StackSlot;
220 SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
221 if (TLI.isLittleEndian())
224 // if signed map to unsigned space
227 // constant used to invert sign bit (signed to unsigned mapping)
228 SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
229 OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
233 // store the lo of the constructed double - based on integer input
234 SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
235 OpMapped, Lo, NULL, 0);
236 // initial hi portion of constructed double
237 SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
238 // store the hi of the constructed double - biased exponent
239 SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
240 // load the constructed double
241 SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
242 // FP constant to bias correct the final result
243 SDOperand Bias = DAG.getConstantFP(isSigned ?
244 BitsToDouble(0x4330000080000000ULL)
245 : BitsToDouble(0x4330000000000000ULL),
248 SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
251 // handle final rounding
252 if (DestVT == MVT::f64) {
255 } else if (DestVT.bitsLT(MVT::f64)) {
256 Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
257 DAG.getIntPtrConstant(0));
258 } else if (DestVT.bitsGT(MVT::f64)) {
259 Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
261 return BitConvertToInteger(Result);
263 assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
264 SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
266 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
267 DAG.getConstant(0, Op.getValueType()),
269 SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
270 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
271 SignSet, Four, Zero);
273 // If the sign bit of the integer is set, the large number will be treated
274 // as a negative number. To counteract this, the dynamic code adds an
275 // offset depending on the data type.
277 switch (Op.getValueType().getSimpleVT()) {
278 default: assert(0 && "Unsupported integer type!");
279 case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
280 case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
281 case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
282 case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
284 if (TLI.isLittleEndian()) FF <<= 32;
285 static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
287 SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
288 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
289 SDOperand FudgeInReg;
290 if (DestVT == MVT::f32)
291 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
292 PseudoSourceValue::getConstantPool(), 0);
294 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
295 DAG.getEntryNode(), CPIdx,
296 PseudoSourceValue::getConstantPool(), 0,
300 return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
304 //===----------------------------------------------------------------------===//
305 // Operand Float to Integer Conversion..
306 //===----------------------------------------------------------------------===//
308 bool DAGTypeLegalizer::FloatToIntOperand(SDNode *N, unsigned OpNo) {
309 DEBUG(cerr << "FloatToInt node operand " << OpNo << ": "; N->dump(&DAG);
313 // FIXME: Custom lowering for float-to-int?
315 if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
316 == TargetLowering::Custom)
317 Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
321 switch (N->getOpcode()) {
324 cerr << "FloatToIntOperand Op #" << OpNo << ": ";
325 N->dump(&DAG); cerr << "\n";
327 assert(0 && "Do not know how to convert this operator's operand!");
330 case ISD::BIT_CONVERT: Res = FloatToIntOp_BIT_CONVERT(N); break;
334 // If the result is null, the sub-method took care of registering results etc.
335 if (!Res.Val) return false;
337 // If the result is N, the sub-method updated N in place. Check to see if any
338 // operands are new, and if so, mark them.
340 // Mark N as new and remark N and its operands. This allows us to correctly
341 // revisit N if it needs another step of promotion and allows us to visit
342 // any new operands to N.
347 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
348 "Invalid operand expansion");
350 ReplaceValueWith(SDOperand(N, 0), Res);
354 SDOperand DAGTypeLegalizer::FloatToIntOp_BIT_CONVERT(SDNode *N) {
355 return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
356 GetIntegerOp(N->getOperand(0)));