1 //===-- LegalizeTypesPromote.cpp - Promotion for LegalizeTypes ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements promotion support for LegalizeTypes. Promotion is the
11 // act of changing a computation in an invalid type to be a computation in a
12 // larger type. For example, implementing i8 arithmetic in an i32 register (as
13 // is often needed on powerpc for example).
15 //===----------------------------------------------------------------------===//
17 #include "LegalizeTypes.h"
20 //===----------------------------------------------------------------------===//
22 //===----------------------------------------------------------------------===//
24 /// PromoteResult - This method is called when a result of a node is found to be
25 /// in need of promotion to a larger type. At this point, the node may also
26 /// have invalid operands or may have other results that need expansion, we just
27 /// know that (at least) one result needs promotion.
28 void DAGTypeLegalizer::PromoteResult(SDNode *N, unsigned ResNo) {
29 DEBUG(cerr << "Promote node result: "; N->dump(&DAG); cerr << "\n");
30 SDOperand Result = SDOperand();
32 switch (N->getOpcode()) {
35 cerr << "PromoteResult #" << ResNo << ": ";
36 N->dump(&DAG); cerr << "\n";
38 assert(0 && "Do not know how to promote this operator!");
40 case ISD::UNDEF: Result = PromoteResult_UNDEF(N); break;
41 case ISD::Constant: Result = PromoteResult_Constant(N); break;
43 case ISD::TRUNCATE: Result = PromoteResult_TRUNCATE(N); break;
44 case ISD::SIGN_EXTEND:
45 case ISD::ZERO_EXTEND:
46 case ISD::ANY_EXTEND: Result = PromoteResult_INT_EXTEND(N); break;
47 case ISD::FP_ROUND: Result = PromoteResult_FP_ROUND(N); break;
49 case ISD::FP_TO_UINT: Result = PromoteResult_FP_TO_XINT(N); break;
50 case ISD::SETCC: Result = PromoteResult_SETCC(N); break;
51 case ISD::LOAD: Result = PromoteResult_LOAD(cast<LoadSDNode>(N)); break;
58 case ISD::MUL: Result = PromoteResult_SimpleIntBinOp(N); break;
61 case ISD::SREM: Result = PromoteResult_SDIV(N); break;
64 case ISD::UREM: Result = PromoteResult_UDIV(N); break;
66 case ISD::SHL: Result = PromoteResult_SHL(N); break;
67 case ISD::SRA: Result = PromoteResult_SRA(N); break;
68 case ISD::SRL: Result = PromoteResult_SRL(N); break;
70 case ISD::SELECT: Result = PromoteResult_SELECT(N); break;
71 case ISD::SELECT_CC: Result = PromoteResult_SELECT_CC(N); break;
75 // If Result is null, the sub-method took care of registering the result.
77 SetPromotedOp(SDOperand(N, ResNo), Result);
80 SDOperand DAGTypeLegalizer::PromoteResult_UNDEF(SDNode *N) {
81 return DAG.getNode(ISD::UNDEF, TLI.getTypeToTransformTo(N->getValueType(0)));
84 SDOperand DAGTypeLegalizer::PromoteResult_Constant(SDNode *N) {
85 MVT::ValueType VT = N->getValueType(0);
86 // Zero extend things like i1, sign extend everything else. It shouldn't
87 // matter in theory which one we pick, but this tends to give better code?
88 unsigned Opc = VT != MVT::i1 ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
89 SDOperand Result = DAG.getNode(Opc, TLI.getTypeToTransformTo(VT),
91 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold ext?");
95 SDOperand DAGTypeLegalizer::PromoteResult_TRUNCATE(SDNode *N) {
98 switch (getTypeAction(N->getOperand(0).getValueType())) {
99 default: assert(0 && "Unknown type action!");
102 Res = N->getOperand(0);
105 Res = GetPromotedOp(N->getOperand(0));
109 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
110 assert(MVT::getSizeInBits(Res.getValueType()) >= MVT::getSizeInBits(NVT) &&
111 "Truncation doesn't make sense!");
112 if (Res.getValueType() == NVT)
115 // Truncate to NVT instead of VT
116 return DAG.getNode(ISD::TRUNCATE, NVT, Res);
119 SDOperand DAGTypeLegalizer::PromoteResult_INT_EXTEND(SDNode *N) {
120 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
122 if (getTypeAction(N->getOperand(0).getValueType()) == Promote) {
123 SDOperand Res = GetPromotedOp(N->getOperand(0));
124 assert(MVT::getSizeInBits(Res.getValueType()) <= MVT::getSizeInBits(NVT) &&
125 "Extension doesn't make sense!");
127 // If the result and operand types are the same after promotion, simplify
128 // to an in-register extension.
129 if (NVT == Res.getValueType()) {
130 // The high bits are not guaranteed to be anything. Insert an extend.
131 if (N->getOpcode() == ISD::SIGN_EXTEND)
132 return DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res,
133 DAG.getValueType(N->getOperand(0).getValueType()));
134 if (N->getOpcode() == ISD::ZERO_EXTEND)
135 return DAG.getZeroExtendInReg(Res, N->getOperand(0).getValueType());
136 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!");
141 // Otherwise, just extend the original operand all the way to the larger type.
142 return DAG.getNode(N->getOpcode(), NVT, N->getOperand(0));
145 SDOperand DAGTypeLegalizer::PromoteResult_FP_ROUND(SDNode *N) {
146 // NOTE: Assumes input is legal.
147 if (N->getConstantOperandVal(1) == 0)
148 return DAG.getNode(ISD::FP_ROUND_INREG, N->getOperand(0).getValueType(),
149 N->getOperand(0), DAG.getValueType(N->getValueType(0)));
150 // If the precision discard isn't needed, just return the operand unrounded.
151 return N->getOperand(0);
154 SDOperand DAGTypeLegalizer::PromoteResult_FP_TO_XINT(SDNode *N) {
155 SDOperand Op = N->getOperand(0);
156 // If the operand needed to be promoted, do so now.
157 if (getTypeAction(Op.getValueType()) == Promote)
158 // The input result is prerounded, so we don't have to do anything special.
159 Op = GetPromotedOp(Op);
161 unsigned NewOpc = N->getOpcode();
162 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
164 // If we're promoting a UINT to a larger size, check to see if the new node
165 // will be legal. If it isn't, check to see if FP_TO_SINT is legal, since
166 // we can use that instead. This allows us to generate better code for
167 // FP_TO_UINT for small destination sizes on targets where FP_TO_UINT is not
168 // legal, such as PowerPC.
169 if (N->getOpcode() == ISD::FP_TO_UINT) {
170 if (!TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
171 (TLI.isOperationLegal(ISD::FP_TO_SINT, NVT) ||
172 TLI.getOperationAction(ISD::FP_TO_SINT, NVT)==TargetLowering::Custom))
173 NewOpc = ISD::FP_TO_SINT;
176 return DAG.getNode(NewOpc, NVT, Op);
179 SDOperand DAGTypeLegalizer::PromoteResult_SETCC(SDNode *N) {
180 assert(isTypeLegal(TLI.getSetCCResultTy()) && "SetCC type is not legal??");
181 return DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), N->getOperand(0),
182 N->getOperand(1), N->getOperand(2));
185 SDOperand DAGTypeLegalizer::PromoteResult_LOAD(LoadSDNode *N) {
186 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
187 ISD::LoadExtType ExtType =
188 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
189 SDOperand Res = DAG.getExtLoad(ExtType, NVT, N->getChain(), N->getBasePtr(),
190 N->getSrcValue(), N->getSrcValueOffset(),
191 N->getMemoryVT(), N->isVolatile(),
194 // Legalized the chain result - switch anything that used the old chain to
196 ReplaceValueWith(SDOperand(N, 1), Res.getValue(1));
200 SDOperand DAGTypeLegalizer::PromoteResult_SimpleIntBinOp(SDNode *N) {
201 // The input may have strange things in the top bits of the registers, but
202 // these operations don't care. They may have weird bits going out, but
203 // that too is okay if they are integer operations.
204 SDOperand LHS = GetPromotedOp(N->getOperand(0));
205 SDOperand RHS = GetPromotedOp(N->getOperand(1));
206 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
209 SDOperand DAGTypeLegalizer::PromoteResult_SDIV(SDNode *N) {
210 // Sign extend the input.
211 SDOperand LHS = GetPromotedOp(N->getOperand(0));
212 SDOperand RHS = GetPromotedOp(N->getOperand(1));
213 MVT::ValueType VT = N->getValueType(0);
214 LHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, LHS.getValueType(), LHS,
215 DAG.getValueType(VT));
216 RHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, RHS.getValueType(), RHS,
217 DAG.getValueType(VT));
219 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
222 SDOperand DAGTypeLegalizer::PromoteResult_UDIV(SDNode *N) {
223 // Zero extend the input.
224 SDOperand LHS = GetPromotedOp(N->getOperand(0));
225 SDOperand RHS = GetPromotedOp(N->getOperand(1));
226 MVT::ValueType VT = N->getValueType(0);
227 LHS = DAG.getZeroExtendInReg(LHS, VT);
228 RHS = DAG.getZeroExtendInReg(RHS, VT);
230 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
233 SDOperand DAGTypeLegalizer::PromoteResult_SHL(SDNode *N) {
234 return DAG.getNode(ISD::SHL, TLI.getTypeToTransformTo(N->getValueType(0)),
235 GetPromotedOp(N->getOperand(0)), N->getOperand(1));
238 SDOperand DAGTypeLegalizer::PromoteResult_SRA(SDNode *N) {
239 // The input value must be properly sign extended.
240 MVT::ValueType VT = N->getValueType(0);
241 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
242 SDOperand Res = GetPromotedOp(N->getOperand(0));
243 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res, DAG.getValueType(VT));
244 return DAG.getNode(ISD::SRA, NVT, Res, N->getOperand(1));
247 SDOperand DAGTypeLegalizer::PromoteResult_SRL(SDNode *N) {
248 // The input value must be properly zero extended.
249 MVT::ValueType VT = N->getValueType(0);
250 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
251 SDOperand Res = GetPromotedZExtOp(N->getOperand(0));
252 return DAG.getNode(ISD::SRL, NVT, Res, N->getOperand(1));
255 SDOperand DAGTypeLegalizer::PromoteResult_SELECT(SDNode *N) {
256 SDOperand LHS = GetPromotedOp(N->getOperand(1));
257 SDOperand RHS = GetPromotedOp(N->getOperand(2));
258 return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
261 SDOperand DAGTypeLegalizer::PromoteResult_SELECT_CC(SDNode *N) {
262 SDOperand LHS = GetPromotedOp(N->getOperand(2));
263 SDOperand RHS = GetPromotedOp(N->getOperand(3));
264 return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
265 N->getOperand(1), LHS, RHS, N->getOperand(4));
269 //===----------------------------------------------------------------------===//
271 //===----------------------------------------------------------------------===//
273 /// PromoteOperand - This method is called when the specified operand of the
274 /// specified node is found to need promotion. At this point, all of the result
275 /// types of the node are known to be legal, but other operands of the node may
276 /// need promotion or expansion as well as the specified one.
277 bool DAGTypeLegalizer::PromoteOperand(SDNode *N, unsigned OpNo) {
278 DEBUG(cerr << "Promote node operand: "; N->dump(&DAG); cerr << "\n");
280 switch (N->getOpcode()) {
283 cerr << "PromoteOperand Op #" << OpNo << ": ";
284 N->dump(&DAG); cerr << "\n";
286 assert(0 && "Do not know how to promote this operator's operand!");
289 case ISD::ANY_EXTEND: Res = PromoteOperand_ANY_EXTEND(N); break;
290 case ISD::ZERO_EXTEND: Res = PromoteOperand_ZERO_EXTEND(N); break;
291 case ISD::SIGN_EXTEND: Res = PromoteOperand_SIGN_EXTEND(N); break;
292 case ISD::TRUNCATE: Res = PromoteOperand_TRUNCATE(N); break;
293 case ISD::FP_EXTEND: Res = PromoteOperand_FP_EXTEND(N); break;
294 case ISD::FP_ROUND: Res = PromoteOperand_FP_ROUND(N); break;
295 case ISD::SINT_TO_FP:
296 case ISD::UINT_TO_FP: Res = PromoteOperand_INT_TO_FP(N); break;
298 case ISD::SELECT: Res = PromoteOperand_SELECT(N, OpNo); break;
299 case ISD::BRCOND: Res = PromoteOperand_BRCOND(N, OpNo); break;
300 case ISD::BR_CC: Res = PromoteOperand_BR_CC(N, OpNo); break;
301 case ISD::SETCC: Res = PromoteOperand_SETCC(N, OpNo); break;
303 case ISD::STORE: Res = PromoteOperand_STORE(cast<StoreSDNode>(N),
307 case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break;
310 // If the result is null, the sub-method took care of registering results etc.
311 if (!Res.Val) return false;
312 // If the result is N, the sub-method updated N in place.
314 // Mark N as new and remark N and its operands. This allows us to correctly
315 // revisit N if it needs another step of promotion and allows us to visit
316 // any new operands to N.
317 N->setNodeId(NewNode);
322 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
323 "Invalid operand expansion");
325 ReplaceValueWith(SDOperand(N, 0), Res);
329 SDOperand DAGTypeLegalizer::PromoteOperand_ANY_EXTEND(SDNode *N) {
330 SDOperand Op = GetPromotedOp(N->getOperand(0));
331 return DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
334 SDOperand DAGTypeLegalizer::PromoteOperand_ZERO_EXTEND(SDNode *N) {
335 SDOperand Op = GetPromotedOp(N->getOperand(0));
336 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
337 return DAG.getZeroExtendInReg(Op, N->getOperand(0).getValueType());
340 SDOperand DAGTypeLegalizer::PromoteOperand_SIGN_EXTEND(SDNode *N) {
341 SDOperand Op = GetPromotedOp(N->getOperand(0));
342 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
343 return DAG.getNode(ISD::SIGN_EXTEND_INREG, Op.getValueType(),
344 Op, DAG.getValueType(N->getOperand(0).getValueType()));
347 SDOperand DAGTypeLegalizer::PromoteOperand_TRUNCATE(SDNode *N) {
348 SDOperand Op = GetPromotedOp(N->getOperand(0));
349 return DAG.getNode(ISD::TRUNCATE, N->getValueType(0), Op);
352 SDOperand DAGTypeLegalizer::PromoteOperand_FP_EXTEND(SDNode *N) {
353 SDOperand Op = GetPromotedOp(N->getOperand(0));
354 return DAG.getNode(ISD::FP_EXTEND, N->getValueType(0), Op);
357 SDOperand DAGTypeLegalizer::PromoteOperand_FP_ROUND(SDNode *N) {
358 SDOperand Op = GetPromotedOp(N->getOperand(0));
359 return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Op,
360 DAG.getIntPtrConstant(0));
363 SDOperand DAGTypeLegalizer::PromoteOperand_INT_TO_FP(SDNode *N) {
364 SDOperand In = GetPromotedOp(N->getOperand(0));
365 MVT::ValueType OpVT = N->getOperand(0).getValueType();
366 if (N->getOpcode() == ISD::UINT_TO_FP)
367 In = DAG.getZeroExtendInReg(In, OpVT);
369 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(),
370 In, DAG.getValueType(OpVT));
372 return DAG.UpdateNodeOperands(SDOperand(N, 0), In);
375 SDOperand DAGTypeLegalizer::PromoteOperand_SELECT(SDNode *N, unsigned OpNo) {
376 assert(OpNo == 0 && "Only know how to promote condition");
377 SDOperand Cond = GetPromotedOp(N->getOperand(0)); // Promote the condition.
379 // The top bits of the promoted condition are not necessarily zero, ensure
380 // that the value is properly zero extended.
381 if (!DAG.MaskedValueIsZero(Cond,
382 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
383 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
384 MarkNewNodes(Cond.Val);
387 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
388 return DAG.UpdateNodeOperands(SDOperand(N, 0), Cond, N->getOperand(1),
392 SDOperand DAGTypeLegalizer::PromoteOperand_BRCOND(SDNode *N, unsigned OpNo) {
393 assert(OpNo == 1 && "only know how to promote condition");
394 SDOperand Cond = GetPromotedOp(N->getOperand(1)); // Promote the condition.
396 // The top bits of the promoted condition are not necessarily zero, ensure
397 // that the value is properly zero extended.
398 if (!DAG.MaskedValueIsZero(Cond,
399 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
400 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
401 MarkNewNodes(Cond.Val);
404 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
405 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), Cond,
409 SDOperand DAGTypeLegalizer::PromoteOperand_BR_CC(SDNode *N, unsigned OpNo) {
410 assert(OpNo == 2 && "Don't know how to promote this operand");
412 SDOperand LHS = N->getOperand(2);
413 SDOperand RHS = N->getOperand(3);
414 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(1))->get());
416 // The chain (Op#0), CC (#1) and basic block destination (Op#4) are always
418 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
419 N->getOperand(1), LHS, RHS, N->getOperand(4));
422 SDOperand DAGTypeLegalizer::PromoteOperand_SETCC(SDNode *N, unsigned OpNo) {
423 assert(OpNo == 0 && "Don't know how to promote this operand");
425 SDOperand LHS = N->getOperand(0);
426 SDOperand RHS = N->getOperand(1);
427 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(2))->get());
429 // The CC (#2) is always legal.
430 return DAG.UpdateNodeOperands(SDOperand(N, 0), LHS, RHS, N->getOperand(2));
433 /// PromoteSetCCOperands - Promote the operands of a comparison. This code is
434 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
435 void DAGTypeLegalizer::PromoteSetCCOperands(SDOperand &NewLHS,SDOperand &NewRHS,
436 ISD::CondCode CCCode) {
437 MVT::ValueType VT = NewLHS.getValueType();
439 // Get the promoted values.
440 NewLHS = GetPromotedOp(NewLHS);
441 NewRHS = GetPromotedOp(NewRHS);
443 // If this is an FP compare, the operands have already been extended.
444 if (!MVT::isInteger(NewLHS.getValueType()))
447 // Otherwise, we have to insert explicit sign or zero extends. Note
448 // that we could insert sign extends for ALL conditions, but zero extend
449 // is cheaper on many machines (an AND instead of two shifts), so prefer
452 default: assert(0 && "Unknown integer comparison!");
459 // ALL of these operations will work if we either sign or zero extend
460 // the operands (including the unsigned comparisons!). Zero extend is
461 // usually a simpler/cheaper operation, so prefer it.
462 NewLHS = DAG.getZeroExtendInReg(NewLHS, VT);
463 NewRHS = DAG.getZeroExtendInReg(NewRHS, VT);
469 NewLHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewLHS.getValueType(), NewLHS,
470 DAG.getValueType(VT));
471 NewRHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewRHS.getValueType(), NewRHS,
472 DAG.getValueType(VT));
477 SDOperand DAGTypeLegalizer::PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo){
478 SDOperand Ch = N->getChain(), Ptr = N->getBasePtr();
479 int SVOffset = N->getSrcValueOffset();
480 unsigned Alignment = N->getAlignment();
481 bool isVolatile = N->isVolatile();
483 SDOperand Val = GetPromotedOp(N->getValue()); // Get promoted value.
485 assert(!N->isTruncatingStore() && "Cannot promote this store operand!");
487 // Truncate the value and store the result.
488 return DAG.getTruncStore(Ch, Val, Ptr, N->getSrcValue(),
489 SVOffset, N->getMemoryVT(),
490 isVolatile, Alignment);