1 //===-- LegalizeTypesPromote.cpp - Promotion for LegalizeTypes ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements promotion support for LegalizeTypes. Promotion is the
11 // act of changing a computation in an invalid type to be a computation in a
12 // larger type. For example, implementing i8 arithmetic in an i32 register (as
13 // is often needed on powerpc for example).
15 //===----------------------------------------------------------------------===//
17 #include "LegalizeTypes.h"
20 //===----------------------------------------------------------------------===//
22 //===----------------------------------------------------------------------===//
24 /// PromoteResult - This method is called when a result of a node is found to be
25 /// in need of promotion to a larger type. At this point, the node may also
26 /// have invalid operands or may have other results that need expansion, we just
27 /// know that (at least) one result needs promotion.
28 void DAGTypeLegalizer::PromoteResult(SDNode *N, unsigned ResNo) {
29 DEBUG(cerr << "Promote node result: "; N->dump(&DAG); cerr << "\n");
30 SDOperand Result = SDOperand();
32 switch (N->getOpcode()) {
35 cerr << "PromoteResult #" << ResNo << ": ";
36 N->dump(&DAG); cerr << "\n";
38 assert(0 && "Do not know how to promote this operator!");
40 case ISD::UNDEF: Result = PromoteResult_UNDEF(N); break;
41 case ISD::Constant: Result = PromoteResult_Constant(N); break;
43 case ISD::TRUNCATE: Result = PromoteResult_TRUNCATE(N); break;
44 case ISD::SIGN_EXTEND:
45 case ISD::ZERO_EXTEND:
46 case ISD::ANY_EXTEND: Result = PromoteResult_INT_EXTEND(N); break;
47 case ISD::FP_ROUND: Result = PromoteResult_FP_ROUND(N); break;
49 case ISD::FP_TO_UINT: Result = PromoteResult_FP_TO_XINT(N); break;
50 case ISD::SETCC: Result = PromoteResult_SETCC(N); break;
51 case ISD::LOAD: Result = PromoteResult_LOAD(cast<LoadSDNode>(N)); break;
58 case ISD::MUL: Result = PromoteResult_SimpleIntBinOp(N); break;
61 case ISD::SREM: Result = PromoteResult_SDIV(N); break;
64 case ISD::UREM: Result = PromoteResult_UDIV(N); break;
66 case ISD::SHL: Result = PromoteResult_SHL(N); break;
67 case ISD::SRA: Result = PromoteResult_SRA(N); break;
68 case ISD::SRL: Result = PromoteResult_SRL(N); break;
70 case ISD::SELECT: Result = PromoteResult_SELECT(N); break;
71 case ISD::SELECT_CC: Result = PromoteResult_SELECT_CC(N); break;
73 case ISD::CTLZ: Result = PromoteResult_CTLZ(N); break;
74 case ISD::CTPOP: Result = PromoteResult_CTPOP(N); break;
75 case ISD::CTTZ: Result = PromoteResult_CTTZ(N); break;
78 // If Result is null, the sub-method took care of registering the result.
80 SetPromotedOp(SDOperand(N, ResNo), Result);
83 SDOperand DAGTypeLegalizer::PromoteResult_UNDEF(SDNode *N) {
84 return DAG.getNode(ISD::UNDEF, TLI.getTypeToTransformTo(N->getValueType(0)));
87 SDOperand DAGTypeLegalizer::PromoteResult_Constant(SDNode *N) {
88 MVT::ValueType VT = N->getValueType(0);
89 // Zero extend things like i1, sign extend everything else. It shouldn't
90 // matter in theory which one we pick, but this tends to give better code?
91 unsigned Opc = VT != MVT::i1 ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
92 SDOperand Result = DAG.getNode(Opc, TLI.getTypeToTransformTo(VT),
94 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold ext?");
98 SDOperand DAGTypeLegalizer::PromoteResult_TRUNCATE(SDNode *N) {
101 switch (getTypeAction(N->getOperand(0).getValueType())) {
102 default: assert(0 && "Unknown type action!");
105 Res = N->getOperand(0);
108 Res = GetPromotedOp(N->getOperand(0));
112 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
113 assert(MVT::getSizeInBits(Res.getValueType()) >= MVT::getSizeInBits(NVT) &&
114 "Truncation doesn't make sense!");
115 if (Res.getValueType() == NVT)
118 // Truncate to NVT instead of VT
119 return DAG.getNode(ISD::TRUNCATE, NVT, Res);
122 SDOperand DAGTypeLegalizer::PromoteResult_INT_EXTEND(SDNode *N) {
123 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
125 if (getTypeAction(N->getOperand(0).getValueType()) == Promote) {
126 SDOperand Res = GetPromotedOp(N->getOperand(0));
127 assert(MVT::getSizeInBits(Res.getValueType()) <= MVT::getSizeInBits(NVT) &&
128 "Extension doesn't make sense!");
130 // If the result and operand types are the same after promotion, simplify
131 // to an in-register extension.
132 if (NVT == Res.getValueType()) {
133 // The high bits are not guaranteed to be anything. Insert an extend.
134 if (N->getOpcode() == ISD::SIGN_EXTEND)
135 return DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res,
136 DAG.getValueType(N->getOperand(0).getValueType()));
137 if (N->getOpcode() == ISD::ZERO_EXTEND)
138 return DAG.getZeroExtendInReg(Res, N->getOperand(0).getValueType());
139 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!");
144 // Otherwise, just extend the original operand all the way to the larger type.
145 return DAG.getNode(N->getOpcode(), NVT, N->getOperand(0));
148 SDOperand DAGTypeLegalizer::PromoteResult_FP_ROUND(SDNode *N) {
149 // NOTE: Assumes input is legal.
150 if (N->getConstantOperandVal(1) == 0)
151 return DAG.getNode(ISD::FP_ROUND_INREG, N->getOperand(0).getValueType(),
152 N->getOperand(0), DAG.getValueType(N->getValueType(0)));
153 // If the precision discard isn't needed, just return the operand unrounded.
154 return N->getOperand(0);
157 SDOperand DAGTypeLegalizer::PromoteResult_FP_TO_XINT(SDNode *N) {
158 SDOperand Op = N->getOperand(0);
159 // If the operand needed to be promoted, do so now.
160 if (getTypeAction(Op.getValueType()) == Promote)
161 // The input result is prerounded, so we don't have to do anything special.
162 Op = GetPromotedOp(Op);
164 unsigned NewOpc = N->getOpcode();
165 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
167 // If we're promoting a UINT to a larger size, check to see if the new node
168 // will be legal. If it isn't, check to see if FP_TO_SINT is legal, since
169 // we can use that instead. This allows us to generate better code for
170 // FP_TO_UINT for small destination sizes on targets where FP_TO_UINT is not
171 // legal, such as PowerPC.
172 if (N->getOpcode() == ISD::FP_TO_UINT) {
173 if (!TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
174 (TLI.isOperationLegal(ISD::FP_TO_SINT, NVT) ||
175 TLI.getOperationAction(ISD::FP_TO_SINT, NVT)==TargetLowering::Custom))
176 NewOpc = ISD::FP_TO_SINT;
179 return DAG.getNode(NewOpc, NVT, Op);
182 SDOperand DAGTypeLegalizer::PromoteResult_SETCC(SDNode *N) {
183 assert(isTypeLegal(TLI.getSetCCResultTy()) && "SetCC type is not legal??");
184 return DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), N->getOperand(0),
185 N->getOperand(1), N->getOperand(2));
188 SDOperand DAGTypeLegalizer::PromoteResult_LOAD(LoadSDNode *N) {
189 MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
190 ISD::LoadExtType ExtType =
191 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
192 SDOperand Res = DAG.getExtLoad(ExtType, NVT, N->getChain(), N->getBasePtr(),
193 N->getSrcValue(), N->getSrcValueOffset(),
194 N->getMemoryVT(), N->isVolatile(),
197 // Legalized the chain result - switch anything that used the old chain to
199 ReplaceValueWith(SDOperand(N, 1), Res.getValue(1));
203 SDOperand DAGTypeLegalizer::PromoteResult_SimpleIntBinOp(SDNode *N) {
204 // The input may have strange things in the top bits of the registers, but
205 // these operations don't care. They may have weird bits going out, but
206 // that too is okay if they are integer operations.
207 SDOperand LHS = GetPromotedOp(N->getOperand(0));
208 SDOperand RHS = GetPromotedOp(N->getOperand(1));
209 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
212 SDOperand DAGTypeLegalizer::PromoteResult_SDIV(SDNode *N) {
213 // Sign extend the input.
214 SDOperand LHS = GetPromotedOp(N->getOperand(0));
215 SDOperand RHS = GetPromotedOp(N->getOperand(1));
216 MVT::ValueType VT = N->getValueType(0);
217 LHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, LHS.getValueType(), LHS,
218 DAG.getValueType(VT));
219 RHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, RHS.getValueType(), RHS,
220 DAG.getValueType(VT));
222 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
225 SDOperand DAGTypeLegalizer::PromoteResult_UDIV(SDNode *N) {
226 // Zero extend the input.
227 SDOperand LHS = GetPromotedOp(N->getOperand(0));
228 SDOperand RHS = GetPromotedOp(N->getOperand(1));
229 MVT::ValueType VT = N->getValueType(0);
230 LHS = DAG.getZeroExtendInReg(LHS, VT);
231 RHS = DAG.getZeroExtendInReg(RHS, VT);
233 return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
236 SDOperand DAGTypeLegalizer::PromoteResult_SHL(SDNode *N) {
237 return DAG.getNode(ISD::SHL, TLI.getTypeToTransformTo(N->getValueType(0)),
238 GetPromotedOp(N->getOperand(0)), N->getOperand(1));
241 SDOperand DAGTypeLegalizer::PromoteResult_SRA(SDNode *N) {
242 // The input value must be properly sign extended.
243 MVT::ValueType VT = N->getValueType(0);
244 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
245 SDOperand Res = GetPromotedOp(N->getOperand(0));
246 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res, DAG.getValueType(VT));
247 return DAG.getNode(ISD::SRA, NVT, Res, N->getOperand(1));
250 SDOperand DAGTypeLegalizer::PromoteResult_SRL(SDNode *N) {
251 // The input value must be properly zero extended.
252 MVT::ValueType VT = N->getValueType(0);
253 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
254 SDOperand Res = GetPromotedZExtOp(N->getOperand(0));
255 return DAG.getNode(ISD::SRL, NVT, Res, N->getOperand(1));
258 SDOperand DAGTypeLegalizer::PromoteResult_SELECT(SDNode *N) {
259 SDOperand LHS = GetPromotedOp(N->getOperand(1));
260 SDOperand RHS = GetPromotedOp(N->getOperand(2));
261 return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
264 SDOperand DAGTypeLegalizer::PromoteResult_SELECT_CC(SDNode *N) {
265 SDOperand LHS = GetPromotedOp(N->getOperand(2));
266 SDOperand RHS = GetPromotedOp(N->getOperand(3));
267 return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
268 N->getOperand(1), LHS, RHS, N->getOperand(4));
271 SDOperand DAGTypeLegalizer::PromoteResult_CTLZ(SDNode *N) {
272 SDOperand Op = GetPromotedOp(N->getOperand(0));
273 MVT::ValueType OVT = N->getValueType(0);
274 MVT::ValueType NVT = Op.getValueType();
275 // Zero extend to the promoted type and do the count there.
276 Op = DAG.getNode(ISD::CTLZ, NVT, DAG.getZeroExtendInReg(Op, OVT));
277 // Subtract off the extra leading bits in the bigger type.
278 return DAG.getNode(ISD::SUB, NVT, Op,
279 DAG.getConstant(MVT::getSizeInBits(NVT) -
280 MVT::getSizeInBits(OVT), NVT));
283 SDOperand DAGTypeLegalizer::PromoteResult_CTPOP(SDNode *N) {
284 SDOperand Op = GetPromotedOp(N->getOperand(0));
285 MVT::ValueType OVT = N->getValueType(0);
286 MVT::ValueType NVT = Op.getValueType();
287 // Zero extend to the promoted type and do the count there.
288 return DAG.getNode(ISD::CTPOP, NVT, DAG.getZeroExtendInReg(Op, OVT));
291 SDOperand DAGTypeLegalizer::PromoteResult_CTTZ(SDNode *N) {
292 SDOperand Op = GetPromotedOp(N->getOperand(0));
293 MVT::ValueType OVT = N->getValueType(0);
294 MVT::ValueType NVT = Op.getValueType();
295 // The count is the same in the promoted type except if the original
296 // value was zero. This can be handled by setting the bit just off
297 // the top of the original type.
298 Op = DAG.getNode(ISD::OR, NVT, Op,
299 // FIXME: Do this using an APINT constant.
300 DAG.getConstant(1UL << MVT::getSizeInBits(OVT), NVT));
301 return DAG.getNode(ISD::CTTZ, NVT, Op);
304 //===----------------------------------------------------------------------===//
306 //===----------------------------------------------------------------------===//
308 /// PromoteOperand - This method is called when the specified operand of the
309 /// specified node is found to need promotion. At this point, all of the result
310 /// types of the node are known to be legal, but other operands of the node may
311 /// need promotion or expansion as well as the specified one.
312 bool DAGTypeLegalizer::PromoteOperand(SDNode *N, unsigned OpNo) {
313 DEBUG(cerr << "Promote node operand: "; N->dump(&DAG); cerr << "\n");
315 switch (N->getOpcode()) {
318 cerr << "PromoteOperand Op #" << OpNo << ": ";
319 N->dump(&DAG); cerr << "\n";
321 assert(0 && "Do not know how to promote this operator's operand!");
324 case ISD::ANY_EXTEND: Res = PromoteOperand_ANY_EXTEND(N); break;
325 case ISD::ZERO_EXTEND: Res = PromoteOperand_ZERO_EXTEND(N); break;
326 case ISD::SIGN_EXTEND: Res = PromoteOperand_SIGN_EXTEND(N); break;
327 case ISD::TRUNCATE: Res = PromoteOperand_TRUNCATE(N); break;
328 case ISD::FP_EXTEND: Res = PromoteOperand_FP_EXTEND(N); break;
329 case ISD::FP_ROUND: Res = PromoteOperand_FP_ROUND(N); break;
330 case ISD::SINT_TO_FP:
331 case ISD::UINT_TO_FP: Res = PromoteOperand_INT_TO_FP(N); break;
333 case ISD::SELECT: Res = PromoteOperand_SELECT(N, OpNo); break;
334 case ISD::BRCOND: Res = PromoteOperand_BRCOND(N, OpNo); break;
335 case ISD::BR_CC: Res = PromoteOperand_BR_CC(N, OpNo); break;
336 case ISD::SETCC: Res = PromoteOperand_SETCC(N, OpNo); break;
338 case ISD::STORE: Res = PromoteOperand_STORE(cast<StoreSDNode>(N),
342 case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break;
345 // If the result is null, the sub-method took care of registering results etc.
346 if (!Res.Val) return false;
347 // If the result is N, the sub-method updated N in place.
349 // Mark N as new and remark N and its operands. This allows us to correctly
350 // revisit N if it needs another step of promotion and allows us to visit
351 // any new operands to N.
352 N->setNodeId(NewNode);
357 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
358 "Invalid operand expansion");
360 ReplaceValueWith(SDOperand(N, 0), Res);
364 SDOperand DAGTypeLegalizer::PromoteOperand_ANY_EXTEND(SDNode *N) {
365 SDOperand Op = GetPromotedOp(N->getOperand(0));
366 return DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
369 SDOperand DAGTypeLegalizer::PromoteOperand_ZERO_EXTEND(SDNode *N) {
370 SDOperand Op = GetPromotedOp(N->getOperand(0));
371 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
372 return DAG.getZeroExtendInReg(Op, N->getOperand(0).getValueType());
375 SDOperand DAGTypeLegalizer::PromoteOperand_SIGN_EXTEND(SDNode *N) {
376 SDOperand Op = GetPromotedOp(N->getOperand(0));
377 Op = DAG.getNode(ISD::ANY_EXTEND, N->getValueType(0), Op);
378 return DAG.getNode(ISD::SIGN_EXTEND_INREG, Op.getValueType(),
379 Op, DAG.getValueType(N->getOperand(0).getValueType()));
382 SDOperand DAGTypeLegalizer::PromoteOperand_TRUNCATE(SDNode *N) {
383 SDOperand Op = GetPromotedOp(N->getOperand(0));
384 return DAG.getNode(ISD::TRUNCATE, N->getValueType(0), Op);
387 SDOperand DAGTypeLegalizer::PromoteOperand_FP_EXTEND(SDNode *N) {
388 SDOperand Op = GetPromotedOp(N->getOperand(0));
389 return DAG.getNode(ISD::FP_EXTEND, N->getValueType(0), Op);
392 SDOperand DAGTypeLegalizer::PromoteOperand_FP_ROUND(SDNode *N) {
393 SDOperand Op = GetPromotedOp(N->getOperand(0));
394 return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Op,
395 DAG.getIntPtrConstant(0));
398 SDOperand DAGTypeLegalizer::PromoteOperand_INT_TO_FP(SDNode *N) {
399 SDOperand In = GetPromotedOp(N->getOperand(0));
400 MVT::ValueType OpVT = N->getOperand(0).getValueType();
401 if (N->getOpcode() == ISD::UINT_TO_FP)
402 In = DAG.getZeroExtendInReg(In, OpVT);
404 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(),
405 In, DAG.getValueType(OpVT));
407 return DAG.UpdateNodeOperands(SDOperand(N, 0), In);
410 SDOperand DAGTypeLegalizer::PromoteOperand_SELECT(SDNode *N, unsigned OpNo) {
411 assert(OpNo == 0 && "Only know how to promote condition");
412 SDOperand Cond = GetPromotedOp(N->getOperand(0)); // Promote the condition.
414 // The top bits of the promoted condition are not necessarily zero, ensure
415 // that the value is properly zero extended.
416 if (!DAG.MaskedValueIsZero(Cond,
417 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
418 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
419 MarkNewNodes(Cond.Val);
422 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
423 return DAG.UpdateNodeOperands(SDOperand(N, 0), Cond, N->getOperand(1),
427 SDOperand DAGTypeLegalizer::PromoteOperand_BRCOND(SDNode *N, unsigned OpNo) {
428 assert(OpNo == 1 && "only know how to promote condition");
429 SDOperand Cond = GetPromotedOp(N->getOperand(1)); // Promote the condition.
431 // The top bits of the promoted condition are not necessarily zero, ensure
432 // that the value is properly zero extended.
433 if (!DAG.MaskedValueIsZero(Cond,
434 MVT::getIntVTBitMask(Cond.getValueType())^1)) {
435 Cond = DAG.getZeroExtendInReg(Cond, MVT::i1);
436 MarkNewNodes(Cond.Val);
439 // The chain (Op#0) and basic block destination (Op#2) are always legal types.
440 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), Cond,
444 SDOperand DAGTypeLegalizer::PromoteOperand_BR_CC(SDNode *N, unsigned OpNo) {
445 assert(OpNo == 2 && "Don't know how to promote this operand");
447 SDOperand LHS = N->getOperand(2);
448 SDOperand RHS = N->getOperand(3);
449 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(1))->get());
451 // The chain (Op#0), CC (#1) and basic block destination (Op#4) are always
453 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
454 N->getOperand(1), LHS, RHS, N->getOperand(4));
457 SDOperand DAGTypeLegalizer::PromoteOperand_SETCC(SDNode *N, unsigned OpNo) {
458 assert(OpNo == 0 && "Don't know how to promote this operand");
460 SDOperand LHS = N->getOperand(0);
461 SDOperand RHS = N->getOperand(1);
462 PromoteSetCCOperands(LHS, RHS, cast<CondCodeSDNode>(N->getOperand(2))->get());
464 // The CC (#2) is always legal.
465 return DAG.UpdateNodeOperands(SDOperand(N, 0), LHS, RHS, N->getOperand(2));
468 /// PromoteSetCCOperands - Promote the operands of a comparison. This code is
469 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
470 void DAGTypeLegalizer::PromoteSetCCOperands(SDOperand &NewLHS,SDOperand &NewRHS,
471 ISD::CondCode CCCode) {
472 MVT::ValueType VT = NewLHS.getValueType();
474 // Get the promoted values.
475 NewLHS = GetPromotedOp(NewLHS);
476 NewRHS = GetPromotedOp(NewRHS);
478 // If this is an FP compare, the operands have already been extended.
479 if (!MVT::isInteger(NewLHS.getValueType()))
482 // Otherwise, we have to insert explicit sign or zero extends. Note
483 // that we could insert sign extends for ALL conditions, but zero extend
484 // is cheaper on many machines (an AND instead of two shifts), so prefer
487 default: assert(0 && "Unknown integer comparison!");
494 // ALL of these operations will work if we either sign or zero extend
495 // the operands (including the unsigned comparisons!). Zero extend is
496 // usually a simpler/cheaper operation, so prefer it.
497 NewLHS = DAG.getZeroExtendInReg(NewLHS, VT);
498 NewRHS = DAG.getZeroExtendInReg(NewRHS, VT);
504 NewLHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewLHS.getValueType(), NewLHS,
505 DAG.getValueType(VT));
506 NewRHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, NewRHS.getValueType(), NewRHS,
507 DAG.getValueType(VT));
512 SDOperand DAGTypeLegalizer::PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo){
513 SDOperand Ch = N->getChain(), Ptr = N->getBasePtr();
514 int SVOffset = N->getSrcValueOffset();
515 unsigned Alignment = N->getAlignment();
516 bool isVolatile = N->isVolatile();
518 SDOperand Val = GetPromotedOp(N->getValue()); // Get promoted value.
520 assert(!N->isTruncatingStore() && "Cannot promote this store operand!");
522 // Truncate the value and store the result.
523 return DAG.getTruncStore(Ch, Val, Ptr, N->getSrcValue(),
524 SVOffset, N->getMemoryVT(),
525 isVolatile, Alignment);