1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
90 case ISD::SIGN_EXTEND:
94 case ISD::ZERO_EXTEND:
95 R = ScalarizeVecRes_UnaryOp(N);
118 R = ScalarizeVecRes_BinOp(N);
121 R = ScalarizeVecRes_TernaryOp(N);
125 // If R is null, the sub-method took care of registering the result.
127 SetScalarizedVector(SDValue(N, ResNo), R);
130 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
131 SDValue LHS = GetScalarizedVector(N->getOperand(0));
132 SDValue RHS = GetScalarizedVector(N->getOperand(1));
133 return DAG.getNode(N->getOpcode(), SDLoc(N),
134 LHS.getValueType(), LHS, RHS);
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
138 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
139 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
140 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
141 return DAG.getNode(N->getOpcode(), SDLoc(N),
142 Op0.getValueType(), Op0, Op1, Op2);
145 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
147 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
148 return GetScalarizedVector(Op);
151 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
152 EVT NewVT = N->getValueType(0).getVectorElementType();
153 return DAG.getNode(ISD::BITCAST, SDLoc(N),
154 NewVT, N->getOperand(0));
157 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 SDValue InOp = N->getOperand(0);
160 // The BUILD_VECTOR operands may be of wider element types and
161 // we may need to truncate them back to the requested return type.
162 if (EltVT.isInteger())
163 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
167 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
168 EVT NewVT = N->getValueType(0).getVectorElementType();
169 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
170 return DAG.getConvertRndSat(NewVT, SDLoc(N),
171 Op0, DAG.getValueType(NewVT),
172 DAG.getValueType(Op0.getValueType()),
175 cast<CvtRndSatSDNode>(N)->getCvtCode());
178 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 N->getValueType(0).getVectorElementType(),
181 N->getOperand(0), N->getOperand(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
185 EVT NewVT = N->getValueType(0).getVectorElementType();
186 SDValue Op = GetScalarizedVector(N->getOperand(0));
187 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
188 NewVT, Op, N->getOperand(1));
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
192 SDValue Op = GetScalarizedVector(N->getOperand(0));
193 return DAG.getNode(ISD::FPOWI, SDLoc(N),
194 Op.getValueType(), Op, N->getOperand(1));
197 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
198 // The value to insert may have a wider type than the vector element type,
199 // so be sure to truncate it to the element type if necessary.
200 SDValue Op = N->getOperand(1);
201 EVT EltVT = N->getValueType(0).getVectorElementType();
202 if (Op.getValueType() != EltVT)
203 // FIXME: Can this happen for floating point types?
204 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
208 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
209 assert(N->isUnindexed() && "Indexed vector load?");
211 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
212 N->getExtensionType(),
213 N->getValueType(0).getVectorElementType(),
215 N->getChain(), N->getBasePtr(),
216 DAG.getUNDEF(N->getBasePtr().getValueType()),
218 N->getMemoryVT().getVectorElementType(),
219 N->isVolatile(), N->isNonTemporal(),
220 N->isInvariant(), N->getOriginalAlignment());
222 // Legalized the chain result - switch anything that used the old chain to
224 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
228 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
229 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
230 EVT DestVT = N->getValueType(0).getVectorElementType();
231 SDValue Op = GetScalarizedVector(N->getOperand(0));
232 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
235 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
236 EVT EltVT = N->getValueType(0).getVectorElementType();
237 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
238 SDValue LHS = GetScalarizedVector(N->getOperand(0));
239 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
240 LHS, DAG.getValueType(ExtVT));
243 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
244 // If the operand is wider than the vector element type then it is implicitly
245 // truncated. Make that explicit here.
246 EVT EltVT = N->getValueType(0).getVectorElementType();
247 SDValue InOp = N->getOperand(0);
248 if (InOp.getValueType() != EltVT)
249 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
253 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
254 SDValue Cond = GetScalarizedVector(N->getOperand(0));
255 SDValue LHS = GetScalarizedVector(N->getOperand(1));
256 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
257 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
258 if (ScalarBool != VecBool) {
259 EVT CondVT = Cond.getValueType();
260 switch (ScalarBool) {
261 case TargetLowering::UndefinedBooleanContent:
263 case TargetLowering::ZeroOrOneBooleanContent:
264 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
265 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
266 // Vector read from all ones, scalar expects a single 1 so mask.
267 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
268 Cond, DAG.getConstant(1, CondVT));
270 case TargetLowering::ZeroOrNegativeOneBooleanContent:
271 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
272 VecBool == TargetLowering::ZeroOrOneBooleanContent);
273 // Vector reads from a one, scalar from all ones so sign extend.
274 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
275 Cond, DAG.getValueType(MVT::i1));
280 return DAG.getSelect(SDLoc(N),
281 LHS.getValueType(), Cond, LHS,
282 GetScalarizedVector(N->getOperand(2)));
285 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
286 SDValue LHS = GetScalarizedVector(N->getOperand(1));
287 return DAG.getSelect(SDLoc(N),
288 LHS.getValueType(), N->getOperand(0), LHS,
289 GetScalarizedVector(N->getOperand(2)));
292 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
293 SDValue LHS = GetScalarizedVector(N->getOperand(2));
294 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
295 N->getOperand(0), N->getOperand(1),
296 LHS, GetScalarizedVector(N->getOperand(3)),
300 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
301 assert(N->getValueType(0).isVector() ==
302 N->getOperand(0).getValueType().isVector() &&
303 "Scalar/Vector type mismatch");
305 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
307 SDValue LHS = GetScalarizedVector(N->getOperand(0));
308 SDValue RHS = GetScalarizedVector(N->getOperand(1));
311 // Turn it into a scalar SETCC.
312 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
315 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
316 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
319 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
320 // Figure out if the scalar is the LHS or RHS and return it.
321 SDValue Arg = N->getOperand(2).getOperand(0);
322 if (Arg.getOpcode() == ISD::UNDEF)
323 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
324 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
325 return GetScalarizedVector(N->getOperand(Op));
328 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
329 assert(N->getValueType(0).isVector() &&
330 N->getOperand(0).getValueType().isVector() &&
331 "Operand types must be vectors");
333 SDValue LHS = GetScalarizedVector(N->getOperand(0));
334 SDValue RHS = GetScalarizedVector(N->getOperand(1));
335 EVT NVT = N->getValueType(0).getVectorElementType();
338 // Turn it into a scalar SETCC.
339 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
341 // Vectors may have a different boolean contents to scalars. Promote the
342 // value appropriately.
343 ISD::NodeType ExtendCode =
344 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
345 return DAG.getNode(ExtendCode, DL, NVT, Res);
349 //===----------------------------------------------------------------------===//
350 // Operand Vector Scalarization <1 x ty> -> ty.
351 //===----------------------------------------------------------------------===//
353 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
354 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
357 SDValue Res = SDValue();
359 if (Res.getNode() == 0) {
360 switch (N->getOpcode()) {
363 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
367 llvm_unreachable("Do not know how to scalarize this operator's operand!");
369 Res = ScalarizeVecOp_BITCAST(N);
371 case ISD::ANY_EXTEND:
372 case ISD::ZERO_EXTEND:
373 case ISD::SIGN_EXTEND:
375 Res = ScalarizeVecOp_UnaryOp(N);
377 case ISD::CONCAT_VECTORS:
378 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
380 case ISD::EXTRACT_VECTOR_ELT:
381 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
384 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
389 // If the result is null, the sub-method took care of registering results etc.
390 if (!Res.getNode()) return false;
392 // If the result is N, the sub-method updated N in place. Tell the legalizer
394 if (Res.getNode() == N)
397 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
398 "Invalid operand expansion");
400 ReplaceValueWith(SDValue(N, 0), Res);
404 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
405 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
406 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
407 SDValue Elt = GetScalarizedVector(N->getOperand(0));
408 return DAG.getNode(ISD::BITCAST, SDLoc(N),
409 N->getValueType(0), Elt);
412 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
413 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
414 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
415 assert(N->getValueType(0).getVectorNumElements() == 1 &&
416 "Unexected vector type!");
417 SDValue Elt = GetScalarizedVector(N->getOperand(0));
418 SmallVector<SDValue, 1> Ops(1);
419 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N),
420 N->getValueType(0).getScalarType(), Elt);
421 // Revectorize the result so the types line up with what the uses of this
422 // expression expect.
423 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
427 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
428 /// use a BUILD_VECTOR instead.
429 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
430 SmallVector<SDValue, 8> Ops(N->getNumOperands());
431 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
432 Ops[i] = GetScalarizedVector(N->getOperand(i));
433 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
434 &Ops[0], Ops.size());
437 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
438 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
440 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
441 SDValue Res = GetScalarizedVector(N->getOperand(0));
442 if (Res.getValueType() != N->getValueType(0))
443 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
448 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
449 /// scalarized, it must be <1 x ty>. Just store the element.
450 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
451 assert(N->isUnindexed() && "Indexed store of one-element vector?");
452 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
455 if (N->isTruncatingStore())
456 return DAG.getTruncStore(N->getChain(), dl,
457 GetScalarizedVector(N->getOperand(1)),
458 N->getBasePtr(), N->getPointerInfo(),
459 N->getMemoryVT().getVectorElementType(),
460 N->isVolatile(), N->isNonTemporal(),
463 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
464 N->getBasePtr(), N->getPointerInfo(),
465 N->isVolatile(), N->isNonTemporal(),
466 N->getOriginalAlignment());
470 //===----------------------------------------------------------------------===//
471 // Result Vector Splitting
472 //===----------------------------------------------------------------------===//
474 /// SplitVectorResult - This method is called when the specified result of the
475 /// specified node is found to need vector splitting. At this point, the node
476 /// may also have invalid operands or may have other results that need
477 /// legalization, we just know that (at least) one result needs vector
479 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
480 DEBUG(dbgs() << "Split node result: ";
485 // See if the target wants to custom expand this node.
486 if (CustomLowerNode(N, N->getValueType(ResNo), true))
489 switch (N->getOpcode()) {
492 dbgs() << "SplitVectorResult #" << ResNo << ": ";
496 report_fatal_error("Do not know how to split the result of this "
499 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
501 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
502 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
503 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
504 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
505 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
506 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
507 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
508 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
509 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
510 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
511 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
512 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
514 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
517 SplitVecRes_SETCC(N, Lo, Hi);
519 case ISD::VECTOR_SHUFFLE:
520 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
523 case ISD::ANY_EXTEND:
524 case ISD::CONVERT_RNDSAT:
527 case ISD::CTLZ_ZERO_UNDEF:
528 case ISD::CTTZ_ZERO_UNDEF:
539 case ISD::FNEARBYINT:
543 case ISD::FP_TO_SINT:
544 case ISD::FP_TO_UINT:
550 case ISD::SIGN_EXTEND:
551 case ISD::SINT_TO_FP:
553 case ISD::UINT_TO_FP:
554 case ISD::ZERO_EXTEND:
555 SplitVecRes_UnaryOp(N, Lo, Hi);
578 SplitVecRes_BinOp(N, Lo, Hi);
581 SplitVecRes_TernaryOp(N, Lo, Hi);
585 // If Lo/Hi is null, the sub-method took care of registering results etc.
587 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
590 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
592 SDValue LHSLo, LHSHi;
593 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
594 SDValue RHSLo, RHSHi;
595 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
598 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
599 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
602 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
604 SDValue Op0Lo, Op0Hi;
605 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
606 SDValue Op1Lo, Op1Hi;
607 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
608 SDValue Op2Lo, Op2Hi;
609 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
612 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
613 Op0Lo, Op1Lo, Op2Lo);
614 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
615 Op0Hi, Op1Hi, Op2Hi);
618 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
620 // We know the result is a vector. The input may be either a vector or a
623 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
626 SDValue InOp = N->getOperand(0);
627 EVT InVT = InOp.getValueType();
629 // Handle some special cases efficiently.
630 switch (getTypeAction(InVT)) {
631 case TargetLowering::TypeLegal:
632 case TargetLowering::TypePromoteInteger:
633 case TargetLowering::TypeSoftenFloat:
634 case TargetLowering::TypeScalarizeVector:
635 case TargetLowering::TypeWidenVector:
637 case TargetLowering::TypeExpandInteger:
638 case TargetLowering::TypeExpandFloat:
639 // A scalar to vector conversion, where the scalar needs expansion.
640 // If the vector is being split in two then we can just convert the
643 GetExpandedOp(InOp, Lo, Hi);
644 if (TLI.isBigEndian())
646 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
647 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
651 case TargetLowering::TypeSplitVector:
652 // If the input is a vector that needs to be split, convert each split
653 // piece of the input now.
654 GetSplitVector(InOp, Lo, Hi);
655 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
656 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
660 // In the general case, convert the input to an integer and split it by hand.
661 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
662 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
663 if (TLI.isBigEndian())
664 std::swap(LoIntVT, HiIntVT);
666 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
668 if (TLI.isBigEndian())
670 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
671 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
674 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
678 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
679 unsigned LoNumElts = LoVT.getVectorNumElements();
680 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
681 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
683 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
684 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
687 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
689 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
691 unsigned NumSubvectors = N->getNumOperands() / 2;
692 if (NumSubvectors == 1) {
693 Lo = N->getOperand(0);
694 Hi = N->getOperand(1);
699 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
701 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
702 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
704 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
705 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
708 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
710 SDValue Vec = N->getOperand(0);
711 SDValue Idx = N->getOperand(1);
715 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
717 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
718 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
719 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
720 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
721 TLI.getVectorIdxTy()));
724 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
727 GetSplitVector(N->getOperand(0), Lo, Hi);
728 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
729 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
732 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
734 SDValue LHSLo, LHSHi;
735 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
739 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
741 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
742 DAG.getValueType(LoVT));
743 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
744 DAG.getValueType(HiVT));
747 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
749 SDValue Vec = N->getOperand(0);
750 SDValue Elt = N->getOperand(1);
751 SDValue Idx = N->getOperand(2);
753 GetSplitVector(Vec, Lo, Hi);
755 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
756 unsigned IdxVal = CIdx->getZExtValue();
757 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
758 if (IdxVal < LoNumElts)
759 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
760 Lo.getValueType(), Lo, Elt, Idx);
762 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
763 DAG.getConstant(IdxVal - LoNumElts,
764 TLI.getVectorIdxTy()));
768 // Spill the vector to the stack.
769 EVT VecVT = Vec.getValueType();
770 EVT EltVT = VecVT.getVectorElementType();
771 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
772 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
773 MachinePointerInfo(), false, false, 0);
775 // Store the new element. This may be larger than the vector element type,
776 // so use a truncating store.
777 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
778 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
780 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
781 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
784 // Load the Lo part from the stack slot.
785 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
786 false, false, false, 0);
788 // Increment the pointer to the other part.
789 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
790 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
791 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
793 // Load the Hi part from the stack slot.
794 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
795 false, false, false, MinAlign(Alignment, IncrementSize));
798 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
802 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
803 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
804 Hi = DAG.getUNDEF(HiVT);
807 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
809 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
812 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
814 ISD::LoadExtType ExtType = LD->getExtensionType();
815 SDValue Ch = LD->getChain();
816 SDValue Ptr = LD->getBasePtr();
817 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
818 EVT MemoryVT = LD->getMemoryVT();
819 unsigned Alignment = LD->getOriginalAlignment();
820 bool isVolatile = LD->isVolatile();
821 bool isNonTemporal = LD->isNonTemporal();
822 bool isInvariant = LD->isInvariant();
824 EVT LoMemVT, HiMemVT;
825 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
827 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
828 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
829 isInvariant, Alignment);
831 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
832 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
833 DAG.getConstant(IncrementSize, Ptr.getValueType()));
834 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
835 LD->getPointerInfo().getWithOffset(IncrementSize),
836 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment);
838 // Build a factor node to remember that this load is independent of the
840 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
843 // Legalized the chain result - switch anything that used the old chain to
845 ReplaceValueWith(SDValue(LD, 1), Ch);
848 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
849 assert(N->getValueType(0).isVector() &&
850 N->getOperand(0).getValueType().isVector() &&
851 "Operand types must be vectors");
855 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
858 EVT InVT = N->getOperand(0).getValueType();
859 SDValue LL, LH, RL, RH;
860 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
861 LoVT.getVectorNumElements());
862 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
863 DAG.getConstant(0, TLI.getVectorIdxTy()));
864 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
865 DAG.getConstant(InNVT.getVectorNumElements(),
866 TLI.getVectorIdxTy()));
868 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
869 DAG.getConstant(0, TLI.getVectorIdxTy()));
870 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
871 DAG.getConstant(InNVT.getVectorNumElements(),
872 TLI.getVectorIdxTy()));
874 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
875 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
878 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
880 // Get the dest types - they may not match the input types, e.g. int_to_fp.
883 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
885 // If the input also splits, handle it directly for a compile time speedup.
886 // Otherwise split it by hand.
887 EVT InVT = N->getOperand(0).getValueType();
888 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
889 GetSplitVector(N->getOperand(0), Lo, Hi);
891 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
892 LoVT.getVectorNumElements());
893 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
894 DAG.getConstant(0, TLI.getVectorIdxTy()));
895 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
896 DAG.getConstant(InNVT.getVectorNumElements(),
897 TLI.getVectorIdxTy()));
900 if (N->getOpcode() == ISD::FP_ROUND) {
901 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
902 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
903 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
904 SDValue DTyOpLo = DAG.getValueType(LoVT);
905 SDValue DTyOpHi = DAG.getValueType(HiVT);
906 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
907 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
908 SDValue RndOp = N->getOperand(3);
909 SDValue SatOp = N->getOperand(4);
910 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
911 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
913 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
916 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
917 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
921 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
922 SDValue &Lo, SDValue &Hi) {
923 // The low and high parts of the original input give four input vectors.
926 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
927 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
928 EVT NewVT = Inputs[0].getValueType();
929 unsigned NewElts = NewVT.getVectorNumElements();
931 // If Lo or Hi uses elements from at most two of the four input vectors, then
932 // express it as a vector shuffle of those two inputs. Otherwise extract the
933 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
934 SmallVector<int, 16> Ops;
935 for (unsigned High = 0; High < 2; ++High) {
936 SDValue &Output = High ? Hi : Lo;
938 // Build a shuffle mask for the output, discovering on the fly which
939 // input vectors to use as shuffle operands (recorded in InputUsed).
940 // If building a suitable shuffle vector proves too hard, then bail
941 // out with useBuildVector set.
942 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
943 unsigned FirstMaskIdx = High * NewElts;
944 bool useBuildVector = false;
945 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
946 // The mask element. This indexes into the input.
947 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
949 // The input vector this mask element indexes into.
950 unsigned Input = (unsigned)Idx / NewElts;
952 if (Input >= array_lengthof(Inputs)) {
953 // The mask element does not index into any input vector.
958 // Turn the index into an offset from the start of the input vector.
959 Idx -= Input * NewElts;
961 // Find or create a shuffle vector operand to hold this input.
963 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
964 if (InputUsed[OpNo] == Input) {
965 // This input vector is already an operand.
967 } else if (InputUsed[OpNo] == -1U) {
968 // Create a new operand for this input vector.
969 InputUsed[OpNo] = Input;
974 if (OpNo >= array_lengthof(InputUsed)) {
975 // More than two input vectors used! Give up on trying to create a
976 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
977 useBuildVector = true;
981 // Add the mask index for the new shuffle vector.
982 Ops.push_back(Idx + OpNo * NewElts);
985 if (useBuildVector) {
986 EVT EltVT = NewVT.getVectorElementType();
987 SmallVector<SDValue, 16> SVOps;
989 // Extract the input elements by hand.
990 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
991 // The mask element. This indexes into the input.
992 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
994 // The input vector this mask element indexes into.
995 unsigned Input = (unsigned)Idx / NewElts;
997 if (Input >= array_lengthof(Inputs)) {
998 // The mask element is "undef" or indexes off the end of the input.
999 SVOps.push_back(DAG.getUNDEF(EltVT));
1003 // Turn the index into an offset from the start of the input vector.
1004 Idx -= Input * NewElts;
1006 // Extract the vector element by hand.
1007 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1008 Inputs[Input], DAG.getConstant(Idx,
1009 TLI.getVectorIdxTy())));
1012 // Construct the Lo/Hi output using a BUILD_VECTOR.
1013 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
1014 } else if (InputUsed[0] == -1U) {
1015 // No input vectors were used! The result is undefined.
1016 Output = DAG.getUNDEF(NewVT);
1018 SDValue Op0 = Inputs[InputUsed[0]];
1019 // If only one input was used, use an undefined vector for the other.
1020 SDValue Op1 = InputUsed[1] == -1U ?
1021 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1022 // At least one input vector was used. Create a new shuffle vector.
1023 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1031 //===----------------------------------------------------------------------===//
1032 // Operand Vector Splitting
1033 //===----------------------------------------------------------------------===//
1035 /// SplitVectorOperand - This method is called when the specified operand of the
1036 /// specified node is found to need vector splitting. At this point, all of the
1037 /// result types of the node are known to be legal, but other operands of the
1038 /// node may need legalization as well as the specified one.
1039 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1040 DEBUG(dbgs() << "Split node operand: ";
1043 SDValue Res = SDValue();
1045 // See if the target wants to custom split this node.
1046 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1049 if (Res.getNode() == 0) {
1050 switch (N->getOpcode()) {
1053 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1057 report_fatal_error("Do not know how to split this operator's "
1060 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1061 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1062 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1063 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1064 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1065 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1066 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1068 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1071 Res = SplitVecOp_VSELECT(N, OpNo);
1076 case ISD::FP_EXTEND:
1077 case ISD::FP_TO_SINT:
1078 case ISD::FP_TO_UINT:
1079 case ISD::SINT_TO_FP:
1080 case ISD::UINT_TO_FP:
1082 case ISD::SIGN_EXTEND:
1083 case ISD::ZERO_EXTEND:
1084 case ISD::ANY_EXTEND:
1085 Res = SplitVecOp_UnaryOp(N);
1090 // If the result is null, the sub-method took care of registering results etc.
1091 if (!Res.getNode()) return false;
1093 // If the result is N, the sub-method updated N in place. Tell the legalizer
1095 if (Res.getNode() == N)
1098 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1099 "Invalid operand expansion");
1101 ReplaceValueWith(SDValue(N, 0), Res);
1105 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1106 // The only possibility for an illegal operand is the mask, since result type
1107 // legalization would have handled this node already otherwise.
1108 assert(OpNo == 0 && "Illegal operand must be mask");
1110 SDValue Mask = N->getOperand(0);
1111 SDValue Src0 = N->getOperand(1);
1112 SDValue Src1 = N->getOperand(2);
1114 EVT MaskVT = Mask.getValueType();
1115 assert(MaskVT.isVector() && "VSELECT without a vector mask?");
1118 GetSplitVector(N->getOperand(0), Lo, Hi);
1119 assert(Lo.getValueType() == Hi.getValueType() &&
1120 "Lo and Hi have differing types");
1122 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
1123 unsigned HiNumElts = Hi.getValueType().getVectorNumElements();
1124 assert(LoNumElts == HiNumElts && "Asymmetric vector split?");
1126 LLVMContext &Ctx = *DAG.getContext();
1127 SDValue Zero = DAG.getConstant(0, TLI.getVectorIdxTy());
1128 SDValue LoElts = DAG.getConstant(LoNumElts, TLI.getVectorIdxTy());
1129 EVT Src0VT = Src0.getValueType();
1130 EVT Src0EltTy = Src0VT.getVectorElementType();
1131 EVT MaskEltTy = MaskVT.getVectorElementType();
1133 EVT LoOpVT = EVT::getVectorVT(Ctx, Src0EltTy, LoNumElts);
1134 EVT LoMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, LoNumElts);
1135 EVT HiOpVT = EVT::getVectorVT(Ctx, Src0EltTy, HiNumElts);
1136 EVT HiMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, HiNumElts);
1138 SDValue LoOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src0, Zero);
1139 SDValue LoOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src1, Zero);
1141 SDValue HiOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src0, LoElts);
1142 SDValue HiOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src1, LoElts);
1145 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoMaskVT, Mask, Zero);
1147 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiMaskVT, Mask, LoElts);
1150 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1152 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1154 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1157 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1158 // The result has a legal vector type, but the input needs splitting.
1159 EVT ResVT = N->getValueType(0);
1162 GetSplitVector(N->getOperand(0), Lo, Hi);
1163 EVT InVT = Lo.getValueType();
1165 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1166 InVT.getVectorNumElements());
1168 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1169 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1171 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1174 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1175 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1176 // end up being split all the way down to individual components. Convert the
1177 // split pieces into integers and reassemble.
1179 GetSplitVector(N->getOperand(0), Lo, Hi);
1180 Lo = BitConvertToInteger(Lo);
1181 Hi = BitConvertToInteger(Hi);
1183 if (TLI.isBigEndian())
1186 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1187 JoinIntegers(Lo, Hi));
1190 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1191 // We know that the extracted result type is legal.
1192 EVT SubVT = N->getValueType(0);
1193 SDValue Idx = N->getOperand(1);
1196 GetSplitVector(N->getOperand(0), Lo, Hi);
1198 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1199 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1201 if (IdxVal < LoElts) {
1202 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1203 "Extracted subvector crosses vector split!");
1204 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1206 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1207 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1211 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1212 SDValue Vec = N->getOperand(0);
1213 SDValue Idx = N->getOperand(1);
1214 EVT VecVT = Vec.getValueType();
1216 if (isa<ConstantSDNode>(Idx)) {
1217 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1218 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1221 GetSplitVector(Vec, Lo, Hi);
1223 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1225 if (IdxVal < LoElts)
1226 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1227 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1228 DAG.getConstant(IdxVal - LoElts,
1229 Idx.getValueType())), 0);
1232 // Store the vector to the stack.
1233 EVT EltVT = VecVT.getVectorElementType();
1235 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1236 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1237 MachinePointerInfo(), false, false, 0);
1239 // Load back the required element.
1240 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1241 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1242 MachinePointerInfo(), EltVT, false, false, 0);
1245 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1246 assert(N->isUnindexed() && "Indexed store of vector?");
1247 assert(OpNo == 1 && "Can only split the stored value");
1250 bool isTruncating = N->isTruncatingStore();
1251 SDValue Ch = N->getChain();
1252 SDValue Ptr = N->getBasePtr();
1253 EVT MemoryVT = N->getMemoryVT();
1254 unsigned Alignment = N->getOriginalAlignment();
1255 bool isVol = N->isVolatile();
1256 bool isNT = N->isNonTemporal();
1258 GetSplitVector(N->getOperand(1), Lo, Hi);
1260 EVT LoMemVT, HiMemVT;
1261 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1263 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1266 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1267 LoMemVT, isVol, isNT, Alignment);
1269 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1270 isVol, isNT, Alignment);
1272 // Increment the pointer to the other half.
1273 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1274 DAG.getConstant(IncrementSize, Ptr.getValueType()));
1277 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1278 N->getPointerInfo().getWithOffset(IncrementSize),
1279 HiMemVT, isVol, isNT, Alignment);
1281 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1282 N->getPointerInfo().getWithOffset(IncrementSize),
1283 isVol, isNT, Alignment);
1285 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1288 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1291 // The input operands all must have the same type, and we know the result
1292 // type is valid. Convert this to a buildvector which extracts all the
1294 // TODO: If the input elements are power-two vectors, we could convert this to
1295 // a new CONCAT_VECTORS node with elements that are half-wide.
1296 SmallVector<SDValue, 32> Elts;
1297 EVT EltVT = N->getValueType(0).getVectorElementType();
1298 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1299 SDValue Op = N->getOperand(op);
1300 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1302 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1303 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1308 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1309 &Elts[0], Elts.size());
1312 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1313 // The result type is legal, but the input type is illegal. If splitting
1314 // ends up with the result type of each half still being legal, just
1315 // do that. If, however, that would result in an illegal result type,
1316 // we can try to get more clever with power-two vectors. Specifically,
1317 // split the input type, but also widen the result element size, then
1318 // concatenate the halves and truncate again. For example, consider a target
1319 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1320 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1321 // %inlo = v4i32 extract_subvector %in, 0
1322 // %inhi = v4i32 extract_subvector %in, 4
1323 // %lo16 = v4i16 trunc v4i32 %inlo
1324 // %hi16 = v4i16 trunc v4i32 %inhi
1325 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1326 // %res = v8i8 trunc v8i16 %in16
1328 // Without this transform, the original truncate would end up being
1329 // scalarized, which is pretty much always a last resort.
1330 SDValue InVec = N->getOperand(0);
1331 EVT InVT = InVec->getValueType(0);
1332 EVT OutVT = N->getValueType(0);
1333 unsigned NumElements = OutVT.getVectorNumElements();
1334 // Widening should have already made sure this is a power-two vector
1335 // if we're trying to split it at all. assert() that's true, just in case.
1336 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1338 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1339 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1341 // If the input elements are only 1/2 the width of the result elements,
1342 // just use the normal splitting. Our trick only work if there's room
1343 // to split more than once.
1344 if (InElementSize <= OutElementSize * 2)
1345 return SplitVecOp_UnaryOp(N);
1348 // Extract the halves of the input via extract_subvector.
1349 EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
1350 InVT.getVectorElementType(), NumElements/2);
1351 SDValue InLoVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1352 DAG.getConstant(0, TLI.getVectorIdxTy()));
1353 SDValue InHiVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1354 DAG.getConstant(NumElements/2,
1355 TLI.getVectorIdxTy()));
1356 // Truncate them to 1/2 the element size.
1357 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1358 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1360 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1361 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1362 // Concatenate them to get the full intermediate truncation result.
1363 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1364 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1366 // Now finish up by truncating all the way down to the original result
1367 // type. This should normally be something that ends up being legal directly,
1368 // but in theory if a target has very wide vectors and an annoyingly
1369 // restricted set of legal types, this split can chain to build things up.
1370 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1373 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1374 assert(N->getValueType(0).isVector() &&
1375 N->getOperand(0).getValueType().isVector() &&
1376 "Operand types must be vectors");
1377 // The result has a legal vector type, but the input needs splitting.
1378 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1380 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1381 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1382 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1383 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1384 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1386 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1387 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1388 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1389 return PromoteTargetBoolean(Con, N->getValueType(0));
1393 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1394 // The result has a legal vector type, but the input needs splitting.
1395 EVT ResVT = N->getValueType(0);
1398 GetSplitVector(N->getOperand(0), Lo, Hi);
1399 EVT InVT = Lo.getValueType();
1401 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1402 InVT.getVectorNumElements());
1404 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1405 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1407 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1412 //===----------------------------------------------------------------------===//
1413 // Result Vector Widening
1414 //===----------------------------------------------------------------------===//
1416 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1417 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1421 // See if the target wants to custom widen this node.
1422 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1425 SDValue Res = SDValue();
1426 switch (N->getOpcode()) {
1429 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1433 llvm_unreachable("Do not know how to widen the result of this operator!");
1435 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1436 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1437 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1438 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1439 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1440 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1441 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1442 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1443 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1444 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1445 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1447 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1448 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1449 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1450 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1451 case ISD::VECTOR_SHUFFLE:
1452 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1464 Res = WidenVecRes_Binary(N);
1468 case ISD::FCOPYSIGN:
1478 Res = WidenVecRes_BinaryCanTrap(N);
1482 Res = WidenVecRes_POWI(N);
1488 Res = WidenVecRes_Shift(N);
1491 case ISD::ANY_EXTEND:
1492 case ISD::FP_EXTEND:
1494 case ISD::FP_TO_SINT:
1495 case ISD::FP_TO_UINT:
1496 case ISD::SIGN_EXTEND:
1497 case ISD::SINT_TO_FP:
1499 case ISD::UINT_TO_FP:
1500 case ISD::ZERO_EXTEND:
1501 Res = WidenVecRes_Convert(N);
1516 case ISD::FNEARBYINT:
1523 Res = WidenVecRes_Unary(N);
1526 Res = WidenVecRes_Ternary(N);
1530 // If Res is null, the sub-method took care of registering the result.
1532 SetWidenedVector(SDValue(N, ResNo), Res);
1535 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1536 // Ternary op widening.
1538 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1539 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1540 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1541 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1542 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1545 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1546 // Binary op widening.
1548 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1549 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1550 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1551 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1554 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
1555 // Binary op widening for operations that can trap.
1556 unsigned Opcode = N->getOpcode();
1558 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1559 EVT WidenEltVT = WidenVT.getVectorElementType();
1561 unsigned NumElts = VT.getVectorNumElements();
1562 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1563 NumElts = NumElts / 2;
1564 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1567 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1568 // Operation doesn't trap so just widen as normal.
1569 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1570 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1571 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1574 // No legal vector version so unroll the vector operation and then widen.
1576 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1578 // Since the operation can trap, apply operation on the original vector.
1580 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1581 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1582 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1584 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1585 unsigned ConcatEnd = 0; // Current ConcatOps index.
1586 int Idx = 0; // Current Idx into input vectors.
1588 // NumElts := greatest legal vector size (at most WidenVT)
1589 // while (orig. vector has unhandled elements) {
1590 // take munches of size NumElts from the beginning and add to ConcatOps
1591 // NumElts := next smaller supported vector size or 1
1593 while (CurNumElts != 0) {
1594 while (CurNumElts >= NumElts) {
1595 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1596 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1597 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1598 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1599 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1601 CurNumElts -= NumElts;
1604 NumElts = NumElts / 2;
1605 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1606 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1609 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1610 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1611 InOp1, DAG.getConstant(Idx,
1612 TLI.getVectorIdxTy()));
1613 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1614 InOp2, DAG.getConstant(Idx,
1615 TLI.getVectorIdxTy()));
1616 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1623 // Check to see if we have a single operation with the widen type.
1624 if (ConcatEnd == 1) {
1625 VT = ConcatOps[0].getValueType();
1627 return ConcatOps[0];
1630 // while (Some element of ConcatOps is not of type MaxVT) {
1631 // From the end of ConcatOps, collect elements of the same type and put
1632 // them into an op of the next larger supported type
1634 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1635 Idx = ConcatEnd - 1;
1636 VT = ConcatOps[Idx--].getValueType();
1637 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1640 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1644 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1645 } while (!TLI.isTypeLegal(NextVT));
1647 if (!VT.isVector()) {
1648 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1649 SDValue VecOp = DAG.getUNDEF(NextVT);
1650 unsigned NumToInsert = ConcatEnd - Idx - 1;
1651 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1652 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1653 ConcatOps[OpIdx], DAG.getConstant(i,
1654 TLI.getVectorIdxTy()));
1656 ConcatOps[Idx+1] = VecOp;
1657 ConcatEnd = Idx + 2;
1659 // Vector type, create a CONCAT_VECTORS of type NextVT
1660 SDValue undefVec = DAG.getUNDEF(VT);
1661 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1662 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1663 unsigned RealVals = ConcatEnd - Idx - 1;
1664 unsigned SubConcatEnd = 0;
1665 unsigned SubConcatIdx = Idx + 1;
1666 while (SubConcatEnd < RealVals)
1667 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1668 while (SubConcatEnd < OpsToConcat)
1669 SubConcatOps[SubConcatEnd++] = undefVec;
1670 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1671 NextVT, &SubConcatOps[0],
1673 ConcatEnd = SubConcatIdx + 1;
1677 // Check to see if we have a single operation with the widen type.
1678 if (ConcatEnd == 1) {
1679 VT = ConcatOps[0].getValueType();
1681 return ConcatOps[0];
1684 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1685 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1686 if (NumOps != ConcatEnd ) {
1687 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1688 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1689 ConcatOps[j] = UndefVal;
1691 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1694 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1695 SDValue InOp = N->getOperand(0);
1698 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1699 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1701 EVT InVT = InOp.getValueType();
1702 EVT InEltVT = InVT.getVectorElementType();
1703 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1705 unsigned Opcode = N->getOpcode();
1706 unsigned InVTNumElts = InVT.getVectorNumElements();
1708 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1709 InOp = GetWidenedVector(N->getOperand(0));
1710 InVT = InOp.getValueType();
1711 InVTNumElts = InVT.getVectorNumElements();
1712 if (InVTNumElts == WidenNumElts) {
1713 if (N->getNumOperands() == 1)
1714 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1715 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1719 if (TLI.isTypeLegal(InWidenVT)) {
1720 // Because the result and the input are different vector types, widening
1721 // the result could create a legal type but widening the input might make
1722 // it an illegal type that might lead to repeatedly splitting the input
1723 // and then widening it. To avoid this, we widen the input only if
1724 // it results in a legal type.
1725 if (WidenNumElts % InVTNumElts == 0) {
1726 // Widen the input and call convert on the widened input vector.
1727 unsigned NumConcat = WidenNumElts/InVTNumElts;
1728 SmallVector<SDValue, 16> Ops(NumConcat);
1730 SDValue UndefVal = DAG.getUNDEF(InVT);
1731 for (unsigned i = 1; i != NumConcat; ++i)
1733 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1734 &Ops[0], NumConcat);
1735 if (N->getNumOperands() == 1)
1736 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1737 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1740 if (InVTNumElts % WidenNumElts == 0) {
1741 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1742 InOp, DAG.getConstant(0,
1743 TLI.getVectorIdxTy()));
1744 // Extract the input and convert the shorten input vector.
1745 if (N->getNumOperands() == 1)
1746 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1747 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1751 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1752 SmallVector<SDValue, 16> Ops(WidenNumElts);
1753 EVT EltVT = WidenVT.getVectorElementType();
1754 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1756 for (i=0; i < MinElts; ++i) {
1757 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1758 DAG.getConstant(i, TLI.getVectorIdxTy()));
1759 if (N->getNumOperands() == 1)
1760 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1762 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1765 SDValue UndefVal = DAG.getUNDEF(EltVT);
1766 for (; i < WidenNumElts; ++i)
1769 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1772 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1773 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1774 SDValue InOp = GetWidenedVector(N->getOperand(0));
1775 SDValue ShOp = N->getOperand(1);
1776 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1779 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1780 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1781 SDValue InOp = GetWidenedVector(N->getOperand(0));
1782 SDValue ShOp = N->getOperand(1);
1784 EVT ShVT = ShOp.getValueType();
1785 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1786 ShOp = GetWidenedVector(ShOp);
1787 ShVT = ShOp.getValueType();
1789 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1790 ShVT.getVectorElementType(),
1791 WidenVT.getVectorNumElements());
1792 if (ShVT != ShWidenVT)
1793 ShOp = ModifyToType(ShOp, ShWidenVT);
1795 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1798 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1799 // Unary op widening.
1800 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1801 SDValue InOp = GetWidenedVector(N->getOperand(0));
1802 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1805 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1806 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1807 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1808 cast<VTSDNode>(N->getOperand(1))->getVT()
1809 .getVectorElementType(),
1810 WidenVT.getVectorNumElements());
1811 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1812 return DAG.getNode(N->getOpcode(), SDLoc(N),
1813 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1816 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1817 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1818 return GetWidenedVector(WidenVec);
1821 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1822 SDValue InOp = N->getOperand(0);
1823 EVT InVT = InOp.getValueType();
1824 EVT VT = N->getValueType(0);
1825 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1828 switch (getTypeAction(InVT)) {
1829 case TargetLowering::TypeLegal:
1831 case TargetLowering::TypePromoteInteger:
1832 // If the incoming type is a vector that is being promoted, then
1833 // we know that the elements are arranged differently and that we
1834 // must perform the conversion using a stack slot.
1835 if (InVT.isVector())
1838 // If the InOp is promoted to the same size, convert it. Otherwise,
1839 // fall out of the switch and widen the promoted input.
1840 InOp = GetPromotedInteger(InOp);
1841 InVT = InOp.getValueType();
1842 if (WidenVT.bitsEq(InVT))
1843 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1845 case TargetLowering::TypeSoftenFloat:
1846 case TargetLowering::TypeExpandInteger:
1847 case TargetLowering::TypeExpandFloat:
1848 case TargetLowering::TypeScalarizeVector:
1849 case TargetLowering::TypeSplitVector:
1851 case TargetLowering::TypeWidenVector:
1852 // If the InOp is widened to the same size, convert it. Otherwise, fall
1853 // out of the switch and widen the widened input.
1854 InOp = GetWidenedVector(InOp);
1855 InVT = InOp.getValueType();
1856 if (WidenVT.bitsEq(InVT))
1857 // The input widens to the same size. Convert to the widen value.
1858 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1862 unsigned WidenSize = WidenVT.getSizeInBits();
1863 unsigned InSize = InVT.getSizeInBits();
1864 // x86mmx is not an acceptable vector element type, so don't try.
1865 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1866 // Determine new input vector type. The new input vector type will use
1867 // the same element type (if its a vector) or use the input type as a
1868 // vector. It is the same size as the type to widen to.
1870 unsigned NewNumElts = WidenSize / InSize;
1871 if (InVT.isVector()) {
1872 EVT InEltVT = InVT.getVectorElementType();
1873 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1874 WidenSize / InEltVT.getSizeInBits());
1876 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1879 if (TLI.isTypeLegal(NewInVT)) {
1880 // Because the result and the input are different vector types, widening
1881 // the result could create a legal type but widening the input might make
1882 // it an illegal type that might lead to repeatedly splitting the input
1883 // and then widening it. To avoid this, we widen the input only if
1884 // it results in a legal type.
1885 SmallVector<SDValue, 16> Ops(NewNumElts);
1886 SDValue UndefVal = DAG.getUNDEF(InVT);
1888 for (unsigned i = 1; i < NewNumElts; ++i)
1892 if (InVT.isVector())
1893 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1894 NewInVT, &Ops[0], NewNumElts);
1896 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1897 NewInVT, &Ops[0], NewNumElts);
1898 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1902 return CreateStackStoreLoad(InOp, WidenVT);
1905 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1907 // Build a vector with undefined for the new nodes.
1908 EVT VT = N->getValueType(0);
1910 // Integer BUILD_VECTOR operands may be larger than the node's vector element
1911 // type. The UNDEFs need to have the same type as the existing operands.
1912 EVT EltVT = N->getOperand(0).getValueType();
1913 unsigned NumElts = VT.getVectorNumElements();
1915 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1916 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1918 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1919 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
1920 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
1922 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1925 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1926 EVT InVT = N->getOperand(0).getValueType();
1927 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1929 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1930 unsigned NumInElts = InVT.getVectorNumElements();
1931 unsigned NumOperands = N->getNumOperands();
1933 bool InputWidened = false; // Indicates we need to widen the input.
1934 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1935 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1936 // Add undef vectors to widen to correct length.
1937 unsigned NumConcat = WidenVT.getVectorNumElements() /
1938 InVT.getVectorNumElements();
1939 SDValue UndefVal = DAG.getUNDEF(InVT);
1940 SmallVector<SDValue, 16> Ops(NumConcat);
1941 for (unsigned i=0; i < NumOperands; ++i)
1942 Ops[i] = N->getOperand(i);
1943 for (unsigned i = NumOperands; i != NumConcat; ++i)
1945 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1948 InputWidened = true;
1949 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1950 // The inputs and the result are widen to the same value.
1952 for (i=1; i < NumOperands; ++i)
1953 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1956 if (i == NumOperands)
1957 // Everything but the first operand is an UNDEF so just return the
1958 // widened first operand.
1959 return GetWidenedVector(N->getOperand(0));
1961 if (NumOperands == 2) {
1962 // Replace concat of two operands with a shuffle.
1963 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1964 for (unsigned i = 0; i < NumInElts; ++i) {
1966 MaskOps[i + NumInElts] = i + WidenNumElts;
1968 return DAG.getVectorShuffle(WidenVT, dl,
1969 GetWidenedVector(N->getOperand(0)),
1970 GetWidenedVector(N->getOperand(1)),
1976 // Fall back to use extracts and build vector.
1977 EVT EltVT = WidenVT.getVectorElementType();
1978 SmallVector<SDValue, 16> Ops(WidenNumElts);
1980 for (unsigned i=0; i < NumOperands; ++i) {
1981 SDValue InOp = N->getOperand(i);
1983 InOp = GetWidenedVector(InOp);
1984 for (unsigned j=0; j < NumInElts; ++j)
1985 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1986 DAG.getConstant(j, TLI.getVectorIdxTy()));
1988 SDValue UndefVal = DAG.getUNDEF(EltVT);
1989 for (; Idx < WidenNumElts; ++Idx)
1990 Ops[Idx] = UndefVal;
1991 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1994 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1996 SDValue InOp = N->getOperand(0);
1997 SDValue RndOp = N->getOperand(3);
1998 SDValue SatOp = N->getOperand(4);
2000 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2001 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2003 EVT InVT = InOp.getValueType();
2004 EVT InEltVT = InVT.getVectorElementType();
2005 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
2007 SDValue DTyOp = DAG.getValueType(WidenVT);
2008 SDValue STyOp = DAG.getValueType(InWidenVT);
2009 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
2011 unsigned InVTNumElts = InVT.getVectorNumElements();
2012 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
2013 InOp = GetWidenedVector(InOp);
2014 InVT = InOp.getValueType();
2015 InVTNumElts = InVT.getVectorNumElements();
2016 if (InVTNumElts == WidenNumElts)
2017 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2021 if (TLI.isTypeLegal(InWidenVT)) {
2022 // Because the result and the input are different vector types, widening
2023 // the result could create a legal type but widening the input might make
2024 // it an illegal type that might lead to repeatedly splitting the input
2025 // and then widening it. To avoid this, we widen the input only if
2026 // it results in a legal type.
2027 if (WidenNumElts % InVTNumElts == 0) {
2028 // Widen the input and call convert on the widened input vector.
2029 unsigned NumConcat = WidenNumElts/InVTNumElts;
2030 SmallVector<SDValue, 16> Ops(NumConcat);
2032 SDValue UndefVal = DAG.getUNDEF(InVT);
2033 for (unsigned i = 1; i != NumConcat; ++i)
2036 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
2037 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2041 if (InVTNumElts % WidenNumElts == 0) {
2042 // Extract the input and convert the shorten input vector.
2043 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2044 DAG.getConstant(0, TLI.getVectorIdxTy()));
2045 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2050 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2051 SmallVector<SDValue, 16> Ops(WidenNumElts);
2052 EVT EltVT = WidenVT.getVectorElementType();
2053 DTyOp = DAG.getValueType(EltVT);
2054 STyOp = DAG.getValueType(InEltVT);
2056 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2058 for (i=0; i < MinElts; ++i) {
2059 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2060 DAG.getConstant(i, TLI.getVectorIdxTy()));
2061 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2065 SDValue UndefVal = DAG.getUNDEF(EltVT);
2066 for (; i < WidenNumElts; ++i)
2069 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2072 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2073 EVT VT = N->getValueType(0);
2074 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2075 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2076 SDValue InOp = N->getOperand(0);
2077 SDValue Idx = N->getOperand(1);
2080 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2081 InOp = GetWidenedVector(InOp);
2083 EVT InVT = InOp.getValueType();
2085 // Check if we can just return the input vector after widening.
2086 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2087 if (IdxVal == 0 && InVT == WidenVT)
2090 // Check if we can extract from the vector.
2091 unsigned InNumElts = InVT.getVectorNumElements();
2092 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2093 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2095 // We could try widening the input to the right length but for now, extract
2096 // the original elements, fill the rest with undefs and build a vector.
2097 SmallVector<SDValue, 16> Ops(WidenNumElts);
2098 EVT EltVT = VT.getVectorElementType();
2099 unsigned NumElts = VT.getVectorNumElements();
2101 for (i=0; i < NumElts; ++i)
2102 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2103 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2105 SDValue UndefVal = DAG.getUNDEF(EltVT);
2106 for (; i < WidenNumElts; ++i)
2108 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2111 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2112 SDValue InOp = GetWidenedVector(N->getOperand(0));
2113 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2114 InOp.getValueType(), InOp,
2115 N->getOperand(1), N->getOperand(2));
2118 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2119 LoadSDNode *LD = cast<LoadSDNode>(N);
2120 ISD::LoadExtType ExtType = LD->getExtensionType();
2123 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2124 if (ExtType != ISD::NON_EXTLOAD)
2125 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2127 Result = GenWidenVectorLoads(LdChain, LD);
2129 // If we generate a single load, we can use that for the chain. Otherwise,
2130 // build a factor node to remember the multiple loads are independent and
2133 if (LdChain.size() == 1)
2134 NewChain = LdChain[0];
2136 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
2137 &LdChain[0], LdChain.size());
2139 // Modified the chain - switch anything that used the old chain to use
2141 ReplaceValueWith(SDValue(N, 1), NewChain);
2146 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2147 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2148 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2149 WidenVT, N->getOperand(0));
2152 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2153 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2154 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2156 SDValue Cond1 = N->getOperand(0);
2157 EVT CondVT = Cond1.getValueType();
2158 if (CondVT.isVector()) {
2159 EVT CondEltVT = CondVT.getVectorElementType();
2160 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2161 CondEltVT, WidenNumElts);
2162 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2163 Cond1 = GetWidenedVector(Cond1);
2165 if (Cond1.getValueType() != CondWidenVT)
2166 Cond1 = ModifyToType(Cond1, CondWidenVT);
2169 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2170 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2171 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2172 return DAG.getNode(N->getOpcode(), SDLoc(N),
2173 WidenVT, Cond1, InOp1, InOp2);
2176 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2177 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2178 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2179 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2180 InOp1.getValueType(), N->getOperand(0),
2181 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2184 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2185 assert(N->getValueType(0).isVector() ==
2186 N->getOperand(0).getValueType().isVector() &&
2187 "Scalar/Vector type mismatch");
2188 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2190 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2191 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2192 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2193 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2194 InOp1, InOp2, N->getOperand(2));
2197 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2198 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2199 return DAG.getUNDEF(WidenVT);
2202 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2203 EVT VT = N->getValueType(0);
2206 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2207 unsigned NumElts = VT.getVectorNumElements();
2208 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2210 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2211 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2213 // Adjust mask based on new input vector length.
2214 SmallVector<int, 16> NewMask;
2215 for (unsigned i = 0; i != NumElts; ++i) {
2216 int Idx = N->getMaskElt(i);
2217 if (Idx < (int)NumElts)
2218 NewMask.push_back(Idx);
2220 NewMask.push_back(Idx - NumElts + WidenNumElts);
2222 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2223 NewMask.push_back(-1);
2224 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2227 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2228 assert(N->getValueType(0).isVector() &&
2229 N->getOperand(0).getValueType().isVector() &&
2230 "Operands must be vectors");
2231 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2232 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2234 SDValue InOp1 = N->getOperand(0);
2235 EVT InVT = InOp1.getValueType();
2236 assert(InVT.isVector() && "can not widen non vector type");
2237 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2238 InVT.getVectorElementType(), WidenNumElts);
2239 InOp1 = GetWidenedVector(InOp1);
2240 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2242 // Assume that the input and output will be widen appropriately. If not,
2243 // we will have to unroll it at some point.
2244 assert(InOp1.getValueType() == WidenInVT &&
2245 InOp2.getValueType() == WidenInVT &&
2246 "Input not widened to expected type!");
2248 return DAG.getNode(ISD::SETCC, SDLoc(N),
2249 WidenVT, InOp1, InOp2, N->getOperand(2));
2253 //===----------------------------------------------------------------------===//
2254 // Widen Vector Operand
2255 //===----------------------------------------------------------------------===//
2256 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2257 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2260 SDValue Res = SDValue();
2262 // See if the target wants to custom widen this node.
2263 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2266 switch (N->getOpcode()) {
2269 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2273 llvm_unreachable("Do not know how to widen this operator's operand!");
2275 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2276 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2277 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2278 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2279 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2280 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2282 case ISD::FP_EXTEND:
2283 case ISD::FP_TO_SINT:
2284 case ISD::FP_TO_UINT:
2285 case ISD::SINT_TO_FP:
2286 case ISD::UINT_TO_FP:
2288 case ISD::SIGN_EXTEND:
2289 case ISD::ZERO_EXTEND:
2290 case ISD::ANY_EXTEND:
2291 Res = WidenVecOp_Convert(N);
2295 // If Res is null, the sub-method took care of registering the result.
2296 if (!Res.getNode()) return false;
2298 // If the result is N, the sub-method updated N in place. Tell the legalizer
2300 if (Res.getNode() == N)
2304 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2305 "Invalid operand expansion");
2307 ReplaceValueWith(SDValue(N, 0), Res);
2311 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2312 // Since the result is legal and the input is illegal, it is unlikely
2313 // that we can fix the input to a legal type so unroll the convert
2314 // into some scalar code and create a nasty build vector.
2315 EVT VT = N->getValueType(0);
2316 EVT EltVT = VT.getVectorElementType();
2318 unsigned NumElts = VT.getVectorNumElements();
2319 SDValue InOp = N->getOperand(0);
2320 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2321 InOp = GetWidenedVector(InOp);
2322 EVT InVT = InOp.getValueType();
2323 EVT InEltVT = InVT.getVectorElementType();
2325 unsigned Opcode = N->getOpcode();
2326 SmallVector<SDValue, 16> Ops(NumElts);
2327 for (unsigned i=0; i < NumElts; ++i)
2328 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2329 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2330 DAG.getConstant(i, TLI.getVectorIdxTy())));
2332 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2335 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2336 EVT VT = N->getValueType(0);
2337 SDValue InOp = GetWidenedVector(N->getOperand(0));
2338 EVT InWidenVT = InOp.getValueType();
2341 // Check if we can convert between two legal vector types and extract.
2342 unsigned InWidenSize = InWidenVT.getSizeInBits();
2343 unsigned Size = VT.getSizeInBits();
2344 // x86mmx is not an acceptable vector element type, so don't try.
2345 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2346 unsigned NewNumElts = InWidenSize / Size;
2347 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2348 if (TLI.isTypeLegal(NewVT)) {
2349 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2350 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2351 DAG.getConstant(0, TLI.getVectorIdxTy()));
2355 return CreateStackStoreLoad(InOp, VT);
2358 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2359 // If the input vector is not legal, it is likely that we will not find a
2360 // legal vector of the same size. Replace the concatenate vector with a
2361 // nasty build vector.
2362 EVT VT = N->getValueType(0);
2363 EVT EltVT = VT.getVectorElementType();
2365 unsigned NumElts = VT.getVectorNumElements();
2366 SmallVector<SDValue, 16> Ops(NumElts);
2368 EVT InVT = N->getOperand(0).getValueType();
2369 unsigned NumInElts = InVT.getVectorNumElements();
2372 unsigned NumOperands = N->getNumOperands();
2373 for (unsigned i=0; i < NumOperands; ++i) {
2374 SDValue InOp = N->getOperand(i);
2375 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2376 InOp = GetWidenedVector(InOp);
2377 for (unsigned j=0; j < NumInElts; ++j)
2378 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2379 DAG.getConstant(j, TLI.getVectorIdxTy()));
2381 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2384 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2385 SDValue InOp = GetWidenedVector(N->getOperand(0));
2386 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2387 N->getValueType(0), InOp, N->getOperand(1));
2390 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2391 SDValue InOp = GetWidenedVector(N->getOperand(0));
2392 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2393 N->getValueType(0), InOp, N->getOperand(1));
2396 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2397 // We have to widen the value but we want only to store the original
2399 StoreSDNode *ST = cast<StoreSDNode>(N);
2401 SmallVector<SDValue, 16> StChain;
2402 if (ST->isTruncatingStore())
2403 GenWidenVectorTruncStores(StChain, ST);
2405 GenWidenVectorStores(StChain, ST);
2407 if (StChain.size() == 1)
2410 return DAG.getNode(ISD::TokenFactor, SDLoc(ST),
2411 MVT::Other,&StChain[0],StChain.size());
2414 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2415 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2416 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2419 // WARNING: In this code we widen the compare instruction with garbage.
2420 // This garbage may contain denormal floats which may be slow. Is this a real
2421 // concern ? Should we zero the unused lanes if this is a float compare ?
2423 // Get a new SETCC node to compare the newly widened operands.
2424 // Only some of the compared elements are legal.
2425 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2426 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2427 SVT, InOp0, InOp1, N->getOperand(2));
2429 // Extract the needed results from the result vector.
2430 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2431 SVT.getVectorElementType(),
2432 N->getValueType(0).getVectorNumElements());
2433 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2434 ResVT, WideSETCC, DAG.getConstant(0,
2435 TLI.getVectorIdxTy()));
2437 return PromoteTargetBoolean(CC, N->getValueType(0));
2441 //===----------------------------------------------------------------------===//
2442 // Vector Widening Utilities
2443 //===----------------------------------------------------------------------===//
2445 // Utility function to find the type to chop up a widen vector for load/store
2446 // TLI: Target lowering used to determine legal types.
2447 // Width: Width left need to load/store.
2448 // WidenVT: The widen vector type to load to/store from
2449 // Align: If 0, don't allow use of a wider type
2450 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2452 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2453 unsigned Width, EVT WidenVT,
2454 unsigned Align = 0, unsigned WidenEx = 0) {
2455 EVT WidenEltVT = WidenVT.getVectorElementType();
2456 unsigned WidenWidth = WidenVT.getSizeInBits();
2457 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2458 unsigned AlignInBits = Align*8;
2460 // If we have one element to load/store, return it.
2461 EVT RetVT = WidenEltVT;
2462 if (Width == WidenEltWidth)
2465 // See if there is larger legal integer than the element type to load/store
2467 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2468 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2469 EVT MemVT((MVT::SimpleValueType) VT);
2470 unsigned MemVTWidth = MemVT.getSizeInBits();
2471 if (MemVT.getSizeInBits() <= WidenEltWidth)
2473 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2474 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2475 (MemVTWidth <= Width ||
2476 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2482 // See if there is a larger vector type to load/store that has the same vector
2483 // element type and is evenly divisible with the WidenVT.
2484 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2485 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2486 EVT MemVT = (MVT::SimpleValueType) VT;
2487 unsigned MemVTWidth = MemVT.getSizeInBits();
2488 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2489 (WidenWidth % MemVTWidth) == 0 &&
2490 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2491 (MemVTWidth <= Width ||
2492 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2493 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2501 // Builds a vector type from scalar loads
2502 // VecTy: Resulting Vector type
2503 // LDOps: Load operators to build a vector type
2504 // [Start,End) the list of loads to use.
2505 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2506 SmallVectorImpl<SDValue> &LdOps,
2507 unsigned Start, unsigned End) {
2508 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2509 SDLoc dl(LdOps[Start]);
2510 EVT LdTy = LdOps[Start].getValueType();
2511 unsigned Width = VecTy.getSizeInBits();
2512 unsigned NumElts = Width / LdTy.getSizeInBits();
2513 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2516 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2518 for (unsigned i = Start + 1; i != End; ++i) {
2519 EVT NewLdTy = LdOps[i].getValueType();
2520 if (NewLdTy != LdTy) {
2521 NumElts = Width / NewLdTy.getSizeInBits();
2522 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2523 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2524 // Readjust position and vector position based on new load type
2525 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2528 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2529 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2531 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2534 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2536 // The strategy assumes that we can efficiently load powers of two widths.
2537 // The routines chops the vector into the largest vector loads with the same
2538 // element type or scalar loads and then recombines it to the widen vector
2540 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2541 unsigned WidenWidth = WidenVT.getSizeInBits();
2542 EVT LdVT = LD->getMemoryVT();
2544 assert(LdVT.isVector() && WidenVT.isVector());
2545 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2548 SDValue Chain = LD->getChain();
2549 SDValue BasePtr = LD->getBasePtr();
2550 unsigned Align = LD->getAlignment();
2551 bool isVolatile = LD->isVolatile();
2552 bool isNonTemporal = LD->isNonTemporal();
2553 bool isInvariant = LD->isInvariant();
2555 int LdWidth = LdVT.getSizeInBits();
2556 int WidthDiff = WidenWidth - LdWidth; // Difference
2557 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2559 // Find the vector type that can load from.
2560 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2561 int NewVTWidth = NewVT.getSizeInBits();
2562 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2563 isVolatile, isNonTemporal, isInvariant, Align);
2564 LdChain.push_back(LdOp.getValue(1));
2566 // Check if we can load the element with one instruction
2567 if (LdWidth <= NewVTWidth) {
2568 if (!NewVT.isVector()) {
2569 unsigned NumElts = WidenWidth / NewVTWidth;
2570 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2571 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2572 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2574 if (NewVT == WidenVT)
2577 assert(WidenWidth % NewVTWidth == 0);
2578 unsigned NumConcat = WidenWidth / NewVTWidth;
2579 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2580 SDValue UndefVal = DAG.getUNDEF(NewVT);
2581 ConcatOps[0] = LdOp;
2582 for (unsigned i = 1; i != NumConcat; ++i)
2583 ConcatOps[i] = UndefVal;
2584 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2588 // Load vector by using multiple loads from largest vector to scalar
2589 SmallVector<SDValue, 16> LdOps;
2590 LdOps.push_back(LdOp);
2592 LdWidth -= NewVTWidth;
2593 unsigned Offset = 0;
2595 while (LdWidth > 0) {
2596 unsigned Increment = NewVTWidth / 8;
2597 Offset += Increment;
2598 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2599 DAG.getConstant(Increment, BasePtr.getValueType()));
2602 if (LdWidth < NewVTWidth) {
2603 // Our current type we are using is too large, find a better size
2604 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2605 NewVTWidth = NewVT.getSizeInBits();
2606 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2607 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2608 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2609 LdChain.push_back(L.getValue(1));
2610 if (L->getValueType(0).isVector()) {
2611 SmallVector<SDValue, 16> Loads;
2613 unsigned size = L->getValueSizeInBits(0);
2614 while (size < LdOp->getValueSizeInBits(0)) {
2615 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2616 size += L->getValueSizeInBits(0);
2618 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2619 &Loads[0], Loads.size());
2622 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2623 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2624 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2625 LdChain.push_back(L.getValue(1));
2631 LdWidth -= NewVTWidth;
2634 // Build the vector from the loads operations
2635 unsigned End = LdOps.size();
2636 if (!LdOps[0].getValueType().isVector())
2637 // All the loads are scalar loads.
2638 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2640 // If the load contains vectors, build the vector using concat vector.
2641 // All of the vectors used to loads are power of 2 and the scalars load
2642 // can be combined to make a power of 2 vector.
2643 SmallVector<SDValue, 16> ConcatOps(End);
2646 EVT LdTy = LdOps[i].getValueType();
2647 // First combine the scalar loads to a vector
2648 if (!LdTy.isVector()) {
2649 for (--i; i >= 0; --i) {
2650 LdTy = LdOps[i].getValueType();
2651 if (LdTy.isVector())
2654 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2656 ConcatOps[--Idx] = LdOps[i];
2657 for (--i; i >= 0; --i) {
2658 EVT NewLdTy = LdOps[i].getValueType();
2659 if (NewLdTy != LdTy) {
2660 // Create a larger vector
2661 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2662 &ConcatOps[Idx], End - Idx);
2666 ConcatOps[--Idx] = LdOps[i];
2669 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2670 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2671 &ConcatOps[Idx], End - Idx);
2673 // We need to fill the rest with undefs to build the vector
2674 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2675 SmallVector<SDValue, 16> WidenOps(NumOps);
2676 SDValue UndefVal = DAG.getUNDEF(LdTy);
2679 for (; i != End-Idx; ++i)
2680 WidenOps[i] = ConcatOps[Idx+i];
2681 for (; i != NumOps; ++i)
2682 WidenOps[i] = UndefVal;
2684 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2688 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2690 ISD::LoadExtType ExtType) {
2691 // For extension loads, it may not be more efficient to chop up the vector
2692 // and then extended it. Instead, we unroll the load and build a new vector.
2693 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2694 EVT LdVT = LD->getMemoryVT();
2696 assert(LdVT.isVector() && WidenVT.isVector());
2699 SDValue Chain = LD->getChain();
2700 SDValue BasePtr = LD->getBasePtr();
2701 unsigned Align = LD->getAlignment();
2702 bool isVolatile = LD->isVolatile();
2703 bool isNonTemporal = LD->isNonTemporal();
2705 EVT EltVT = WidenVT.getVectorElementType();
2706 EVT LdEltVT = LdVT.getVectorElementType();
2707 unsigned NumElts = LdVT.getVectorNumElements();
2709 // Load each element and widen
2710 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2711 SmallVector<SDValue, 16> Ops(WidenNumElts);
2712 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2713 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2714 LD->getPointerInfo(),
2715 LdEltVT, isVolatile, isNonTemporal, Align);
2716 LdChain.push_back(Ops[0].getValue(1));
2717 unsigned i = 0, Offset = Increment;
2718 for (i=1; i < NumElts; ++i, Offset += Increment) {
2719 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2721 DAG.getConstant(Offset,
2722 BasePtr.getValueType()));
2723 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2724 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2725 isVolatile, isNonTemporal, Align);
2726 LdChain.push_back(Ops[i].getValue(1));
2729 // Fill the rest with undefs
2730 SDValue UndefVal = DAG.getUNDEF(EltVT);
2731 for (; i != WidenNumElts; ++i)
2734 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2738 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2740 // The strategy assumes that we can efficiently store powers of two widths.
2741 // The routines chops the vector into the largest vector stores with the same
2742 // element type or scalar stores.
2743 SDValue Chain = ST->getChain();
2744 SDValue BasePtr = ST->getBasePtr();
2745 unsigned Align = ST->getAlignment();
2746 bool isVolatile = ST->isVolatile();
2747 bool isNonTemporal = ST->isNonTemporal();
2748 SDValue ValOp = GetWidenedVector(ST->getValue());
2751 EVT StVT = ST->getMemoryVT();
2752 unsigned StWidth = StVT.getSizeInBits();
2753 EVT ValVT = ValOp.getValueType();
2754 unsigned ValWidth = ValVT.getSizeInBits();
2755 EVT ValEltVT = ValVT.getVectorElementType();
2756 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2757 assert(StVT.getVectorElementType() == ValEltVT);
2759 int Idx = 0; // current index to store
2760 unsigned Offset = 0; // offset from base to store
2761 while (StWidth != 0) {
2762 // Find the largest vector type we can store with
2763 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2764 unsigned NewVTWidth = NewVT.getSizeInBits();
2765 unsigned Increment = NewVTWidth / 8;
2766 if (NewVT.isVector()) {
2767 unsigned NumVTElts = NewVT.getVectorNumElements();
2769 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2770 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2771 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2772 ST->getPointerInfo().getWithOffset(Offset),
2773 isVolatile, isNonTemporal,
2774 MinAlign(Align, Offset)));
2775 StWidth -= NewVTWidth;
2776 Offset += Increment;
2778 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2779 DAG.getConstant(Increment, BasePtr.getValueType()));
2780 } while (StWidth != 0 && StWidth >= NewVTWidth);
2782 // Cast the vector to the scalar type we can store
2783 unsigned NumElts = ValWidth / NewVTWidth;
2784 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2785 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2786 // Readjust index position based on new vector type
2787 Idx = Idx * ValEltWidth / NewVTWidth;
2789 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2790 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2791 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2792 ST->getPointerInfo().getWithOffset(Offset),
2793 isVolatile, isNonTemporal,
2794 MinAlign(Align, Offset)));
2795 StWidth -= NewVTWidth;
2796 Offset += Increment;
2797 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2798 DAG.getConstant(Increment, BasePtr.getValueType()));
2799 } while (StWidth != 0 && StWidth >= NewVTWidth);
2800 // Restore index back to be relative to the original widen element type
2801 Idx = Idx * NewVTWidth / ValEltWidth;
2807 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2809 // For extension loads, it may not be more efficient to truncate the vector
2810 // and then store it. Instead, we extract each element and then store it.
2811 SDValue Chain = ST->getChain();
2812 SDValue BasePtr = ST->getBasePtr();
2813 unsigned Align = ST->getAlignment();
2814 bool isVolatile = ST->isVolatile();
2815 bool isNonTemporal = ST->isNonTemporal();
2816 SDValue ValOp = GetWidenedVector(ST->getValue());
2819 EVT StVT = ST->getMemoryVT();
2820 EVT ValVT = ValOp.getValueType();
2822 // It must be true that we the widen vector type is bigger than where
2823 // we need to store.
2824 assert(StVT.isVector() && ValOp.getValueType().isVector());
2825 assert(StVT.bitsLT(ValOp.getValueType()));
2827 // For truncating stores, we can not play the tricks of chopping legal
2828 // vector types and bit cast it to the right type. Instead, we unroll
2830 EVT StEltVT = StVT.getVectorElementType();
2831 EVT ValEltVT = ValVT.getVectorElementType();
2832 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2833 unsigned NumElts = StVT.getVectorNumElements();
2834 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2835 DAG.getConstant(0, TLI.getVectorIdxTy()));
2836 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2837 ST->getPointerInfo(), StEltVT,
2838 isVolatile, isNonTemporal, Align));
2839 unsigned Offset = Increment;
2840 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2841 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2842 BasePtr, DAG.getConstant(Offset,
2843 BasePtr.getValueType()));
2844 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2845 DAG.getConstant(0, TLI.getVectorIdxTy()));
2846 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2847 ST->getPointerInfo().getWithOffset(Offset),
2848 StEltVT, isVolatile, isNonTemporal,
2849 MinAlign(Align, Offset)));
2853 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2854 /// input vector must have the same element type as NVT.
2855 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2856 // Note that InOp might have been widened so it might already have
2857 // the right width or it might need be narrowed.
2858 EVT InVT = InOp.getValueType();
2859 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2860 "input and widen element type must match");
2863 // Check if InOp already has the right width.
2867 unsigned InNumElts = InVT.getVectorNumElements();
2868 unsigned WidenNumElts = NVT.getVectorNumElements();
2869 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2870 unsigned NumConcat = WidenNumElts / InNumElts;
2871 SmallVector<SDValue, 16> Ops(NumConcat);
2872 SDValue UndefVal = DAG.getUNDEF(InVT);
2874 for (unsigned i = 1; i != NumConcat; ++i)
2877 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2880 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2881 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2882 DAG.getConstant(0, TLI.getVectorIdxTy()));
2884 // Fall back to extract and build.
2885 SmallVector<SDValue, 16> Ops(WidenNumElts);
2886 EVT EltVT = NVT.getVectorElementType();
2887 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2889 for (Idx = 0; Idx < MinNumElts; ++Idx)
2890 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2891 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2893 SDValue UndefVal = DAG.getUNDEF(EltVT);
2894 for ( ; Idx < WidenNumElts; ++Idx)
2895 Ops[Idx] = UndefVal;
2896 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);