1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/Target/TargetData.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
62 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
63 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
64 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
65 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
88 case ISD::SIGN_EXTEND:
92 case ISD::ZERO_EXTEND:
93 R = ScalarizeVecRes_UnaryOp(N);
115 R = ScalarizeVecRes_BinOp(N);
119 // If R is null, the sub-method took care of registering the result.
121 SetScalarizedVector(SDValue(N, ResNo), R);
124 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
125 SDValue LHS = GetScalarizedVector(N->getOperand(0));
126 SDValue RHS = GetScalarizedVector(N->getOperand(1));
127 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
128 LHS.getValueType(), LHS, RHS);
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
133 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
134 return GetScalarizedVector(Op);
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
138 EVT NewVT = N->getValueType(0).getVectorElementType();
139 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
140 NewVT, N->getOperand(0));
143 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
144 EVT NewVT = N->getValueType(0).getVectorElementType();
145 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
146 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
147 Op0, DAG.getValueType(NewVT),
148 DAG.getValueType(Op0.getValueType()),
151 cast<CvtRndSatSDNode>(N)->getCvtCode());
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
155 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
156 N->getValueType(0).getVectorElementType(),
157 N->getOperand(0), N->getOperand(1));
160 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
161 EVT NewVT = N->getValueType(0).getVectorElementType();
162 SDValue Op = GetScalarizedVector(N->getOperand(0));
163 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(),
164 NewVT, Op, N->getOperand(1));
167 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
168 SDValue Op = GetScalarizedVector(N->getOperand(0));
169 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
170 Op.getValueType(), Op, N->getOperand(1));
173 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
174 // The value to insert may have a wider type than the vector element type,
175 // so be sure to truncate it to the element type if necessary.
176 SDValue Op = N->getOperand(1);
177 EVT EltVT = N->getValueType(0).getVectorElementType();
178 if (Op.getValueType() != EltVT)
179 // FIXME: Can this happen for floating point types?
180 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
185 assert(N->isUnindexed() && "Indexed vector load?");
187 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
188 N->getExtensionType(),
189 N->getValueType(0).getVectorElementType(),
191 N->getChain(), N->getBasePtr(),
192 DAG.getUNDEF(N->getBasePtr().getValueType()),
194 N->getMemoryVT().getVectorElementType(),
195 N->isVolatile(), N->isNonTemporal(),
196 N->isInvariant(), N->getOriginalAlignment());
198 // Legalized the chain result - switch anything that used the old chain to
200 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
204 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
205 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
206 EVT DestVT = N->getValueType(0).getVectorElementType();
207 SDValue Op = GetScalarizedVector(N->getOperand(0));
208 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
211 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
212 EVT EltVT = N->getValueType(0).getVectorElementType();
213 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
214 SDValue LHS = GetScalarizedVector(N->getOperand(0));
215 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
216 LHS, DAG.getValueType(ExtVT));
219 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
220 // If the operand is wider than the vector element type then it is implicitly
221 // truncated. Make that explicit here.
222 EVT EltVT = N->getValueType(0).getVectorElementType();
223 SDValue InOp = N->getOperand(0);
224 if (InOp.getValueType() != EltVT)
225 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
229 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
230 SDValue LHS = GetScalarizedVector(N->getOperand(1));
231 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
232 LHS.getValueType(), N->getOperand(0), LHS,
233 GetScalarizedVector(N->getOperand(2)));
236 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
237 SDValue LHS = GetScalarizedVector(N->getOperand(2));
238 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
239 N->getOperand(0), N->getOperand(1),
240 LHS, GetScalarizedVector(N->getOperand(3)),
244 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
245 assert(N->getValueType(0).isVector() ==
246 N->getOperand(0).getValueType().isVector() &&
247 "Scalar/Vector type mismatch");
249 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
251 SDValue LHS = GetScalarizedVector(N->getOperand(0));
252 SDValue RHS = GetScalarizedVector(N->getOperand(1));
253 DebugLoc DL = N->getDebugLoc();
255 // Turn it into a scalar SETCC.
256 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
259 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
260 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
263 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
264 // Figure out if the scalar is the LHS or RHS and return it.
265 SDValue Arg = N->getOperand(2).getOperand(0);
266 if (Arg.getOpcode() == ISD::UNDEF)
267 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
268 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
269 return GetScalarizedVector(N->getOperand(Op));
272 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
273 assert(N->getValueType(0).isVector() &&
274 N->getOperand(0).getValueType().isVector() &&
275 "Operand types must be vectors");
277 SDValue LHS = GetScalarizedVector(N->getOperand(0));
278 SDValue RHS = GetScalarizedVector(N->getOperand(1));
279 EVT NVT = N->getValueType(0).getVectorElementType();
280 DebugLoc DL = N->getDebugLoc();
282 // Turn it into a scalar SETCC.
283 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
285 // Vectors may have a different boolean contents to scalars. Promote the
286 // value appropriately.
287 ISD::NodeType ExtendCode =
288 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
289 return DAG.getNode(ExtendCode, DL, NVT, Res);
293 //===----------------------------------------------------------------------===//
294 // Operand Vector Scalarization <1 x ty> -> ty.
295 //===----------------------------------------------------------------------===//
297 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
298 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
301 SDValue Res = SDValue();
303 if (Res.getNode() == 0) {
304 switch (N->getOpcode()) {
307 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
311 llvm_unreachable("Do not know how to scalarize this operator's operand!");
313 Res = ScalarizeVecOp_BITCAST(N);
315 case ISD::CONCAT_VECTORS:
316 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
318 case ISD::EXTRACT_VECTOR_ELT:
319 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
322 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
327 // If the result is null, the sub-method took care of registering results etc.
328 if (!Res.getNode()) return false;
330 // If the result is N, the sub-method updated N in place. Tell the legalizer
332 if (Res.getNode() == N)
335 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
336 "Invalid operand expansion");
338 ReplaceValueWith(SDValue(N, 0), Res);
342 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
343 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
344 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
345 SDValue Elt = GetScalarizedVector(N->getOperand(0));
346 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
347 N->getValueType(0), Elt);
350 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
351 /// use a BUILD_VECTOR instead.
352 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
353 SmallVector<SDValue, 8> Ops(N->getNumOperands());
354 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
355 Ops[i] = GetScalarizedVector(N->getOperand(i));
356 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
357 &Ops[0], Ops.size());
360 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
361 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
363 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
364 SDValue Res = GetScalarizedVector(N->getOperand(0));
365 if (Res.getValueType() != N->getValueType(0))
366 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
371 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
372 /// scalarized, it must be <1 x ty>. Just store the element.
373 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
374 assert(N->isUnindexed() && "Indexed store of one-element vector?");
375 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
376 DebugLoc dl = N->getDebugLoc();
378 if (N->isTruncatingStore())
379 return DAG.getTruncStore(N->getChain(), dl,
380 GetScalarizedVector(N->getOperand(1)),
381 N->getBasePtr(), N->getPointerInfo(),
382 N->getMemoryVT().getVectorElementType(),
383 N->isVolatile(), N->isNonTemporal(),
386 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
387 N->getBasePtr(), N->getPointerInfo(),
388 N->isVolatile(), N->isNonTemporal(),
389 N->getOriginalAlignment());
393 //===----------------------------------------------------------------------===//
394 // Result Vector Splitting
395 //===----------------------------------------------------------------------===//
397 /// SplitVectorResult - This method is called when the specified result of the
398 /// specified node is found to need vector splitting. At this point, the node
399 /// may also have invalid operands or may have other results that need
400 /// legalization, we just know that (at least) one result needs vector
402 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
403 DEBUG(dbgs() << "Split node result: ";
408 switch (N->getOpcode()) {
411 dbgs() << "SplitVectorResult #" << ResNo << ": ";
415 llvm_unreachable("Do not know how to split the result of this operator!");
417 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
419 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
420 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
421 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
422 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
423 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
424 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
425 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
426 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
427 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
428 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
429 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
430 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
432 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
435 SplitVecRes_SETCC(N, Lo, Hi);
437 case ISD::VECTOR_SHUFFLE:
438 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
441 case ISD::ANY_EXTEND:
442 case ISD::CONVERT_RNDSAT:
445 case ISD::CTLZ_ZERO_UNDEF:
446 case ISD::CTTZ_ZERO_UNDEF:
457 case ISD::FNEARBYINT:
461 case ISD::FP_TO_SINT:
462 case ISD::FP_TO_UINT:
467 case ISD::SIGN_EXTEND:
468 case ISD::SINT_TO_FP:
470 case ISD::UINT_TO_FP:
471 case ISD::ZERO_EXTEND:
472 SplitVecRes_UnaryOp(N, Lo, Hi);
494 SplitVecRes_BinOp(N, Lo, Hi);
498 // If Lo/Hi is null, the sub-method took care of registering results etc.
500 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
503 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
505 SDValue LHSLo, LHSHi;
506 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
507 SDValue RHSLo, RHSHi;
508 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
509 DebugLoc dl = N->getDebugLoc();
511 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
512 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
515 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
517 // We know the result is a vector. The input may be either a vector or a
520 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
521 DebugLoc dl = N->getDebugLoc();
523 SDValue InOp = N->getOperand(0);
524 EVT InVT = InOp.getValueType();
526 // Handle some special cases efficiently.
527 switch (getTypeAction(InVT)) {
528 case TargetLowering::TypeLegal:
529 case TargetLowering::TypePromoteInteger:
530 case TargetLowering::TypeSoftenFloat:
531 case TargetLowering::TypeScalarizeVector:
532 case TargetLowering::TypeWidenVector:
534 case TargetLowering::TypeExpandInteger:
535 case TargetLowering::TypeExpandFloat:
536 // A scalar to vector conversion, where the scalar needs expansion.
537 // If the vector is being split in two then we can just convert the
540 GetExpandedOp(InOp, Lo, Hi);
541 if (TLI.isBigEndian())
543 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
544 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
548 case TargetLowering::TypeSplitVector:
549 // If the input is a vector that needs to be split, convert each split
550 // piece of the input now.
551 GetSplitVector(InOp, Lo, Hi);
552 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
553 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
557 // In the general case, convert the input to an integer and split it by hand.
558 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
559 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
560 if (TLI.isBigEndian())
561 std::swap(LoIntVT, HiIntVT);
563 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
565 if (TLI.isBigEndian())
567 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
568 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
571 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
574 DebugLoc dl = N->getDebugLoc();
575 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
576 unsigned LoNumElts = LoVT.getVectorNumElements();
577 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
578 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
580 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
581 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
584 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
586 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
587 DebugLoc dl = N->getDebugLoc();
588 unsigned NumSubvectors = N->getNumOperands() / 2;
589 if (NumSubvectors == 1) {
590 Lo = N->getOperand(0);
591 Hi = N->getOperand(1);
596 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
598 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
599 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
601 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
602 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
605 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
607 SDValue Vec = N->getOperand(0);
608 SDValue Idx = N->getOperand(1);
609 DebugLoc dl = N->getDebugLoc();
612 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
614 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
615 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
616 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
617 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
620 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
622 DebugLoc dl = N->getDebugLoc();
623 GetSplitVector(N->getOperand(0), Lo, Hi);
624 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
625 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
628 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
630 SDValue LHSLo, LHSHi;
631 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
632 DebugLoc dl = N->getDebugLoc();
635 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
637 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
638 DAG.getValueType(LoVT));
639 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
640 DAG.getValueType(HiVT));
643 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
645 SDValue Vec = N->getOperand(0);
646 SDValue Elt = N->getOperand(1);
647 SDValue Idx = N->getOperand(2);
648 DebugLoc dl = N->getDebugLoc();
649 GetSplitVector(Vec, Lo, Hi);
651 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
652 unsigned IdxVal = CIdx->getZExtValue();
653 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
654 if (IdxVal < LoNumElts)
655 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
656 Lo.getValueType(), Lo, Elt, Idx);
658 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
659 DAG.getIntPtrConstant(IdxVal - LoNumElts));
663 // Spill the vector to the stack.
664 EVT VecVT = Vec.getValueType();
665 EVT EltVT = VecVT.getVectorElementType();
666 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
667 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
668 MachinePointerInfo(), false, false, 0);
670 // Store the new element. This may be larger than the vector element type,
671 // so use a truncating store.
672 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
673 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
675 TLI.getTargetData()->getPrefTypeAlignment(VecType);
676 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
679 // Load the Lo part from the stack slot.
680 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
681 false, false, false, 0);
683 // Increment the pointer to the other part.
684 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
685 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
686 DAG.getIntPtrConstant(IncrementSize));
688 // Load the Hi part from the stack slot.
689 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
690 false, false, false, MinAlign(Alignment, IncrementSize));
693 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
696 DebugLoc dl = N->getDebugLoc();
697 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
698 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
699 Hi = DAG.getUNDEF(HiVT);
702 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
704 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
706 DebugLoc dl = LD->getDebugLoc();
707 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
709 ISD::LoadExtType ExtType = LD->getExtensionType();
710 SDValue Ch = LD->getChain();
711 SDValue Ptr = LD->getBasePtr();
712 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
713 EVT MemoryVT = LD->getMemoryVT();
714 unsigned Alignment = LD->getOriginalAlignment();
715 bool isVolatile = LD->isVolatile();
716 bool isNonTemporal = LD->isNonTemporal();
717 bool isInvariant = LD->isInvariant();
719 EVT LoMemVT, HiMemVT;
720 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
722 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
723 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
724 isInvariant, Alignment);
726 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
727 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
728 DAG.getIntPtrConstant(IncrementSize));
729 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
730 LD->getPointerInfo().getWithOffset(IncrementSize),
731 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment);
733 // Build a factor node to remember that this load is independent of the
735 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
738 // Legalized the chain result - switch anything that used the old chain to
740 ReplaceValueWith(SDValue(LD, 1), Ch);
743 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
744 assert(N->getValueType(0).isVector() &&
745 N->getOperand(0).getValueType().isVector() &&
746 "Operand types must be vectors");
749 DebugLoc DL = N->getDebugLoc();
750 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
753 EVT InVT = N->getOperand(0).getValueType();
754 SDValue LL, LH, RL, RH;
755 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
756 LoVT.getVectorNumElements());
757 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
758 DAG.getIntPtrConstant(0));
759 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
760 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
762 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
763 DAG.getIntPtrConstant(0));
764 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
765 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
767 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
768 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
771 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
773 // Get the dest types - they may not match the input types, e.g. int_to_fp.
775 DebugLoc dl = N->getDebugLoc();
776 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
778 // If the input also splits, handle it directly for a compile time speedup.
779 // Otherwise split it by hand.
780 EVT InVT = N->getOperand(0).getValueType();
781 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
782 GetSplitVector(N->getOperand(0), Lo, Hi);
784 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
785 LoVT.getVectorNumElements());
786 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
787 DAG.getIntPtrConstant(0));
788 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
789 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
792 if (N->getOpcode() == ISD::FP_ROUND) {
793 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
794 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
795 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
796 SDValue DTyOpLo = DAG.getValueType(LoVT);
797 SDValue DTyOpHi = DAG.getValueType(HiVT);
798 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
799 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
800 SDValue RndOp = N->getOperand(3);
801 SDValue SatOp = N->getOperand(4);
802 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
803 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
805 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
808 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
809 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
813 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
814 SDValue &Lo, SDValue &Hi) {
815 // The low and high parts of the original input give four input vectors.
817 DebugLoc dl = N->getDebugLoc();
818 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
819 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
820 EVT NewVT = Inputs[0].getValueType();
821 unsigned NewElts = NewVT.getVectorNumElements();
823 // If Lo or Hi uses elements from at most two of the four input vectors, then
824 // express it as a vector shuffle of those two inputs. Otherwise extract the
825 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
826 SmallVector<int, 16> Ops;
827 for (unsigned High = 0; High < 2; ++High) {
828 SDValue &Output = High ? Hi : Lo;
830 // Build a shuffle mask for the output, discovering on the fly which
831 // input vectors to use as shuffle operands (recorded in InputUsed).
832 // If building a suitable shuffle vector proves too hard, then bail
833 // out with useBuildVector set.
834 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
835 unsigned FirstMaskIdx = High * NewElts;
836 bool useBuildVector = false;
837 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
838 // The mask element. This indexes into the input.
839 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
841 // The input vector this mask element indexes into.
842 unsigned Input = (unsigned)Idx / NewElts;
844 if (Input >= array_lengthof(Inputs)) {
845 // The mask element does not index into any input vector.
850 // Turn the index into an offset from the start of the input vector.
851 Idx -= Input * NewElts;
853 // Find or create a shuffle vector operand to hold this input.
855 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
856 if (InputUsed[OpNo] == Input) {
857 // This input vector is already an operand.
859 } else if (InputUsed[OpNo] == -1U) {
860 // Create a new operand for this input vector.
861 InputUsed[OpNo] = Input;
866 if (OpNo >= array_lengthof(InputUsed)) {
867 // More than two input vectors used! Give up on trying to create a
868 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
869 useBuildVector = true;
873 // Add the mask index for the new shuffle vector.
874 Ops.push_back(Idx + OpNo * NewElts);
877 if (useBuildVector) {
878 EVT EltVT = NewVT.getVectorElementType();
879 SmallVector<SDValue, 16> SVOps;
881 // Extract the input elements by hand.
882 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
883 // The mask element. This indexes into the input.
884 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
886 // The input vector this mask element indexes into.
887 unsigned Input = (unsigned)Idx / NewElts;
889 if (Input >= array_lengthof(Inputs)) {
890 // The mask element is "undef" or indexes off the end of the input.
891 SVOps.push_back(DAG.getUNDEF(EltVT));
895 // Turn the index into an offset from the start of the input vector.
896 Idx -= Input * NewElts;
898 // Extract the vector element by hand.
899 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
900 Inputs[Input], DAG.getIntPtrConstant(Idx)));
903 // Construct the Lo/Hi output using a BUILD_VECTOR.
904 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
905 } else if (InputUsed[0] == -1U) {
906 // No input vectors were used! The result is undefined.
907 Output = DAG.getUNDEF(NewVT);
909 SDValue Op0 = Inputs[InputUsed[0]];
910 // If only one input was used, use an undefined vector for the other.
911 SDValue Op1 = InputUsed[1] == -1U ?
912 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
913 // At least one input vector was used. Create a new shuffle vector.
914 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
922 //===----------------------------------------------------------------------===//
923 // Operand Vector Splitting
924 //===----------------------------------------------------------------------===//
926 /// SplitVectorOperand - This method is called when the specified operand of the
927 /// specified node is found to need vector splitting. At this point, all of the
928 /// result types of the node are known to be legal, but other operands of the
929 /// node may need legalization as well as the specified one.
930 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
931 DEBUG(dbgs() << "Split node operand: ";
934 SDValue Res = SDValue();
936 if (Res.getNode() == 0) {
937 switch (N->getOpcode()) {
940 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
944 llvm_unreachable("Do not know how to split this operator's operand!");
945 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
946 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
947 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
948 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
949 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
950 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
952 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
959 case ISD::FP_TO_SINT:
960 case ISD::FP_TO_UINT:
961 case ISD::SINT_TO_FP:
962 case ISD::UINT_TO_FP:
965 case ISD::SIGN_EXTEND:
966 case ISD::ZERO_EXTEND:
967 case ISD::ANY_EXTEND:
968 Res = SplitVecOp_UnaryOp(N);
973 // If the result is null, the sub-method took care of registering results etc.
974 if (!Res.getNode()) return false;
976 // If the result is N, the sub-method updated N in place. Tell the legalizer
978 if (Res.getNode() == N)
981 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
982 "Invalid operand expansion");
984 ReplaceValueWith(SDValue(N, 0), Res);
988 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
989 // The result has a legal vector type, but the input needs splitting.
990 EVT ResVT = N->getValueType(0);
992 DebugLoc dl = N->getDebugLoc();
993 GetSplitVector(N->getOperand(0), Lo, Hi);
994 EVT InVT = Lo.getValueType();
996 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
997 InVT.getVectorNumElements());
999 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1000 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1002 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1005 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1006 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1007 // end up being split all the way down to individual components. Convert the
1008 // split pieces into integers and reassemble.
1010 GetSplitVector(N->getOperand(0), Lo, Hi);
1011 Lo = BitConvertToInteger(Lo);
1012 Hi = BitConvertToInteger(Hi);
1014 if (TLI.isBigEndian())
1017 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0),
1018 JoinIntegers(Lo, Hi));
1021 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1022 // We know that the extracted result type is legal.
1023 EVT SubVT = N->getValueType(0);
1024 SDValue Idx = N->getOperand(1);
1025 DebugLoc dl = N->getDebugLoc();
1027 GetSplitVector(N->getOperand(0), Lo, Hi);
1029 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1030 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1032 if (IdxVal < LoElts) {
1033 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1034 "Extracted subvector crosses vector split!");
1035 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1037 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1038 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1042 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1043 SDValue Vec = N->getOperand(0);
1044 SDValue Idx = N->getOperand(1);
1045 EVT VecVT = Vec.getValueType();
1047 if (isa<ConstantSDNode>(Idx)) {
1048 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1049 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1052 GetSplitVector(Vec, Lo, Hi);
1054 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1056 if (IdxVal < LoElts)
1057 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1058 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1059 DAG.getConstant(IdxVal - LoElts,
1060 Idx.getValueType())), 0);
1063 // Store the vector to the stack.
1064 EVT EltVT = VecVT.getVectorElementType();
1065 DebugLoc dl = N->getDebugLoc();
1066 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1067 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1068 MachinePointerInfo(), false, false, 0);
1070 // Load back the required element.
1071 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1072 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1073 MachinePointerInfo(), EltVT, false, false, 0);
1076 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1077 assert(N->isUnindexed() && "Indexed store of vector?");
1078 assert(OpNo == 1 && "Can only split the stored value");
1079 DebugLoc DL = N->getDebugLoc();
1081 bool isTruncating = N->isTruncatingStore();
1082 SDValue Ch = N->getChain();
1083 SDValue Ptr = N->getBasePtr();
1084 EVT MemoryVT = N->getMemoryVT();
1085 unsigned Alignment = N->getOriginalAlignment();
1086 bool isVol = N->isVolatile();
1087 bool isNT = N->isNonTemporal();
1089 GetSplitVector(N->getOperand(1), Lo, Hi);
1091 EVT LoMemVT, HiMemVT;
1092 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1094 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1097 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1098 LoMemVT, isVol, isNT, Alignment);
1100 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1101 isVol, isNT, Alignment);
1103 // Increment the pointer to the other half.
1104 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1105 DAG.getIntPtrConstant(IncrementSize));
1108 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1109 N->getPointerInfo().getWithOffset(IncrementSize),
1110 HiMemVT, isVol, isNT, Alignment);
1112 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1113 N->getPointerInfo().getWithOffset(IncrementSize),
1114 isVol, isNT, Alignment);
1116 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1119 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1120 DebugLoc DL = N->getDebugLoc();
1122 // The input operands all must have the same type, and we know the result the
1123 // result type is valid. Convert this to a buildvector which extracts all the
1125 // TODO: If the input elements are power-two vectors, we could convert this to
1126 // a new CONCAT_VECTORS node with elements that are half-wide.
1127 SmallVector<SDValue, 32> Elts;
1128 EVT EltVT = N->getValueType(0).getVectorElementType();
1129 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1130 SDValue Op = N->getOperand(op);
1131 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1133 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1134 Op, DAG.getIntPtrConstant(i)));
1139 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1140 &Elts[0], Elts.size());
1143 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1144 assert(N->getValueType(0).isVector() &&
1145 N->getOperand(0).getValueType().isVector() &&
1146 "Operand types must be vectors");
1147 // The result has a legal vector type, but the input needs splitting.
1148 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1149 DebugLoc DL = N->getDebugLoc();
1150 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1151 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1152 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1153 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1154 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1156 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1157 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1158 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1159 return PromoteTargetBoolean(Con, N->getValueType(0));
1163 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1164 // The result has a legal vector type, but the input needs splitting.
1165 EVT ResVT = N->getValueType(0);
1167 DebugLoc DL = N->getDebugLoc();
1168 GetSplitVector(N->getOperand(0), Lo, Hi);
1169 EVT InVT = Lo.getValueType();
1171 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1172 InVT.getVectorNumElements());
1174 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1175 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1177 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1182 //===----------------------------------------------------------------------===//
1183 // Result Vector Widening
1184 //===----------------------------------------------------------------------===//
1186 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1187 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1191 // See if the target wants to custom widen this node.
1192 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1195 SDValue Res = SDValue();
1196 switch (N->getOpcode()) {
1199 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1203 llvm_unreachable("Do not know how to widen the result of this operator!");
1205 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1206 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1207 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1208 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1209 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1210 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1211 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1212 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1213 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1214 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1215 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1217 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1218 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1219 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1220 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1221 case ISD::VECTOR_SHUFFLE:
1222 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1228 case ISD::FCOPYSIGN:
1244 Res = WidenVecRes_Binary(N);
1248 Res = WidenVecRes_POWI(N);
1254 Res = WidenVecRes_Shift(N);
1257 case ISD::ANY_EXTEND:
1258 case ISD::FP_EXTEND:
1260 case ISD::FP_TO_SINT:
1261 case ISD::FP_TO_UINT:
1262 case ISD::SIGN_EXTEND:
1263 case ISD::SINT_TO_FP:
1265 case ISD::UINT_TO_FP:
1266 case ISD::ZERO_EXTEND:
1267 Res = WidenVecRes_Convert(N);
1282 case ISD::FNEARBYINT:
1288 Res = WidenVecRes_Unary(N);
1292 // If Res is null, the sub-method took care of registering the result.
1294 SetWidenedVector(SDValue(N, ResNo), Res);
1297 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1298 // Binary op widening.
1299 unsigned Opcode = N->getOpcode();
1300 DebugLoc dl = N->getDebugLoc();
1301 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1302 EVT WidenEltVT = WidenVT.getVectorElementType();
1304 unsigned NumElts = VT.getVectorNumElements();
1305 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1306 NumElts = NumElts / 2;
1307 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1310 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1311 // Operation doesn't trap so just widen as normal.
1312 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1313 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1314 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1317 // No legal vector version so unroll the vector operation and then widen.
1319 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1321 // Since the operation can trap, apply operation on the original vector.
1323 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1324 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1325 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1327 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1328 unsigned ConcatEnd = 0; // Current ConcatOps index.
1329 int Idx = 0; // Current Idx into input vectors.
1331 // NumElts := greatest legal vector size (at most WidenVT)
1332 // while (orig. vector has unhandled elements) {
1333 // take munches of size NumElts from the beginning and add to ConcatOps
1334 // NumElts := next smaller supported vector size or 1
1336 while (CurNumElts != 0) {
1337 while (CurNumElts >= NumElts) {
1338 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1339 DAG.getIntPtrConstant(Idx));
1340 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1341 DAG.getIntPtrConstant(Idx));
1342 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1344 CurNumElts -= NumElts;
1347 NumElts = NumElts / 2;
1348 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1349 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1352 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1353 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1354 InOp1, DAG.getIntPtrConstant(Idx));
1355 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1356 InOp2, DAG.getIntPtrConstant(Idx));
1357 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1364 // Check to see if we have a single operation with the widen type.
1365 if (ConcatEnd == 1) {
1366 VT = ConcatOps[0].getValueType();
1368 return ConcatOps[0];
1371 // while (Some element of ConcatOps is not of type MaxVT) {
1372 // From the end of ConcatOps, collect elements of the same type and put
1373 // them into an op of the next larger supported type
1375 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1376 Idx = ConcatEnd - 1;
1377 VT = ConcatOps[Idx--].getValueType();
1378 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1381 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1385 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1386 } while (!TLI.isTypeLegal(NextVT));
1388 if (!VT.isVector()) {
1389 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1390 SDValue VecOp = DAG.getUNDEF(NextVT);
1391 unsigned NumToInsert = ConcatEnd - Idx - 1;
1392 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1393 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1394 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1396 ConcatOps[Idx+1] = VecOp;
1397 ConcatEnd = Idx + 2;
1399 // Vector type, create a CONCAT_VECTORS of type NextVT
1400 SDValue undefVec = DAG.getUNDEF(VT);
1401 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1402 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1403 unsigned RealVals = ConcatEnd - Idx - 1;
1404 unsigned SubConcatEnd = 0;
1405 unsigned SubConcatIdx = Idx + 1;
1406 while (SubConcatEnd < RealVals)
1407 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1408 while (SubConcatEnd < OpsToConcat)
1409 SubConcatOps[SubConcatEnd++] = undefVec;
1410 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1411 NextVT, &SubConcatOps[0],
1413 ConcatEnd = SubConcatIdx + 1;
1417 // Check to see if we have a single operation with the widen type.
1418 if (ConcatEnd == 1) {
1419 VT = ConcatOps[0].getValueType();
1421 return ConcatOps[0];
1424 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1425 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1426 if (NumOps != ConcatEnd ) {
1427 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1428 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1429 ConcatOps[j] = UndefVal;
1431 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1434 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1435 SDValue InOp = N->getOperand(0);
1436 DebugLoc DL = N->getDebugLoc();
1438 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1439 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1441 EVT InVT = InOp.getValueType();
1442 EVT InEltVT = InVT.getVectorElementType();
1443 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1445 unsigned Opcode = N->getOpcode();
1446 unsigned InVTNumElts = InVT.getVectorNumElements();
1448 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1449 InOp = GetWidenedVector(N->getOperand(0));
1450 InVT = InOp.getValueType();
1451 InVTNumElts = InVT.getVectorNumElements();
1452 if (InVTNumElts == WidenNumElts) {
1453 if (N->getNumOperands() == 1)
1454 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1455 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1459 if (TLI.isTypeLegal(InWidenVT)) {
1460 // Because the result and the input are different vector types, widening
1461 // the result could create a legal type but widening the input might make
1462 // it an illegal type that might lead to repeatedly splitting the input
1463 // and then widening it. To avoid this, we widen the input only if
1464 // it results in a legal type.
1465 if (WidenNumElts % InVTNumElts == 0) {
1466 // Widen the input and call convert on the widened input vector.
1467 unsigned NumConcat = WidenNumElts/InVTNumElts;
1468 SmallVector<SDValue, 16> Ops(NumConcat);
1470 SDValue UndefVal = DAG.getUNDEF(InVT);
1471 for (unsigned i = 1; i != NumConcat; ++i)
1473 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1474 &Ops[0], NumConcat);
1475 if (N->getNumOperands() == 1)
1476 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1477 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1480 if (InVTNumElts % WidenNumElts == 0) {
1481 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1482 InOp, DAG.getIntPtrConstant(0));
1483 // Extract the input and convert the shorten input vector.
1484 if (N->getNumOperands() == 1)
1485 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1486 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1490 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1491 SmallVector<SDValue, 16> Ops(WidenNumElts);
1492 EVT EltVT = WidenVT.getVectorElementType();
1493 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1495 for (i=0; i < MinElts; ++i) {
1496 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1497 DAG.getIntPtrConstant(i));
1498 if (N->getNumOperands() == 1)
1499 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1501 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1504 SDValue UndefVal = DAG.getUNDEF(EltVT);
1505 for (; i < WidenNumElts; ++i)
1508 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1511 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1512 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1513 SDValue InOp = GetWidenedVector(N->getOperand(0));
1514 SDValue ShOp = N->getOperand(1);
1515 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1518 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1519 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1520 SDValue InOp = GetWidenedVector(N->getOperand(0));
1521 SDValue ShOp = N->getOperand(1);
1523 EVT ShVT = ShOp.getValueType();
1524 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1525 ShOp = GetWidenedVector(ShOp);
1526 ShVT = ShOp.getValueType();
1528 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1529 ShVT.getVectorElementType(),
1530 WidenVT.getVectorNumElements());
1531 if (ShVT != ShWidenVT)
1532 ShOp = ModifyToType(ShOp, ShWidenVT);
1534 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1537 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1538 // Unary op widening.
1539 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1540 SDValue InOp = GetWidenedVector(N->getOperand(0));
1541 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1544 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1545 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1546 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1547 cast<VTSDNode>(N->getOperand(1))->getVT()
1548 .getVectorElementType(),
1549 WidenVT.getVectorNumElements());
1550 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1551 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1552 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1555 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1556 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1557 return GetWidenedVector(WidenVec);
1560 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1561 SDValue InOp = N->getOperand(0);
1562 EVT InVT = InOp.getValueType();
1563 EVT VT = N->getValueType(0);
1564 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1565 DebugLoc dl = N->getDebugLoc();
1567 switch (getTypeAction(InVT)) {
1569 assert(false && "Unknown type action!");
1571 case TargetLowering::TypeLegal:
1573 case TargetLowering::TypePromoteInteger:
1574 // If the incoming type is a vector that is being promoted, then
1575 // we know that the elements are arranged differently and that we
1576 // must perform the conversion using a stack slot.
1577 if (InVT.isVector())
1580 // If the InOp is promoted to the same size, convert it. Otherwise,
1581 // fall out of the switch and widen the promoted input.
1582 InOp = GetPromotedInteger(InOp);
1583 InVT = InOp.getValueType();
1584 if (WidenVT.bitsEq(InVT))
1585 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1587 case TargetLowering::TypeSoftenFloat:
1588 case TargetLowering::TypeExpandInteger:
1589 case TargetLowering::TypeExpandFloat:
1590 case TargetLowering::TypeScalarizeVector:
1591 case TargetLowering::TypeSplitVector:
1593 case TargetLowering::TypeWidenVector:
1594 // If the InOp is widened to the same size, convert it. Otherwise, fall
1595 // out of the switch and widen the widened input.
1596 InOp = GetWidenedVector(InOp);
1597 InVT = InOp.getValueType();
1598 if (WidenVT.bitsEq(InVT))
1599 // The input widens to the same size. Convert to the widen value.
1600 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1604 unsigned WidenSize = WidenVT.getSizeInBits();
1605 unsigned InSize = InVT.getSizeInBits();
1606 // x86mmx is not an acceptable vector element type, so don't try.
1607 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1608 // Determine new input vector type. The new input vector type will use
1609 // the same element type (if its a vector) or use the input type as a
1610 // vector. It is the same size as the type to widen to.
1612 unsigned NewNumElts = WidenSize / InSize;
1613 if (InVT.isVector()) {
1614 EVT InEltVT = InVT.getVectorElementType();
1615 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1616 WidenSize / InEltVT.getSizeInBits());
1618 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1621 if (TLI.isTypeLegal(NewInVT)) {
1622 // Because the result and the input are different vector types, widening
1623 // the result could create a legal type but widening the input might make
1624 // it an illegal type that might lead to repeatedly splitting the input
1625 // and then widening it. To avoid this, we widen the input only if
1626 // it results in a legal type.
1627 SmallVector<SDValue, 16> Ops(NewNumElts);
1628 SDValue UndefVal = DAG.getUNDEF(InVT);
1630 for (unsigned i = 1; i < NewNumElts; ++i)
1634 if (InVT.isVector())
1635 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1636 NewInVT, &Ops[0], NewNumElts);
1638 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1639 NewInVT, &Ops[0], NewNumElts);
1640 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1644 return CreateStackStoreLoad(InOp, WidenVT);
1647 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1648 DebugLoc dl = N->getDebugLoc();
1649 // Build a vector with undefined for the new nodes.
1650 EVT VT = N->getValueType(0);
1651 EVT EltVT = VT.getVectorElementType();
1652 unsigned NumElts = VT.getVectorNumElements();
1654 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1655 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1657 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1658 NewOps.reserve(WidenNumElts);
1659 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1660 NewOps.push_back(DAG.getUNDEF(EltVT));
1662 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1665 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1666 EVT InVT = N->getOperand(0).getValueType();
1667 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1668 DebugLoc dl = N->getDebugLoc();
1669 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1670 unsigned NumInElts = InVT.getVectorNumElements();
1671 unsigned NumOperands = N->getNumOperands();
1673 bool InputWidened = false; // Indicates we need to widen the input.
1674 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1675 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1676 // Add undef vectors to widen to correct length.
1677 unsigned NumConcat = WidenVT.getVectorNumElements() /
1678 InVT.getVectorNumElements();
1679 SDValue UndefVal = DAG.getUNDEF(InVT);
1680 SmallVector<SDValue, 16> Ops(NumConcat);
1681 for (unsigned i=0; i < NumOperands; ++i)
1682 Ops[i] = N->getOperand(i);
1683 for (unsigned i = NumOperands; i != NumConcat; ++i)
1685 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1688 InputWidened = true;
1689 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1690 // The inputs and the result are widen to the same value.
1692 for (i=1; i < NumOperands; ++i)
1693 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1696 if (i == NumOperands)
1697 // Everything but the first operand is an UNDEF so just return the
1698 // widened first operand.
1699 return GetWidenedVector(N->getOperand(0));
1701 if (NumOperands == 2) {
1702 // Replace concat of two operands with a shuffle.
1703 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1704 for (unsigned i = 0; i < NumInElts; ++i) {
1706 MaskOps[i + NumInElts] = i + WidenNumElts;
1708 return DAG.getVectorShuffle(WidenVT, dl,
1709 GetWidenedVector(N->getOperand(0)),
1710 GetWidenedVector(N->getOperand(1)),
1716 // Fall back to use extracts and build vector.
1717 EVT EltVT = WidenVT.getVectorElementType();
1718 SmallVector<SDValue, 16> Ops(WidenNumElts);
1720 for (unsigned i=0; i < NumOperands; ++i) {
1721 SDValue InOp = N->getOperand(i);
1723 InOp = GetWidenedVector(InOp);
1724 for (unsigned j=0; j < NumInElts; ++j)
1725 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1726 DAG.getIntPtrConstant(j));
1728 SDValue UndefVal = DAG.getUNDEF(EltVT);
1729 for (; Idx < WidenNumElts; ++Idx)
1730 Ops[Idx] = UndefVal;
1731 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1734 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1735 DebugLoc dl = N->getDebugLoc();
1736 SDValue InOp = N->getOperand(0);
1737 SDValue RndOp = N->getOperand(3);
1738 SDValue SatOp = N->getOperand(4);
1740 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1741 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1743 EVT InVT = InOp.getValueType();
1744 EVT InEltVT = InVT.getVectorElementType();
1745 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1747 SDValue DTyOp = DAG.getValueType(WidenVT);
1748 SDValue STyOp = DAG.getValueType(InWidenVT);
1749 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1751 unsigned InVTNumElts = InVT.getVectorNumElements();
1752 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1753 InOp = GetWidenedVector(InOp);
1754 InVT = InOp.getValueType();
1755 InVTNumElts = InVT.getVectorNumElements();
1756 if (InVTNumElts == WidenNumElts)
1757 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1761 if (TLI.isTypeLegal(InWidenVT)) {
1762 // Because the result and the input are different vector types, widening
1763 // the result could create a legal type but widening the input might make
1764 // it an illegal type that might lead to repeatedly splitting the input
1765 // and then widening it. To avoid this, we widen the input only if
1766 // it results in a legal type.
1767 if (WidenNumElts % InVTNumElts == 0) {
1768 // Widen the input and call convert on the widened input vector.
1769 unsigned NumConcat = WidenNumElts/InVTNumElts;
1770 SmallVector<SDValue, 16> Ops(NumConcat);
1772 SDValue UndefVal = DAG.getUNDEF(InVT);
1773 for (unsigned i = 1; i != NumConcat; ++i)
1776 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1777 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1781 if (InVTNumElts % WidenNumElts == 0) {
1782 // Extract the input and convert the shorten input vector.
1783 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1784 DAG.getIntPtrConstant(0));
1785 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1790 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1791 SmallVector<SDValue, 16> Ops(WidenNumElts);
1792 EVT EltVT = WidenVT.getVectorElementType();
1793 DTyOp = DAG.getValueType(EltVT);
1794 STyOp = DAG.getValueType(InEltVT);
1796 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1798 for (i=0; i < MinElts; ++i) {
1799 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1800 DAG.getIntPtrConstant(i));
1801 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1805 SDValue UndefVal = DAG.getUNDEF(EltVT);
1806 for (; i < WidenNumElts; ++i)
1809 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1812 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1813 EVT VT = N->getValueType(0);
1814 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1815 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1816 SDValue InOp = N->getOperand(0);
1817 SDValue Idx = N->getOperand(1);
1818 DebugLoc dl = N->getDebugLoc();
1820 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
1821 InOp = GetWidenedVector(InOp);
1823 EVT InVT = InOp.getValueType();
1825 // Check if we can just return the input vector after widening.
1826 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1827 if (IdxVal == 0 && InVT == WidenVT)
1830 // Check if we can extract from the vector.
1831 unsigned InNumElts = InVT.getVectorNumElements();
1832 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1833 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1835 // We could try widening the input to the right length but for now, extract
1836 // the original elements, fill the rest with undefs and build a vector.
1837 SmallVector<SDValue, 16> Ops(WidenNumElts);
1838 EVT EltVT = VT.getVectorElementType();
1839 unsigned NumElts = VT.getVectorNumElements();
1841 for (i=0; i < NumElts; ++i)
1842 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1843 DAG.getIntPtrConstant(IdxVal+i));
1845 SDValue UndefVal = DAG.getUNDEF(EltVT);
1846 for (; i < WidenNumElts; ++i)
1848 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1851 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1852 SDValue InOp = GetWidenedVector(N->getOperand(0));
1853 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1854 InOp.getValueType(), InOp,
1855 N->getOperand(1), N->getOperand(2));
1858 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1859 LoadSDNode *LD = cast<LoadSDNode>(N);
1860 ISD::LoadExtType ExtType = LD->getExtensionType();
1863 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1864 if (ExtType != ISD::NON_EXTLOAD)
1865 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1867 Result = GenWidenVectorLoads(LdChain, LD);
1869 // If we generate a single load, we can use that for the chain. Otherwise,
1870 // build a factor node to remember the multiple loads are independent and
1873 if (LdChain.size() == 1)
1874 NewChain = LdChain[0];
1876 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1877 &LdChain[0], LdChain.size());
1879 // Modified the chain - switch anything that used the old chain to use
1881 ReplaceValueWith(SDValue(N, 1), NewChain);
1886 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1887 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1888 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1889 WidenVT, N->getOperand(0));
1892 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1893 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1894 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1896 SDValue Cond1 = N->getOperand(0);
1897 EVT CondVT = Cond1.getValueType();
1898 if (CondVT.isVector()) {
1899 EVT CondEltVT = CondVT.getVectorElementType();
1900 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1901 CondEltVT, WidenNumElts);
1902 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
1903 Cond1 = GetWidenedVector(Cond1);
1905 if (Cond1.getValueType() != CondWidenVT)
1906 Cond1 = ModifyToType(Cond1, CondWidenVT);
1909 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1910 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1911 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1912 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1913 WidenVT, Cond1, InOp1, InOp2);
1916 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1917 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1918 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1919 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1920 InOp1.getValueType(), N->getOperand(0),
1921 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1924 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1925 assert(N->getValueType(0).isVector() ==
1926 N->getOperand(0).getValueType().isVector() &&
1927 "Scalar/Vector type mismatch");
1928 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
1930 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1931 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1932 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1933 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1934 InOp1, InOp2, N->getOperand(2));
1937 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1938 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1939 return DAG.getUNDEF(WidenVT);
1942 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1943 EVT VT = N->getValueType(0);
1944 DebugLoc dl = N->getDebugLoc();
1946 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1947 unsigned NumElts = VT.getVectorNumElements();
1948 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1950 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1951 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1953 // Adjust mask based on new input vector length.
1954 SmallVector<int, 16> NewMask;
1955 for (unsigned i = 0; i != NumElts; ++i) {
1956 int Idx = N->getMaskElt(i);
1957 if (Idx < (int)NumElts)
1958 NewMask.push_back(Idx);
1960 NewMask.push_back(Idx - NumElts + WidenNumElts);
1962 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1963 NewMask.push_back(-1);
1964 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1967 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1968 assert(N->getValueType(0).isVector() &&
1969 N->getOperand(0).getValueType().isVector() &&
1970 "Operands must be vectors");
1971 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1972 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1974 SDValue InOp1 = N->getOperand(0);
1975 EVT InVT = InOp1.getValueType();
1976 assert(InVT.isVector() && "can not widen non vector type");
1977 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1978 InVT.getVectorElementType(), WidenNumElts);
1979 InOp1 = GetWidenedVector(InOp1);
1980 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1982 // Assume that the input and output will be widen appropriately. If not,
1983 // we will have to unroll it at some point.
1984 assert(InOp1.getValueType() == WidenInVT &&
1985 InOp2.getValueType() == WidenInVT &&
1986 "Input not widened to expected type!");
1988 return DAG.getNode(ISD::SETCC, N->getDebugLoc(),
1989 WidenVT, InOp1, InOp2, N->getOperand(2));
1993 //===----------------------------------------------------------------------===//
1994 // Widen Vector Operand
1995 //===----------------------------------------------------------------------===//
1996 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1997 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
2000 SDValue Res = SDValue();
2002 switch (N->getOpcode()) {
2005 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
2009 llvm_unreachable("Do not know how to widen this operator's operand!");
2011 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2012 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2013 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2014 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2015 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2016 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2018 case ISD::FP_EXTEND:
2019 case ISD::FP_TO_SINT:
2020 case ISD::FP_TO_UINT:
2021 case ISD::SINT_TO_FP:
2022 case ISD::UINT_TO_FP:
2024 case ISD::SIGN_EXTEND:
2025 case ISD::ZERO_EXTEND:
2026 case ISD::ANY_EXTEND:
2027 Res = WidenVecOp_Convert(N);
2031 // If Res is null, the sub-method took care of registering the result.
2032 if (!Res.getNode()) return false;
2034 // If the result is N, the sub-method updated N in place. Tell the legalizer
2036 if (Res.getNode() == N)
2040 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2041 "Invalid operand expansion");
2043 ReplaceValueWith(SDValue(N, 0), Res);
2047 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2048 // Since the result is legal and the input is illegal, it is unlikely
2049 // that we can fix the input to a legal type so unroll the convert
2050 // into some scalar code and create a nasty build vector.
2051 EVT VT = N->getValueType(0);
2052 EVT EltVT = VT.getVectorElementType();
2053 DebugLoc dl = N->getDebugLoc();
2054 unsigned NumElts = VT.getVectorNumElements();
2055 SDValue InOp = N->getOperand(0);
2056 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2057 InOp = GetWidenedVector(InOp);
2058 EVT InVT = InOp.getValueType();
2059 EVT InEltVT = InVT.getVectorElementType();
2061 unsigned Opcode = N->getOpcode();
2062 SmallVector<SDValue, 16> Ops(NumElts);
2063 for (unsigned i=0; i < NumElts; ++i)
2064 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2065 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2066 DAG.getIntPtrConstant(i)));
2068 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2071 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2072 EVT VT = N->getValueType(0);
2073 SDValue InOp = GetWidenedVector(N->getOperand(0));
2074 EVT InWidenVT = InOp.getValueType();
2075 DebugLoc dl = N->getDebugLoc();
2077 // Check if we can convert between two legal vector types and extract.
2078 unsigned InWidenSize = InWidenVT.getSizeInBits();
2079 unsigned Size = VT.getSizeInBits();
2080 // x86mmx is not an acceptable vector element type, so don't try.
2081 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2082 unsigned NewNumElts = InWidenSize / Size;
2083 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2084 if (TLI.isTypeLegal(NewVT)) {
2085 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2086 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2087 DAG.getIntPtrConstant(0));
2091 return CreateStackStoreLoad(InOp, VT);
2094 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2095 // If the input vector is not legal, it is likely that we will not find a
2096 // legal vector of the same size. Replace the concatenate vector with a
2097 // nasty build vector.
2098 EVT VT = N->getValueType(0);
2099 EVT EltVT = VT.getVectorElementType();
2100 DebugLoc dl = N->getDebugLoc();
2101 unsigned NumElts = VT.getVectorNumElements();
2102 SmallVector<SDValue, 16> Ops(NumElts);
2104 EVT InVT = N->getOperand(0).getValueType();
2105 unsigned NumInElts = InVT.getVectorNumElements();
2108 unsigned NumOperands = N->getNumOperands();
2109 for (unsigned i=0; i < NumOperands; ++i) {
2110 SDValue InOp = N->getOperand(i);
2111 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2112 InOp = GetWidenedVector(InOp);
2113 for (unsigned j=0; j < NumInElts; ++j)
2114 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2115 DAG.getIntPtrConstant(j));
2117 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2120 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2121 SDValue InOp = GetWidenedVector(N->getOperand(0));
2122 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2123 N->getValueType(0), InOp, N->getOperand(1));
2126 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2127 SDValue InOp = GetWidenedVector(N->getOperand(0));
2128 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2129 N->getValueType(0), InOp, N->getOperand(1));
2132 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2133 // We have to widen the value but we want only to store the original
2135 StoreSDNode *ST = cast<StoreSDNode>(N);
2137 SmallVector<SDValue, 16> StChain;
2138 if (ST->isTruncatingStore())
2139 GenWidenVectorTruncStores(StChain, ST);
2141 GenWidenVectorStores(StChain, ST);
2143 if (StChain.size() == 1)
2146 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2147 MVT::Other,&StChain[0],StChain.size());
2150 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2151 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2152 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2153 DebugLoc dl = N->getDebugLoc();
2155 // WARNING: In this code we widen the compare instruction with garbage.
2156 // This garbage may contain denormal floats which may be slow. Is this a real
2157 // concern ? Should we zero the unused lanes if this is a float compare ?
2159 // Get a new SETCC node to compare the newly widened operands.
2160 // Only some of the compared elements are legal.
2161 EVT SVT = TLI.getSetCCResultType(InOp0.getValueType());
2162 SDValue WideSETCC = DAG.getNode(ISD::SETCC, N->getDebugLoc(),
2163 SVT, InOp0, InOp1, N->getOperand(2));
2165 // Extract the needed results from the result vector.
2166 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2167 SVT.getVectorElementType(),
2168 N->getValueType(0).getVectorNumElements());
2169 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2170 ResVT, WideSETCC, DAG.getIntPtrConstant(0));
2172 return PromoteTargetBoolean(CC, N->getValueType(0));
2176 //===----------------------------------------------------------------------===//
2177 // Vector Widening Utilities
2178 //===----------------------------------------------------------------------===//
2180 // Utility function to find the type to chop up a widen vector for load/store
2181 // TLI: Target lowering used to determine legal types.
2182 // Width: Width left need to load/store.
2183 // WidenVT: The widen vector type to load to/store from
2184 // Align: If 0, don't allow use of a wider type
2185 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2187 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2188 unsigned Width, EVT WidenVT,
2189 unsigned Align = 0, unsigned WidenEx = 0) {
2190 EVT WidenEltVT = WidenVT.getVectorElementType();
2191 unsigned WidenWidth = WidenVT.getSizeInBits();
2192 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2193 unsigned AlignInBits = Align*8;
2195 // If we have one element to load/store, return it.
2196 EVT RetVT = WidenEltVT;
2197 if (Width == WidenEltWidth)
2200 // See if there is larger legal integer than the element type to load/store
2202 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2203 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2204 EVT MemVT((MVT::SimpleValueType) VT);
2205 unsigned MemVTWidth = MemVT.getSizeInBits();
2206 if (MemVT.getSizeInBits() <= WidenEltWidth)
2208 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2209 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2210 (MemVTWidth <= Width ||
2211 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2217 // See if there is a larger vector type to load/store that has the same vector
2218 // element type and is evenly divisible with the WidenVT.
2219 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2220 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2221 EVT MemVT = (MVT::SimpleValueType) VT;
2222 unsigned MemVTWidth = MemVT.getSizeInBits();
2223 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2224 (WidenWidth % MemVTWidth) == 0 &&
2225 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2226 (MemVTWidth <= Width ||
2227 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2228 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2236 // Builds a vector type from scalar loads
2237 // VecTy: Resulting Vector type
2238 // LDOps: Load operators to build a vector type
2239 // [Start,End) the list of loads to use.
2240 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2241 SmallVector<SDValue, 16>& LdOps,
2242 unsigned Start, unsigned End) {
2243 DebugLoc dl = LdOps[Start].getDebugLoc();
2244 EVT LdTy = LdOps[Start].getValueType();
2245 unsigned Width = VecTy.getSizeInBits();
2246 unsigned NumElts = Width / LdTy.getSizeInBits();
2247 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2250 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2252 for (unsigned i = Start + 1; i != End; ++i) {
2253 EVT NewLdTy = LdOps[i].getValueType();
2254 if (NewLdTy != LdTy) {
2255 NumElts = Width / NewLdTy.getSizeInBits();
2256 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2257 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2258 // Readjust position and vector position based on new load type
2259 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2262 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2263 DAG.getIntPtrConstant(Idx++));
2265 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2268 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
2270 // The strategy assumes that we can efficiently load powers of two widths.
2271 // The routines chops the vector into the largest vector loads with the same
2272 // element type or scalar loads and then recombines it to the widen vector
2274 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2275 unsigned WidenWidth = WidenVT.getSizeInBits();
2276 EVT LdVT = LD->getMemoryVT();
2277 DebugLoc dl = LD->getDebugLoc();
2278 assert(LdVT.isVector() && WidenVT.isVector());
2279 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2282 SDValue Chain = LD->getChain();
2283 SDValue BasePtr = LD->getBasePtr();
2284 unsigned Align = LD->getAlignment();
2285 bool isVolatile = LD->isVolatile();
2286 bool isNonTemporal = LD->isNonTemporal();
2287 bool isInvariant = LD->isInvariant();
2289 int LdWidth = LdVT.getSizeInBits();
2290 int WidthDiff = WidenWidth - LdWidth; // Difference
2291 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2293 // Find the vector type that can load from.
2294 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2295 int NewVTWidth = NewVT.getSizeInBits();
2296 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2297 isVolatile, isNonTemporal, isInvariant, Align);
2298 LdChain.push_back(LdOp.getValue(1));
2300 // Check if we can load the element with one instruction
2301 if (LdWidth <= NewVTWidth) {
2302 if (!NewVT.isVector()) {
2303 unsigned NumElts = WidenWidth / NewVTWidth;
2304 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2305 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2306 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2308 if (NewVT == WidenVT)
2311 assert(WidenWidth % NewVTWidth == 0);
2312 unsigned NumConcat = WidenWidth / NewVTWidth;
2313 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2314 SDValue UndefVal = DAG.getUNDEF(NewVT);
2315 ConcatOps[0] = LdOp;
2316 for (unsigned i = 1; i != NumConcat; ++i)
2317 ConcatOps[i] = UndefVal;
2318 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2322 // Load vector by using multiple loads from largest vector to scalar
2323 SmallVector<SDValue, 16> LdOps;
2324 LdOps.push_back(LdOp);
2326 LdWidth -= NewVTWidth;
2327 unsigned Offset = 0;
2329 while (LdWidth > 0) {
2330 unsigned Increment = NewVTWidth / 8;
2331 Offset += Increment;
2332 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2333 DAG.getIntPtrConstant(Increment));
2335 if (LdWidth < NewVTWidth) {
2336 // Our current type we are using is too large, find a better size
2337 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2338 NewVTWidth = NewVT.getSizeInBits();
2341 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2342 LD->getPointerInfo().getWithOffset(Offset),
2344 isNonTemporal, isInvariant,
2345 MinAlign(Align, Increment));
2346 LdChain.push_back(LdOp.getValue(1));
2347 LdOps.push_back(LdOp);
2349 LdWidth -= NewVTWidth;
2352 // Build the vector from the loads operations
2353 unsigned End = LdOps.size();
2354 if (!LdOps[0].getValueType().isVector())
2355 // All the loads are scalar loads.
2356 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2358 // If the load contains vectors, build the vector using concat vector.
2359 // All of the vectors used to loads are power of 2 and the scalars load
2360 // can be combined to make a power of 2 vector.
2361 SmallVector<SDValue, 16> ConcatOps(End);
2364 EVT LdTy = LdOps[i].getValueType();
2365 // First combine the scalar loads to a vector
2366 if (!LdTy.isVector()) {
2367 for (--i; i >= 0; --i) {
2368 LdTy = LdOps[i].getValueType();
2369 if (LdTy.isVector())
2372 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2374 ConcatOps[--Idx] = LdOps[i];
2375 for (--i; i >= 0; --i) {
2376 EVT NewLdTy = LdOps[i].getValueType();
2377 if (NewLdTy != LdTy) {
2378 // Create a larger vector
2379 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2380 &ConcatOps[Idx], End - Idx);
2384 ConcatOps[--Idx] = LdOps[i];
2387 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2388 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2389 &ConcatOps[Idx], End - Idx);
2391 // We need to fill the rest with undefs to build the vector
2392 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2393 SmallVector<SDValue, 16> WidenOps(NumOps);
2394 SDValue UndefVal = DAG.getUNDEF(LdTy);
2397 for (; i != End-Idx; ++i)
2398 WidenOps[i] = ConcatOps[Idx+i];
2399 for (; i != NumOps; ++i)
2400 WidenOps[i] = UndefVal;
2402 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2406 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2408 ISD::LoadExtType ExtType) {
2409 // For extension loads, it may not be more efficient to chop up the vector
2410 // and then extended it. Instead, we unroll the load and build a new vector.
2411 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2412 EVT LdVT = LD->getMemoryVT();
2413 DebugLoc dl = LD->getDebugLoc();
2414 assert(LdVT.isVector() && WidenVT.isVector());
2417 SDValue Chain = LD->getChain();
2418 SDValue BasePtr = LD->getBasePtr();
2419 unsigned Align = LD->getAlignment();
2420 bool isVolatile = LD->isVolatile();
2421 bool isNonTemporal = LD->isNonTemporal();
2423 EVT EltVT = WidenVT.getVectorElementType();
2424 EVT LdEltVT = LdVT.getVectorElementType();
2425 unsigned NumElts = LdVT.getVectorNumElements();
2427 // Load each element and widen
2428 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2429 SmallVector<SDValue, 16> Ops(WidenNumElts);
2430 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2431 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2432 LD->getPointerInfo(),
2433 LdEltVT, isVolatile, isNonTemporal, Align);
2434 LdChain.push_back(Ops[0].getValue(1));
2435 unsigned i = 0, Offset = Increment;
2436 for (i=1; i < NumElts; ++i, Offset += Increment) {
2437 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2438 BasePtr, DAG.getIntPtrConstant(Offset));
2439 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2440 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2441 isVolatile, isNonTemporal, Align);
2442 LdChain.push_back(Ops[i].getValue(1));
2445 // Fill the rest with undefs
2446 SDValue UndefVal = DAG.getUNDEF(EltVT);
2447 for (; i != WidenNumElts; ++i)
2450 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2454 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2456 // The strategy assumes that we can efficiently store powers of two widths.
2457 // The routines chops the vector into the largest vector stores with the same
2458 // element type or scalar stores.
2459 SDValue Chain = ST->getChain();
2460 SDValue BasePtr = ST->getBasePtr();
2461 unsigned Align = ST->getAlignment();
2462 bool isVolatile = ST->isVolatile();
2463 bool isNonTemporal = ST->isNonTemporal();
2464 SDValue ValOp = GetWidenedVector(ST->getValue());
2465 DebugLoc dl = ST->getDebugLoc();
2467 EVT StVT = ST->getMemoryVT();
2468 unsigned StWidth = StVT.getSizeInBits();
2469 EVT ValVT = ValOp.getValueType();
2470 unsigned ValWidth = ValVT.getSizeInBits();
2471 EVT ValEltVT = ValVT.getVectorElementType();
2472 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2473 assert(StVT.getVectorElementType() == ValEltVT);
2475 int Idx = 0; // current index to store
2476 unsigned Offset = 0; // offset from base to store
2477 while (StWidth != 0) {
2478 // Find the largest vector type we can store with
2479 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2480 unsigned NewVTWidth = NewVT.getSizeInBits();
2481 unsigned Increment = NewVTWidth / 8;
2482 if (NewVT.isVector()) {
2483 unsigned NumVTElts = NewVT.getVectorNumElements();
2485 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2486 DAG.getIntPtrConstant(Idx));
2487 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2488 ST->getPointerInfo().getWithOffset(Offset),
2489 isVolatile, isNonTemporal,
2490 MinAlign(Align, Offset)));
2491 StWidth -= NewVTWidth;
2492 Offset += Increment;
2494 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2495 DAG.getIntPtrConstant(Increment));
2496 } while (StWidth != 0 && StWidth >= NewVTWidth);
2498 // Cast the vector to the scalar type we can store
2499 unsigned NumElts = ValWidth / NewVTWidth;
2500 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2501 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2502 // Readjust index position based on new vector type
2503 Idx = Idx * ValEltWidth / NewVTWidth;
2505 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2506 DAG.getIntPtrConstant(Idx++));
2507 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2508 ST->getPointerInfo().getWithOffset(Offset),
2509 isVolatile, isNonTemporal,
2510 MinAlign(Align, Offset)));
2511 StWidth -= NewVTWidth;
2512 Offset += Increment;
2513 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2514 DAG.getIntPtrConstant(Increment));
2515 } while (StWidth != 0 && StWidth >= NewVTWidth);
2516 // Restore index back to be relative to the original widen element type
2517 Idx = Idx * NewVTWidth / ValEltWidth;
2523 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2525 // For extension loads, it may not be more efficient to truncate the vector
2526 // and then store it. Instead, we extract each element and then store it.
2527 SDValue Chain = ST->getChain();
2528 SDValue BasePtr = ST->getBasePtr();
2529 unsigned Align = ST->getAlignment();
2530 bool isVolatile = ST->isVolatile();
2531 bool isNonTemporal = ST->isNonTemporal();
2532 SDValue ValOp = GetWidenedVector(ST->getValue());
2533 DebugLoc dl = ST->getDebugLoc();
2535 EVT StVT = ST->getMemoryVT();
2536 EVT ValVT = ValOp.getValueType();
2538 // It must be true that we the widen vector type is bigger than where
2539 // we need to store.
2540 assert(StVT.isVector() && ValOp.getValueType().isVector());
2541 assert(StVT.bitsLT(ValOp.getValueType()));
2543 // For truncating stores, we can not play the tricks of chopping legal
2544 // vector types and bit cast it to the right type. Instead, we unroll
2546 EVT StEltVT = StVT.getVectorElementType();
2547 EVT ValEltVT = ValVT.getVectorElementType();
2548 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2549 unsigned NumElts = StVT.getVectorNumElements();
2550 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2551 DAG.getIntPtrConstant(0));
2552 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2553 ST->getPointerInfo(), StEltVT,
2554 isVolatile, isNonTemporal, Align));
2555 unsigned Offset = Increment;
2556 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2557 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2558 BasePtr, DAG.getIntPtrConstant(Offset));
2559 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2560 DAG.getIntPtrConstant(0));
2561 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2562 ST->getPointerInfo().getWithOffset(Offset),
2563 StEltVT, isVolatile, isNonTemporal,
2564 MinAlign(Align, Offset)));
2568 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2569 /// input vector must have the same element type as NVT.
2570 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2571 // Note that InOp might have been widened so it might already have
2572 // the right width or it might need be narrowed.
2573 EVT InVT = InOp.getValueType();
2574 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2575 "input and widen element type must match");
2576 DebugLoc dl = InOp.getDebugLoc();
2578 // Check if InOp already has the right width.
2582 unsigned InNumElts = InVT.getVectorNumElements();
2583 unsigned WidenNumElts = NVT.getVectorNumElements();
2584 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2585 unsigned NumConcat = WidenNumElts / InNumElts;
2586 SmallVector<SDValue, 16> Ops(NumConcat);
2587 SDValue UndefVal = DAG.getUNDEF(InVT);
2589 for (unsigned i = 1; i != NumConcat; ++i)
2592 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2595 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2596 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2597 DAG.getIntPtrConstant(0));
2599 // Fall back to extract and build.
2600 SmallVector<SDValue, 16> Ops(WidenNumElts);
2601 EVT EltVT = NVT.getVectorElementType();
2602 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2604 for (Idx = 0; Idx < MinNumElts; ++Idx)
2605 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2606 DAG.getIntPtrConstant(Idx));
2608 SDValue UndefVal = DAG.getUNDEF(EltVT);
2609 for ( ; Idx < WidenNumElts; ++Idx)
2610 Ops[Idx] = UndefVal;
2611 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);