1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
84 case ISD::SIGN_EXTEND:
85 case ISD::ZERO_EXTEND:
87 R = ScalarizeVecRes_UnaryOp(N);
109 R = ScalarizeVecRes_BinOp(N);
113 // If R is null, the sub-method took care of registering the result.
115 SetScalarizedVector(SDValue(N, ResNo), R);
118 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
119 SDValue LHS = GetScalarizedVector(N->getOperand(0));
120 SDValue RHS = GetScalarizedVector(N->getOperand(1));
121 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
122 LHS.getValueType(), LHS, RHS);
125 SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) {
126 EVT NewVT = N->getValueType(0).getVectorElementType();
127 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
128 NewVT, N->getOperand(0));
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
134 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
135 Op0, DAG.getValueType(NewVT),
136 DAG.getValueType(Op0.getValueType()),
139 cast<CvtRndSatSDNode>(N)->getCvtCode());
142 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
143 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
144 N->getValueType(0).getVectorElementType(),
145 N->getOperand(0), N->getOperand(1));
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
149 SDValue Op = GetScalarizedVector(N->getOperand(0));
150 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
151 Op.getValueType(), Op, N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
155 // The value to insert may have a wider type than the vector element type,
156 // so be sure to truncate it to the element type if necessary.
157 SDValue Op = N->getOperand(1);
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 if (Op.getValueType() != EltVT)
160 // FIXME: Can this happen for floating point types?
161 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
165 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
166 assert(N->isUnindexed() && "Indexed vector load?");
168 SDValue Result = DAG.getLoad(ISD::UNINDEXED, N->getDebugLoc(),
169 N->getExtensionType(),
170 N->getValueType(0).getVectorElementType(),
171 N->getChain(), N->getBasePtr(),
172 DAG.getUNDEF(N->getBasePtr().getValueType()),
173 N->getSrcValue(), N->getSrcValueOffset(),
174 N->getMemoryVT().getVectorElementType(),
175 N->isVolatile(), N->isNonTemporal(),
176 N->getOriginalAlignment());
178 // Legalized the chain result - switch anything that used the old chain to
180 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
185 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
186 EVT DestVT = N->getValueType(0).getVectorElementType();
187 SDValue Op = GetScalarizedVector(N->getOperand(0));
188 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
192 EVT EltVT = N->getValueType(0).getVectorElementType();
193 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
194 SDValue LHS = GetScalarizedVector(N->getOperand(0));
195 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
196 LHS, DAG.getValueType(ExtVT));
199 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
200 // If the operand is wider than the vector element type then it is implicitly
201 // truncated. Make that explicit here.
202 EVT EltVT = N->getValueType(0).getVectorElementType();
203 SDValue InOp = N->getOperand(0);
204 if (InOp.getValueType() != EltVT)
205 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
209 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
210 SDValue LHS = GetScalarizedVector(N->getOperand(1));
211 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
212 LHS.getValueType(), N->getOperand(0), LHS,
213 GetScalarizedVector(N->getOperand(2)));
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
217 SDValue LHS = GetScalarizedVector(N->getOperand(2));
218 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
219 N->getOperand(0), N->getOperand(1),
220 LHS, GetScalarizedVector(N->getOperand(3)),
224 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
225 SDValue LHS = GetScalarizedVector(N->getOperand(0));
226 SDValue RHS = GetScalarizedVector(N->getOperand(1));
227 DebugLoc DL = N->getDebugLoc();
229 // Turn it into a scalar SETCC.
230 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
233 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
234 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
237 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
238 // Figure out if the scalar is the LHS or RHS and return it.
239 SDValue Arg = N->getOperand(2).getOperand(0);
240 if (Arg.getOpcode() == ISD::UNDEF)
241 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
242 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
243 return GetScalarizedVector(N->getOperand(Op));
246 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
247 SDValue LHS = GetScalarizedVector(N->getOperand(0));
248 SDValue RHS = GetScalarizedVector(N->getOperand(1));
249 EVT NVT = N->getValueType(0).getVectorElementType();
250 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
251 DebugLoc DL = N->getDebugLoc();
253 // Turn it into a scalar SETCC.
254 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
256 // VSETCC always returns a sign-extended value, while SETCC may not. The
257 // SETCC result type may not match the vector element type. Correct these.
258 if (NVT.bitsLE(SVT)) {
259 // The SETCC result type is bigger than the vector element type.
260 // Ensure the SETCC result is sign-extended.
261 if (TLI.getBooleanContents() !=
262 TargetLowering::ZeroOrNegativeOneBooleanContent)
263 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
264 DAG.getValueType(MVT::i1));
265 // Truncate to the final type.
266 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
269 // The SETCC result type is smaller than the vector element type.
270 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
271 if (TLI.getBooleanContents() !=
272 TargetLowering::ZeroOrNegativeOneBooleanContent)
273 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
274 // Sign extend to the final type.
275 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
279 //===----------------------------------------------------------------------===//
280 // Operand Vector Scalarization <1 x ty> -> ty.
281 //===----------------------------------------------------------------------===//
283 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
284 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
287 SDValue Res = SDValue();
289 if (Res.getNode() == 0) {
290 switch (N->getOpcode()) {
293 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
297 llvm_unreachable("Do not know how to scalarize this operator's operand!");
298 case ISD::BIT_CONVERT:
299 Res = ScalarizeVecOp_BIT_CONVERT(N);
301 case ISD::CONCAT_VECTORS:
302 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
304 case ISD::EXTRACT_VECTOR_ELT:
305 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
308 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
313 // If the result is null, the sub-method took care of registering results etc.
314 if (!Res.getNode()) return false;
316 // If the result is N, the sub-method updated N in place. Tell the legalizer
318 if (Res.getNode() == N)
321 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
322 "Invalid operand expansion");
324 ReplaceValueWith(SDValue(N, 0), Res);
328 /// ScalarizeVecOp_BIT_CONVERT - If the value to convert is a vector that needs
329 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
330 SDValue DAGTypeLegalizer::ScalarizeVecOp_BIT_CONVERT(SDNode *N) {
331 SDValue Elt = GetScalarizedVector(N->getOperand(0));
332 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
333 N->getValueType(0), Elt);
336 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
337 /// use a BUILD_VECTOR instead.
338 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
339 SmallVector<SDValue, 8> Ops(N->getNumOperands());
340 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
341 Ops[i] = GetScalarizedVector(N->getOperand(i));
342 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
343 &Ops[0], Ops.size());
346 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
347 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
349 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
350 SDValue Res = GetScalarizedVector(N->getOperand(0));
351 if (Res.getValueType() != N->getValueType(0))
352 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
357 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
358 /// scalarized, it must be <1 x ty>. Just store the element.
359 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
360 assert(N->isUnindexed() && "Indexed store of one-element vector?");
361 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
362 DebugLoc dl = N->getDebugLoc();
364 if (N->isTruncatingStore())
365 return DAG.getTruncStore(N->getChain(), dl,
366 GetScalarizedVector(N->getOperand(1)),
368 N->getSrcValue(), N->getSrcValueOffset(),
369 N->getMemoryVT().getVectorElementType(),
370 N->isVolatile(), N->isNonTemporal(),
373 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getSrcValue(), N->getSrcValueOffset(),
375 N->isVolatile(), N->isNonTemporal(),
376 N->getOriginalAlignment());
380 //===----------------------------------------------------------------------===//
381 // Result Vector Splitting
382 //===----------------------------------------------------------------------===//
384 /// SplitVectorResult - This method is called when the specified result of the
385 /// specified node is found to need vector splitting. At this point, the node
386 /// may also have invalid operands or may have other results that need
387 /// legalization, we just know that (at least) one result needs vector
389 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
390 DEBUG(dbgs() << "Split node result: ";
395 switch (N->getOpcode()) {
398 dbgs() << "SplitVectorResult #" << ResNo << ": ";
402 llvm_unreachable("Do not know how to split the result of this operator!");
404 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
405 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
406 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
407 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
409 case ISD::BIT_CONVERT: SplitVecRes_BIT_CONVERT(N, Lo, Hi); break;
410 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
411 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
412 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
413 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
414 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
415 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
416 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
417 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
418 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
420 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
424 SplitVecRes_SETCC(N, Lo, Hi);
426 case ISD::VECTOR_SHUFFLE:
427 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
442 case ISD::FNEARBYINT:
443 case ISD::FP_TO_SINT:
444 case ISD::FP_TO_UINT:
445 case ISD::SINT_TO_FP:
446 case ISD::UINT_TO_FP:
448 case ISD::SIGN_EXTEND:
449 case ISD::ZERO_EXTEND:
450 case ISD::ANY_EXTEND:
451 SplitVecRes_UnaryOp(N, Lo, Hi);
473 SplitVecRes_BinOp(N, Lo, Hi);
477 // If Lo/Hi is null, the sub-method took care of registering results etc.
479 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
482 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
484 SDValue LHSLo, LHSHi;
485 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
486 SDValue RHSLo, RHSHi;
487 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
488 DebugLoc dl = N->getDebugLoc();
490 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
491 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
494 void DAGTypeLegalizer::SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
496 // We know the result is a vector. The input may be either a vector or a
499 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
500 DebugLoc dl = N->getDebugLoc();
502 SDValue InOp = N->getOperand(0);
503 EVT InVT = InOp.getValueType();
505 // Handle some special cases efficiently.
506 switch (getTypeAction(InVT)) {
508 assert(false && "Unknown type action!");
512 case ScalarizeVector:
516 // A scalar to vector conversion, where the scalar needs expansion.
517 // If the vector is being split in two then we can just convert the
520 GetExpandedOp(InOp, Lo, Hi);
521 if (TLI.isBigEndian())
523 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
524 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
529 // If the input is a vector that needs to be split, convert each split
530 // piece of the input now.
531 GetSplitVector(InOp, Lo, Hi);
532 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
533 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
537 // In the general case, convert the input to an integer and split it by hand.
538 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
539 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
540 if (TLI.isBigEndian())
541 std::swap(LoIntVT, HiIntVT);
543 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
545 if (TLI.isBigEndian())
547 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
548 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
551 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
554 DebugLoc dl = N->getDebugLoc();
555 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
556 unsigned LoNumElts = LoVT.getVectorNumElements();
557 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
558 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
560 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
561 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
564 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
566 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
567 DebugLoc dl = N->getDebugLoc();
568 unsigned NumSubvectors = N->getNumOperands() / 2;
569 if (NumSubvectors == 1) {
570 Lo = N->getOperand(0);
571 Hi = N->getOperand(1);
576 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
578 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
579 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
581 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
582 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
585 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
588 DebugLoc dl = N->getDebugLoc();
589 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
591 SDValue DTyOpLo = DAG.getValueType(LoVT);
592 SDValue DTyOpHi = DAG.getValueType(HiVT);
594 SDValue RndOp = N->getOperand(3);
595 SDValue SatOp = N->getOperand(4);
596 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
600 EVT InVT = N->getOperand(0).getValueType();
601 switch (getTypeAction(InVT)) {
602 default: llvm_unreachable("Unexpected type action!");
604 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
605 LoVT.getVectorNumElements());
606 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
607 DAG.getIntPtrConstant(0));
608 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
609 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
613 GetSplitVector(N->getOperand(0), VLo, VHi);
616 // If the result needs to be split and the input needs to be widened,
617 // the two types must have different lengths. Use the widened result
618 // and extract from it to do the split.
619 SDValue InOp = GetWidenedVector(N->getOperand(0));
620 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
621 LoVT.getVectorNumElements());
622 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
623 DAG.getIntPtrConstant(0));
624 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
625 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
630 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
631 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
633 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
635 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
639 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
641 SDValue Vec = N->getOperand(0);
642 SDValue Idx = N->getOperand(1);
643 EVT IdxVT = Idx.getValueType();
644 DebugLoc dl = N->getDebugLoc();
647 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
649 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
650 Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
651 DAG.getConstant(LoVT.getVectorNumElements(), IdxVT));
652 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, Idx);
655 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
657 DebugLoc dl = N->getDebugLoc();
658 GetSplitVector(N->getOperand(0), Lo, Hi);
659 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
660 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
663 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
665 SDValue LHSLo, LHSHi;
666 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
667 DebugLoc dl = N->getDebugLoc();
670 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
672 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
673 DAG.getValueType(LoVT));
674 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
675 DAG.getValueType(HiVT));
678 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
680 SDValue Vec = N->getOperand(0);
681 SDValue Elt = N->getOperand(1);
682 SDValue Idx = N->getOperand(2);
683 DebugLoc dl = N->getDebugLoc();
684 GetSplitVector(Vec, Lo, Hi);
686 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
687 unsigned IdxVal = CIdx->getZExtValue();
688 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
689 if (IdxVal < LoNumElts)
690 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
691 Lo.getValueType(), Lo, Elt, Idx);
693 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
694 DAG.getIntPtrConstant(IdxVal - LoNumElts));
698 // Spill the vector to the stack.
699 EVT VecVT = Vec.getValueType();
700 EVT EltVT = VecVT.getVectorElementType();
701 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
702 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, NULL, 0,
705 // Store the new element. This may be larger than the vector element type,
706 // so use a truncating store.
707 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
708 const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
710 TLI.getTargetData()->getPrefTypeAlignment(VecType);
711 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
714 // Load the Lo part from the stack slot.
715 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, NULL, 0,
718 // Increment the pointer to the other part.
719 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
720 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
721 DAG.getIntPtrConstant(IncrementSize));
723 // Load the Hi part from the stack slot.
724 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, NULL, 0, false,
725 false, MinAlign(Alignment, IncrementSize));
728 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
731 DebugLoc dl = N->getDebugLoc();
732 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
733 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
734 Hi = DAG.getUNDEF(HiVT);
737 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
739 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
741 DebugLoc dl = LD->getDebugLoc();
742 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
744 ISD::LoadExtType ExtType = LD->getExtensionType();
745 SDValue Ch = LD->getChain();
746 SDValue Ptr = LD->getBasePtr();
747 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
748 const Value *SV = LD->getSrcValue();
749 int SVOffset = LD->getSrcValueOffset();
750 EVT MemoryVT = LD->getMemoryVT();
751 unsigned Alignment = LD->getOriginalAlignment();
752 bool isVolatile = LD->isVolatile();
753 bool isNonTemporal = LD->isNonTemporal();
755 EVT LoMemVT, HiMemVT;
756 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
758 Lo = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, LoVT, Ch, Ptr, Offset,
759 SV, SVOffset, LoMemVT, isVolatile, isNonTemporal, Alignment);
761 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
762 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
763 DAG.getIntPtrConstant(IncrementSize));
764 SVOffset += IncrementSize;
765 Hi = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, HiVT, Ch, Ptr, Offset,
766 SV, SVOffset, HiMemVT, isVolatile, isNonTemporal, Alignment);
768 // Build a factor node to remember that this load is independent of the
770 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
773 // Legalized the chain result - switch anything that used the old chain to
775 ReplaceValueWith(SDValue(LD, 1), Ch);
778 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
780 DebugLoc DL = N->getDebugLoc();
781 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
784 EVT InVT = N->getOperand(0).getValueType();
785 SDValue LL, LH, RL, RH;
786 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
787 LoVT.getVectorNumElements());
788 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
789 DAG.getIntPtrConstant(0));
790 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
791 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
793 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
794 DAG.getIntPtrConstant(0));
795 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
796 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
798 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
799 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
802 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
804 // Get the dest types - they may not match the input types, e.g. int_to_fp.
806 DebugLoc dl = N->getDebugLoc();
807 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
810 EVT InVT = N->getOperand(0).getValueType();
811 switch (getTypeAction(InVT)) {
812 default: llvm_unreachable("Unexpected type action!");
814 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
815 LoVT.getVectorNumElements());
816 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
817 DAG.getIntPtrConstant(0));
818 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
819 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
823 GetSplitVector(N->getOperand(0), Lo, Hi);
826 // If the result needs to be split and the input needs to be widened,
827 // the two types must have different lengths. Use the widened result
828 // and extract from it to do the split.
829 SDValue InOp = GetWidenedVector(N->getOperand(0));
830 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
831 LoVT.getVectorNumElements());
832 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
833 DAG.getIntPtrConstant(0));
834 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
835 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
840 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
841 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
844 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
845 SDValue &Lo, SDValue &Hi) {
846 // The low and high parts of the original input give four input vectors.
848 DebugLoc dl = N->getDebugLoc();
849 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
850 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
851 EVT NewVT = Inputs[0].getValueType();
852 unsigned NewElts = NewVT.getVectorNumElements();
854 // If Lo or Hi uses elements from at most two of the four input vectors, then
855 // express it as a vector shuffle of those two inputs. Otherwise extract the
856 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
857 SmallVector<int, 16> Ops;
858 for (unsigned High = 0; High < 2; ++High) {
859 SDValue &Output = High ? Hi : Lo;
861 // Build a shuffle mask for the output, discovering on the fly which
862 // input vectors to use as shuffle operands (recorded in InputUsed).
863 // If building a suitable shuffle vector proves too hard, then bail
864 // out with useBuildVector set.
865 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
866 unsigned FirstMaskIdx = High * NewElts;
867 bool useBuildVector = false;
868 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
869 // The mask element. This indexes into the input.
870 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
872 // The input vector this mask element indexes into.
873 unsigned Input = (unsigned)Idx / NewElts;
875 if (Input >= array_lengthof(Inputs)) {
876 // The mask element does not index into any input vector.
881 // Turn the index into an offset from the start of the input vector.
882 Idx -= Input * NewElts;
884 // Find or create a shuffle vector operand to hold this input.
886 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
887 if (InputUsed[OpNo] == Input) {
888 // This input vector is already an operand.
890 } else if (InputUsed[OpNo] == -1U) {
891 // Create a new operand for this input vector.
892 InputUsed[OpNo] = Input;
897 if (OpNo >= array_lengthof(InputUsed)) {
898 // More than two input vectors used! Give up on trying to create a
899 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
900 useBuildVector = true;
904 // Add the mask index for the new shuffle vector.
905 Ops.push_back(Idx + OpNo * NewElts);
908 if (useBuildVector) {
909 EVT EltVT = NewVT.getVectorElementType();
910 SmallVector<SDValue, 16> SVOps;
912 // Extract the input elements by hand.
913 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
914 // The mask element. This indexes into the input.
915 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
917 // The input vector this mask element indexes into.
918 unsigned Input = (unsigned)Idx / NewElts;
920 if (Input >= array_lengthof(Inputs)) {
921 // The mask element is "undef" or indexes off the end of the input.
922 SVOps.push_back(DAG.getUNDEF(EltVT));
926 // Turn the index into an offset from the start of the input vector.
927 Idx -= Input * NewElts;
929 // Extract the vector element by hand.
930 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
931 Inputs[Input], DAG.getIntPtrConstant(Idx)));
934 // Construct the Lo/Hi output using a BUILD_VECTOR.
935 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
936 } else if (InputUsed[0] == -1U) {
937 // No input vectors were used! The result is undefined.
938 Output = DAG.getUNDEF(NewVT);
940 SDValue Op0 = Inputs[InputUsed[0]];
941 // If only one input was used, use an undefined vector for the other.
942 SDValue Op1 = InputUsed[1] == -1U ?
943 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
944 // At least one input vector was used. Create a new shuffle vector.
945 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
953 //===----------------------------------------------------------------------===//
954 // Operand Vector Splitting
955 //===----------------------------------------------------------------------===//
957 /// SplitVectorOperand - This method is called when the specified operand of the
958 /// specified node is found to need vector splitting. At this point, all of the
959 /// result types of the node are known to be legal, but other operands of the
960 /// node may need legalization as well as the specified one.
961 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
962 DEBUG(dbgs() << "Split node operand: ";
965 SDValue Res = SDValue();
967 if (Res.getNode() == 0) {
968 switch (N->getOpcode()) {
971 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
975 llvm_unreachable("Do not know how to split this operator's operand!");
977 case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
978 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
979 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
981 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
987 case ISD::FP_TO_SINT:
988 case ISD::FP_TO_UINT:
989 case ISD::SINT_TO_FP:
990 case ISD::UINT_TO_FP:
992 case ISD::SIGN_EXTEND:
993 case ISD::ZERO_EXTEND:
994 case ISD::ANY_EXTEND:
995 Res = SplitVecOp_UnaryOp(N);
1000 // If the result is null, the sub-method took care of registering results etc.
1001 if (!Res.getNode()) return false;
1003 // If the result is N, the sub-method updated N in place. Tell the legalizer
1005 if (Res.getNode() == N)
1008 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1009 "Invalid operand expansion");
1011 ReplaceValueWith(SDValue(N, 0), Res);
1015 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1016 // The result has a legal vector type, but the input needs splitting.
1017 EVT ResVT = N->getValueType(0);
1019 DebugLoc dl = N->getDebugLoc();
1020 GetSplitVector(N->getOperand(0), Lo, Hi);
1021 EVT InVT = Lo.getValueType();
1023 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1024 InVT.getVectorNumElements());
1026 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1027 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1029 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1032 SDValue DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
1033 // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will
1034 // end up being split all the way down to individual components. Convert the
1035 // split pieces into integers and reassemble.
1037 GetSplitVector(N->getOperand(0), Lo, Hi);
1038 Lo = BitConvertToInteger(Lo);
1039 Hi = BitConvertToInteger(Hi);
1041 if (TLI.isBigEndian())
1044 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0),
1045 JoinIntegers(Lo, Hi));
1048 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1049 // We know that the extracted result type is legal. For now, assume the index
1051 EVT SubVT = N->getValueType(0);
1052 SDValue Idx = N->getOperand(1);
1053 DebugLoc dl = N->getDebugLoc();
1055 GetSplitVector(N->getOperand(0), Lo, Hi);
1057 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1058 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1060 if (IdxVal < LoElts) {
1061 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1062 "Extracted subvector crosses vector split!");
1063 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1065 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1066 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1070 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1071 SDValue Vec = N->getOperand(0);
1072 SDValue Idx = N->getOperand(1);
1073 EVT VecVT = Vec.getValueType();
1075 if (isa<ConstantSDNode>(Idx)) {
1076 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1077 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1080 GetSplitVector(Vec, Lo, Hi);
1082 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1084 if (IdxVal < LoElts)
1085 return DAG.UpdateNodeOperands(SDValue(N, 0), Lo, Idx);
1086 return DAG.UpdateNodeOperands(SDValue(N, 0), Hi,
1087 DAG.getConstant(IdxVal - LoElts,
1088 Idx.getValueType()));
1091 // Store the vector to the stack.
1092 EVT EltVT = VecVT.getVectorElementType();
1093 DebugLoc dl = N->getDebugLoc();
1094 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1095 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
1096 const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
1097 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, SV, 0,
1100 // Load back the required element.
1101 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1102 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1103 SV, 0, EltVT, false, false, 0);
1106 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1107 assert(N->isUnindexed() && "Indexed store of vector?");
1108 assert(OpNo == 1 && "Can only split the stored value");
1109 DebugLoc dl = N->getDebugLoc();
1111 bool isTruncating = N->isTruncatingStore();
1112 SDValue Ch = N->getChain();
1113 SDValue Ptr = N->getBasePtr();
1114 int SVOffset = N->getSrcValueOffset();
1115 EVT MemoryVT = N->getMemoryVT();
1116 unsigned Alignment = N->getOriginalAlignment();
1117 bool isVol = N->isVolatile();
1118 bool isNT = N->isNonTemporal();
1120 GetSplitVector(N->getOperand(1), Lo, Hi);
1122 EVT LoMemVT, HiMemVT;
1123 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1125 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1128 Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1129 LoMemVT, isVol, isNT, Alignment);
1131 Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1132 isVol, isNT, Alignment);
1134 // Increment the pointer to the other half.
1135 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
1136 DAG.getIntPtrConstant(IncrementSize));
1137 SVOffset += IncrementSize;
1140 Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1141 HiMemVT, isVol, isNT, Alignment);
1143 Hi = DAG.getStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1144 isVol, isNT, Alignment);
1146 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
1150 //===----------------------------------------------------------------------===//
1151 // Result Vector Widening
1152 //===----------------------------------------------------------------------===//
1154 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1155 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1159 // See if the target wants to custom widen this node.
1160 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1163 SDValue Res = SDValue();
1164 switch (N->getOpcode()) {
1167 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1171 llvm_unreachable("Do not know how to widen the result of this operator!");
1173 case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break;
1174 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1175 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1176 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1177 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1178 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1179 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1180 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1181 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1182 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1183 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1184 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1185 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1186 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1187 case ISD::VECTOR_SHUFFLE:
1188 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1191 Res = WidenVecRes_VSETCC(N);
1198 case ISD::FCOPYSIGN:
1215 Res = WidenVecRes_Binary(N);
1221 Res = WidenVecRes_Shift(N);
1225 case ISD::FP_TO_SINT:
1226 case ISD::FP_TO_UINT:
1227 case ISD::SINT_TO_FP:
1228 case ISD::UINT_TO_FP:
1230 case ISD::SIGN_EXTEND:
1231 case ISD::ZERO_EXTEND:
1232 case ISD::ANY_EXTEND:
1233 Res = WidenVecRes_Convert(N);
1244 Res = WidenVecRes_Unary(N);
1248 // If Res is null, the sub-method took care of registering the result.
1250 SetWidenedVector(SDValue(N, ResNo), Res);
1253 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1254 // Binary op widening.
1255 unsigned Opcode = N->getOpcode();
1256 DebugLoc dl = N->getDebugLoc();
1257 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1258 EVT WidenEltVT = WidenVT.getVectorElementType();
1260 unsigned NumElts = VT.getVectorNumElements();
1261 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1262 NumElts = NumElts / 2;
1263 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1266 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1267 // Operation doesn't trap so just widen as normal.
1268 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1269 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1270 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1271 } else if (NumElts == 1) {
1272 // No legal vector version so unroll the vector operation and then widen.
1273 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1275 // Since the operation can trap, apply operation on the original vector.
1276 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1277 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1278 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1280 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1281 unsigned ConcatEnd = 0; // Current ConcatOps index.
1282 unsigned Idx = 0; // Current Idx into input vectors.
1283 while (CurNumElts != 0) {
1284 while (CurNumElts >= NumElts) {
1285 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1286 DAG.getIntPtrConstant(Idx));
1287 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1288 DAG.getIntPtrConstant(Idx));
1289 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1291 CurNumElts -= NumElts;
1295 NumElts = NumElts / 2;
1296 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1297 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1300 // Since we are using concat vector, build a vector from the scalar ops.
1301 SDValue VecOp = DAG.getUNDEF(PrevVecVT);
1302 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1303 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1304 InOp1, DAG.getIntPtrConstant(Idx));
1305 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1306 InOp2, DAG.getIntPtrConstant(Idx));
1307 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, PrevVecVT, VecOp,
1308 DAG.getNode(Opcode, dl, WidenEltVT, EOp1, EOp2),
1309 DAG.getIntPtrConstant(i));
1312 ConcatOps[ConcatEnd++] = VecOp;
1316 // Check to see if we have a single operation with the widen type.
1317 if (ConcatEnd == 1) {
1318 VT = ConcatOps[0].getValueType();
1320 return ConcatOps[0];
1323 // Rebuild vector to one with the widen type
1324 Idx = ConcatEnd - 1;
1326 VT = ConcatOps[Idx--].getValueType();
1327 while (Idx != 0 && ConcatOps[Idx].getValueType() == VT)
1330 VT = ConcatOps[Idx].getValueType();
1331 ConcatOps[Idx+1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, VT,
1332 &ConcatOps[Idx+1], ConcatEnd - Idx - 1);
1333 ConcatEnd = Idx + 2;
1337 unsigned NumOps = WidenVT.getVectorNumElements()/VT.getVectorNumElements();
1338 if (NumOps != ConcatEnd ) {
1339 SDValue UndefVal = DAG.getUNDEF(VT);
1340 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1341 ConcatOps[j] = UndefVal;
1343 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1347 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1348 SDValue InOp = N->getOperand(0);
1349 DebugLoc dl = N->getDebugLoc();
1351 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1352 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1354 EVT InVT = InOp.getValueType();
1355 EVT InEltVT = InVT.getVectorElementType();
1356 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1358 unsigned Opcode = N->getOpcode();
1359 unsigned InVTNumElts = InVT.getVectorNumElements();
1361 if (getTypeAction(InVT) == WidenVector) {
1362 InOp = GetWidenedVector(N->getOperand(0));
1363 InVT = InOp.getValueType();
1364 InVTNumElts = InVT.getVectorNumElements();
1365 if (InVTNumElts == WidenNumElts)
1366 return DAG.getNode(Opcode, dl, WidenVT, InOp);
1369 if (TLI.isTypeLegal(InWidenVT)) {
1370 // Because the result and the input are different vector types, widening
1371 // the result could create a legal type but widening the input might make
1372 // it an illegal type that might lead to repeatedly splitting the input
1373 // and then widening it. To avoid this, we widen the input only if
1374 // it results in a legal type.
1375 if (WidenNumElts % InVTNumElts == 0) {
1376 // Widen the input and call convert on the widened input vector.
1377 unsigned NumConcat = WidenNumElts/InVTNumElts;
1378 SmallVector<SDValue, 16> Ops(NumConcat);
1380 SDValue UndefVal = DAG.getUNDEF(InVT);
1381 for (unsigned i = 1; i != NumConcat; ++i)
1383 return DAG.getNode(Opcode, dl, WidenVT,
1384 DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT,
1385 &Ops[0], NumConcat));
1388 if (InVTNumElts % WidenNumElts == 0) {
1389 // Extract the input and convert the shorten input vector.
1390 return DAG.getNode(Opcode, dl, WidenVT,
1391 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT,
1392 InOp, DAG.getIntPtrConstant(0)));
1396 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1397 SmallVector<SDValue, 16> Ops(WidenNumElts);
1398 EVT EltVT = WidenVT.getVectorElementType();
1399 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1401 for (i=0; i < MinElts; ++i)
1402 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1403 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1404 DAG.getIntPtrConstant(i)));
1406 SDValue UndefVal = DAG.getUNDEF(EltVT);
1407 for (; i < WidenNumElts; ++i)
1410 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1413 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1414 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1415 SDValue InOp = GetWidenedVector(N->getOperand(0));
1416 SDValue ShOp = N->getOperand(1);
1418 EVT ShVT = ShOp.getValueType();
1419 if (getTypeAction(ShVT) == WidenVector) {
1420 ShOp = GetWidenedVector(ShOp);
1421 ShVT = ShOp.getValueType();
1423 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1424 ShVT.getVectorElementType(),
1425 WidenVT.getVectorNumElements());
1426 if (ShVT != ShWidenVT)
1427 ShOp = ModifyToType(ShOp, ShWidenVT);
1429 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1432 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1433 // Unary op widening.
1434 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1435 SDValue InOp = GetWidenedVector(N->getOperand(0));
1436 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1439 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1440 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1441 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1442 cast<VTSDNode>(N->getOperand(1))->getVT()
1443 .getVectorElementType(),
1444 WidenVT.getVectorNumElements());
1445 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1446 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1447 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1450 SDValue DAGTypeLegalizer::WidenVecRes_BIT_CONVERT(SDNode *N) {
1451 SDValue InOp = N->getOperand(0);
1452 EVT InVT = InOp.getValueType();
1453 EVT VT = N->getValueType(0);
1454 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1455 DebugLoc dl = N->getDebugLoc();
1457 switch (getTypeAction(InVT)) {
1459 assert(false && "Unknown type action!");
1463 case PromoteInteger:
1464 // If the InOp is promoted to the same size, convert it. Otherwise,
1465 // fall out of the switch and widen the promoted input.
1466 InOp = GetPromotedInteger(InOp);
1467 InVT = InOp.getValueType();
1468 if (WidenVT.bitsEq(InVT))
1469 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1474 case ScalarizeVector:
1478 // If the InOp is widened to the same size, convert it. Otherwise, fall
1479 // out of the switch and widen the widened input.
1480 InOp = GetWidenedVector(InOp);
1481 InVT = InOp.getValueType();
1482 if (WidenVT.bitsEq(InVT))
1483 // The input widens to the same size. Convert to the widen value.
1484 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1488 unsigned WidenSize = WidenVT.getSizeInBits();
1489 unsigned InSize = InVT.getSizeInBits();
1490 if (WidenSize % InSize == 0) {
1491 // Determine new input vector type. The new input vector type will use
1492 // the same element type (if its a vector) or use the input type as a
1493 // vector. It is the same size as the type to widen to.
1495 unsigned NewNumElts = WidenSize / InSize;
1496 if (InVT.isVector()) {
1497 EVT InEltVT = InVT.getVectorElementType();
1498 NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT,
1499 WidenSize / InEltVT.getSizeInBits());
1501 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1504 if (TLI.isTypeLegal(NewInVT)) {
1505 // Because the result and the input are different vector types, widening
1506 // the result could create a legal type but widening the input might make
1507 // it an illegal type that might lead to repeatedly splitting the input
1508 // and then widening it. To avoid this, we widen the input only if
1509 // it results in a legal type.
1510 SmallVector<SDValue, 16> Ops(NewNumElts);
1511 SDValue UndefVal = DAG.getUNDEF(InVT);
1513 for (unsigned i = 1; i < NewNumElts; ++i)
1517 if (InVT.isVector())
1518 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1519 NewInVT, &Ops[0], NewNumElts);
1521 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1522 NewInVT, &Ops[0], NewNumElts);
1523 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, NewVec);
1527 return CreateStackStoreLoad(InOp, WidenVT);
1530 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1531 DebugLoc dl = N->getDebugLoc();
1532 // Build a vector with undefined for the new nodes.
1533 EVT VT = N->getValueType(0);
1534 EVT EltVT = VT.getVectorElementType();
1535 unsigned NumElts = VT.getVectorNumElements();
1537 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1538 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1540 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1541 NewOps.reserve(WidenNumElts);
1542 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1543 NewOps.push_back(DAG.getUNDEF(EltVT));
1545 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1548 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1549 EVT InVT = N->getOperand(0).getValueType();
1550 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1551 DebugLoc dl = N->getDebugLoc();
1552 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1553 unsigned NumOperands = N->getNumOperands();
1555 bool InputWidened = false; // Indicates we need to widen the input.
1556 if (getTypeAction(InVT) != WidenVector) {
1557 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1558 // Add undef vectors to widen to correct length.
1559 unsigned NumConcat = WidenVT.getVectorNumElements() /
1560 InVT.getVectorNumElements();
1561 SDValue UndefVal = DAG.getUNDEF(InVT);
1562 SmallVector<SDValue, 16> Ops(NumConcat);
1563 for (unsigned i=0; i < NumOperands; ++i)
1564 Ops[i] = N->getOperand(i);
1565 for (unsigned i = NumOperands; i != NumConcat; ++i)
1567 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1570 InputWidened = true;
1571 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1572 // The inputs and the result are widen to the same value.
1574 for (i=1; i < NumOperands; ++i)
1575 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1578 if (i > NumOperands)
1579 // Everything but the first operand is an UNDEF so just return the
1580 // widened first operand.
1581 return GetWidenedVector(N->getOperand(0));
1583 if (NumOperands == 2) {
1584 // Replace concat of two operands with a shuffle.
1585 SmallVector<int, 16> MaskOps(WidenNumElts);
1586 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1588 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1590 return DAG.getVectorShuffle(WidenVT, dl,
1591 GetWidenedVector(N->getOperand(0)),
1592 GetWidenedVector(N->getOperand(1)),
1598 // Fall back to use extracts and build vector.
1599 EVT EltVT = WidenVT.getVectorElementType();
1600 unsigned NumInElts = InVT.getVectorNumElements();
1601 SmallVector<SDValue, 16> Ops(WidenNumElts);
1603 for (unsigned i=0; i < NumOperands; ++i) {
1604 SDValue InOp = N->getOperand(i);
1606 InOp = GetWidenedVector(InOp);
1607 for (unsigned j=0; j < NumInElts; ++j)
1608 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1609 DAG.getIntPtrConstant(j));
1611 SDValue UndefVal = DAG.getUNDEF(EltVT);
1612 for (; Idx < WidenNumElts; ++Idx)
1613 Ops[Idx] = UndefVal;
1614 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1617 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1618 DebugLoc dl = N->getDebugLoc();
1619 SDValue InOp = N->getOperand(0);
1620 SDValue RndOp = N->getOperand(3);
1621 SDValue SatOp = N->getOperand(4);
1623 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1624 N->getValueType(0));
1625 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1627 EVT InVT = InOp.getValueType();
1628 EVT InEltVT = InVT.getVectorElementType();
1629 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1631 SDValue DTyOp = DAG.getValueType(WidenVT);
1632 SDValue STyOp = DAG.getValueType(InWidenVT);
1633 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1635 unsigned InVTNumElts = InVT.getVectorNumElements();
1636 if (getTypeAction(InVT) == WidenVector) {
1637 InOp = GetWidenedVector(InOp);
1638 InVT = InOp.getValueType();
1639 InVTNumElts = InVT.getVectorNumElements();
1640 if (InVTNumElts == WidenNumElts)
1641 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1645 if (TLI.isTypeLegal(InWidenVT)) {
1646 // Because the result and the input are different vector types, widening
1647 // the result could create a legal type but widening the input might make
1648 // it an illegal type that might lead to repeatedly splitting the input
1649 // and then widening it. To avoid this, we widen the input only if
1650 // it results in a legal type.
1651 if (WidenNumElts % InVTNumElts == 0) {
1652 // Widen the input and call convert on the widened input vector.
1653 unsigned NumConcat = WidenNumElts/InVTNumElts;
1654 SmallVector<SDValue, 16> Ops(NumConcat);
1656 SDValue UndefVal = DAG.getUNDEF(InVT);
1657 for (unsigned i = 1; i != NumConcat; ++i) {
1660 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1661 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1665 if (InVTNumElts % WidenNumElts == 0) {
1666 // Extract the input and convert the shorten input vector.
1667 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1668 DAG.getIntPtrConstant(0));
1669 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1674 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1675 SmallVector<SDValue, 16> Ops(WidenNumElts);
1676 EVT EltVT = WidenVT.getVectorElementType();
1677 DTyOp = DAG.getValueType(EltVT);
1678 STyOp = DAG.getValueType(InEltVT);
1680 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1682 for (i=0; i < MinElts; ++i) {
1683 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1684 DAG.getIntPtrConstant(i));
1685 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1689 SDValue UndefVal = DAG.getUNDEF(EltVT);
1690 for (; i < WidenNumElts; ++i)
1693 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1696 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1697 EVT VT = N->getValueType(0);
1698 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1699 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1700 SDValue InOp = N->getOperand(0);
1701 SDValue Idx = N->getOperand(1);
1702 DebugLoc dl = N->getDebugLoc();
1704 if (getTypeAction(InOp.getValueType()) == WidenVector)
1705 InOp = GetWidenedVector(InOp);
1707 EVT InVT = InOp.getValueType();
1709 ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
1711 unsigned IdxVal = CIdx->getZExtValue();
1712 // Check if we can just return the input vector after widening.
1713 if (IdxVal == 0 && InVT == WidenVT)
1716 // Check if we can extract from the vector.
1717 unsigned InNumElts = InVT.getVectorNumElements();
1718 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1719 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1722 // We could try widening the input to the right length but for now, extract
1723 // the original elements, fill the rest with undefs and build a vector.
1724 SmallVector<SDValue, 16> Ops(WidenNumElts);
1725 EVT EltVT = VT.getVectorElementType();
1726 EVT IdxVT = Idx.getValueType();
1727 unsigned NumElts = VT.getVectorNumElements();
1730 unsigned IdxVal = CIdx->getZExtValue();
1731 for (i=0; i < NumElts; ++i)
1732 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1733 DAG.getConstant(IdxVal+i, IdxVT));
1735 Ops[0] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, Idx);
1736 for (i=1; i < NumElts; ++i) {
1737 SDValue NewIdx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
1738 DAG.getConstant(i, IdxVT));
1739 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, NewIdx);
1743 SDValue UndefVal = DAG.getUNDEF(EltVT);
1744 for (; i < WidenNumElts; ++i)
1746 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1749 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1750 SDValue InOp = GetWidenedVector(N->getOperand(0));
1751 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1752 InOp.getValueType(), InOp,
1753 N->getOperand(1), N->getOperand(2));
1756 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1757 LoadSDNode *LD = cast<LoadSDNode>(N);
1758 ISD::LoadExtType ExtType = LD->getExtensionType();
1761 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1762 if (ExtType != ISD::NON_EXTLOAD)
1763 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1765 Result = GenWidenVectorLoads(LdChain, LD);
1767 // If we generate a single load, we can use that for the chain. Otherwise,
1768 // build a factor node to remember the multiple loads are independent and
1771 if (LdChain.size() == 1)
1772 NewChain = LdChain[0];
1774 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1775 &LdChain[0], LdChain.size());
1777 // Modified the chain - switch anything that used the old chain to use
1779 ReplaceValueWith(SDValue(N, 1), NewChain);
1784 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1785 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1786 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1787 WidenVT, N->getOperand(0));
1790 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1791 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1792 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1794 SDValue Cond1 = N->getOperand(0);
1795 EVT CondVT = Cond1.getValueType();
1796 if (CondVT.isVector()) {
1797 EVT CondEltVT = CondVT.getVectorElementType();
1798 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1799 CondEltVT, WidenNumElts);
1800 if (getTypeAction(CondVT) == WidenVector)
1801 Cond1 = GetWidenedVector(Cond1);
1803 if (Cond1.getValueType() != CondWidenVT)
1804 Cond1 = ModifyToType(Cond1, CondWidenVT);
1807 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1808 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1809 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1810 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1811 WidenVT, Cond1, InOp1, InOp2);
1814 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1815 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1816 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1817 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1818 InOp1.getValueType(), N->getOperand(0),
1819 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1822 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1823 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1824 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1825 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1826 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1827 InOp1, InOp2, N->getOperand(2));
1830 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1831 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1832 return DAG.getUNDEF(WidenVT);
1835 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1836 EVT VT = N->getValueType(0);
1837 DebugLoc dl = N->getDebugLoc();
1839 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1840 unsigned NumElts = VT.getVectorNumElements();
1841 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1843 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1844 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1846 // Adjust mask based on new input vector length.
1847 SmallVector<int, 16> NewMask;
1848 for (unsigned i = 0; i != NumElts; ++i) {
1849 int Idx = N->getMaskElt(i);
1850 if (Idx < (int)NumElts)
1851 NewMask.push_back(Idx);
1853 NewMask.push_back(Idx - NumElts + WidenNumElts);
1855 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1856 NewMask.push_back(-1);
1857 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1860 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1861 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1862 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1864 SDValue InOp1 = N->getOperand(0);
1865 EVT InVT = InOp1.getValueType();
1866 assert(InVT.isVector() && "can not widen non vector type");
1867 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1868 InVT.getVectorElementType(), WidenNumElts);
1869 InOp1 = GetWidenedVector(InOp1);
1870 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1872 // Assume that the input and output will be widen appropriately. If not,
1873 // we will have to unroll it at some point.
1874 assert(InOp1.getValueType() == WidenInVT &&
1875 InOp2.getValueType() == WidenInVT &&
1876 "Input not widened to expected type!");
1877 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1878 WidenVT, InOp1, InOp2, N->getOperand(2));
1882 //===----------------------------------------------------------------------===//
1883 // Widen Vector Operand
1884 //===----------------------------------------------------------------------===//
1885 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1886 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1889 SDValue Res = SDValue();
1891 switch (N->getOpcode()) {
1894 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
1898 llvm_unreachable("Do not know how to widen this operator's operand!");
1900 case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break;
1901 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
1902 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
1903 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
1904 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
1907 case ISD::FP_TO_SINT:
1908 case ISD::FP_TO_UINT:
1909 case ISD::SINT_TO_FP:
1910 case ISD::UINT_TO_FP:
1912 case ISD::SIGN_EXTEND:
1913 case ISD::ZERO_EXTEND:
1914 case ISD::ANY_EXTEND:
1915 Res = WidenVecOp_Convert(N);
1919 // If Res is null, the sub-method took care of registering the result.
1920 if (!Res.getNode()) return false;
1922 // If the result is N, the sub-method updated N in place. Tell the legalizer
1924 if (Res.getNode() == N)
1928 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1929 "Invalid operand expansion");
1931 ReplaceValueWith(SDValue(N, 0), Res);
1935 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
1936 // Since the result is legal and the input is illegal, it is unlikely
1937 // that we can fix the input to a legal type so unroll the convert
1938 // into some scalar code and create a nasty build vector.
1939 EVT VT = N->getValueType(0);
1940 EVT EltVT = VT.getVectorElementType();
1941 DebugLoc dl = N->getDebugLoc();
1942 unsigned NumElts = VT.getVectorNumElements();
1943 SDValue InOp = N->getOperand(0);
1944 if (getTypeAction(InOp.getValueType()) == WidenVector)
1945 InOp = GetWidenedVector(InOp);
1946 EVT InVT = InOp.getValueType();
1947 EVT InEltVT = InVT.getVectorElementType();
1949 unsigned Opcode = N->getOpcode();
1950 SmallVector<SDValue, 16> Ops(NumElts);
1951 for (unsigned i=0; i < NumElts; ++i)
1952 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1953 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1954 DAG.getIntPtrConstant(i)));
1956 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
1959 SDValue DAGTypeLegalizer::WidenVecOp_BIT_CONVERT(SDNode *N) {
1960 EVT VT = N->getValueType(0);
1961 SDValue InOp = GetWidenedVector(N->getOperand(0));
1962 EVT InWidenVT = InOp.getValueType();
1963 DebugLoc dl = N->getDebugLoc();
1965 // Check if we can convert between two legal vector types and extract.
1966 unsigned InWidenSize = InWidenVT.getSizeInBits();
1967 unsigned Size = VT.getSizeInBits();
1968 if (InWidenSize % Size == 0 && !VT.isVector()) {
1969 unsigned NewNumElts = InWidenSize / Size;
1970 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
1971 if (TLI.isTypeLegal(NewVT)) {
1972 SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp);
1973 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
1974 DAG.getIntPtrConstant(0));
1978 return CreateStackStoreLoad(InOp, VT);
1981 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
1982 // If the input vector is not legal, it is likely that we will not find a
1983 // legal vector of the same size. Replace the concatenate vector with a
1984 // nasty build vector.
1985 EVT VT = N->getValueType(0);
1986 EVT EltVT = VT.getVectorElementType();
1987 DebugLoc dl = N->getDebugLoc();
1988 unsigned NumElts = VT.getVectorNumElements();
1989 SmallVector<SDValue, 16> Ops(NumElts);
1991 EVT InVT = N->getOperand(0).getValueType();
1992 unsigned NumInElts = InVT.getVectorNumElements();
1995 unsigned NumOperands = N->getNumOperands();
1996 for (unsigned i=0; i < NumOperands; ++i) {
1997 SDValue InOp = N->getOperand(i);
1998 if (getTypeAction(InOp.getValueType()) == WidenVector)
1999 InOp = GetWidenedVector(InOp);
2000 for (unsigned j=0; j < NumInElts; ++j)
2001 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2002 DAG.getIntPtrConstant(j));
2004 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2007 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2008 SDValue InOp = GetWidenedVector(N->getOperand(0));
2009 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2010 N->getValueType(0), InOp, N->getOperand(1));
2013 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2014 SDValue InOp = GetWidenedVector(N->getOperand(0));
2015 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2016 N->getValueType(0), InOp, N->getOperand(1));
2019 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2020 // We have to widen the value but we want only to store the original
2022 StoreSDNode *ST = cast<StoreSDNode>(N);
2024 SmallVector<SDValue, 16> StChain;
2025 if (ST->isTruncatingStore())
2026 GenWidenVectorTruncStores(StChain, ST);
2028 GenWidenVectorStores(StChain, ST);
2030 if (StChain.size() == 1)
2033 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2034 MVT::Other,&StChain[0],StChain.size());
2037 //===----------------------------------------------------------------------===//
2038 // Vector Widening Utilities
2039 //===----------------------------------------------------------------------===//
2041 // Utility function to find the type to chop up a widen vector for load/store
2042 // TLI: Target lowering used to determine legal types.
2043 // Width: Width left need to load/store.
2044 // WidenVT: The widen vector type to load to/store from
2045 // Align: If 0, don't allow use of a wider type
2046 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2048 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2049 unsigned Width, EVT WidenVT,
2050 unsigned Align = 0, unsigned WidenEx = 0) {
2051 EVT WidenEltVT = WidenVT.getVectorElementType();
2052 unsigned WidenWidth = WidenVT.getSizeInBits();
2053 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2054 unsigned AlignInBits = Align*8;
2056 // If we have one element to load/store, return it.
2057 EVT RetVT = WidenEltVT;
2058 if (Width == WidenEltWidth)
2061 // See if there is larger legal integer than the element type to load/store
2063 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2064 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2065 EVT MemVT((MVT::SimpleValueType) VT);
2066 unsigned MemVTWidth = MemVT.getSizeInBits();
2067 if (MemVT.getSizeInBits() <= WidenEltWidth)
2069 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2070 (MemVTWidth <= Width ||
2071 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2077 // See if there is a larger vector type to load/store that has the same vector
2078 // element type and is evenly divisible with the WidenVT.
2079 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2080 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2081 EVT MemVT = (MVT::SimpleValueType) VT;
2082 unsigned MemVTWidth = MemVT.getSizeInBits();
2083 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2084 (WidenWidth % MemVTWidth) == 0 &&
2085 (MemVTWidth <= Width ||
2086 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2087 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2095 // Builds a vector type from scalar loads
2096 // VecTy: Resulting Vector type
2097 // LDOps: Load operators to build a vector type
2098 // [Start,End) the list of loads to use.
2099 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2100 SmallVector<SDValue, 16>& LdOps,
2101 unsigned Start, unsigned End) {
2102 DebugLoc dl = LdOps[Start].getDebugLoc();
2103 EVT LdTy = LdOps[Start].getValueType();
2104 unsigned Width = VecTy.getSizeInBits();
2105 unsigned NumElts = Width / LdTy.getSizeInBits();
2106 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2109 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2111 for (unsigned i = Start + 1; i != End; ++i) {
2112 EVT NewLdTy = LdOps[i].getValueType();
2113 if (NewLdTy != LdTy) {
2114 NumElts = Width / NewLdTy.getSizeInBits();
2115 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2116 VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, VecOp);
2117 // Readjust position and vector position based on new load type
2118 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2121 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2122 DAG.getIntPtrConstant(Idx++));
2124 return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
2127 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
2129 // The strategy assumes that we can efficiently load powers of two widths.
2130 // The routines chops the vector into the largest vector loads with the same
2131 // element type or scalar loads and then recombines it to the widen vector
2133 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2134 unsigned WidenWidth = WidenVT.getSizeInBits();
2135 EVT LdVT = LD->getMemoryVT();
2136 DebugLoc dl = LD->getDebugLoc();
2137 assert(LdVT.isVector() && WidenVT.isVector());
2138 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2141 SDValue Chain = LD->getChain();
2142 SDValue BasePtr = LD->getBasePtr();
2143 int SVOffset = LD->getSrcValueOffset();
2144 unsigned Align = LD->getAlignment();
2145 bool isVolatile = LD->isVolatile();
2146 bool isNonTemporal = LD->isNonTemporal();
2147 const Value *SV = LD->getSrcValue();
2149 int LdWidth = LdVT.getSizeInBits();
2150 int WidthDiff = WidenWidth - LdWidth; // Difference
2151 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2153 // Find the vector type that can load from.
2154 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2155 int NewVTWidth = NewVT.getSizeInBits();
2156 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV, SVOffset,
2157 isVolatile, isNonTemporal, Align);
2158 LdChain.push_back(LdOp.getValue(1));
2160 // Check if we can load the element with one instruction
2161 if (LdWidth <= NewVTWidth) {
2162 if (NewVT.isVector()) {
2163 if (NewVT != WidenVT) {
2164 assert(WidenWidth % NewVTWidth == 0);
2165 unsigned NumConcat = WidenWidth / NewVTWidth;
2166 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2167 SDValue UndefVal = DAG.getUNDEF(NewVT);
2168 ConcatOps[0] = LdOp;
2169 for (unsigned i = 1; i != NumConcat; ++i)
2170 ConcatOps[i] = UndefVal;
2171 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2176 unsigned NumElts = WidenWidth / NewVTWidth;
2177 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2178 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2179 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp);
2183 // Load vector by using multiple loads from largest vector to scalar
2184 SmallVector<SDValue, 16> LdOps;
2185 LdOps.push_back(LdOp);
2187 LdWidth -= NewVTWidth;
2188 unsigned Offset = 0;
2190 while (LdWidth > 0) {
2191 unsigned Increment = NewVTWidth / 8;
2192 Offset += Increment;
2193 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2194 DAG.getIntPtrConstant(Increment));
2196 if (LdWidth < NewVTWidth) {
2197 // Our current type we are using is too large, find a better size
2198 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2199 NewVTWidth = NewVT.getSizeInBits();
2202 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV,
2203 SVOffset+Offset, isVolatile,
2204 isNonTemporal, MinAlign(Align, Increment));
2205 LdChain.push_back(LdOp.getValue(1));
2206 LdOps.push_back(LdOp);
2208 LdWidth -= NewVTWidth;
2211 // Build the vector from the loads operations
2212 unsigned End = LdOps.size();
2213 if (LdOps[0].getValueType().isVector()) {
2214 // If the load contains vectors, build the vector using concat vector.
2215 // All of the vectors used to loads are power of 2 and the scalars load
2216 // can be combined to make a power of 2 vector.
2217 SmallVector<SDValue, 16> ConcatOps(End);
2220 EVT LdTy = LdOps[i].getValueType();
2221 // First combine the scalar loads to a vector
2222 if (!LdTy.isVector()) {
2223 for (--i; i >= 0; --i) {
2224 LdTy = LdOps[i].getValueType();
2225 if (LdTy.isVector())
2228 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2230 ConcatOps[--Idx] = LdOps[i];
2231 for (--i; i >= 0; --i) {
2232 EVT NewLdTy = LdOps[i].getValueType();
2233 if (NewLdTy != LdTy) {
2234 // Create a larger vector
2235 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2236 &ConcatOps[Idx], End - Idx);
2240 ConcatOps[--Idx] = LdOps[i];
2243 if (WidenWidth != LdTy.getSizeInBits()*(End - Idx)) {
2244 // We need to fill the rest with undefs to build the vector
2245 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2246 SmallVector<SDValue, 16> WidenOps(NumOps);
2247 SDValue UndefVal = DAG.getUNDEF(LdTy);
2249 for (; i != End-Idx; ++i)
2250 WidenOps[i] = ConcatOps[Idx+i];
2251 for (; i != NumOps; ++i)
2252 WidenOps[i] = UndefVal;
2253 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2255 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2256 &ConcatOps[Idx], End - Idx);
2257 } else // All the loads are scalar loads.
2258 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2262 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2264 ISD::LoadExtType ExtType) {
2265 // For extension loads, it may not be more efficient to chop up the vector
2266 // and then extended it. Instead, we unroll the load and build a new vector.
2267 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2268 EVT LdVT = LD->getMemoryVT();
2269 DebugLoc dl = LD->getDebugLoc();
2270 assert(LdVT.isVector() && WidenVT.isVector());
2273 SDValue Chain = LD->getChain();
2274 SDValue BasePtr = LD->getBasePtr();
2275 int SVOffset = LD->getSrcValueOffset();
2276 unsigned Align = LD->getAlignment();
2277 bool isVolatile = LD->isVolatile();
2278 bool isNonTemporal = LD->isNonTemporal();
2279 const Value *SV = LD->getSrcValue();
2281 EVT EltVT = WidenVT.getVectorElementType();
2282 EVT LdEltVT = LdVT.getVectorElementType();
2283 unsigned NumElts = LdVT.getVectorNumElements();
2285 // Load each element and widen
2286 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2287 SmallVector<SDValue, 16> Ops(WidenNumElts);
2288 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2289 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, SV, SVOffset,
2290 LdEltVT, isVolatile, isNonTemporal, Align);
2291 LdChain.push_back(Ops[0].getValue(1));
2292 unsigned i = 0, Offset = Increment;
2293 for (i=1; i < NumElts; ++i, Offset += Increment) {
2294 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2295 BasePtr, DAG.getIntPtrConstant(Offset));
2296 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, SV,
2297 SVOffset + Offset, LdEltVT, isVolatile,
2298 isNonTemporal, Align);
2299 LdChain.push_back(Ops[i].getValue(1));
2302 // Fill the rest with undefs
2303 SDValue UndefVal = DAG.getUNDEF(EltVT);
2304 for (; i != WidenNumElts; ++i)
2307 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2311 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2313 // The strategy assumes that we can efficiently store powers of two widths.
2314 // The routines chops the vector into the largest vector stores with the same
2315 // element type or scalar stores.
2316 SDValue Chain = ST->getChain();
2317 SDValue BasePtr = ST->getBasePtr();
2318 const Value *SV = ST->getSrcValue();
2319 int SVOffset = ST->getSrcValueOffset();
2320 unsigned Align = ST->getAlignment();
2321 bool isVolatile = ST->isVolatile();
2322 bool isNonTemporal = ST->isNonTemporal();
2323 SDValue ValOp = GetWidenedVector(ST->getValue());
2324 DebugLoc dl = ST->getDebugLoc();
2326 EVT StVT = ST->getMemoryVT();
2327 unsigned StWidth = StVT.getSizeInBits();
2328 EVT ValVT = ValOp.getValueType();
2329 unsigned ValWidth = ValVT.getSizeInBits();
2330 EVT ValEltVT = ValVT.getVectorElementType();
2331 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2332 assert(StVT.getVectorElementType() == ValEltVT);
2334 int Idx = 0; // current index to store
2335 unsigned Offset = 0; // offset from base to store
2336 while (StWidth != 0) {
2337 // Find the largest vector type we can store with
2338 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2339 unsigned NewVTWidth = NewVT.getSizeInBits();
2340 unsigned Increment = NewVTWidth / 8;
2341 if (NewVT.isVector()) {
2342 unsigned NumVTElts = NewVT.getVectorNumElements();
2344 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2345 DAG.getIntPtrConstant(Idx));
2346 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2347 SVOffset + Offset, isVolatile,
2349 MinAlign(Align, Offset)));
2350 StWidth -= NewVTWidth;
2351 Offset += Increment;
2353 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2354 DAG.getIntPtrConstant(Increment));
2355 } while (StWidth != 0 && StWidth >= NewVTWidth);
2357 // Cast the vector to the scalar type we can store
2358 unsigned NumElts = ValWidth / NewVTWidth;
2359 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2360 SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, ValOp);
2361 // Readjust index position based on new vector type
2362 Idx = Idx * ValEltWidth / NewVTWidth;
2364 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2365 DAG.getIntPtrConstant(Idx++));
2366 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2367 SVOffset + Offset, isVolatile,
2368 isNonTemporal, MinAlign(Align, Offset)));
2369 StWidth -= NewVTWidth;
2370 Offset += Increment;
2371 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2372 DAG.getIntPtrConstant(Increment));
2373 } while (StWidth != 0 && StWidth >= NewVTWidth);
2374 // Restore index back to be relative to the original widen element type
2375 Idx = Idx * NewVTWidth / ValEltWidth;
2381 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2383 // For extension loads, it may not be more efficient to truncate the vector
2384 // and then store it. Instead, we extract each element and then store it.
2385 SDValue Chain = ST->getChain();
2386 SDValue BasePtr = ST->getBasePtr();
2387 const Value *SV = ST->getSrcValue();
2388 int SVOffset = ST->getSrcValueOffset();
2389 unsigned Align = ST->getAlignment();
2390 bool isVolatile = ST->isVolatile();
2391 bool isNonTemporal = ST->isNonTemporal();
2392 SDValue ValOp = GetWidenedVector(ST->getValue());
2393 DebugLoc dl = ST->getDebugLoc();
2395 EVT StVT = ST->getMemoryVT();
2396 EVT ValVT = ValOp.getValueType();
2398 // It must be true that we the widen vector type is bigger than where
2399 // we need to store.
2400 assert(StVT.isVector() && ValOp.getValueType().isVector());
2401 assert(StVT.bitsLT(ValOp.getValueType()));
2403 // For truncating stores, we can not play the tricks of chopping legal
2404 // vector types and bit cast it to the right type. Instead, we unroll
2406 EVT StEltVT = StVT.getVectorElementType();
2407 EVT ValEltVT = ValVT.getVectorElementType();
2408 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2409 unsigned NumElts = StVT.getVectorNumElements();
2410 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2411 DAG.getIntPtrConstant(0));
2412 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, SV,
2414 isVolatile, isNonTemporal, Align));
2415 unsigned Offset = Increment;
2416 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2417 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2418 BasePtr, DAG.getIntPtrConstant(Offset));
2419 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2420 DAG.getIntPtrConstant(0));
2421 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, SV,
2422 SVOffset + Offset, StEltVT,
2423 isVolatile, isNonTemporal,
2424 MinAlign(Align, Offset)));
2428 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2429 /// input vector must have the same element type as NVT.
2430 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2431 // Note that InOp might have been widened so it might already have
2432 // the right width or it might need be narrowed.
2433 EVT InVT = InOp.getValueType();
2434 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2435 "input and widen element type must match");
2436 DebugLoc dl = InOp.getDebugLoc();
2438 // Check if InOp already has the right width.
2442 unsigned InNumElts = InVT.getVectorNumElements();
2443 unsigned WidenNumElts = NVT.getVectorNumElements();
2444 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2445 unsigned NumConcat = WidenNumElts / InNumElts;
2446 SmallVector<SDValue, 16> Ops(NumConcat);
2447 SDValue UndefVal = DAG.getUNDEF(InVT);
2449 for (unsigned i = 1; i != NumConcat; ++i)
2452 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2455 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2456 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2457 DAG.getIntPtrConstant(0));
2459 // Fall back to extract and build.
2460 SmallVector<SDValue, 16> Ops(WidenNumElts);
2461 EVT EltVT = NVT.getVectorElementType();
2462 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2464 for (Idx = 0; Idx < MinNumElts; ++Idx)
2465 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2466 DAG.getIntPtrConstant(Idx));
2468 SDValue UndefVal = DAG.getUNDEF(EltVT);
2469 for ( ; Idx < WidenNumElts; ++Idx)
2470 Ops[Idx] = UndefVal;
2471 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);