1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
84 case ISD::SIGN_EXTEND:
85 case ISD::ZERO_EXTEND:
87 R = ScalarizeVecRes_UnaryOp(N);
109 R = ScalarizeVecRes_BinOp(N);
113 // If R is null, the sub-method took care of registering the result.
115 SetScalarizedVector(SDValue(N, ResNo), R);
118 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
119 SDValue LHS = GetScalarizedVector(N->getOperand(0));
120 SDValue RHS = GetScalarizedVector(N->getOperand(1));
121 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
122 LHS.getValueType(), LHS, RHS);
125 SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) {
126 EVT NewVT = N->getValueType(0).getVectorElementType();
127 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
128 NewVT, N->getOperand(0));
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
134 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
135 Op0, DAG.getValueType(NewVT),
136 DAG.getValueType(Op0.getValueType()),
139 cast<CvtRndSatSDNode>(N)->getCvtCode());
142 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
143 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
144 N->getValueType(0).getVectorElementType(),
145 N->getOperand(0), N->getOperand(1));
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
149 SDValue Op = GetScalarizedVector(N->getOperand(0));
150 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
151 Op.getValueType(), Op, N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
155 // The value to insert may have a wider type than the vector element type,
156 // so be sure to truncate it to the element type if necessary.
157 SDValue Op = N->getOperand(1);
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 if (Op.getValueType() != EltVT)
160 // FIXME: Can this happen for floating point types?
161 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
165 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
166 assert(N->isUnindexed() && "Indexed vector load?");
168 SDValue Result = DAG.getLoad(ISD::UNINDEXED, N->getDebugLoc(),
169 N->getExtensionType(),
170 N->getValueType(0).getVectorElementType(),
171 N->getChain(), N->getBasePtr(),
172 DAG.getUNDEF(N->getBasePtr().getValueType()),
173 N->getSrcValue(), N->getSrcValueOffset(),
174 N->getMemoryVT().getVectorElementType(),
175 N->isVolatile(), N->isNonTemporal(),
176 N->getOriginalAlignment());
178 // Legalized the chain result - switch anything that used the old chain to
180 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
185 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
186 EVT DestVT = N->getValueType(0).getVectorElementType();
187 SDValue Op = GetScalarizedVector(N->getOperand(0));
188 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
192 EVT EltVT = N->getValueType(0).getVectorElementType();
193 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
194 SDValue LHS = GetScalarizedVector(N->getOperand(0));
195 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
196 LHS, DAG.getValueType(ExtVT));
199 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
200 // If the operand is wider than the vector element type then it is implicitly
201 // truncated. Make that explicit here.
202 EVT EltVT = N->getValueType(0).getVectorElementType();
203 SDValue InOp = N->getOperand(0);
204 if (InOp.getValueType() != EltVT)
205 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
209 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
210 SDValue LHS = GetScalarizedVector(N->getOperand(1));
211 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
212 LHS.getValueType(), N->getOperand(0), LHS,
213 GetScalarizedVector(N->getOperand(2)));
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
217 SDValue LHS = GetScalarizedVector(N->getOperand(2));
218 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
219 N->getOperand(0), N->getOperand(1),
220 LHS, GetScalarizedVector(N->getOperand(3)),
224 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
225 SDValue LHS = GetScalarizedVector(N->getOperand(0));
226 SDValue RHS = GetScalarizedVector(N->getOperand(1));
227 DebugLoc DL = N->getDebugLoc();
229 // Turn it into a scalar SETCC.
230 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
233 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
234 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
237 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
238 // Figure out if the scalar is the LHS or RHS and return it.
239 SDValue Arg = N->getOperand(2).getOperand(0);
240 if (Arg.getOpcode() == ISD::UNDEF)
241 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
242 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
243 return GetScalarizedVector(N->getOperand(Op));
246 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
247 SDValue LHS = GetScalarizedVector(N->getOperand(0));
248 SDValue RHS = GetScalarizedVector(N->getOperand(1));
249 EVT NVT = N->getValueType(0).getVectorElementType();
250 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
251 DebugLoc DL = N->getDebugLoc();
253 // Turn it into a scalar SETCC.
254 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
256 // VSETCC always returns a sign-extended value, while SETCC may not. The
257 // SETCC result type may not match the vector element type. Correct these.
258 if (NVT.bitsLE(SVT)) {
259 // The SETCC result type is bigger than the vector element type.
260 // Ensure the SETCC result is sign-extended.
261 if (TLI.getBooleanContents() !=
262 TargetLowering::ZeroOrNegativeOneBooleanContent)
263 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
264 DAG.getValueType(MVT::i1));
265 // Truncate to the final type.
266 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
269 // The SETCC result type is smaller than the vector element type.
270 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
271 if (TLI.getBooleanContents() !=
272 TargetLowering::ZeroOrNegativeOneBooleanContent)
273 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
274 // Sign extend to the final type.
275 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
279 //===----------------------------------------------------------------------===//
280 // Operand Vector Scalarization <1 x ty> -> ty.
281 //===----------------------------------------------------------------------===//
283 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
284 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
287 SDValue Res = SDValue();
289 if (Res.getNode() == 0) {
290 switch (N->getOpcode()) {
293 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
297 llvm_unreachable("Do not know how to scalarize this operator's operand!");
298 case ISD::BIT_CONVERT:
299 Res = ScalarizeVecOp_BIT_CONVERT(N);
301 case ISD::CONCAT_VECTORS:
302 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
304 case ISD::EXTRACT_VECTOR_ELT:
305 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
308 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
313 // If the result is null, the sub-method took care of registering results etc.
314 if (!Res.getNode()) return false;
316 // If the result is N, the sub-method updated N in place. Tell the legalizer
318 if (Res.getNode() == N)
321 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
322 "Invalid operand expansion");
324 ReplaceValueWith(SDValue(N, 0), Res);
328 /// ScalarizeVecOp_BIT_CONVERT - If the value to convert is a vector that needs
329 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
330 SDValue DAGTypeLegalizer::ScalarizeVecOp_BIT_CONVERT(SDNode *N) {
331 SDValue Elt = GetScalarizedVector(N->getOperand(0));
332 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
333 N->getValueType(0), Elt);
336 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
337 /// use a BUILD_VECTOR instead.
338 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
339 SmallVector<SDValue, 8> Ops(N->getNumOperands());
340 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
341 Ops[i] = GetScalarizedVector(N->getOperand(i));
342 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
343 &Ops[0], Ops.size());
346 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
347 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
349 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
350 SDValue Res = GetScalarizedVector(N->getOperand(0));
351 if (Res.getValueType() != N->getValueType(0))
352 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
357 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
358 /// scalarized, it must be <1 x ty>. Just store the element.
359 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
360 assert(N->isUnindexed() && "Indexed store of one-element vector?");
361 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
362 DebugLoc dl = N->getDebugLoc();
364 if (N->isTruncatingStore())
365 return DAG.getTruncStore(N->getChain(), dl,
366 GetScalarizedVector(N->getOperand(1)),
368 N->getSrcValue(), N->getSrcValueOffset(),
369 N->getMemoryVT().getVectorElementType(),
370 N->isVolatile(), N->isNonTemporal(),
373 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getSrcValue(), N->getSrcValueOffset(),
375 N->isVolatile(), N->isNonTemporal(),
376 N->getOriginalAlignment());
380 //===----------------------------------------------------------------------===//
381 // Result Vector Splitting
382 //===----------------------------------------------------------------------===//
384 /// SplitVectorResult - This method is called when the specified result of the
385 /// specified node is found to need vector splitting. At this point, the node
386 /// may also have invalid operands or may have other results that need
387 /// legalization, we just know that (at least) one result needs vector
389 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
390 DEBUG(dbgs() << "Split node result: ";
395 switch (N->getOpcode()) {
398 dbgs() << "SplitVectorResult #" << ResNo << ": ";
402 llvm_unreachable("Do not know how to split the result of this operator!");
404 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
405 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
406 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
407 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
409 case ISD::BIT_CONVERT: SplitVecRes_BIT_CONVERT(N, Lo, Hi); break;
410 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
411 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
412 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
413 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
414 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
415 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
416 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
417 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
418 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
420 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
424 SplitVecRes_SETCC(N, Lo, Hi);
426 case ISD::VECTOR_SHUFFLE:
427 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
442 case ISD::FNEARBYINT:
443 case ISD::FP_TO_SINT:
444 case ISD::FP_TO_UINT:
445 case ISD::SINT_TO_FP:
446 case ISD::UINT_TO_FP:
448 case ISD::SIGN_EXTEND:
449 case ISD::ZERO_EXTEND:
450 case ISD::ANY_EXTEND:
451 SplitVecRes_UnaryOp(N, Lo, Hi);
473 SplitVecRes_BinOp(N, Lo, Hi);
477 // If Lo/Hi is null, the sub-method took care of registering results etc.
479 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
482 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
484 SDValue LHSLo, LHSHi;
485 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
486 SDValue RHSLo, RHSHi;
487 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
488 DebugLoc dl = N->getDebugLoc();
490 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
491 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
494 void DAGTypeLegalizer::SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
496 // We know the result is a vector. The input may be either a vector or a
499 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
500 DebugLoc dl = N->getDebugLoc();
502 SDValue InOp = N->getOperand(0);
503 EVT InVT = InOp.getValueType();
505 // Handle some special cases efficiently.
506 switch (getTypeAction(InVT)) {
508 assert(false && "Unknown type action!");
512 case ScalarizeVector:
516 // A scalar to vector conversion, where the scalar needs expansion.
517 // If the vector is being split in two then we can just convert the
520 GetExpandedOp(InOp, Lo, Hi);
521 if (TLI.isBigEndian())
523 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
524 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
529 // If the input is a vector that needs to be split, convert each split
530 // piece of the input now.
531 GetSplitVector(InOp, Lo, Hi);
532 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
533 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
537 // In the general case, convert the input to an integer and split it by hand.
538 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
539 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
540 if (TLI.isBigEndian())
541 std::swap(LoIntVT, HiIntVT);
543 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
545 if (TLI.isBigEndian())
547 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
548 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
551 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
554 DebugLoc dl = N->getDebugLoc();
555 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
556 unsigned LoNumElts = LoVT.getVectorNumElements();
557 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
558 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
560 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
561 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
564 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
566 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
567 DebugLoc dl = N->getDebugLoc();
568 unsigned NumSubvectors = N->getNumOperands() / 2;
569 if (NumSubvectors == 1) {
570 Lo = N->getOperand(0);
571 Hi = N->getOperand(1);
576 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
578 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
579 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
581 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
582 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
585 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
588 DebugLoc dl = N->getDebugLoc();
589 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
591 SDValue DTyOpLo = DAG.getValueType(LoVT);
592 SDValue DTyOpHi = DAG.getValueType(HiVT);
594 SDValue RndOp = N->getOperand(3);
595 SDValue SatOp = N->getOperand(4);
596 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
600 EVT InVT = N->getOperand(0).getValueType();
601 switch (getTypeAction(InVT)) {
602 default: llvm_unreachable("Unexpected type action!");
604 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
605 LoVT.getVectorNumElements());
606 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
607 DAG.getIntPtrConstant(0));
608 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
609 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
613 GetSplitVector(N->getOperand(0), VLo, VHi);
616 // If the result needs to be split and the input needs to be widened,
617 // the two types must have different lengths. Use the widened result
618 // and extract from it to do the split.
619 SDValue InOp = GetWidenedVector(N->getOperand(0));
620 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
621 LoVT.getVectorNumElements());
622 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
623 DAG.getIntPtrConstant(0));
624 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
625 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
630 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
631 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
633 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
635 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
639 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
641 SDValue Vec = N->getOperand(0);
642 SDValue Idx = N->getOperand(1);
643 EVT IdxVT = Idx.getValueType();
644 DebugLoc dl = N->getDebugLoc();
647 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
649 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
650 Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
651 DAG.getConstant(LoVT.getVectorNumElements(), IdxVT));
652 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, Idx);
655 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
657 DebugLoc dl = N->getDebugLoc();
658 GetSplitVector(N->getOperand(0), Lo, Hi);
659 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
660 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
663 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
665 SDValue LHSLo, LHSHi;
666 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
667 DebugLoc dl = N->getDebugLoc();
670 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
672 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
673 DAG.getValueType(LoVT));
674 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
675 DAG.getValueType(HiVT));
678 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
680 SDValue Vec = N->getOperand(0);
681 SDValue Elt = N->getOperand(1);
682 SDValue Idx = N->getOperand(2);
683 DebugLoc dl = N->getDebugLoc();
684 GetSplitVector(Vec, Lo, Hi);
686 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
687 unsigned IdxVal = CIdx->getZExtValue();
688 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
689 if (IdxVal < LoNumElts)
690 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
691 Lo.getValueType(), Lo, Elt, Idx);
693 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
694 DAG.getIntPtrConstant(IdxVal - LoNumElts));
698 // Spill the vector to the stack.
699 EVT VecVT = Vec.getValueType();
700 EVT EltVT = VecVT.getVectorElementType();
701 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
702 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, NULL, 0,
705 // Store the new element. This may be larger than the vector element type,
706 // so use a truncating store.
707 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
709 TLI.getTargetData()->getPrefTypeAlignment(VecVT.getTypeForEVT(*DAG.getContext()));
710 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
713 // Load the Lo part from the stack slot.
714 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, NULL, 0,
717 // Increment the pointer to the other part.
718 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
719 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
720 DAG.getIntPtrConstant(IncrementSize));
722 // Load the Hi part from the stack slot.
723 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, NULL, 0, false,
724 false, MinAlign(Alignment, IncrementSize));
727 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
730 DebugLoc dl = N->getDebugLoc();
731 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
732 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
733 Hi = DAG.getUNDEF(HiVT);
736 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
738 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
740 DebugLoc dl = LD->getDebugLoc();
741 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
743 ISD::LoadExtType ExtType = LD->getExtensionType();
744 SDValue Ch = LD->getChain();
745 SDValue Ptr = LD->getBasePtr();
746 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
747 const Value *SV = LD->getSrcValue();
748 int SVOffset = LD->getSrcValueOffset();
749 EVT MemoryVT = LD->getMemoryVT();
750 unsigned Alignment = LD->getOriginalAlignment();
751 bool isVolatile = LD->isVolatile();
752 bool isNonTemporal = LD->isNonTemporal();
754 EVT LoMemVT, HiMemVT;
755 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
757 Lo = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, LoVT, Ch, Ptr, Offset,
758 SV, SVOffset, LoMemVT, isVolatile, isNonTemporal, Alignment);
760 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
761 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
762 DAG.getIntPtrConstant(IncrementSize));
763 SVOffset += IncrementSize;
764 Hi = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, HiVT, Ch, Ptr, Offset,
765 SV, SVOffset, HiMemVT, isVolatile, isNonTemporal, Alignment);
767 // Build a factor node to remember that this load is independent of the
769 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
772 // Legalized the chain result - switch anything that used the old chain to
774 ReplaceValueWith(SDValue(LD, 1), Ch);
777 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
779 DebugLoc DL = N->getDebugLoc();
780 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
783 EVT InVT = N->getOperand(0).getValueType();
784 SDValue LL, LH, RL, RH;
785 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
786 LoVT.getVectorNumElements());
787 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
788 DAG.getIntPtrConstant(0));
789 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
790 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
792 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
793 DAG.getIntPtrConstant(0));
794 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
795 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
797 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
798 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
801 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
803 // Get the dest types - they may not match the input types, e.g. int_to_fp.
805 DebugLoc dl = N->getDebugLoc();
806 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
809 EVT InVT = N->getOperand(0).getValueType();
810 switch (getTypeAction(InVT)) {
811 default: llvm_unreachable("Unexpected type action!");
813 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
814 LoVT.getVectorNumElements());
815 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
816 DAG.getIntPtrConstant(0));
817 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
818 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
822 GetSplitVector(N->getOperand(0), Lo, Hi);
825 // If the result needs to be split and the input needs to be widened,
826 // the two types must have different lengths. Use the widened result
827 // and extract from it to do the split.
828 SDValue InOp = GetWidenedVector(N->getOperand(0));
829 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
830 LoVT.getVectorNumElements());
831 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
832 DAG.getIntPtrConstant(0));
833 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
834 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
839 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
840 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
843 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
844 SDValue &Lo, SDValue &Hi) {
845 // The low and high parts of the original input give four input vectors.
847 DebugLoc dl = N->getDebugLoc();
848 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
849 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
850 EVT NewVT = Inputs[0].getValueType();
851 unsigned NewElts = NewVT.getVectorNumElements();
853 // If Lo or Hi uses elements from at most two of the four input vectors, then
854 // express it as a vector shuffle of those two inputs. Otherwise extract the
855 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
856 SmallVector<int, 16> Ops;
857 for (unsigned High = 0; High < 2; ++High) {
858 SDValue &Output = High ? Hi : Lo;
860 // Build a shuffle mask for the output, discovering on the fly which
861 // input vectors to use as shuffle operands (recorded in InputUsed).
862 // If building a suitable shuffle vector proves too hard, then bail
863 // out with useBuildVector set.
864 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
865 unsigned FirstMaskIdx = High * NewElts;
866 bool useBuildVector = false;
867 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
868 // The mask element. This indexes into the input.
869 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
871 // The input vector this mask element indexes into.
872 unsigned Input = (unsigned)Idx / NewElts;
874 if (Input >= array_lengthof(Inputs)) {
875 // The mask element does not index into any input vector.
880 // Turn the index into an offset from the start of the input vector.
881 Idx -= Input * NewElts;
883 // Find or create a shuffle vector operand to hold this input.
885 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
886 if (InputUsed[OpNo] == Input) {
887 // This input vector is already an operand.
889 } else if (InputUsed[OpNo] == -1U) {
890 // Create a new operand for this input vector.
891 InputUsed[OpNo] = Input;
896 if (OpNo >= array_lengthof(InputUsed)) {
897 // More than two input vectors used! Give up on trying to create a
898 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
899 useBuildVector = true;
903 // Add the mask index for the new shuffle vector.
904 Ops.push_back(Idx + OpNo * NewElts);
907 if (useBuildVector) {
908 EVT EltVT = NewVT.getVectorElementType();
909 SmallVector<SDValue, 16> SVOps;
911 // Extract the input elements by hand.
912 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
913 // The mask element. This indexes into the input.
914 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
916 // The input vector this mask element indexes into.
917 unsigned Input = (unsigned)Idx / NewElts;
919 if (Input >= array_lengthof(Inputs)) {
920 // The mask element is "undef" or indexes off the end of the input.
921 SVOps.push_back(DAG.getUNDEF(EltVT));
925 // Turn the index into an offset from the start of the input vector.
926 Idx -= Input * NewElts;
928 // Extract the vector element by hand.
929 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
930 Inputs[Input], DAG.getIntPtrConstant(Idx)));
933 // Construct the Lo/Hi output using a BUILD_VECTOR.
934 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
935 } else if (InputUsed[0] == -1U) {
936 // No input vectors were used! The result is undefined.
937 Output = DAG.getUNDEF(NewVT);
939 SDValue Op0 = Inputs[InputUsed[0]];
940 // If only one input was used, use an undefined vector for the other.
941 SDValue Op1 = InputUsed[1] == -1U ?
942 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
943 // At least one input vector was used. Create a new shuffle vector.
944 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
952 //===----------------------------------------------------------------------===//
953 // Operand Vector Splitting
954 //===----------------------------------------------------------------------===//
956 /// SplitVectorOperand - This method is called when the specified operand of the
957 /// specified node is found to need vector splitting. At this point, all of the
958 /// result types of the node are known to be legal, but other operands of the
959 /// node may need legalization as well as the specified one.
960 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
961 DEBUG(dbgs() << "Split node operand: ";
964 SDValue Res = SDValue();
966 if (Res.getNode() == 0) {
967 switch (N->getOpcode()) {
970 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
974 llvm_unreachable("Do not know how to split this operator's operand!");
976 case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
977 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
978 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
980 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
986 case ISD::FP_TO_SINT:
987 case ISD::FP_TO_UINT:
988 case ISD::SINT_TO_FP:
989 case ISD::UINT_TO_FP:
991 case ISD::SIGN_EXTEND:
992 case ISD::ZERO_EXTEND:
993 case ISD::ANY_EXTEND:
994 Res = SplitVecOp_UnaryOp(N);
999 // If the result is null, the sub-method took care of registering results etc.
1000 if (!Res.getNode()) return false;
1002 // If the result is N, the sub-method updated N in place. Tell the legalizer
1004 if (Res.getNode() == N)
1007 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1008 "Invalid operand expansion");
1010 ReplaceValueWith(SDValue(N, 0), Res);
1014 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1015 // The result has a legal vector type, but the input needs splitting.
1016 EVT ResVT = N->getValueType(0);
1018 DebugLoc dl = N->getDebugLoc();
1019 GetSplitVector(N->getOperand(0), Lo, Hi);
1020 EVT InVT = Lo.getValueType();
1022 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1023 InVT.getVectorNumElements());
1025 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1026 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1028 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1031 SDValue DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
1032 // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will
1033 // end up being split all the way down to individual components. Convert the
1034 // split pieces into integers and reassemble.
1036 GetSplitVector(N->getOperand(0), Lo, Hi);
1037 Lo = BitConvertToInteger(Lo);
1038 Hi = BitConvertToInteger(Hi);
1040 if (TLI.isBigEndian())
1043 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0),
1044 JoinIntegers(Lo, Hi));
1047 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1048 // We know that the extracted result type is legal. For now, assume the index
1050 EVT SubVT = N->getValueType(0);
1051 SDValue Idx = N->getOperand(1);
1052 DebugLoc dl = N->getDebugLoc();
1054 GetSplitVector(N->getOperand(0), Lo, Hi);
1056 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1057 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1059 if (IdxVal < LoElts) {
1060 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1061 "Extracted subvector crosses vector split!");
1062 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1064 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1065 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1069 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1070 SDValue Vec = N->getOperand(0);
1071 SDValue Idx = N->getOperand(1);
1072 EVT VecVT = Vec.getValueType();
1074 if (isa<ConstantSDNode>(Idx)) {
1075 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1076 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1079 GetSplitVector(Vec, Lo, Hi);
1081 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1083 if (IdxVal < LoElts)
1084 return DAG.UpdateNodeOperands(SDValue(N, 0), Lo, Idx);
1085 return DAG.UpdateNodeOperands(SDValue(N, 0), Hi,
1086 DAG.getConstant(IdxVal - LoElts,
1087 Idx.getValueType()));
1090 // Store the vector to the stack.
1091 EVT EltVT = VecVT.getVectorElementType();
1092 DebugLoc dl = N->getDebugLoc();
1093 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1094 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
1095 const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
1096 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, SV, 0,
1099 // Load back the required element.
1100 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1101 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1102 SV, 0, EltVT, false, false, 0);
1105 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1106 assert(N->isUnindexed() && "Indexed store of vector?");
1107 assert(OpNo == 1 && "Can only split the stored value");
1108 DebugLoc dl = N->getDebugLoc();
1110 bool isTruncating = N->isTruncatingStore();
1111 SDValue Ch = N->getChain();
1112 SDValue Ptr = N->getBasePtr();
1113 int SVOffset = N->getSrcValueOffset();
1114 EVT MemoryVT = N->getMemoryVT();
1115 unsigned Alignment = N->getOriginalAlignment();
1116 bool isVol = N->isVolatile();
1117 bool isNT = N->isNonTemporal();
1119 GetSplitVector(N->getOperand(1), Lo, Hi);
1121 EVT LoMemVT, HiMemVT;
1122 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1124 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1127 Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1128 LoMemVT, isVol, isNT, Alignment);
1130 Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1131 isVol, isNT, Alignment);
1133 // Increment the pointer to the other half.
1134 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
1135 DAG.getIntPtrConstant(IncrementSize));
1136 SVOffset += IncrementSize;
1139 Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1140 HiMemVT, isVol, isNT, Alignment);
1142 Hi = DAG.getStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1143 isVol, isNT, Alignment);
1145 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
1149 //===----------------------------------------------------------------------===//
1150 // Result Vector Widening
1151 //===----------------------------------------------------------------------===//
1153 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1154 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1158 // See if the target wants to custom widen this node.
1159 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1162 SDValue Res = SDValue();
1163 switch (N->getOpcode()) {
1166 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1170 llvm_unreachable("Do not know how to widen the result of this operator!");
1172 case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break;
1173 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1174 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1175 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1176 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1177 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1178 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1179 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1180 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1181 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1182 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1183 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1184 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1185 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1186 case ISD::VECTOR_SHUFFLE:
1187 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1190 Res = WidenVecRes_VSETCC(N);
1197 case ISD::FCOPYSIGN:
1214 Res = WidenVecRes_Binary(N);
1220 Res = WidenVecRes_Shift(N);
1224 case ISD::FP_TO_SINT:
1225 case ISD::FP_TO_UINT:
1226 case ISD::SINT_TO_FP:
1227 case ISD::UINT_TO_FP:
1229 case ISD::SIGN_EXTEND:
1230 case ISD::ZERO_EXTEND:
1231 case ISD::ANY_EXTEND:
1232 Res = WidenVecRes_Convert(N);
1243 Res = WidenVecRes_Unary(N);
1247 // If Res is null, the sub-method took care of registering the result.
1249 SetWidenedVector(SDValue(N, ResNo), Res);
1252 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1253 // Binary op widening.
1254 unsigned Opcode = N->getOpcode();
1255 DebugLoc dl = N->getDebugLoc();
1256 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1257 EVT WidenEltVT = WidenVT.getVectorElementType();
1259 unsigned NumElts = VT.getVectorNumElements();
1260 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1261 NumElts = NumElts / 2;
1262 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1265 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1266 // Operation doesn't trap so just widen as normal.
1267 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1268 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1269 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1270 } else if (NumElts == 1) {
1271 // No legal vector version so unroll the vector operation and then widen.
1272 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1274 // Since the operation can trap, apply operation on the original vector.
1275 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1276 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1277 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1279 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1280 unsigned ConcatEnd = 0; // Current ConcatOps index.
1281 unsigned Idx = 0; // Current Idx into input vectors.
1282 while (CurNumElts != 0) {
1283 while (CurNumElts >= NumElts) {
1284 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1285 DAG.getIntPtrConstant(Idx));
1286 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1287 DAG.getIntPtrConstant(Idx));
1288 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1290 CurNumElts -= NumElts;
1294 NumElts = NumElts / 2;
1295 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1296 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1299 // Since we are using concat vector, build a vector from the scalar ops.
1300 SDValue VecOp = DAG.getUNDEF(PrevVecVT);
1301 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1302 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1303 InOp1, DAG.getIntPtrConstant(Idx));
1304 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1305 InOp2, DAG.getIntPtrConstant(Idx));
1306 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, PrevVecVT, VecOp,
1307 DAG.getNode(Opcode, dl, WidenEltVT, EOp1, EOp2),
1308 DAG.getIntPtrConstant(i));
1311 ConcatOps[ConcatEnd++] = VecOp;
1315 // Check to see if we have a single operation with the widen type.
1316 if (ConcatEnd == 1) {
1317 VT = ConcatOps[0].getValueType();
1319 return ConcatOps[0];
1322 // Rebuild vector to one with the widen type
1323 Idx = ConcatEnd - 1;
1325 VT = ConcatOps[Idx--].getValueType();
1326 while (Idx != 0 && ConcatOps[Idx].getValueType() == VT)
1329 VT = ConcatOps[Idx].getValueType();
1330 ConcatOps[Idx+1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, VT,
1331 &ConcatOps[Idx+1], ConcatEnd - Idx - 1);
1332 ConcatEnd = Idx + 2;
1336 unsigned NumOps = WidenVT.getVectorNumElements()/VT.getVectorNumElements();
1337 if (NumOps != ConcatEnd ) {
1338 SDValue UndefVal = DAG.getUNDEF(VT);
1339 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1340 ConcatOps[j] = UndefVal;
1342 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1346 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1347 SDValue InOp = N->getOperand(0);
1348 DebugLoc dl = N->getDebugLoc();
1350 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1351 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1353 EVT InVT = InOp.getValueType();
1354 EVT InEltVT = InVT.getVectorElementType();
1355 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1357 unsigned Opcode = N->getOpcode();
1358 unsigned InVTNumElts = InVT.getVectorNumElements();
1360 if (getTypeAction(InVT) == WidenVector) {
1361 InOp = GetWidenedVector(N->getOperand(0));
1362 InVT = InOp.getValueType();
1363 InVTNumElts = InVT.getVectorNumElements();
1364 if (InVTNumElts == WidenNumElts)
1365 return DAG.getNode(Opcode, dl, WidenVT, InOp);
1368 if (TLI.isTypeLegal(InWidenVT)) {
1369 // Because the result and the input are different vector types, widening
1370 // the result could create a legal type but widening the input might make
1371 // it an illegal type that might lead to repeatedly splitting the input
1372 // and then widening it. To avoid this, we widen the input only if
1373 // it results in a legal type.
1374 if (WidenNumElts % InVTNumElts == 0) {
1375 // Widen the input and call convert on the widened input vector.
1376 unsigned NumConcat = WidenNumElts/InVTNumElts;
1377 SmallVector<SDValue, 16> Ops(NumConcat);
1379 SDValue UndefVal = DAG.getUNDEF(InVT);
1380 for (unsigned i = 1; i != NumConcat; ++i)
1382 return DAG.getNode(Opcode, dl, WidenVT,
1383 DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT,
1384 &Ops[0], NumConcat));
1387 if (InVTNumElts % WidenNumElts == 0) {
1388 // Extract the input and convert the shorten input vector.
1389 return DAG.getNode(Opcode, dl, WidenVT,
1390 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT,
1391 InOp, DAG.getIntPtrConstant(0)));
1395 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1396 SmallVector<SDValue, 16> Ops(WidenNumElts);
1397 EVT EltVT = WidenVT.getVectorElementType();
1398 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1400 for (i=0; i < MinElts; ++i)
1401 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1402 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1403 DAG.getIntPtrConstant(i)));
1405 SDValue UndefVal = DAG.getUNDEF(EltVT);
1406 for (; i < WidenNumElts; ++i)
1409 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1412 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1413 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1414 SDValue InOp = GetWidenedVector(N->getOperand(0));
1415 SDValue ShOp = N->getOperand(1);
1417 EVT ShVT = ShOp.getValueType();
1418 if (getTypeAction(ShVT) == WidenVector) {
1419 ShOp = GetWidenedVector(ShOp);
1420 ShVT = ShOp.getValueType();
1422 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(), ShVT.getVectorElementType(),
1423 WidenVT.getVectorNumElements());
1424 if (ShVT != ShWidenVT)
1425 ShOp = ModifyToType(ShOp, ShWidenVT);
1427 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1430 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1431 // Unary op widening.
1432 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1433 SDValue InOp = GetWidenedVector(N->getOperand(0));
1434 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1437 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1438 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1439 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1440 cast<VTSDNode>(N->getOperand(1))->getVT()
1441 .getVectorElementType(),
1442 WidenVT.getVectorNumElements());
1443 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1444 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1445 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1448 SDValue DAGTypeLegalizer::WidenVecRes_BIT_CONVERT(SDNode *N) {
1449 SDValue InOp = N->getOperand(0);
1450 EVT InVT = InOp.getValueType();
1451 EVT VT = N->getValueType(0);
1452 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1453 DebugLoc dl = N->getDebugLoc();
1455 switch (getTypeAction(InVT)) {
1457 assert(false && "Unknown type action!");
1461 case PromoteInteger:
1462 // If the InOp is promoted to the same size, convert it. Otherwise,
1463 // fall out of the switch and widen the promoted input.
1464 InOp = GetPromotedInteger(InOp);
1465 InVT = InOp.getValueType();
1466 if (WidenVT.bitsEq(InVT))
1467 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1472 case ScalarizeVector:
1476 // If the InOp is widened to the same size, convert it. Otherwise, fall
1477 // out of the switch and widen the widened input.
1478 InOp = GetWidenedVector(InOp);
1479 InVT = InOp.getValueType();
1480 if (WidenVT.bitsEq(InVT))
1481 // The input widens to the same size. Convert to the widen value.
1482 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1486 unsigned WidenSize = WidenVT.getSizeInBits();
1487 unsigned InSize = InVT.getSizeInBits();
1488 if (WidenSize % InSize == 0) {
1489 // Determine new input vector type. The new input vector type will use
1490 // the same element type (if its a vector) or use the input type as a
1491 // vector. It is the same size as the type to widen to.
1493 unsigned NewNumElts = WidenSize / InSize;
1494 if (InVT.isVector()) {
1495 EVT InEltVT = InVT.getVectorElementType();
1496 NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenSize / InEltVT.getSizeInBits());
1498 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1501 if (TLI.isTypeLegal(NewInVT)) {
1502 // Because the result and the input are different vector types, widening
1503 // the result could create a legal type but widening the input might make
1504 // it an illegal type that might lead to repeatedly splitting the input
1505 // and then widening it. To avoid this, we widen the input only if
1506 // it results in a legal type.
1507 SmallVector<SDValue, 16> Ops(NewNumElts);
1508 SDValue UndefVal = DAG.getUNDEF(InVT);
1510 for (unsigned i = 1; i < NewNumElts; ++i)
1514 if (InVT.isVector())
1515 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1516 NewInVT, &Ops[0], NewNumElts);
1518 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1519 NewInVT, &Ops[0], NewNumElts);
1520 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, NewVec);
1524 return CreateStackStoreLoad(InOp, WidenVT);
1527 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1528 DebugLoc dl = N->getDebugLoc();
1529 // Build a vector with undefined for the new nodes.
1530 EVT VT = N->getValueType(0);
1531 EVT EltVT = VT.getVectorElementType();
1532 unsigned NumElts = VT.getVectorNumElements();
1534 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1535 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1537 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1538 NewOps.reserve(WidenNumElts);
1539 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1540 NewOps.push_back(DAG.getUNDEF(EltVT));
1542 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1545 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1546 EVT InVT = N->getOperand(0).getValueType();
1547 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1548 DebugLoc dl = N->getDebugLoc();
1549 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1550 unsigned NumOperands = N->getNumOperands();
1552 bool InputWidened = false; // Indicates we need to widen the input.
1553 if (getTypeAction(InVT) != WidenVector) {
1554 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1555 // Add undef vectors to widen to correct length.
1556 unsigned NumConcat = WidenVT.getVectorNumElements() /
1557 InVT.getVectorNumElements();
1558 SDValue UndefVal = DAG.getUNDEF(InVT);
1559 SmallVector<SDValue, 16> Ops(NumConcat);
1560 for (unsigned i=0; i < NumOperands; ++i)
1561 Ops[i] = N->getOperand(i);
1562 for (unsigned i = NumOperands; i != NumConcat; ++i)
1564 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1567 InputWidened = true;
1568 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1569 // The inputs and the result are widen to the same value.
1571 for (i=1; i < NumOperands; ++i)
1572 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1575 if (i > NumOperands)
1576 // Everything but the first operand is an UNDEF so just return the
1577 // widened first operand.
1578 return GetWidenedVector(N->getOperand(0));
1580 if (NumOperands == 2) {
1581 // Replace concat of two operands with a shuffle.
1582 SmallVector<int, 16> MaskOps(WidenNumElts);
1583 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1585 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1587 return DAG.getVectorShuffle(WidenVT, dl,
1588 GetWidenedVector(N->getOperand(0)),
1589 GetWidenedVector(N->getOperand(1)),
1595 // Fall back to use extracts and build vector.
1596 EVT EltVT = WidenVT.getVectorElementType();
1597 unsigned NumInElts = InVT.getVectorNumElements();
1598 SmallVector<SDValue, 16> Ops(WidenNumElts);
1600 for (unsigned i=0; i < NumOperands; ++i) {
1601 SDValue InOp = N->getOperand(i);
1603 InOp = GetWidenedVector(InOp);
1604 for (unsigned j=0; j < NumInElts; ++j)
1605 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1606 DAG.getIntPtrConstant(j));
1608 SDValue UndefVal = DAG.getUNDEF(EltVT);
1609 for (; Idx < WidenNumElts; ++Idx)
1610 Ops[Idx] = UndefVal;
1611 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1614 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1615 DebugLoc dl = N->getDebugLoc();
1616 SDValue InOp = N->getOperand(0);
1617 SDValue RndOp = N->getOperand(3);
1618 SDValue SatOp = N->getOperand(4);
1620 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1621 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1623 EVT InVT = InOp.getValueType();
1624 EVT InEltVT = InVT.getVectorElementType();
1625 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1627 SDValue DTyOp = DAG.getValueType(WidenVT);
1628 SDValue STyOp = DAG.getValueType(InWidenVT);
1629 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1631 unsigned InVTNumElts = InVT.getVectorNumElements();
1632 if (getTypeAction(InVT) == WidenVector) {
1633 InOp = GetWidenedVector(InOp);
1634 InVT = InOp.getValueType();
1635 InVTNumElts = InVT.getVectorNumElements();
1636 if (InVTNumElts == WidenNumElts)
1637 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1641 if (TLI.isTypeLegal(InWidenVT)) {
1642 // Because the result and the input are different vector types, widening
1643 // the result could create a legal type but widening the input might make
1644 // it an illegal type that might lead to repeatedly splitting the input
1645 // and then widening it. To avoid this, we widen the input only if
1646 // it results in a legal type.
1647 if (WidenNumElts % InVTNumElts == 0) {
1648 // Widen the input and call convert on the widened input vector.
1649 unsigned NumConcat = WidenNumElts/InVTNumElts;
1650 SmallVector<SDValue, 16> Ops(NumConcat);
1652 SDValue UndefVal = DAG.getUNDEF(InVT);
1653 for (unsigned i = 1; i != NumConcat; ++i) {
1656 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1657 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1661 if (InVTNumElts % WidenNumElts == 0) {
1662 // Extract the input and convert the shorten input vector.
1663 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1664 DAG.getIntPtrConstant(0));
1665 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1670 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1671 SmallVector<SDValue, 16> Ops(WidenNumElts);
1672 EVT EltVT = WidenVT.getVectorElementType();
1673 DTyOp = DAG.getValueType(EltVT);
1674 STyOp = DAG.getValueType(InEltVT);
1676 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1678 for (i=0; i < MinElts; ++i) {
1679 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1680 DAG.getIntPtrConstant(i));
1681 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1685 SDValue UndefVal = DAG.getUNDEF(EltVT);
1686 for (; i < WidenNumElts; ++i)
1689 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1692 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1693 EVT VT = N->getValueType(0);
1694 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1695 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1696 SDValue InOp = N->getOperand(0);
1697 SDValue Idx = N->getOperand(1);
1698 DebugLoc dl = N->getDebugLoc();
1700 if (getTypeAction(InOp.getValueType()) == WidenVector)
1701 InOp = GetWidenedVector(InOp);
1703 EVT InVT = InOp.getValueType();
1705 ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
1707 unsigned IdxVal = CIdx->getZExtValue();
1708 // Check if we can just return the input vector after widening.
1709 if (IdxVal == 0 && InVT == WidenVT)
1712 // Check if we can extract from the vector.
1713 unsigned InNumElts = InVT.getVectorNumElements();
1714 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1715 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1718 // We could try widening the input to the right length but for now, extract
1719 // the original elements, fill the rest with undefs and build a vector.
1720 SmallVector<SDValue, 16> Ops(WidenNumElts);
1721 EVT EltVT = VT.getVectorElementType();
1722 EVT IdxVT = Idx.getValueType();
1723 unsigned NumElts = VT.getVectorNumElements();
1726 unsigned IdxVal = CIdx->getZExtValue();
1727 for (i=0; i < NumElts; ++i)
1728 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1729 DAG.getConstant(IdxVal+i, IdxVT));
1731 Ops[0] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, Idx);
1732 for (i=1; i < NumElts; ++i) {
1733 SDValue NewIdx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
1734 DAG.getConstant(i, IdxVT));
1735 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, NewIdx);
1739 SDValue UndefVal = DAG.getUNDEF(EltVT);
1740 for (; i < WidenNumElts; ++i)
1742 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1745 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1746 SDValue InOp = GetWidenedVector(N->getOperand(0));
1747 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1748 InOp.getValueType(), InOp,
1749 N->getOperand(1), N->getOperand(2));
1752 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1753 LoadSDNode *LD = cast<LoadSDNode>(N);
1754 ISD::LoadExtType ExtType = LD->getExtensionType();
1757 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1758 if (ExtType != ISD::NON_EXTLOAD)
1759 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1761 Result = GenWidenVectorLoads(LdChain, LD);
1763 // If we generate a single load, we can use that for the chain. Otherwise,
1764 // build a factor node to remember the multiple loads are independent and
1767 if (LdChain.size() == 1)
1768 NewChain = LdChain[0];
1770 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1771 &LdChain[0], LdChain.size());
1773 // Modified the chain - switch anything that used the old chain to use
1775 ReplaceValueWith(SDValue(N, 1), NewChain);
1780 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1781 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1782 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1783 WidenVT, N->getOperand(0));
1786 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1787 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1788 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1790 SDValue Cond1 = N->getOperand(0);
1791 EVT CondVT = Cond1.getValueType();
1792 if (CondVT.isVector()) {
1793 EVT CondEltVT = CondVT.getVectorElementType();
1794 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(), CondEltVT, WidenNumElts);
1795 if (getTypeAction(CondVT) == WidenVector)
1796 Cond1 = GetWidenedVector(Cond1);
1798 if (Cond1.getValueType() != CondWidenVT)
1799 Cond1 = ModifyToType(Cond1, CondWidenVT);
1802 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1803 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1804 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1805 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1806 WidenVT, Cond1, InOp1, InOp2);
1809 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1810 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1811 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1812 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1813 InOp1.getValueType(), N->getOperand(0),
1814 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1817 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1818 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1819 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1820 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1821 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1822 InOp1, InOp2, N->getOperand(2));
1825 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1826 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1827 return DAG.getUNDEF(WidenVT);
1830 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1831 EVT VT = N->getValueType(0);
1832 DebugLoc dl = N->getDebugLoc();
1834 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1835 unsigned NumElts = VT.getVectorNumElements();
1836 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1838 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1839 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1841 // Adjust mask based on new input vector length.
1842 SmallVector<int, 16> NewMask;
1843 for (unsigned i = 0; i != NumElts; ++i) {
1844 int Idx = N->getMaskElt(i);
1845 if (Idx < (int)NumElts)
1846 NewMask.push_back(Idx);
1848 NewMask.push_back(Idx - NumElts + WidenNumElts);
1850 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1851 NewMask.push_back(-1);
1852 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1855 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1856 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1857 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1859 SDValue InOp1 = N->getOperand(0);
1860 EVT InVT = InOp1.getValueType();
1861 assert(InVT.isVector() && "can not widen non vector type");
1862 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), WidenNumElts);
1863 InOp1 = GetWidenedVector(InOp1);
1864 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1866 // Assume that the input and output will be widen appropriately. If not,
1867 // we will have to unroll it at some point.
1868 assert(InOp1.getValueType() == WidenInVT &&
1869 InOp2.getValueType() == WidenInVT &&
1870 "Input not widened to expected type!");
1871 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1872 WidenVT, InOp1, InOp2, N->getOperand(2));
1876 //===----------------------------------------------------------------------===//
1877 // Widen Vector Operand
1878 //===----------------------------------------------------------------------===//
1879 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1880 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1883 SDValue Res = SDValue();
1885 switch (N->getOpcode()) {
1888 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
1892 llvm_unreachable("Do not know how to widen this operator's operand!");
1894 case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break;
1895 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
1896 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
1897 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
1898 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
1901 case ISD::FP_TO_SINT:
1902 case ISD::FP_TO_UINT:
1903 case ISD::SINT_TO_FP:
1904 case ISD::UINT_TO_FP:
1906 case ISD::SIGN_EXTEND:
1907 case ISD::ZERO_EXTEND:
1908 case ISD::ANY_EXTEND:
1909 Res = WidenVecOp_Convert(N);
1913 // If Res is null, the sub-method took care of registering the result.
1914 if (!Res.getNode()) return false;
1916 // If the result is N, the sub-method updated N in place. Tell the legalizer
1918 if (Res.getNode() == N)
1922 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1923 "Invalid operand expansion");
1925 ReplaceValueWith(SDValue(N, 0), Res);
1929 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
1930 // Since the result is legal and the input is illegal, it is unlikely
1931 // that we can fix the input to a legal type so unroll the convert
1932 // into some scalar code and create a nasty build vector.
1933 EVT VT = N->getValueType(0);
1934 EVT EltVT = VT.getVectorElementType();
1935 DebugLoc dl = N->getDebugLoc();
1936 unsigned NumElts = VT.getVectorNumElements();
1937 SDValue InOp = N->getOperand(0);
1938 if (getTypeAction(InOp.getValueType()) == WidenVector)
1939 InOp = GetWidenedVector(InOp);
1940 EVT InVT = InOp.getValueType();
1941 EVT InEltVT = InVT.getVectorElementType();
1943 unsigned Opcode = N->getOpcode();
1944 SmallVector<SDValue, 16> Ops(NumElts);
1945 for (unsigned i=0; i < NumElts; ++i)
1946 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1947 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1948 DAG.getIntPtrConstant(i)));
1950 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
1953 SDValue DAGTypeLegalizer::WidenVecOp_BIT_CONVERT(SDNode *N) {
1954 EVT VT = N->getValueType(0);
1955 SDValue InOp = GetWidenedVector(N->getOperand(0));
1956 EVT InWidenVT = InOp.getValueType();
1957 DebugLoc dl = N->getDebugLoc();
1959 // Check if we can convert between two legal vector types and extract.
1960 unsigned InWidenSize = InWidenVT.getSizeInBits();
1961 unsigned Size = VT.getSizeInBits();
1962 if (InWidenSize % Size == 0 && !VT.isVector()) {
1963 unsigned NewNumElts = InWidenSize / Size;
1964 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
1965 if (TLI.isTypeLegal(NewVT)) {
1966 SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp);
1967 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
1968 DAG.getIntPtrConstant(0));
1972 return CreateStackStoreLoad(InOp, VT);
1975 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
1976 // If the input vector is not legal, it is likely that we will not find a
1977 // legal vector of the same size. Replace the concatenate vector with a
1978 // nasty build vector.
1979 EVT VT = N->getValueType(0);
1980 EVT EltVT = VT.getVectorElementType();
1981 DebugLoc dl = N->getDebugLoc();
1982 unsigned NumElts = VT.getVectorNumElements();
1983 SmallVector<SDValue, 16> Ops(NumElts);
1985 EVT InVT = N->getOperand(0).getValueType();
1986 unsigned NumInElts = InVT.getVectorNumElements();
1989 unsigned NumOperands = N->getNumOperands();
1990 for (unsigned i=0; i < NumOperands; ++i) {
1991 SDValue InOp = N->getOperand(i);
1992 if (getTypeAction(InOp.getValueType()) == WidenVector)
1993 InOp = GetWidenedVector(InOp);
1994 for (unsigned j=0; j < NumInElts; ++j)
1995 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1996 DAG.getIntPtrConstant(j));
1998 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2001 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2002 SDValue InOp = GetWidenedVector(N->getOperand(0));
2003 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2004 N->getValueType(0), InOp, N->getOperand(1));
2007 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2008 SDValue InOp = GetWidenedVector(N->getOperand(0));
2009 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2010 N->getValueType(0), InOp, N->getOperand(1));
2013 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2014 // We have to widen the value but we want only to store the original
2016 StoreSDNode *ST = cast<StoreSDNode>(N);
2018 SmallVector<SDValue, 16> StChain;
2019 if (ST->isTruncatingStore())
2020 GenWidenVectorTruncStores(StChain, ST);
2022 GenWidenVectorStores(StChain, ST);
2024 if (StChain.size() == 1)
2027 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2028 MVT::Other,&StChain[0],StChain.size());
2031 //===----------------------------------------------------------------------===//
2032 // Vector Widening Utilities
2033 //===----------------------------------------------------------------------===//
2035 // Utility function to find the type to chop up a widen vector for load/store
2036 // TLI: Target lowering used to determine legal types.
2037 // Width: Width left need to load/store.
2038 // WidenVT: The widen vector type to load to/store from
2039 // Align: If 0, don't allow use of a wider type
2040 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2042 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2043 unsigned Width, EVT WidenVT,
2044 unsigned Align = 0, unsigned WidenEx = 0) {
2045 EVT WidenEltVT = WidenVT.getVectorElementType();
2046 unsigned WidenWidth = WidenVT.getSizeInBits();
2047 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2048 unsigned AlignInBits = Align*8;
2050 // If we have one element to load/store, return it.
2051 EVT RetVT = WidenEltVT;
2052 if (Width == WidenEltWidth)
2055 // See if there is larger legal integer than the element type to load/store
2057 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2058 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2059 EVT MemVT((MVT::SimpleValueType) VT);
2060 unsigned MemVTWidth = MemVT.getSizeInBits();
2061 if (MemVT.getSizeInBits() <= WidenEltWidth)
2063 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2064 (MemVTWidth <= Width ||
2065 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2071 // See if there is a larger vector type to load/store that has the same vector
2072 // element type and is evenly divisible with the WidenVT.
2073 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2074 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2075 EVT MemVT = (MVT::SimpleValueType) VT;
2076 unsigned MemVTWidth = MemVT.getSizeInBits();
2077 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2078 (WidenWidth % MemVTWidth) == 0 &&
2079 (MemVTWidth <= Width ||
2080 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2081 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2089 // Builds a vector type from scalar loads
2090 // VecTy: Resulting Vector type
2091 // LDOps: Load operators to build a vector type
2092 // [Start,End) the list of loads to use.
2093 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2094 SmallVector<SDValue, 16>& LdOps,
2095 unsigned Start, unsigned End) {
2096 DebugLoc dl = LdOps[Start].getDebugLoc();
2097 EVT LdTy = LdOps[Start].getValueType();
2098 unsigned Width = VecTy.getSizeInBits();
2099 unsigned NumElts = Width / LdTy.getSizeInBits();
2100 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2103 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2105 for (unsigned i = Start + 1; i != End; ++i) {
2106 EVT NewLdTy = LdOps[i].getValueType();
2107 if (NewLdTy != LdTy) {
2108 NumElts = Width / NewLdTy.getSizeInBits();
2109 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2110 VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, VecOp);
2111 // Readjust position and vector position based on new load type
2112 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2115 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2116 DAG.getIntPtrConstant(Idx++));
2118 return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
2121 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
2123 // The strategy assumes that we can efficiently load powers of two widths.
2124 // The routines chops the vector into the largest vector loads with the same
2125 // element type or scalar loads and then recombines it to the widen vector
2127 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
2128 unsigned WidenWidth = WidenVT.getSizeInBits();
2129 EVT LdVT = LD->getMemoryVT();
2130 DebugLoc dl = LD->getDebugLoc();
2131 assert(LdVT.isVector() && WidenVT.isVector());
2132 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2135 SDValue Chain = LD->getChain();
2136 SDValue BasePtr = LD->getBasePtr();
2137 int SVOffset = LD->getSrcValueOffset();
2138 unsigned Align = LD->getAlignment();
2139 bool isVolatile = LD->isVolatile();
2140 bool isNonTemporal = LD->isNonTemporal();
2141 const Value *SV = LD->getSrcValue();
2143 int LdWidth = LdVT.getSizeInBits();
2144 int WidthDiff = WidenWidth - LdWidth; // Difference
2145 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2147 // Find the vector type that can load from.
2148 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2149 int NewVTWidth = NewVT.getSizeInBits();
2150 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV, SVOffset,
2151 isVolatile, isNonTemporal, Align);
2152 LdChain.push_back(LdOp.getValue(1));
2154 // Check if we can load the element with one instruction
2155 if (LdWidth <= NewVTWidth) {
2156 if (NewVT.isVector()) {
2157 if (NewVT != WidenVT) {
2158 assert(WidenWidth % NewVTWidth == 0);
2159 unsigned NumConcat = WidenWidth / NewVTWidth;
2160 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2161 SDValue UndefVal = DAG.getUNDEF(NewVT);
2162 ConcatOps[0] = LdOp;
2163 for (unsigned i = 1; i != NumConcat; ++i)
2164 ConcatOps[i] = UndefVal;
2165 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2170 unsigned NumElts = WidenWidth / NewVTWidth;
2171 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2172 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2173 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp);
2177 // Load vector by using multiple loads from largest vector to scalar
2178 SmallVector<SDValue, 16> LdOps;
2179 LdOps.push_back(LdOp);
2181 LdWidth -= NewVTWidth;
2182 unsigned Offset = 0;
2184 while (LdWidth > 0) {
2185 unsigned Increment = NewVTWidth / 8;
2186 Offset += Increment;
2187 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2188 DAG.getIntPtrConstant(Increment));
2190 if (LdWidth < NewVTWidth) {
2191 // Our current type we are using is too large, find a better size
2192 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2193 NewVTWidth = NewVT.getSizeInBits();
2196 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV,
2197 SVOffset+Offset, isVolatile,
2198 isNonTemporal, MinAlign(Align, Increment));
2199 LdChain.push_back(LdOp.getValue(1));
2200 LdOps.push_back(LdOp);
2202 LdWidth -= NewVTWidth;
2205 // Build the vector from the loads operations
2206 unsigned End = LdOps.size();
2207 if (LdOps[0].getValueType().isVector()) {
2208 // If the load contains vectors, build the vector using concat vector.
2209 // All of the vectors used to loads are power of 2 and the scalars load
2210 // can be combined to make a power of 2 vector.
2211 SmallVector<SDValue, 16> ConcatOps(End);
2214 EVT LdTy = LdOps[i].getValueType();
2215 // First combine the scalar loads to a vector
2216 if (!LdTy.isVector()) {
2217 for (--i; i >= 0; --i) {
2218 LdTy = LdOps[i].getValueType();
2219 if (LdTy.isVector())
2222 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2224 ConcatOps[--Idx] = LdOps[i];
2225 for (--i; i >= 0; --i) {
2226 EVT NewLdTy = LdOps[i].getValueType();
2227 if (NewLdTy != LdTy) {
2228 // Create a larger vector
2229 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2230 &ConcatOps[Idx], End - Idx);
2234 ConcatOps[--Idx] = LdOps[i];
2237 if (WidenWidth != LdTy.getSizeInBits()*(End - Idx)) {
2238 // We need to fill the rest with undefs to build the vector
2239 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2240 SmallVector<SDValue, 16> WidenOps(NumOps);
2241 SDValue UndefVal = DAG.getUNDEF(LdTy);
2243 for (; i != End-Idx; ++i)
2244 WidenOps[i] = ConcatOps[Idx+i];
2245 for (; i != NumOps; ++i)
2246 WidenOps[i] = UndefVal;
2247 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2249 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2250 &ConcatOps[Idx], End - Idx);
2251 } else // All the loads are scalar loads.
2252 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2256 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2258 ISD::LoadExtType ExtType) {
2259 // For extension loads, it may not be more efficient to chop up the vector
2260 // and then extended it. Instead, we unroll the load and build a new vector.
2261 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2262 EVT LdVT = LD->getMemoryVT();
2263 DebugLoc dl = LD->getDebugLoc();
2264 assert(LdVT.isVector() && WidenVT.isVector());
2267 SDValue Chain = LD->getChain();
2268 SDValue BasePtr = LD->getBasePtr();
2269 int SVOffset = LD->getSrcValueOffset();
2270 unsigned Align = LD->getAlignment();
2271 bool isVolatile = LD->isVolatile();
2272 bool isNonTemporal = LD->isNonTemporal();
2273 const Value *SV = LD->getSrcValue();
2275 EVT EltVT = WidenVT.getVectorElementType();
2276 EVT LdEltVT = LdVT.getVectorElementType();
2277 unsigned NumElts = LdVT.getVectorNumElements();
2279 // Load each element and widen
2280 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2281 SmallVector<SDValue, 16> Ops(WidenNumElts);
2282 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2283 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, SV, SVOffset,
2284 LdEltVT, isVolatile, isNonTemporal, Align);
2285 LdChain.push_back(Ops[0].getValue(1));
2286 unsigned i = 0, Offset = Increment;
2287 for (i=1; i < NumElts; ++i, Offset += Increment) {
2288 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2289 BasePtr, DAG.getIntPtrConstant(Offset));
2290 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, SV,
2291 SVOffset + Offset, LdEltVT, isVolatile,
2292 isNonTemporal, Align);
2293 LdChain.push_back(Ops[i].getValue(1));
2296 // Fill the rest with undefs
2297 SDValue UndefVal = DAG.getUNDEF(EltVT);
2298 for (; i != WidenNumElts; ++i)
2301 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2305 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2307 // The strategy assumes that we can efficiently store powers of two widths.
2308 // The routines chops the vector into the largest vector stores with the same
2309 // element type or scalar stores.
2310 SDValue Chain = ST->getChain();
2311 SDValue BasePtr = ST->getBasePtr();
2312 const Value *SV = ST->getSrcValue();
2313 int SVOffset = ST->getSrcValueOffset();
2314 unsigned Align = ST->getAlignment();
2315 bool isVolatile = ST->isVolatile();
2316 bool isNonTemporal = ST->isNonTemporal();
2317 SDValue ValOp = GetWidenedVector(ST->getValue());
2318 DebugLoc dl = ST->getDebugLoc();
2320 EVT StVT = ST->getMemoryVT();
2321 unsigned StWidth = StVT.getSizeInBits();
2322 EVT ValVT = ValOp.getValueType();
2323 unsigned ValWidth = ValVT.getSizeInBits();
2324 EVT ValEltVT = ValVT.getVectorElementType();
2325 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2326 assert(StVT.getVectorElementType() == ValEltVT);
2328 int Idx = 0; // current index to store
2329 unsigned Offset = 0; // offset from base to store
2330 while (StWidth != 0) {
2331 // Find the largest vector type we can store with
2332 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2333 unsigned NewVTWidth = NewVT.getSizeInBits();
2334 unsigned Increment = NewVTWidth / 8;
2335 if (NewVT.isVector()) {
2336 unsigned NumVTElts = NewVT.getVectorNumElements();
2338 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2339 DAG.getIntPtrConstant(Idx));
2340 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2341 SVOffset + Offset, isVolatile,
2343 MinAlign(Align, Offset)));
2344 StWidth -= NewVTWidth;
2345 Offset += Increment;
2347 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2348 DAG.getIntPtrConstant(Increment));
2349 } while (StWidth != 0 && StWidth >= NewVTWidth);
2351 // Cast the vector to the scalar type we can store
2352 unsigned NumElts = ValWidth / NewVTWidth;
2353 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2354 SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, ValOp);
2355 // Readjust index position based on new vector type
2356 Idx = Idx * ValEltWidth / NewVTWidth;
2358 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2359 DAG.getIntPtrConstant(Idx++));
2360 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2361 SVOffset + Offset, isVolatile,
2362 isNonTemporal, MinAlign(Align, Offset)));
2363 StWidth -= NewVTWidth;
2364 Offset += Increment;
2365 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2366 DAG.getIntPtrConstant(Increment));
2367 } while (StWidth != 0 && StWidth >= NewVTWidth);
2368 // Restore index back to be relative to the original widen element type
2369 Idx = Idx * NewVTWidth / ValEltWidth;
2375 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2377 // For extension loads, it may not be more efficient to truncate the vector
2378 // and then store it. Instead, we extract each element and then store it.
2379 SDValue Chain = ST->getChain();
2380 SDValue BasePtr = ST->getBasePtr();
2381 const Value *SV = ST->getSrcValue();
2382 int SVOffset = ST->getSrcValueOffset();
2383 unsigned Align = ST->getAlignment();
2384 bool isVolatile = ST->isVolatile();
2385 bool isNonTemporal = ST->isNonTemporal();
2386 SDValue ValOp = GetWidenedVector(ST->getValue());
2387 DebugLoc dl = ST->getDebugLoc();
2389 EVT StVT = ST->getMemoryVT();
2390 EVT ValVT = ValOp.getValueType();
2392 // It must be true that we the widen vector type is bigger than where
2393 // we need to store.
2394 assert(StVT.isVector() && ValOp.getValueType().isVector());
2395 assert(StVT.bitsLT(ValOp.getValueType()));
2397 // For truncating stores, we can not play the tricks of chopping legal
2398 // vector types and bit cast it to the right type. Instead, we unroll
2400 EVT StEltVT = StVT.getVectorElementType();
2401 EVT ValEltVT = ValVT.getVectorElementType();
2402 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2403 unsigned NumElts = StVT.getVectorNumElements();
2404 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2405 DAG.getIntPtrConstant(0));
2406 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, SV,
2408 isVolatile, isNonTemporal, Align));
2409 unsigned Offset = Increment;
2410 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2411 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2412 BasePtr, DAG.getIntPtrConstant(Offset));
2413 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2414 DAG.getIntPtrConstant(0));
2415 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, SV,
2416 SVOffset + Offset, StEltVT,
2417 isVolatile, isNonTemporal,
2418 MinAlign(Align, Offset)));
2422 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2423 /// input vector must have the same element type as NVT.
2424 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2425 // Note that InOp might have been widened so it might already have
2426 // the right width or it might need be narrowed.
2427 EVT InVT = InOp.getValueType();
2428 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2429 "input and widen element type must match");
2430 DebugLoc dl = InOp.getDebugLoc();
2432 // Check if InOp already has the right width.
2436 unsigned InNumElts = InVT.getVectorNumElements();
2437 unsigned WidenNumElts = NVT.getVectorNumElements();
2438 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2439 unsigned NumConcat = WidenNumElts / InNumElts;
2440 SmallVector<SDValue, 16> Ops(NumConcat);
2441 SDValue UndefVal = DAG.getUNDEF(InVT);
2443 for (unsigned i = 1; i != NumConcat; ++i)
2446 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2449 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2450 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2451 DAG.getIntPtrConstant(0));
2453 // Fall back to extract and build.
2454 SmallVector<SDValue, 16> Ops(WidenNumElts);
2455 EVT EltVT = NVT.getVectorElementType();
2456 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2458 for (Idx = 0; Idx < MinNumElts; ++Idx)
2459 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2460 DAG.getIntPtrConstant(Idx));
2462 SDValue UndefVal = DAG.getUNDEF(EltVT);
2463 for ( ; Idx < WidenNumElts; ++Idx)
2464 Ops[Idx] = UndefVal;
2465 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);