1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
90 case ISD::SIGN_EXTEND:
94 case ISD::ZERO_EXTEND:
95 R = ScalarizeVecRes_UnaryOp(N);
118 R = ScalarizeVecRes_BinOp(N);
121 R = ScalarizeVecRes_TernaryOp(N);
125 // If R is null, the sub-method took care of registering the result.
127 SetScalarizedVector(SDValue(N, ResNo), R);
130 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
131 SDValue LHS = GetScalarizedVector(N->getOperand(0));
132 SDValue RHS = GetScalarizedVector(N->getOperand(1));
133 return DAG.getNode(N->getOpcode(), SDLoc(N),
134 LHS.getValueType(), LHS, RHS);
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
138 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
139 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
140 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
141 return DAG.getNode(N->getOpcode(), SDLoc(N),
142 Op0.getValueType(), Op0, Op1, Op2);
145 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
147 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
148 return GetScalarizedVector(Op);
151 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
152 EVT NewVT = N->getValueType(0).getVectorElementType();
153 return DAG.getNode(ISD::BITCAST, SDLoc(N),
154 NewVT, N->getOperand(0));
157 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 SDValue InOp = N->getOperand(0);
160 // The BUILD_VECTOR operands may be of wider element types and
161 // we may need to truncate them back to the requested return type.
162 if (EltVT.isInteger())
163 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
167 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
168 EVT NewVT = N->getValueType(0).getVectorElementType();
169 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
170 return DAG.getConvertRndSat(NewVT, SDLoc(N),
171 Op0, DAG.getValueType(NewVT),
172 DAG.getValueType(Op0.getValueType()),
175 cast<CvtRndSatSDNode>(N)->getCvtCode());
178 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 N->getValueType(0).getVectorElementType(),
181 N->getOperand(0), N->getOperand(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
185 EVT NewVT = N->getValueType(0).getVectorElementType();
186 SDValue Op = GetScalarizedVector(N->getOperand(0));
187 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
188 NewVT, Op, N->getOperand(1));
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
192 SDValue Op = GetScalarizedVector(N->getOperand(0));
193 return DAG.getNode(ISD::FPOWI, SDLoc(N),
194 Op.getValueType(), Op, N->getOperand(1));
197 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
198 // The value to insert may have a wider type than the vector element type,
199 // so be sure to truncate it to the element type if necessary.
200 SDValue Op = N->getOperand(1);
201 EVT EltVT = N->getValueType(0).getVectorElementType();
202 if (Op.getValueType() != EltVT)
203 // FIXME: Can this happen for floating point types?
204 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
208 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
209 assert(N->isUnindexed() && "Indexed vector load?");
211 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
212 N->getExtensionType(),
213 N->getValueType(0).getVectorElementType(),
215 N->getChain(), N->getBasePtr(),
216 DAG.getUNDEF(N->getBasePtr().getValueType()),
218 N->getMemoryVT().getVectorElementType(),
219 N->isVolatile(), N->isNonTemporal(),
220 N->isInvariant(), N->getOriginalAlignment(),
223 // Legalized the chain result - switch anything that used the old chain to
225 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
229 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
230 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
231 EVT DestVT = N->getValueType(0).getVectorElementType();
232 SDValue Op = GetScalarizedVector(N->getOperand(0));
233 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
236 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
237 EVT EltVT = N->getValueType(0).getVectorElementType();
238 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
239 SDValue LHS = GetScalarizedVector(N->getOperand(0));
240 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
241 LHS, DAG.getValueType(ExtVT));
244 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
245 // If the operand is wider than the vector element type then it is implicitly
246 // truncated. Make that explicit here.
247 EVT EltVT = N->getValueType(0).getVectorElementType();
248 SDValue InOp = N->getOperand(0);
249 if (InOp.getValueType() != EltVT)
250 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
254 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
255 SDValue Cond = GetScalarizedVector(N->getOperand(0));
256 SDValue LHS = GetScalarizedVector(N->getOperand(1));
257 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
258 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
259 if (ScalarBool != VecBool) {
260 EVT CondVT = Cond.getValueType();
261 switch (ScalarBool) {
262 case TargetLowering::UndefinedBooleanContent:
264 case TargetLowering::ZeroOrOneBooleanContent:
265 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
266 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
267 // Vector read from all ones, scalar expects a single 1 so mask.
268 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
269 Cond, DAG.getConstant(1, CondVT));
271 case TargetLowering::ZeroOrNegativeOneBooleanContent:
272 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
273 VecBool == TargetLowering::ZeroOrOneBooleanContent);
274 // Vector reads from a one, scalar from all ones so sign extend.
275 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
276 Cond, DAG.getValueType(MVT::i1));
281 return DAG.getSelect(SDLoc(N),
282 LHS.getValueType(), Cond, LHS,
283 GetScalarizedVector(N->getOperand(2)));
286 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
287 SDValue LHS = GetScalarizedVector(N->getOperand(1));
288 return DAG.getSelect(SDLoc(N),
289 LHS.getValueType(), N->getOperand(0), LHS,
290 GetScalarizedVector(N->getOperand(2)));
293 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
294 SDValue LHS = GetScalarizedVector(N->getOperand(2));
295 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
296 N->getOperand(0), N->getOperand(1),
297 LHS, GetScalarizedVector(N->getOperand(3)),
301 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
302 assert(N->getValueType(0).isVector() ==
303 N->getOperand(0).getValueType().isVector() &&
304 "Scalar/Vector type mismatch");
306 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
308 SDValue LHS = GetScalarizedVector(N->getOperand(0));
309 SDValue RHS = GetScalarizedVector(N->getOperand(1));
312 // Turn it into a scalar SETCC.
313 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
316 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
317 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
320 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
321 // Figure out if the scalar is the LHS or RHS and return it.
322 SDValue Arg = N->getOperand(2).getOperand(0);
323 if (Arg.getOpcode() == ISD::UNDEF)
324 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
325 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
326 return GetScalarizedVector(N->getOperand(Op));
329 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
330 assert(N->getValueType(0).isVector() &&
331 N->getOperand(0).getValueType().isVector() &&
332 "Operand types must be vectors");
334 SDValue LHS = GetScalarizedVector(N->getOperand(0));
335 SDValue RHS = GetScalarizedVector(N->getOperand(1));
336 EVT NVT = N->getValueType(0).getVectorElementType();
339 // Turn it into a scalar SETCC.
340 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
342 // Vectors may have a different boolean contents to scalars. Promote the
343 // value appropriately.
344 ISD::NodeType ExtendCode =
345 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
346 return DAG.getNode(ExtendCode, DL, NVT, Res);
350 //===----------------------------------------------------------------------===//
351 // Operand Vector Scalarization <1 x ty> -> ty.
352 //===----------------------------------------------------------------------===//
354 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
355 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
358 SDValue Res = SDValue();
360 if (Res.getNode() == 0) {
361 switch (N->getOpcode()) {
364 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
368 llvm_unreachable("Do not know how to scalarize this operator's operand!");
370 Res = ScalarizeVecOp_BITCAST(N);
372 case ISD::ANY_EXTEND:
373 case ISD::ZERO_EXTEND:
374 case ISD::SIGN_EXTEND:
376 Res = ScalarizeVecOp_UnaryOp(N);
378 case ISD::CONCAT_VECTORS:
379 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
381 case ISD::EXTRACT_VECTOR_ELT:
382 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
385 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
390 // If the result is null, the sub-method took care of registering results etc.
391 if (!Res.getNode()) return false;
393 // If the result is N, the sub-method updated N in place. Tell the legalizer
395 if (Res.getNode() == N)
398 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
399 "Invalid operand expansion");
401 ReplaceValueWith(SDValue(N, 0), Res);
405 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
406 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
407 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
408 SDValue Elt = GetScalarizedVector(N->getOperand(0));
409 return DAG.getNode(ISD::BITCAST, SDLoc(N),
410 N->getValueType(0), Elt);
413 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
414 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
415 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
416 assert(N->getValueType(0).getVectorNumElements() == 1 &&
417 "Unexected vector type!");
418 SDValue Elt = GetScalarizedVector(N->getOperand(0));
419 SmallVector<SDValue, 1> Ops(1);
420 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N),
421 N->getValueType(0).getScalarType(), Elt);
422 // Revectorize the result so the types line up with what the uses of this
423 // expression expect.
424 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
428 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
429 /// use a BUILD_VECTOR instead.
430 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
431 SmallVector<SDValue, 8> Ops(N->getNumOperands());
432 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
433 Ops[i] = GetScalarizedVector(N->getOperand(i));
434 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
435 &Ops[0], Ops.size());
438 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
439 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
441 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
442 SDValue Res = GetScalarizedVector(N->getOperand(0));
443 if (Res.getValueType() != N->getValueType(0))
444 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
449 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
450 /// scalarized, it must be <1 x ty>. Just store the element.
451 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
452 assert(N->isUnindexed() && "Indexed store of one-element vector?");
453 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
456 if (N->isTruncatingStore())
457 return DAG.getTruncStore(N->getChain(), dl,
458 GetScalarizedVector(N->getOperand(1)),
459 N->getBasePtr(), N->getPointerInfo(),
460 N->getMemoryVT().getVectorElementType(),
461 N->isVolatile(), N->isNonTemporal(),
462 N->getAlignment(), N->getTBAAInfo());
464 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
465 N->getBasePtr(), N->getPointerInfo(),
466 N->isVolatile(), N->isNonTemporal(),
467 N->getOriginalAlignment(), N->getTBAAInfo());
471 //===----------------------------------------------------------------------===//
472 // Result Vector Splitting
473 //===----------------------------------------------------------------------===//
475 /// SplitVectorResult - This method is called when the specified result of the
476 /// specified node is found to need vector splitting. At this point, the node
477 /// may also have invalid operands or may have other results that need
478 /// legalization, we just know that (at least) one result needs vector
480 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
481 DEBUG(dbgs() << "Split node result: ";
486 // See if the target wants to custom expand this node.
487 if (CustomLowerNode(N, N->getValueType(ResNo), true))
490 switch (N->getOpcode()) {
493 dbgs() << "SplitVectorResult #" << ResNo << ": ";
497 report_fatal_error("Do not know how to split the result of this "
500 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
502 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
503 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
504 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
505 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
506 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
507 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
508 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
509 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
510 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
511 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
512 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
513 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
515 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
518 SplitVecRes_SETCC(N, Lo, Hi);
520 case ISD::VECTOR_SHUFFLE:
521 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
524 case ISD::ANY_EXTEND:
525 case ISD::CONVERT_RNDSAT:
528 case ISD::CTLZ_ZERO_UNDEF:
529 case ISD::CTTZ_ZERO_UNDEF:
540 case ISD::FNEARBYINT:
544 case ISD::FP_TO_SINT:
545 case ISD::FP_TO_UINT:
551 case ISD::SIGN_EXTEND:
552 case ISD::SINT_TO_FP:
554 case ISD::UINT_TO_FP:
555 case ISD::ZERO_EXTEND:
556 SplitVecRes_UnaryOp(N, Lo, Hi);
579 SplitVecRes_BinOp(N, Lo, Hi);
582 SplitVecRes_TernaryOp(N, Lo, Hi);
586 // If Lo/Hi is null, the sub-method took care of registering results etc.
588 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
591 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
593 SDValue LHSLo, LHSHi;
594 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
595 SDValue RHSLo, RHSHi;
596 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
599 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
600 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
603 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
605 SDValue Op0Lo, Op0Hi;
606 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
607 SDValue Op1Lo, Op1Hi;
608 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
609 SDValue Op2Lo, Op2Hi;
610 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
613 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
614 Op0Lo, Op1Lo, Op2Lo);
615 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
616 Op0Hi, Op1Hi, Op2Hi);
619 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
621 // We know the result is a vector. The input may be either a vector or a
624 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
627 SDValue InOp = N->getOperand(0);
628 EVT InVT = InOp.getValueType();
630 // Handle some special cases efficiently.
631 switch (getTypeAction(InVT)) {
632 case TargetLowering::TypeLegal:
633 case TargetLowering::TypePromoteInteger:
634 case TargetLowering::TypeSoftenFloat:
635 case TargetLowering::TypeScalarizeVector:
636 case TargetLowering::TypeWidenVector:
638 case TargetLowering::TypeExpandInteger:
639 case TargetLowering::TypeExpandFloat:
640 // A scalar to vector conversion, where the scalar needs expansion.
641 // If the vector is being split in two then we can just convert the
644 GetExpandedOp(InOp, Lo, Hi);
645 if (TLI.isBigEndian())
647 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
648 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
652 case TargetLowering::TypeSplitVector:
653 // If the input is a vector that needs to be split, convert each split
654 // piece of the input now.
655 GetSplitVector(InOp, Lo, Hi);
656 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
657 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
661 // In the general case, convert the input to an integer and split it by hand.
662 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
663 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
664 if (TLI.isBigEndian())
665 std::swap(LoIntVT, HiIntVT);
667 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
669 if (TLI.isBigEndian())
671 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
672 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
675 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
679 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
680 unsigned LoNumElts = LoVT.getVectorNumElements();
681 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
682 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
684 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
685 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
688 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
690 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
692 unsigned NumSubvectors = N->getNumOperands() / 2;
693 if (NumSubvectors == 1) {
694 Lo = N->getOperand(0);
695 Hi = N->getOperand(1);
700 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
702 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
703 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
705 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
706 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
709 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
711 SDValue Vec = N->getOperand(0);
712 SDValue Idx = N->getOperand(1);
716 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
718 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
719 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
720 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
721 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
722 TLI.getVectorIdxTy()));
725 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
728 GetSplitVector(N->getOperand(0), Lo, Hi);
729 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
730 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
733 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
735 SDValue LHSLo, LHSHi;
736 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
740 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
742 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
743 DAG.getValueType(LoVT));
744 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
745 DAG.getValueType(HiVT));
748 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
750 SDValue Vec = N->getOperand(0);
751 SDValue Elt = N->getOperand(1);
752 SDValue Idx = N->getOperand(2);
754 GetSplitVector(Vec, Lo, Hi);
756 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
757 unsigned IdxVal = CIdx->getZExtValue();
758 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
759 if (IdxVal < LoNumElts)
760 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
761 Lo.getValueType(), Lo, Elt, Idx);
763 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
764 DAG.getConstant(IdxVal - LoNumElts,
765 TLI.getVectorIdxTy()));
769 // Spill the vector to the stack.
770 EVT VecVT = Vec.getValueType();
771 EVT EltVT = VecVT.getVectorElementType();
772 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
773 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
774 MachinePointerInfo(), false, false, 0);
776 // Store the new element. This may be larger than the vector element type,
777 // so use a truncating store.
778 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
779 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
781 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
782 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
785 // Load the Lo part from the stack slot.
786 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
787 false, false, false, 0);
789 // Increment the pointer to the other part.
790 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
791 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
792 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
794 // Load the Hi part from the stack slot.
795 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
796 false, false, false, MinAlign(Alignment, IncrementSize));
799 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
803 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
804 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
805 Hi = DAG.getUNDEF(HiVT);
808 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
810 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
813 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
815 ISD::LoadExtType ExtType = LD->getExtensionType();
816 SDValue Ch = LD->getChain();
817 SDValue Ptr = LD->getBasePtr();
818 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
819 EVT MemoryVT = LD->getMemoryVT();
820 unsigned Alignment = LD->getOriginalAlignment();
821 bool isVolatile = LD->isVolatile();
822 bool isNonTemporal = LD->isNonTemporal();
823 bool isInvariant = LD->isInvariant();
824 const MDNode *TBAAInfo = LD->getTBAAInfo();
826 EVT LoMemVT, HiMemVT;
827 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
829 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
830 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
831 isInvariant, Alignment, TBAAInfo);
833 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
834 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
835 DAG.getConstant(IncrementSize, Ptr.getValueType()));
836 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
837 LD->getPointerInfo().getWithOffset(IncrementSize),
838 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment,
841 // Build a factor node to remember that this load is independent of the
843 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
846 // Legalized the chain result - switch anything that used the old chain to
848 ReplaceValueWith(SDValue(LD, 1), Ch);
851 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
852 assert(N->getValueType(0).isVector() &&
853 N->getOperand(0).getValueType().isVector() &&
854 "Operand types must be vectors");
858 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
861 EVT InVT = N->getOperand(0).getValueType();
862 SDValue LL, LH, RL, RH;
863 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
864 LoVT.getVectorNumElements());
865 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
866 DAG.getConstant(0, TLI.getVectorIdxTy()));
867 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
868 DAG.getConstant(InNVT.getVectorNumElements(),
869 TLI.getVectorIdxTy()));
871 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
872 DAG.getConstant(0, TLI.getVectorIdxTy()));
873 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
874 DAG.getConstant(InNVT.getVectorNumElements(),
875 TLI.getVectorIdxTy()));
877 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
878 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
881 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
883 // Get the dest types - they may not match the input types, e.g. int_to_fp.
886 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
888 // If the input also splits, handle it directly for a compile time speedup.
889 // Otherwise split it by hand.
890 EVT InVT = N->getOperand(0).getValueType();
891 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
892 GetSplitVector(N->getOperand(0), Lo, Hi);
894 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
895 LoVT.getVectorNumElements());
896 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
897 DAG.getConstant(0, TLI.getVectorIdxTy()));
898 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
899 DAG.getConstant(InNVT.getVectorNumElements(),
900 TLI.getVectorIdxTy()));
903 if (N->getOpcode() == ISD::FP_ROUND) {
904 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
905 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
906 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
907 SDValue DTyOpLo = DAG.getValueType(LoVT);
908 SDValue DTyOpHi = DAG.getValueType(HiVT);
909 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
910 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
911 SDValue RndOp = N->getOperand(3);
912 SDValue SatOp = N->getOperand(4);
913 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
914 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
916 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
919 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
920 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
924 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
925 SDValue &Lo, SDValue &Hi) {
926 // The low and high parts of the original input give four input vectors.
929 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
930 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
931 EVT NewVT = Inputs[0].getValueType();
932 unsigned NewElts = NewVT.getVectorNumElements();
934 // If Lo or Hi uses elements from at most two of the four input vectors, then
935 // express it as a vector shuffle of those two inputs. Otherwise extract the
936 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
937 SmallVector<int, 16> Ops;
938 for (unsigned High = 0; High < 2; ++High) {
939 SDValue &Output = High ? Hi : Lo;
941 // Build a shuffle mask for the output, discovering on the fly which
942 // input vectors to use as shuffle operands (recorded in InputUsed).
943 // If building a suitable shuffle vector proves too hard, then bail
944 // out with useBuildVector set.
945 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
946 unsigned FirstMaskIdx = High * NewElts;
947 bool useBuildVector = false;
948 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
949 // The mask element. This indexes into the input.
950 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
952 // The input vector this mask element indexes into.
953 unsigned Input = (unsigned)Idx / NewElts;
955 if (Input >= array_lengthof(Inputs)) {
956 // The mask element does not index into any input vector.
961 // Turn the index into an offset from the start of the input vector.
962 Idx -= Input * NewElts;
964 // Find or create a shuffle vector operand to hold this input.
966 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
967 if (InputUsed[OpNo] == Input) {
968 // This input vector is already an operand.
970 } else if (InputUsed[OpNo] == -1U) {
971 // Create a new operand for this input vector.
972 InputUsed[OpNo] = Input;
977 if (OpNo >= array_lengthof(InputUsed)) {
978 // More than two input vectors used! Give up on trying to create a
979 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
980 useBuildVector = true;
984 // Add the mask index for the new shuffle vector.
985 Ops.push_back(Idx + OpNo * NewElts);
988 if (useBuildVector) {
989 EVT EltVT = NewVT.getVectorElementType();
990 SmallVector<SDValue, 16> SVOps;
992 // Extract the input elements by hand.
993 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
994 // The mask element. This indexes into the input.
995 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
997 // The input vector this mask element indexes into.
998 unsigned Input = (unsigned)Idx / NewElts;
1000 if (Input >= array_lengthof(Inputs)) {
1001 // The mask element is "undef" or indexes off the end of the input.
1002 SVOps.push_back(DAG.getUNDEF(EltVT));
1006 // Turn the index into an offset from the start of the input vector.
1007 Idx -= Input * NewElts;
1009 // Extract the vector element by hand.
1010 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1011 Inputs[Input], DAG.getConstant(Idx,
1012 TLI.getVectorIdxTy())));
1015 // Construct the Lo/Hi output using a BUILD_VECTOR.
1016 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
1017 } else if (InputUsed[0] == -1U) {
1018 // No input vectors were used! The result is undefined.
1019 Output = DAG.getUNDEF(NewVT);
1021 SDValue Op0 = Inputs[InputUsed[0]];
1022 // If only one input was used, use an undefined vector for the other.
1023 SDValue Op1 = InputUsed[1] == -1U ?
1024 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1025 // At least one input vector was used. Create a new shuffle vector.
1026 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1034 //===----------------------------------------------------------------------===//
1035 // Operand Vector Splitting
1036 //===----------------------------------------------------------------------===//
1038 /// SplitVectorOperand - This method is called when the specified operand of the
1039 /// specified node is found to need vector splitting. At this point, all of the
1040 /// result types of the node are known to be legal, but other operands of the
1041 /// node may need legalization as well as the specified one.
1042 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1043 DEBUG(dbgs() << "Split node operand: ";
1046 SDValue Res = SDValue();
1048 // See if the target wants to custom split this node.
1049 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1052 if (Res.getNode() == 0) {
1053 switch (N->getOpcode()) {
1056 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1060 report_fatal_error("Do not know how to split this operator's "
1063 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1064 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1065 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1066 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1067 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1068 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1069 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1071 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1074 Res = SplitVecOp_VSELECT(N, OpNo);
1079 case ISD::FP_EXTEND:
1080 case ISD::FP_TO_SINT:
1081 case ISD::FP_TO_UINT:
1082 case ISD::SINT_TO_FP:
1083 case ISD::UINT_TO_FP:
1085 case ISD::SIGN_EXTEND:
1086 case ISD::ZERO_EXTEND:
1087 case ISD::ANY_EXTEND:
1088 Res = SplitVecOp_UnaryOp(N);
1093 // If the result is null, the sub-method took care of registering results etc.
1094 if (!Res.getNode()) return false;
1096 // If the result is N, the sub-method updated N in place. Tell the legalizer
1098 if (Res.getNode() == N)
1101 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1102 "Invalid operand expansion");
1104 ReplaceValueWith(SDValue(N, 0), Res);
1108 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1109 // The only possibility for an illegal operand is the mask, since result type
1110 // legalization would have handled this node already otherwise.
1111 assert(OpNo == 0 && "Illegal operand must be mask");
1113 SDValue Mask = N->getOperand(0);
1114 SDValue Src0 = N->getOperand(1);
1115 SDValue Src1 = N->getOperand(2);
1117 EVT MaskVT = Mask.getValueType();
1118 assert(MaskVT.isVector() && "VSELECT without a vector mask?");
1121 GetSplitVector(N->getOperand(0), Lo, Hi);
1122 assert(Lo.getValueType() == Hi.getValueType() &&
1123 "Lo and Hi have differing types");
1125 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
1126 unsigned HiNumElts = Hi.getValueType().getVectorNumElements();
1127 assert(LoNumElts == HiNumElts && "Asymmetric vector split?");
1129 LLVMContext &Ctx = *DAG.getContext();
1130 SDValue Zero = DAG.getConstant(0, TLI.getVectorIdxTy());
1131 SDValue LoElts = DAG.getConstant(LoNumElts, TLI.getVectorIdxTy());
1132 EVT Src0VT = Src0.getValueType();
1133 EVT Src0EltTy = Src0VT.getVectorElementType();
1134 EVT MaskEltTy = MaskVT.getVectorElementType();
1136 EVT LoOpVT = EVT::getVectorVT(Ctx, Src0EltTy, LoNumElts);
1137 EVT LoMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, LoNumElts);
1138 EVT HiOpVT = EVT::getVectorVT(Ctx, Src0EltTy, HiNumElts);
1139 EVT HiMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, HiNumElts);
1141 SDValue LoOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src0, Zero);
1142 SDValue LoOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src1, Zero);
1144 SDValue HiOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src0, LoElts);
1145 SDValue HiOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src1, LoElts);
1148 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoMaskVT, Mask, Zero);
1150 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiMaskVT, Mask, LoElts);
1153 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1155 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1157 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1160 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1161 // The result has a legal vector type, but the input needs splitting.
1162 EVT ResVT = N->getValueType(0);
1165 GetSplitVector(N->getOperand(0), Lo, Hi);
1166 EVT InVT = Lo.getValueType();
1168 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1169 InVT.getVectorNumElements());
1171 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1172 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1174 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1177 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1178 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1179 // end up being split all the way down to individual components. Convert the
1180 // split pieces into integers and reassemble.
1182 GetSplitVector(N->getOperand(0), Lo, Hi);
1183 Lo = BitConvertToInteger(Lo);
1184 Hi = BitConvertToInteger(Hi);
1186 if (TLI.isBigEndian())
1189 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1190 JoinIntegers(Lo, Hi));
1193 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1194 // We know that the extracted result type is legal.
1195 EVT SubVT = N->getValueType(0);
1196 SDValue Idx = N->getOperand(1);
1199 GetSplitVector(N->getOperand(0), Lo, Hi);
1201 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1202 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1204 if (IdxVal < LoElts) {
1205 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1206 "Extracted subvector crosses vector split!");
1207 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1209 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1210 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1214 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1215 SDValue Vec = N->getOperand(0);
1216 SDValue Idx = N->getOperand(1);
1217 EVT VecVT = Vec.getValueType();
1219 if (isa<ConstantSDNode>(Idx)) {
1220 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1221 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1224 GetSplitVector(Vec, Lo, Hi);
1226 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1228 if (IdxVal < LoElts)
1229 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1230 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1231 DAG.getConstant(IdxVal - LoElts,
1232 Idx.getValueType())), 0);
1235 // Store the vector to the stack.
1236 EVT EltVT = VecVT.getVectorElementType();
1238 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1239 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1240 MachinePointerInfo(), false, false, 0);
1242 // Load back the required element.
1243 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1244 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1245 MachinePointerInfo(), EltVT, false, false, 0);
1248 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1249 assert(N->isUnindexed() && "Indexed store of vector?");
1250 assert(OpNo == 1 && "Can only split the stored value");
1253 bool isTruncating = N->isTruncatingStore();
1254 SDValue Ch = N->getChain();
1255 SDValue Ptr = N->getBasePtr();
1256 EVT MemoryVT = N->getMemoryVT();
1257 unsigned Alignment = N->getOriginalAlignment();
1258 bool isVol = N->isVolatile();
1259 bool isNT = N->isNonTemporal();
1260 const MDNode *TBAAInfo = N->getTBAAInfo();
1262 GetSplitVector(N->getOperand(1), Lo, Hi);
1264 EVT LoMemVT, HiMemVT;
1265 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1267 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1270 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1271 LoMemVT, isVol, isNT, Alignment, TBAAInfo);
1273 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1274 isVol, isNT, Alignment, TBAAInfo);
1276 // Increment the pointer to the other half.
1277 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1278 DAG.getConstant(IncrementSize, Ptr.getValueType()));
1281 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1282 N->getPointerInfo().getWithOffset(IncrementSize),
1283 HiMemVT, isVol, isNT, Alignment, TBAAInfo);
1285 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1286 N->getPointerInfo().getWithOffset(IncrementSize),
1287 isVol, isNT, Alignment, TBAAInfo);
1289 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1292 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1295 // The input operands all must have the same type, and we know the result
1296 // type is valid. Convert this to a buildvector which extracts all the
1298 // TODO: If the input elements are power-two vectors, we could convert this to
1299 // a new CONCAT_VECTORS node with elements that are half-wide.
1300 SmallVector<SDValue, 32> Elts;
1301 EVT EltVT = N->getValueType(0).getVectorElementType();
1302 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1303 SDValue Op = N->getOperand(op);
1304 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1306 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1307 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1312 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1313 &Elts[0], Elts.size());
1316 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1317 // The result type is legal, but the input type is illegal. If splitting
1318 // ends up with the result type of each half still being legal, just
1319 // do that. If, however, that would result in an illegal result type,
1320 // we can try to get more clever with power-two vectors. Specifically,
1321 // split the input type, but also widen the result element size, then
1322 // concatenate the halves and truncate again. For example, consider a target
1323 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1324 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1325 // %inlo = v4i32 extract_subvector %in, 0
1326 // %inhi = v4i32 extract_subvector %in, 4
1327 // %lo16 = v4i16 trunc v4i32 %inlo
1328 // %hi16 = v4i16 trunc v4i32 %inhi
1329 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1330 // %res = v8i8 trunc v8i16 %in16
1332 // Without this transform, the original truncate would end up being
1333 // scalarized, which is pretty much always a last resort.
1334 SDValue InVec = N->getOperand(0);
1335 EVT InVT = InVec->getValueType(0);
1336 EVT OutVT = N->getValueType(0);
1337 unsigned NumElements = OutVT.getVectorNumElements();
1338 // Widening should have already made sure this is a power-two vector
1339 // if we're trying to split it at all. assert() that's true, just in case.
1340 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1342 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1343 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1345 // If the input elements are only 1/2 the width of the result elements,
1346 // just use the normal splitting. Our trick only work if there's room
1347 // to split more than once.
1348 if (InElementSize <= OutElementSize * 2)
1349 return SplitVecOp_UnaryOp(N);
1352 // Extract the halves of the input via extract_subvector.
1353 EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
1354 InVT.getVectorElementType(), NumElements/2);
1355 SDValue InLoVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1356 DAG.getConstant(0, TLI.getVectorIdxTy()));
1357 SDValue InHiVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1358 DAG.getConstant(NumElements/2,
1359 TLI.getVectorIdxTy()));
1360 // Truncate them to 1/2 the element size.
1361 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1362 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1364 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1365 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1366 // Concatenate them to get the full intermediate truncation result.
1367 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1368 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1370 // Now finish up by truncating all the way down to the original result
1371 // type. This should normally be something that ends up being legal directly,
1372 // but in theory if a target has very wide vectors and an annoyingly
1373 // restricted set of legal types, this split can chain to build things up.
1374 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1377 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1378 assert(N->getValueType(0).isVector() &&
1379 N->getOperand(0).getValueType().isVector() &&
1380 "Operand types must be vectors");
1381 // The result has a legal vector type, but the input needs splitting.
1382 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1384 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1385 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1386 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1387 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1388 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1390 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1391 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1392 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1393 return PromoteTargetBoolean(Con, N->getValueType(0));
1397 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1398 // The result has a legal vector type, but the input needs splitting.
1399 EVT ResVT = N->getValueType(0);
1402 GetSplitVector(N->getOperand(0), Lo, Hi);
1403 EVT InVT = Lo.getValueType();
1405 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1406 InVT.getVectorNumElements());
1408 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1409 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1411 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1416 //===----------------------------------------------------------------------===//
1417 // Result Vector Widening
1418 //===----------------------------------------------------------------------===//
1420 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1421 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1425 // See if the target wants to custom widen this node.
1426 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1429 SDValue Res = SDValue();
1430 switch (N->getOpcode()) {
1433 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1437 llvm_unreachable("Do not know how to widen the result of this operator!");
1439 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1440 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1441 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1442 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1443 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1444 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1445 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1446 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1447 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1448 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1449 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1451 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1452 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1453 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1454 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1455 case ISD::VECTOR_SHUFFLE:
1456 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1468 Res = WidenVecRes_Binary(N);
1472 case ISD::FCOPYSIGN:
1482 Res = WidenVecRes_BinaryCanTrap(N);
1486 Res = WidenVecRes_POWI(N);
1492 Res = WidenVecRes_Shift(N);
1495 case ISD::ANY_EXTEND:
1496 case ISD::FP_EXTEND:
1498 case ISD::FP_TO_SINT:
1499 case ISD::FP_TO_UINT:
1500 case ISD::SIGN_EXTEND:
1501 case ISD::SINT_TO_FP:
1503 case ISD::UINT_TO_FP:
1504 case ISD::ZERO_EXTEND:
1505 Res = WidenVecRes_Convert(N);
1520 case ISD::FNEARBYINT:
1527 Res = WidenVecRes_Unary(N);
1530 Res = WidenVecRes_Ternary(N);
1534 // If Res is null, the sub-method took care of registering the result.
1536 SetWidenedVector(SDValue(N, ResNo), Res);
1539 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1540 // Ternary op widening.
1542 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1543 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1544 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1545 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1546 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1549 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1550 // Binary op widening.
1552 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1553 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1554 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1555 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1558 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
1559 // Binary op widening for operations that can trap.
1560 unsigned Opcode = N->getOpcode();
1562 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1563 EVT WidenEltVT = WidenVT.getVectorElementType();
1565 unsigned NumElts = VT.getVectorNumElements();
1566 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1567 NumElts = NumElts / 2;
1568 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1571 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1572 // Operation doesn't trap so just widen as normal.
1573 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1574 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1575 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1578 // No legal vector version so unroll the vector operation and then widen.
1580 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1582 // Since the operation can trap, apply operation on the original vector.
1584 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1585 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1586 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1588 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1589 unsigned ConcatEnd = 0; // Current ConcatOps index.
1590 int Idx = 0; // Current Idx into input vectors.
1592 // NumElts := greatest legal vector size (at most WidenVT)
1593 // while (orig. vector has unhandled elements) {
1594 // take munches of size NumElts from the beginning and add to ConcatOps
1595 // NumElts := next smaller supported vector size or 1
1597 while (CurNumElts != 0) {
1598 while (CurNumElts >= NumElts) {
1599 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1600 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1601 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1602 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1603 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1605 CurNumElts -= NumElts;
1608 NumElts = NumElts / 2;
1609 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1610 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1613 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1614 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1615 InOp1, DAG.getConstant(Idx,
1616 TLI.getVectorIdxTy()));
1617 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1618 InOp2, DAG.getConstant(Idx,
1619 TLI.getVectorIdxTy()));
1620 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1627 // Check to see if we have a single operation with the widen type.
1628 if (ConcatEnd == 1) {
1629 VT = ConcatOps[0].getValueType();
1631 return ConcatOps[0];
1634 // while (Some element of ConcatOps is not of type MaxVT) {
1635 // From the end of ConcatOps, collect elements of the same type and put
1636 // them into an op of the next larger supported type
1638 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1639 Idx = ConcatEnd - 1;
1640 VT = ConcatOps[Idx--].getValueType();
1641 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1644 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1648 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1649 } while (!TLI.isTypeLegal(NextVT));
1651 if (!VT.isVector()) {
1652 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1653 SDValue VecOp = DAG.getUNDEF(NextVT);
1654 unsigned NumToInsert = ConcatEnd - Idx - 1;
1655 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1656 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1657 ConcatOps[OpIdx], DAG.getConstant(i,
1658 TLI.getVectorIdxTy()));
1660 ConcatOps[Idx+1] = VecOp;
1661 ConcatEnd = Idx + 2;
1663 // Vector type, create a CONCAT_VECTORS of type NextVT
1664 SDValue undefVec = DAG.getUNDEF(VT);
1665 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1666 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1667 unsigned RealVals = ConcatEnd - Idx - 1;
1668 unsigned SubConcatEnd = 0;
1669 unsigned SubConcatIdx = Idx + 1;
1670 while (SubConcatEnd < RealVals)
1671 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1672 while (SubConcatEnd < OpsToConcat)
1673 SubConcatOps[SubConcatEnd++] = undefVec;
1674 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1675 NextVT, &SubConcatOps[0],
1677 ConcatEnd = SubConcatIdx + 1;
1681 // Check to see if we have a single operation with the widen type.
1682 if (ConcatEnd == 1) {
1683 VT = ConcatOps[0].getValueType();
1685 return ConcatOps[0];
1688 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1689 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1690 if (NumOps != ConcatEnd ) {
1691 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1692 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1693 ConcatOps[j] = UndefVal;
1695 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1698 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1699 SDValue InOp = N->getOperand(0);
1702 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1703 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1705 EVT InVT = InOp.getValueType();
1706 EVT InEltVT = InVT.getVectorElementType();
1707 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1709 unsigned Opcode = N->getOpcode();
1710 unsigned InVTNumElts = InVT.getVectorNumElements();
1712 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1713 InOp = GetWidenedVector(N->getOperand(0));
1714 InVT = InOp.getValueType();
1715 InVTNumElts = InVT.getVectorNumElements();
1716 if (InVTNumElts == WidenNumElts) {
1717 if (N->getNumOperands() == 1)
1718 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1719 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1723 if (TLI.isTypeLegal(InWidenVT)) {
1724 // Because the result and the input are different vector types, widening
1725 // the result could create a legal type but widening the input might make
1726 // it an illegal type that might lead to repeatedly splitting the input
1727 // and then widening it. To avoid this, we widen the input only if
1728 // it results in a legal type.
1729 if (WidenNumElts % InVTNumElts == 0) {
1730 // Widen the input and call convert on the widened input vector.
1731 unsigned NumConcat = WidenNumElts/InVTNumElts;
1732 SmallVector<SDValue, 16> Ops(NumConcat);
1734 SDValue UndefVal = DAG.getUNDEF(InVT);
1735 for (unsigned i = 1; i != NumConcat; ++i)
1737 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1738 &Ops[0], NumConcat);
1739 if (N->getNumOperands() == 1)
1740 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1741 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1744 if (InVTNumElts % WidenNumElts == 0) {
1745 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1746 InOp, DAG.getConstant(0,
1747 TLI.getVectorIdxTy()));
1748 // Extract the input and convert the shorten input vector.
1749 if (N->getNumOperands() == 1)
1750 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1751 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1755 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1756 SmallVector<SDValue, 16> Ops(WidenNumElts);
1757 EVT EltVT = WidenVT.getVectorElementType();
1758 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1760 for (i=0; i < MinElts; ++i) {
1761 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1762 DAG.getConstant(i, TLI.getVectorIdxTy()));
1763 if (N->getNumOperands() == 1)
1764 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1766 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1769 SDValue UndefVal = DAG.getUNDEF(EltVT);
1770 for (; i < WidenNumElts; ++i)
1773 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1776 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1777 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1778 SDValue InOp = GetWidenedVector(N->getOperand(0));
1779 SDValue ShOp = N->getOperand(1);
1780 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1783 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1784 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1785 SDValue InOp = GetWidenedVector(N->getOperand(0));
1786 SDValue ShOp = N->getOperand(1);
1788 EVT ShVT = ShOp.getValueType();
1789 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1790 ShOp = GetWidenedVector(ShOp);
1791 ShVT = ShOp.getValueType();
1793 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1794 ShVT.getVectorElementType(),
1795 WidenVT.getVectorNumElements());
1796 if (ShVT != ShWidenVT)
1797 ShOp = ModifyToType(ShOp, ShWidenVT);
1799 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1802 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1803 // Unary op widening.
1804 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1805 SDValue InOp = GetWidenedVector(N->getOperand(0));
1806 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1809 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1810 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1811 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1812 cast<VTSDNode>(N->getOperand(1))->getVT()
1813 .getVectorElementType(),
1814 WidenVT.getVectorNumElements());
1815 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1816 return DAG.getNode(N->getOpcode(), SDLoc(N),
1817 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1820 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1821 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1822 return GetWidenedVector(WidenVec);
1825 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1826 SDValue InOp = N->getOperand(0);
1827 EVT InVT = InOp.getValueType();
1828 EVT VT = N->getValueType(0);
1829 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1832 switch (getTypeAction(InVT)) {
1833 case TargetLowering::TypeLegal:
1835 case TargetLowering::TypePromoteInteger:
1836 // If the incoming type is a vector that is being promoted, then
1837 // we know that the elements are arranged differently and that we
1838 // must perform the conversion using a stack slot.
1839 if (InVT.isVector())
1842 // If the InOp is promoted to the same size, convert it. Otherwise,
1843 // fall out of the switch and widen the promoted input.
1844 InOp = GetPromotedInteger(InOp);
1845 InVT = InOp.getValueType();
1846 if (WidenVT.bitsEq(InVT))
1847 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1849 case TargetLowering::TypeSoftenFloat:
1850 case TargetLowering::TypeExpandInteger:
1851 case TargetLowering::TypeExpandFloat:
1852 case TargetLowering::TypeScalarizeVector:
1853 case TargetLowering::TypeSplitVector:
1855 case TargetLowering::TypeWidenVector:
1856 // If the InOp is widened to the same size, convert it. Otherwise, fall
1857 // out of the switch and widen the widened input.
1858 InOp = GetWidenedVector(InOp);
1859 InVT = InOp.getValueType();
1860 if (WidenVT.bitsEq(InVT))
1861 // The input widens to the same size. Convert to the widen value.
1862 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1866 unsigned WidenSize = WidenVT.getSizeInBits();
1867 unsigned InSize = InVT.getSizeInBits();
1868 // x86mmx is not an acceptable vector element type, so don't try.
1869 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1870 // Determine new input vector type. The new input vector type will use
1871 // the same element type (if its a vector) or use the input type as a
1872 // vector. It is the same size as the type to widen to.
1874 unsigned NewNumElts = WidenSize / InSize;
1875 if (InVT.isVector()) {
1876 EVT InEltVT = InVT.getVectorElementType();
1877 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1878 WidenSize / InEltVT.getSizeInBits());
1880 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1883 if (TLI.isTypeLegal(NewInVT)) {
1884 // Because the result and the input are different vector types, widening
1885 // the result could create a legal type but widening the input might make
1886 // it an illegal type that might lead to repeatedly splitting the input
1887 // and then widening it. To avoid this, we widen the input only if
1888 // it results in a legal type.
1889 SmallVector<SDValue, 16> Ops(NewNumElts);
1890 SDValue UndefVal = DAG.getUNDEF(InVT);
1892 for (unsigned i = 1; i < NewNumElts; ++i)
1896 if (InVT.isVector())
1897 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1898 NewInVT, &Ops[0], NewNumElts);
1900 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1901 NewInVT, &Ops[0], NewNumElts);
1902 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1906 return CreateStackStoreLoad(InOp, WidenVT);
1909 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1911 // Build a vector with undefined for the new nodes.
1912 EVT VT = N->getValueType(0);
1914 // Integer BUILD_VECTOR operands may be larger than the node's vector element
1915 // type. The UNDEFs need to have the same type as the existing operands.
1916 EVT EltVT = N->getOperand(0).getValueType();
1917 unsigned NumElts = VT.getVectorNumElements();
1919 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1920 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1922 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1923 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
1924 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
1926 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1929 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1930 EVT InVT = N->getOperand(0).getValueType();
1931 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1933 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1934 unsigned NumInElts = InVT.getVectorNumElements();
1935 unsigned NumOperands = N->getNumOperands();
1937 bool InputWidened = false; // Indicates we need to widen the input.
1938 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1939 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1940 // Add undef vectors to widen to correct length.
1941 unsigned NumConcat = WidenVT.getVectorNumElements() /
1942 InVT.getVectorNumElements();
1943 SDValue UndefVal = DAG.getUNDEF(InVT);
1944 SmallVector<SDValue, 16> Ops(NumConcat);
1945 for (unsigned i=0; i < NumOperands; ++i)
1946 Ops[i] = N->getOperand(i);
1947 for (unsigned i = NumOperands; i != NumConcat; ++i)
1949 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1952 InputWidened = true;
1953 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1954 // The inputs and the result are widen to the same value.
1956 for (i=1; i < NumOperands; ++i)
1957 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1960 if (i == NumOperands)
1961 // Everything but the first operand is an UNDEF so just return the
1962 // widened first operand.
1963 return GetWidenedVector(N->getOperand(0));
1965 if (NumOperands == 2) {
1966 // Replace concat of two operands with a shuffle.
1967 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1968 for (unsigned i = 0; i < NumInElts; ++i) {
1970 MaskOps[i + NumInElts] = i + WidenNumElts;
1972 return DAG.getVectorShuffle(WidenVT, dl,
1973 GetWidenedVector(N->getOperand(0)),
1974 GetWidenedVector(N->getOperand(1)),
1980 // Fall back to use extracts and build vector.
1981 EVT EltVT = WidenVT.getVectorElementType();
1982 SmallVector<SDValue, 16> Ops(WidenNumElts);
1984 for (unsigned i=0; i < NumOperands; ++i) {
1985 SDValue InOp = N->getOperand(i);
1987 InOp = GetWidenedVector(InOp);
1988 for (unsigned j=0; j < NumInElts; ++j)
1989 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1990 DAG.getConstant(j, TLI.getVectorIdxTy()));
1992 SDValue UndefVal = DAG.getUNDEF(EltVT);
1993 for (; Idx < WidenNumElts; ++Idx)
1994 Ops[Idx] = UndefVal;
1995 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1998 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
2000 SDValue InOp = N->getOperand(0);
2001 SDValue RndOp = N->getOperand(3);
2002 SDValue SatOp = N->getOperand(4);
2004 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2005 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2007 EVT InVT = InOp.getValueType();
2008 EVT InEltVT = InVT.getVectorElementType();
2009 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
2011 SDValue DTyOp = DAG.getValueType(WidenVT);
2012 SDValue STyOp = DAG.getValueType(InWidenVT);
2013 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
2015 unsigned InVTNumElts = InVT.getVectorNumElements();
2016 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
2017 InOp = GetWidenedVector(InOp);
2018 InVT = InOp.getValueType();
2019 InVTNumElts = InVT.getVectorNumElements();
2020 if (InVTNumElts == WidenNumElts)
2021 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2025 if (TLI.isTypeLegal(InWidenVT)) {
2026 // Because the result and the input are different vector types, widening
2027 // the result could create a legal type but widening the input might make
2028 // it an illegal type that might lead to repeatedly splitting the input
2029 // and then widening it. To avoid this, we widen the input only if
2030 // it results in a legal type.
2031 if (WidenNumElts % InVTNumElts == 0) {
2032 // Widen the input and call convert on the widened input vector.
2033 unsigned NumConcat = WidenNumElts/InVTNumElts;
2034 SmallVector<SDValue, 16> Ops(NumConcat);
2036 SDValue UndefVal = DAG.getUNDEF(InVT);
2037 for (unsigned i = 1; i != NumConcat; ++i)
2040 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
2041 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2045 if (InVTNumElts % WidenNumElts == 0) {
2046 // Extract the input and convert the shorten input vector.
2047 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2048 DAG.getConstant(0, TLI.getVectorIdxTy()));
2049 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2054 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2055 SmallVector<SDValue, 16> Ops(WidenNumElts);
2056 EVT EltVT = WidenVT.getVectorElementType();
2057 DTyOp = DAG.getValueType(EltVT);
2058 STyOp = DAG.getValueType(InEltVT);
2060 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2062 for (i=0; i < MinElts; ++i) {
2063 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2064 DAG.getConstant(i, TLI.getVectorIdxTy()));
2065 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2069 SDValue UndefVal = DAG.getUNDEF(EltVT);
2070 for (; i < WidenNumElts; ++i)
2073 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2076 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2077 EVT VT = N->getValueType(0);
2078 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2079 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2080 SDValue InOp = N->getOperand(0);
2081 SDValue Idx = N->getOperand(1);
2084 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2085 InOp = GetWidenedVector(InOp);
2087 EVT InVT = InOp.getValueType();
2089 // Check if we can just return the input vector after widening.
2090 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2091 if (IdxVal == 0 && InVT == WidenVT)
2094 // Check if we can extract from the vector.
2095 unsigned InNumElts = InVT.getVectorNumElements();
2096 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2097 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2099 // We could try widening the input to the right length but for now, extract
2100 // the original elements, fill the rest with undefs and build a vector.
2101 SmallVector<SDValue, 16> Ops(WidenNumElts);
2102 EVT EltVT = VT.getVectorElementType();
2103 unsigned NumElts = VT.getVectorNumElements();
2105 for (i=0; i < NumElts; ++i)
2106 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2107 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2109 SDValue UndefVal = DAG.getUNDEF(EltVT);
2110 for (; i < WidenNumElts; ++i)
2112 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2115 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2116 SDValue InOp = GetWidenedVector(N->getOperand(0));
2117 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2118 InOp.getValueType(), InOp,
2119 N->getOperand(1), N->getOperand(2));
2122 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2123 LoadSDNode *LD = cast<LoadSDNode>(N);
2124 ISD::LoadExtType ExtType = LD->getExtensionType();
2127 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2128 if (ExtType != ISD::NON_EXTLOAD)
2129 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2131 Result = GenWidenVectorLoads(LdChain, LD);
2133 // If we generate a single load, we can use that for the chain. Otherwise,
2134 // build a factor node to remember the multiple loads are independent and
2137 if (LdChain.size() == 1)
2138 NewChain = LdChain[0];
2140 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
2141 &LdChain[0], LdChain.size());
2143 // Modified the chain - switch anything that used the old chain to use
2145 ReplaceValueWith(SDValue(N, 1), NewChain);
2150 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2151 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2152 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2153 WidenVT, N->getOperand(0));
2156 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2157 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2158 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2160 SDValue Cond1 = N->getOperand(0);
2161 EVT CondVT = Cond1.getValueType();
2162 if (CondVT.isVector()) {
2163 EVT CondEltVT = CondVT.getVectorElementType();
2164 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2165 CondEltVT, WidenNumElts);
2166 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2167 Cond1 = GetWidenedVector(Cond1);
2169 if (Cond1.getValueType() != CondWidenVT)
2170 Cond1 = ModifyToType(Cond1, CondWidenVT);
2173 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2174 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2175 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2176 return DAG.getNode(N->getOpcode(), SDLoc(N),
2177 WidenVT, Cond1, InOp1, InOp2);
2180 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2181 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2182 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2183 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2184 InOp1.getValueType(), N->getOperand(0),
2185 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2188 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2189 assert(N->getValueType(0).isVector() ==
2190 N->getOperand(0).getValueType().isVector() &&
2191 "Scalar/Vector type mismatch");
2192 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2194 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2195 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2196 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2197 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2198 InOp1, InOp2, N->getOperand(2));
2201 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2202 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2203 return DAG.getUNDEF(WidenVT);
2206 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2207 EVT VT = N->getValueType(0);
2210 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2211 unsigned NumElts = VT.getVectorNumElements();
2212 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2214 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2215 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2217 // Adjust mask based on new input vector length.
2218 SmallVector<int, 16> NewMask;
2219 for (unsigned i = 0; i != NumElts; ++i) {
2220 int Idx = N->getMaskElt(i);
2221 if (Idx < (int)NumElts)
2222 NewMask.push_back(Idx);
2224 NewMask.push_back(Idx - NumElts + WidenNumElts);
2226 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2227 NewMask.push_back(-1);
2228 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2231 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2232 assert(N->getValueType(0).isVector() &&
2233 N->getOperand(0).getValueType().isVector() &&
2234 "Operands must be vectors");
2235 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2236 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2238 SDValue InOp1 = N->getOperand(0);
2239 EVT InVT = InOp1.getValueType();
2240 assert(InVT.isVector() && "can not widen non vector type");
2241 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2242 InVT.getVectorElementType(), WidenNumElts);
2243 InOp1 = GetWidenedVector(InOp1);
2244 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2246 // Assume that the input and output will be widen appropriately. If not,
2247 // we will have to unroll it at some point.
2248 assert(InOp1.getValueType() == WidenInVT &&
2249 InOp2.getValueType() == WidenInVT &&
2250 "Input not widened to expected type!");
2252 return DAG.getNode(ISD::SETCC, SDLoc(N),
2253 WidenVT, InOp1, InOp2, N->getOperand(2));
2257 //===----------------------------------------------------------------------===//
2258 // Widen Vector Operand
2259 //===----------------------------------------------------------------------===//
2260 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2261 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2264 SDValue Res = SDValue();
2266 // See if the target wants to custom widen this node.
2267 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2270 switch (N->getOpcode()) {
2273 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2277 llvm_unreachable("Do not know how to widen this operator's operand!");
2279 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2280 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2281 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2282 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2283 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2284 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2286 case ISD::FP_EXTEND:
2287 case ISD::FP_TO_SINT:
2288 case ISD::FP_TO_UINT:
2289 case ISD::SINT_TO_FP:
2290 case ISD::UINT_TO_FP:
2292 case ISD::SIGN_EXTEND:
2293 case ISD::ZERO_EXTEND:
2294 case ISD::ANY_EXTEND:
2295 Res = WidenVecOp_Convert(N);
2299 // If Res is null, the sub-method took care of registering the result.
2300 if (!Res.getNode()) return false;
2302 // If the result is N, the sub-method updated N in place. Tell the legalizer
2304 if (Res.getNode() == N)
2308 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2309 "Invalid operand expansion");
2311 ReplaceValueWith(SDValue(N, 0), Res);
2315 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2316 // Since the result is legal and the input is illegal, it is unlikely
2317 // that we can fix the input to a legal type so unroll the convert
2318 // into some scalar code and create a nasty build vector.
2319 EVT VT = N->getValueType(0);
2320 EVT EltVT = VT.getVectorElementType();
2322 unsigned NumElts = VT.getVectorNumElements();
2323 SDValue InOp = N->getOperand(0);
2324 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2325 InOp = GetWidenedVector(InOp);
2326 EVT InVT = InOp.getValueType();
2327 EVT InEltVT = InVT.getVectorElementType();
2329 unsigned Opcode = N->getOpcode();
2330 SmallVector<SDValue, 16> Ops(NumElts);
2331 for (unsigned i=0; i < NumElts; ++i)
2332 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2333 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2334 DAG.getConstant(i, TLI.getVectorIdxTy())));
2336 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2339 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2340 EVT VT = N->getValueType(0);
2341 SDValue InOp = GetWidenedVector(N->getOperand(0));
2342 EVT InWidenVT = InOp.getValueType();
2345 // Check if we can convert between two legal vector types and extract.
2346 unsigned InWidenSize = InWidenVT.getSizeInBits();
2347 unsigned Size = VT.getSizeInBits();
2348 // x86mmx is not an acceptable vector element type, so don't try.
2349 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2350 unsigned NewNumElts = InWidenSize / Size;
2351 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2352 if (TLI.isTypeLegal(NewVT)) {
2353 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2354 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2355 DAG.getConstant(0, TLI.getVectorIdxTy()));
2359 return CreateStackStoreLoad(InOp, VT);
2362 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2363 // If the input vector is not legal, it is likely that we will not find a
2364 // legal vector of the same size. Replace the concatenate vector with a
2365 // nasty build vector.
2366 EVT VT = N->getValueType(0);
2367 EVT EltVT = VT.getVectorElementType();
2369 unsigned NumElts = VT.getVectorNumElements();
2370 SmallVector<SDValue, 16> Ops(NumElts);
2372 EVT InVT = N->getOperand(0).getValueType();
2373 unsigned NumInElts = InVT.getVectorNumElements();
2376 unsigned NumOperands = N->getNumOperands();
2377 for (unsigned i=0; i < NumOperands; ++i) {
2378 SDValue InOp = N->getOperand(i);
2379 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2380 InOp = GetWidenedVector(InOp);
2381 for (unsigned j=0; j < NumInElts; ++j)
2382 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2383 DAG.getConstant(j, TLI.getVectorIdxTy()));
2385 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2388 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2389 SDValue InOp = GetWidenedVector(N->getOperand(0));
2390 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2391 N->getValueType(0), InOp, N->getOperand(1));
2394 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2395 SDValue InOp = GetWidenedVector(N->getOperand(0));
2396 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2397 N->getValueType(0), InOp, N->getOperand(1));
2400 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2401 // We have to widen the value but we want only to store the original
2403 StoreSDNode *ST = cast<StoreSDNode>(N);
2405 SmallVector<SDValue, 16> StChain;
2406 if (ST->isTruncatingStore())
2407 GenWidenVectorTruncStores(StChain, ST);
2409 GenWidenVectorStores(StChain, ST);
2411 if (StChain.size() == 1)
2414 return DAG.getNode(ISD::TokenFactor, SDLoc(ST),
2415 MVT::Other,&StChain[0],StChain.size());
2418 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2419 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2420 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2423 // WARNING: In this code we widen the compare instruction with garbage.
2424 // This garbage may contain denormal floats which may be slow. Is this a real
2425 // concern ? Should we zero the unused lanes if this is a float compare ?
2427 // Get a new SETCC node to compare the newly widened operands.
2428 // Only some of the compared elements are legal.
2429 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2430 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2431 SVT, InOp0, InOp1, N->getOperand(2));
2433 // Extract the needed results from the result vector.
2434 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2435 SVT.getVectorElementType(),
2436 N->getValueType(0).getVectorNumElements());
2437 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2438 ResVT, WideSETCC, DAG.getConstant(0,
2439 TLI.getVectorIdxTy()));
2441 return PromoteTargetBoolean(CC, N->getValueType(0));
2445 //===----------------------------------------------------------------------===//
2446 // Vector Widening Utilities
2447 //===----------------------------------------------------------------------===//
2449 // Utility function to find the type to chop up a widen vector for load/store
2450 // TLI: Target lowering used to determine legal types.
2451 // Width: Width left need to load/store.
2452 // WidenVT: The widen vector type to load to/store from
2453 // Align: If 0, don't allow use of a wider type
2454 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2456 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2457 unsigned Width, EVT WidenVT,
2458 unsigned Align = 0, unsigned WidenEx = 0) {
2459 EVT WidenEltVT = WidenVT.getVectorElementType();
2460 unsigned WidenWidth = WidenVT.getSizeInBits();
2461 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2462 unsigned AlignInBits = Align*8;
2464 // If we have one element to load/store, return it.
2465 EVT RetVT = WidenEltVT;
2466 if (Width == WidenEltWidth)
2469 // See if there is larger legal integer than the element type to load/store
2471 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2472 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2473 EVT MemVT((MVT::SimpleValueType) VT);
2474 unsigned MemVTWidth = MemVT.getSizeInBits();
2475 if (MemVT.getSizeInBits() <= WidenEltWidth)
2477 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2478 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2479 (MemVTWidth <= Width ||
2480 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2486 // See if there is a larger vector type to load/store that has the same vector
2487 // element type and is evenly divisible with the WidenVT.
2488 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2489 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2490 EVT MemVT = (MVT::SimpleValueType) VT;
2491 unsigned MemVTWidth = MemVT.getSizeInBits();
2492 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2493 (WidenWidth % MemVTWidth) == 0 &&
2494 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2495 (MemVTWidth <= Width ||
2496 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2497 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2505 // Builds a vector type from scalar loads
2506 // VecTy: Resulting Vector type
2507 // LDOps: Load operators to build a vector type
2508 // [Start,End) the list of loads to use.
2509 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2510 SmallVectorImpl<SDValue> &LdOps,
2511 unsigned Start, unsigned End) {
2512 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2513 SDLoc dl(LdOps[Start]);
2514 EVT LdTy = LdOps[Start].getValueType();
2515 unsigned Width = VecTy.getSizeInBits();
2516 unsigned NumElts = Width / LdTy.getSizeInBits();
2517 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2520 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2522 for (unsigned i = Start + 1; i != End; ++i) {
2523 EVT NewLdTy = LdOps[i].getValueType();
2524 if (NewLdTy != LdTy) {
2525 NumElts = Width / NewLdTy.getSizeInBits();
2526 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2527 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2528 // Readjust position and vector position based on new load type
2529 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2532 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2533 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2535 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2538 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2540 // The strategy assumes that we can efficiently load powers of two widths.
2541 // The routines chops the vector into the largest vector loads with the same
2542 // element type or scalar loads and then recombines it to the widen vector
2544 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2545 unsigned WidenWidth = WidenVT.getSizeInBits();
2546 EVT LdVT = LD->getMemoryVT();
2548 assert(LdVT.isVector() && WidenVT.isVector());
2549 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2552 SDValue Chain = LD->getChain();
2553 SDValue BasePtr = LD->getBasePtr();
2554 unsigned Align = LD->getAlignment();
2555 bool isVolatile = LD->isVolatile();
2556 bool isNonTemporal = LD->isNonTemporal();
2557 bool isInvariant = LD->isInvariant();
2558 const MDNode *TBAAInfo = LD->getTBAAInfo();
2560 int LdWidth = LdVT.getSizeInBits();
2561 int WidthDiff = WidenWidth - LdWidth; // Difference
2562 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2564 // Find the vector type that can load from.
2565 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2566 int NewVTWidth = NewVT.getSizeInBits();
2567 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2568 isVolatile, isNonTemporal, isInvariant, Align,
2570 LdChain.push_back(LdOp.getValue(1));
2572 // Check if we can load the element with one instruction
2573 if (LdWidth <= NewVTWidth) {
2574 if (!NewVT.isVector()) {
2575 unsigned NumElts = WidenWidth / NewVTWidth;
2576 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2577 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2578 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2580 if (NewVT == WidenVT)
2583 assert(WidenWidth % NewVTWidth == 0);
2584 unsigned NumConcat = WidenWidth / NewVTWidth;
2585 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2586 SDValue UndefVal = DAG.getUNDEF(NewVT);
2587 ConcatOps[0] = LdOp;
2588 for (unsigned i = 1; i != NumConcat; ++i)
2589 ConcatOps[i] = UndefVal;
2590 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2594 // Load vector by using multiple loads from largest vector to scalar
2595 SmallVector<SDValue, 16> LdOps;
2596 LdOps.push_back(LdOp);
2598 LdWidth -= NewVTWidth;
2599 unsigned Offset = 0;
2601 while (LdWidth > 0) {
2602 unsigned Increment = NewVTWidth / 8;
2603 Offset += Increment;
2604 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2605 DAG.getConstant(Increment, BasePtr.getValueType()));
2608 if (LdWidth < NewVTWidth) {
2609 // Our current type we are using is too large, find a better size
2610 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2611 NewVTWidth = NewVT.getSizeInBits();
2612 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2613 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2614 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2616 LdChain.push_back(L.getValue(1));
2617 if (L->getValueType(0).isVector()) {
2618 SmallVector<SDValue, 16> Loads;
2620 unsigned size = L->getValueSizeInBits(0);
2621 while (size < LdOp->getValueSizeInBits(0)) {
2622 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2623 size += L->getValueSizeInBits(0);
2625 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2626 &Loads[0], Loads.size());
2629 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2630 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2631 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2633 LdChain.push_back(L.getValue(1));
2639 LdWidth -= NewVTWidth;
2642 // Build the vector from the loads operations
2643 unsigned End = LdOps.size();
2644 if (!LdOps[0].getValueType().isVector())
2645 // All the loads are scalar loads.
2646 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2648 // If the load contains vectors, build the vector using concat vector.
2649 // All of the vectors used to loads are power of 2 and the scalars load
2650 // can be combined to make a power of 2 vector.
2651 SmallVector<SDValue, 16> ConcatOps(End);
2654 EVT LdTy = LdOps[i].getValueType();
2655 // First combine the scalar loads to a vector
2656 if (!LdTy.isVector()) {
2657 for (--i; i >= 0; --i) {
2658 LdTy = LdOps[i].getValueType();
2659 if (LdTy.isVector())
2662 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2664 ConcatOps[--Idx] = LdOps[i];
2665 for (--i; i >= 0; --i) {
2666 EVT NewLdTy = LdOps[i].getValueType();
2667 if (NewLdTy != LdTy) {
2668 // Create a larger vector
2669 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2670 &ConcatOps[Idx], End - Idx);
2674 ConcatOps[--Idx] = LdOps[i];
2677 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2678 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2679 &ConcatOps[Idx], End - Idx);
2681 // We need to fill the rest with undefs to build the vector
2682 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2683 SmallVector<SDValue, 16> WidenOps(NumOps);
2684 SDValue UndefVal = DAG.getUNDEF(LdTy);
2687 for (; i != End-Idx; ++i)
2688 WidenOps[i] = ConcatOps[Idx+i];
2689 for (; i != NumOps; ++i)
2690 WidenOps[i] = UndefVal;
2692 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2696 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2698 ISD::LoadExtType ExtType) {
2699 // For extension loads, it may not be more efficient to chop up the vector
2700 // and then extended it. Instead, we unroll the load and build a new vector.
2701 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2702 EVT LdVT = LD->getMemoryVT();
2704 assert(LdVT.isVector() && WidenVT.isVector());
2707 SDValue Chain = LD->getChain();
2708 SDValue BasePtr = LD->getBasePtr();
2709 unsigned Align = LD->getAlignment();
2710 bool isVolatile = LD->isVolatile();
2711 bool isNonTemporal = LD->isNonTemporal();
2712 const MDNode *TBAAInfo = LD->getTBAAInfo();
2714 EVT EltVT = WidenVT.getVectorElementType();
2715 EVT LdEltVT = LdVT.getVectorElementType();
2716 unsigned NumElts = LdVT.getVectorNumElements();
2718 // Load each element and widen
2719 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2720 SmallVector<SDValue, 16> Ops(WidenNumElts);
2721 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2722 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2723 LD->getPointerInfo(),
2724 LdEltVT, isVolatile, isNonTemporal, Align, TBAAInfo);
2725 LdChain.push_back(Ops[0].getValue(1));
2726 unsigned i = 0, Offset = Increment;
2727 for (i=1; i < NumElts; ++i, Offset += Increment) {
2728 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2730 DAG.getConstant(Offset,
2731 BasePtr.getValueType()));
2732 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2733 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2734 isVolatile, isNonTemporal, Align, TBAAInfo);
2735 LdChain.push_back(Ops[i].getValue(1));
2738 // Fill the rest with undefs
2739 SDValue UndefVal = DAG.getUNDEF(EltVT);
2740 for (; i != WidenNumElts; ++i)
2743 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2747 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2749 // The strategy assumes that we can efficiently store powers of two widths.
2750 // The routines chops the vector into the largest vector stores with the same
2751 // element type or scalar stores.
2752 SDValue Chain = ST->getChain();
2753 SDValue BasePtr = ST->getBasePtr();
2754 unsigned Align = ST->getAlignment();
2755 bool isVolatile = ST->isVolatile();
2756 bool isNonTemporal = ST->isNonTemporal();
2757 const MDNode *TBAAInfo = ST->getTBAAInfo();
2758 SDValue ValOp = GetWidenedVector(ST->getValue());
2761 EVT StVT = ST->getMemoryVT();
2762 unsigned StWidth = StVT.getSizeInBits();
2763 EVT ValVT = ValOp.getValueType();
2764 unsigned ValWidth = ValVT.getSizeInBits();
2765 EVT ValEltVT = ValVT.getVectorElementType();
2766 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2767 assert(StVT.getVectorElementType() == ValEltVT);
2769 int Idx = 0; // current index to store
2770 unsigned Offset = 0; // offset from base to store
2771 while (StWidth != 0) {
2772 // Find the largest vector type we can store with
2773 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2774 unsigned NewVTWidth = NewVT.getSizeInBits();
2775 unsigned Increment = NewVTWidth / 8;
2776 if (NewVT.isVector()) {
2777 unsigned NumVTElts = NewVT.getVectorNumElements();
2779 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2780 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2781 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2782 ST->getPointerInfo().getWithOffset(Offset),
2783 isVolatile, isNonTemporal,
2784 MinAlign(Align, Offset), TBAAInfo));
2785 StWidth -= NewVTWidth;
2786 Offset += Increment;
2788 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2789 DAG.getConstant(Increment, BasePtr.getValueType()));
2790 } while (StWidth != 0 && StWidth >= NewVTWidth);
2792 // Cast the vector to the scalar type we can store
2793 unsigned NumElts = ValWidth / NewVTWidth;
2794 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2795 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2796 // Readjust index position based on new vector type
2797 Idx = Idx * ValEltWidth / NewVTWidth;
2799 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2800 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2801 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2802 ST->getPointerInfo().getWithOffset(Offset),
2803 isVolatile, isNonTemporal,
2804 MinAlign(Align, Offset), TBAAInfo));
2805 StWidth -= NewVTWidth;
2806 Offset += Increment;
2807 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2808 DAG.getConstant(Increment, BasePtr.getValueType()));
2809 } while (StWidth != 0 && StWidth >= NewVTWidth);
2810 // Restore index back to be relative to the original widen element type
2811 Idx = Idx * NewVTWidth / ValEltWidth;
2817 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2819 // For extension loads, it may not be more efficient to truncate the vector
2820 // and then store it. Instead, we extract each element and then store it.
2821 SDValue Chain = ST->getChain();
2822 SDValue BasePtr = ST->getBasePtr();
2823 unsigned Align = ST->getAlignment();
2824 bool isVolatile = ST->isVolatile();
2825 bool isNonTemporal = ST->isNonTemporal();
2826 const MDNode *TBAAInfo = ST->getTBAAInfo();
2827 SDValue ValOp = GetWidenedVector(ST->getValue());
2830 EVT StVT = ST->getMemoryVT();
2831 EVT ValVT = ValOp.getValueType();
2833 // It must be true that we the widen vector type is bigger than where
2834 // we need to store.
2835 assert(StVT.isVector() && ValOp.getValueType().isVector());
2836 assert(StVT.bitsLT(ValOp.getValueType()));
2838 // For truncating stores, we can not play the tricks of chopping legal
2839 // vector types and bit cast it to the right type. Instead, we unroll
2841 EVT StEltVT = StVT.getVectorElementType();
2842 EVT ValEltVT = ValVT.getVectorElementType();
2843 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2844 unsigned NumElts = StVT.getVectorNumElements();
2845 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2846 DAG.getConstant(0, TLI.getVectorIdxTy()));
2847 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2848 ST->getPointerInfo(), StEltVT,
2849 isVolatile, isNonTemporal, Align,
2851 unsigned Offset = Increment;
2852 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2853 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2854 BasePtr, DAG.getConstant(Offset,
2855 BasePtr.getValueType()));
2856 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2857 DAG.getConstant(0, TLI.getVectorIdxTy()));
2858 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2859 ST->getPointerInfo().getWithOffset(Offset),
2860 StEltVT, isVolatile, isNonTemporal,
2861 MinAlign(Align, Offset), TBAAInfo));
2865 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2866 /// input vector must have the same element type as NVT.
2867 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2868 // Note that InOp might have been widened so it might already have
2869 // the right width or it might need be narrowed.
2870 EVT InVT = InOp.getValueType();
2871 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2872 "input and widen element type must match");
2875 // Check if InOp already has the right width.
2879 unsigned InNumElts = InVT.getVectorNumElements();
2880 unsigned WidenNumElts = NVT.getVectorNumElements();
2881 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2882 unsigned NumConcat = WidenNumElts / InNumElts;
2883 SmallVector<SDValue, 16> Ops(NumConcat);
2884 SDValue UndefVal = DAG.getUNDEF(InVT);
2886 for (unsigned i = 1; i != NumConcat; ++i)
2889 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2892 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2893 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2894 DAG.getConstant(0, TLI.getVectorIdxTy()));
2896 // Fall back to extract and build.
2897 SmallVector<SDValue, 16> Ops(WidenNumElts);
2898 EVT EltVT = NVT.getVectorElementType();
2899 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2901 for (Idx = 0; Idx < MinNumElts; ++Idx)
2902 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2903 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2905 SDValue UndefVal = DAG.getUNDEF(EltVT);
2906 for ( ; Idx < WidenNumElts; ++Idx)
2907 Ops[Idx] = UndefVal;
2908 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);