1 //===---- ScheduleDAGList.cpp - Implement a list scheduler for isel DAG ---===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Evan Cheng and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements bottom-up and top-down list schedulers, using standard
11 // algorithms. The basic approach uses a priority queue of available nodes to
12 // schedule. One at a time, nodes are taken from the priority queue (thus in
13 // priority order), checked for legality to schedule, and emitted if legal.
15 // Nodes may not be legal to schedule either due to structural hazards (e.g.
16 // pipeline or resource constraints) or because an input to the instruction has
17 // not completed execution.
19 //===----------------------------------------------------------------------===//
21 #define DEBUG_TYPE "sched"
22 #include "llvm/CodeGen/ScheduleDAG.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/ADT/Statistic.h"
35 Statistic<> NumNoops ("scheduler", "Number of noops inserted");
36 Statistic<> NumStalls("scheduler", "Number of pipeline stalls");
38 /// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or
39 /// a group of nodes flagged together.
41 SDNode *Node; // Representative node.
42 std::vector<SDNode*> FlaggedNodes; // All nodes flagged to Node.
43 std::set<SUnit*> Preds; // All real predecessors.
44 std::set<SUnit*> ChainPreds; // All chain predecessors.
45 std::set<SUnit*> Succs; // All real successors.
46 std::set<SUnit*> ChainSuccs; // All chain successors.
47 short NumPredsLeft; // # of preds not scheduled.
48 short NumSuccsLeft; // # of succs not scheduled.
49 short NumChainPredsLeft; // # of chain preds not scheduled.
50 short NumChainSuccsLeft; // # of chain succs not scheduled.
51 bool isTwoAddress : 1; // Is a two-address instruction.
52 bool isDefNUseOperand : 1; // Is a def&use operand.
53 unsigned short Latency; // Node latency.
54 unsigned CycleBound; // Upper/lower cycle to be scheduled at.
55 unsigned NodeNum; // Entry # of node in the node vector.
57 SUnit(SDNode *node, unsigned nodenum)
58 : Node(node), NumPredsLeft(0), NumSuccsLeft(0),
59 NumChainPredsLeft(0), NumChainSuccsLeft(0),
60 isTwoAddress(false), isDefNUseOperand(false),
61 Latency(0), CycleBound(0), NodeNum(nodenum) {}
63 void dump(const SelectionDAG *G, bool All=true) const;
67 void SUnit::dump(const SelectionDAG *G, bool All) const {
71 if (FlaggedNodes.size() != 0) {
72 for (unsigned i = 0, e = FlaggedNodes.size(); i != e; i++) {
74 FlaggedNodes[i]->dump(G);
80 std::cerr << " # preds left : " << NumPredsLeft << "\n";
81 std::cerr << " # succs left : " << NumSuccsLeft << "\n";
82 std::cerr << " # chain preds left : " << NumChainPredsLeft << "\n";
83 std::cerr << " # chain succs left : " << NumChainSuccsLeft << "\n";
84 std::cerr << " Latency : " << Latency << "\n";
86 if (Preds.size() != 0) {
87 std::cerr << " Predecessors:\n";
88 for (std::set<SUnit*>::const_iterator I = Preds.begin(),
89 E = Preds.end(); I != E; ++I) {
94 if (ChainPreds.size() != 0) {
95 std::cerr << " Chained Preds:\n";
96 for (std::set<SUnit*>::const_iterator I = ChainPreds.begin(),
97 E = ChainPreds.end(); I != E; ++I) {
102 if (Succs.size() != 0) {
103 std::cerr << " Successors:\n";
104 for (std::set<SUnit*>::const_iterator I = Succs.begin(),
105 E = Succs.end(); I != E; ++I) {
107 (*I)->dump(G, false);
110 if (ChainSuccs.size() != 0) {
111 std::cerr << " Chained succs:\n";
112 for (std::set<SUnit*>::const_iterator I = ChainSuccs.begin(),
113 E = ChainSuccs.end(); I != E; ++I) {
115 (*I)->dump(G, false);
121 //===----------------------------------------------------------------------===//
122 // SchedulingPriorityQueue - This interface is used to plug different
123 // priorities computation algorithms into the list scheduler. It implements the
124 // interface of a standard priority queue, where nodes are inserted in arbitrary
125 // order and returned in priority order. The computation of the priority and
126 // the representation of the queue are totally up to the implementation to
129 class SchedulingPriorityQueue {
131 virtual ~SchedulingPriorityQueue() {}
133 virtual void initNodes(const std::vector<SUnit> &SUnits) = 0;
134 virtual void releaseState() = 0;
136 virtual bool empty() const = 0;
137 virtual void push(SUnit *U) = 0;
138 virtual SUnit *pop() = 0;
144 /// ScheduleDAGList - List scheduler.
145 class ScheduleDAGList : public ScheduleDAG {
147 // SDNode to SUnit mapping (many to one).
148 std::map<SDNode*, SUnit*> SUnitMap;
149 // The schedule. Null SUnit*'s represent noop instructions.
150 std::vector<SUnit*> Sequence;
151 // Current scheduling cycle.
154 // The scheduling units.
155 std::vector<SUnit> SUnits;
157 /// isBottomUp - This is true if the scheduling problem is bottom-up, false if
161 /// PriorityQueue - The priority queue to use.
162 SchedulingPriorityQueue *PriorityQueue;
164 /// HazardRec - The hazard recognizer to use.
165 HazardRecognizer *HazardRec;
168 ScheduleDAGList(SelectionDAG &dag, MachineBasicBlock *bb,
169 const TargetMachine &tm, bool isbottomup,
170 SchedulingPriorityQueue *priorityqueue,
171 HazardRecognizer *HR)
172 : ScheduleDAG(listSchedulingBURR, dag, bb, tm),
173 CurrCycle(0), isBottomUp(isbottomup),
174 PriorityQueue(priorityqueue), HazardRec(HR) {
179 delete PriorityQueue;
187 SUnit *NewSUnit(SDNode *N);
188 void ReleasePred(SchedulingPriorityQueue &Avail,
189 SUnit *PredSU, bool isChain = false);
190 void ReleaseSucc(SchedulingPriorityQueue &Avail,
191 SUnit *SuccSU, bool isChain = false);
192 void ScheduleNodeBottomUp(SchedulingPriorityQueue &Avail, SUnit *SU);
193 void ScheduleNodeTopDown(SchedulingPriorityQueue &Avail, SUnit *SU);
194 void ListScheduleTopDown(SchedulingPriorityQueue &Available);
195 void ListScheduleBottomUp(SchedulingPriorityQueue &Available);
196 void BuildSchedUnits();
199 } // end anonymous namespace
201 HazardRecognizer::~HazardRecognizer() {}
204 /// NewSUnit - Creates a new SUnit and return a ptr to it.
205 SUnit *ScheduleDAGList::NewSUnit(SDNode *N) {
206 SUnits.push_back(SUnit(N, SUnits.size()));
207 return &SUnits.back();
210 /// ReleasePred - Decrement the NumSuccsLeft count of a predecessor. Add it to
211 /// the Available queue is the count reaches zero. Also update its cycle bound.
212 void ScheduleDAGList::ReleasePred(SchedulingPriorityQueue &Available,
213 SUnit *PredSU, bool isChain) {
214 // FIXME: the distance between two nodes is not always == the predecessor's
215 // latency. For example, the reader can very well read the register written
216 // by the predecessor later than the issue cycle. It also depends on the
217 // interrupt model (drain vs. freeze).
218 PredSU->CycleBound = std::max(PredSU->CycleBound,CurrCycle + PredSU->Latency);
221 PredSU->NumSuccsLeft--;
223 PredSU->NumChainSuccsLeft--;
226 if (PredSU->NumSuccsLeft < 0 || PredSU->NumChainSuccsLeft < 0) {
227 std::cerr << "*** List scheduling failed! ***\n";
229 std::cerr << " has been released too many times!\n";
234 if ((PredSU->NumSuccsLeft + PredSU->NumChainSuccsLeft) == 0) {
235 // EntryToken has to go last! Special case it here.
236 if (PredSU->Node->getOpcode() != ISD::EntryToken)
237 Available.push(PredSU);
241 /// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to
242 /// the Available queue is the count reaches zero. Also update its cycle bound.
243 void ScheduleDAGList::ReleaseSucc(SchedulingPriorityQueue &Available,
244 SUnit *SuccSU, bool isChain) {
245 // FIXME: the distance between two nodes is not always == the predecessor's
246 // latency. For example, the reader can very well read the register written
247 // by the predecessor later than the issue cycle. It also depends on the
248 // interrupt model (drain vs. freeze).
249 SuccSU->CycleBound = std::max(SuccSU->CycleBound,CurrCycle + SuccSU->Latency);
252 SuccSU->NumPredsLeft--;
254 SuccSU->NumChainPredsLeft--;
257 if (SuccSU->NumPredsLeft < 0 || SuccSU->NumChainPredsLeft < 0) {
258 std::cerr << "*** List scheduling failed! ***\n";
260 std::cerr << " has been released too many times!\n";
265 if ((SuccSU->NumPredsLeft + SuccSU->NumChainPredsLeft) == 0)
266 Available.push(SuccSU);
269 /// ScheduleNodeBottomUp - Add the node to the schedule. Decrement the pending
270 /// count of its predecessors. If a predecessor pending count is zero, add it to
271 /// the Available queue.
272 void ScheduleDAGList::ScheduleNodeBottomUp(SchedulingPriorityQueue &Available,
274 DEBUG(std::cerr << "*** Scheduling: ");
275 DEBUG(SU->dump(&DAG, false));
277 Sequence.push_back(SU);
279 // Bottom up: release predecessors
280 for (std::set<SUnit*>::iterator I1 = SU->Preds.begin(),
281 E1 = SU->Preds.end(); I1 != E1; ++I1) {
282 ReleasePred(Available, *I1);
285 for (std::set<SUnit*>::iterator I2 = SU->ChainPreds.begin(),
286 E2 = SU->ChainPreds.end(); I2 != E2; ++I2)
287 ReleasePred(Available, *I2, true);
292 /// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pending
293 /// count of its successors. If a successor pending count is zero, add it to
294 /// the Available queue.
295 void ScheduleDAGList::ScheduleNodeTopDown(SchedulingPriorityQueue &Available,
297 DEBUG(std::cerr << "*** Scheduling: ");
298 DEBUG(SU->dump(&DAG, false));
300 Sequence.push_back(SU);
302 // Bottom up: release successors.
303 for (std::set<SUnit*>::iterator I1 = SU->Succs.begin(),
304 E1 = SU->Succs.end(); I1 != E1; ++I1) {
305 ReleaseSucc(Available, *I1);
308 for (std::set<SUnit*>::iterator I2 = SU->ChainSuccs.begin(),
309 E2 = SU->ChainSuccs.end(); I2 != E2; ++I2)
310 ReleaseSucc(Available, *I2, true);
315 /// isReady - True if node's lower cycle bound is less or equal to the current
316 /// scheduling cycle. Always true if all nodes have uniform latency 1.
317 static inline bool isReady(SUnit *SU, unsigned CurrCycle) {
318 return SU->CycleBound <= CurrCycle;
321 /// ListScheduleBottomUp - The main loop of list scheduling for bottom-up
323 void ScheduleDAGList::ListScheduleBottomUp(SchedulingPriorityQueue &Available) {
324 // Add root to Available queue.
325 Available.push(SUnitMap[DAG.getRoot().Val]);
327 // While Available queue is not empty, grab the node with the highest
328 // priority. If it is not ready put it back. Schedule the node.
329 std::vector<SUnit*> NotReady;
330 while (!Available.empty()) {
331 SUnit *CurrNode = Available.pop();
333 while (!isReady(CurrNode, CurrCycle)) {
334 NotReady.push_back(CurrNode);
335 CurrNode = Available.pop();
338 // Add the nodes that aren't ready back onto the available list.
339 while (!NotReady.empty()) {
340 Available.push(NotReady.back());
344 ScheduleNodeBottomUp(Available, CurrNode);
347 // Add entry node last
348 if (DAG.getEntryNode().Val != DAG.getRoot().Val) {
349 SUnit *Entry = SUnitMap[DAG.getEntryNode().Val];
350 Sequence.push_back(Entry);
353 // Reverse the order if it is bottom up.
354 std::reverse(Sequence.begin(), Sequence.end());
358 // Verify that all SUnits were scheduled.
359 bool AnyNotSched = false;
360 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
361 if (SUnits[i].NumSuccsLeft != 0 || SUnits[i].NumChainSuccsLeft != 0) {
363 std::cerr << "*** List scheduling failed! ***\n";
364 SUnits[i].dump(&DAG);
365 std::cerr << "has not been scheduled!\n";
369 assert(!AnyNotSched);
373 /// ListScheduleTopDown - The main loop of list scheduling for top-down
375 void ScheduleDAGList::ListScheduleTopDown(SchedulingPriorityQueue &Available) {
376 // Emit the entry node first.
377 SUnit *Entry = SUnitMap[DAG.getEntryNode().Val];
378 ScheduleNodeTopDown(Available, Entry);
379 HazardRec->EmitInstruction(Entry->Node);
381 // All leaves to Available queue.
382 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
383 // It is available if it has no predecessors.
384 if ((SUnits[i].Preds.size() + SUnits[i].ChainPreds.size()) == 0 &&
386 Available.push(&SUnits[i]);
389 // While Available queue is not empty, grab the node with the highest
390 // priority. If it is not ready put it back. Schedule the node.
391 std::vector<SUnit*> NotReady;
392 while (!Available.empty()) {
393 SUnit *FoundNode = 0;
395 bool HasNoopHazards = false;
397 SUnit *CurNode = Available.pop();
399 // Get the node represented by this SUnit.
400 SDNode *N = CurNode->Node;
401 // If this is a pseudo op, like copyfromreg, look to see if there is a
402 // real target node flagged to it. If so, use the target node.
403 for (unsigned i = 0, e = CurNode->FlaggedNodes.size();
404 N->getOpcode() < ISD::BUILTIN_OP_END && i != e; ++i)
405 N = CurNode->FlaggedNodes[i];
407 HazardRecognizer::HazardType HT = HazardRec->getHazardType(N);
408 if (HT == HazardRecognizer::NoHazard) {
413 // Remember if this is a noop hazard.
414 HasNoopHazards |= HT == HazardRecognizer::NoopHazard;
416 NotReady.push_back(CurNode);
417 } while (!Available.empty());
419 // Add the nodes that aren't ready back onto the available list.
420 while (!NotReady.empty()) {
421 Available.push(NotReady.back());
425 // If we found a node to schedule, do it now.
427 ScheduleNodeTopDown(Available, FoundNode);
428 HazardRec->EmitInstruction(FoundNode->Node);
429 } else if (!HasNoopHazards) {
430 // Otherwise, we have a pipeline stall, but no other problem, just advance
431 // the current cycle and try again.
432 DEBUG(std::cerr << "*** Advancing cycle, no work to do\n");
433 HazardRec->AdvanceCycle();
436 // Otherwise, we have no instructions to issue and we have instructions
437 // that will fault if we don't do this right. This is the case for
438 // processors without pipeline interlocks and other cases.
439 DEBUG(std::cerr << "*** Emitting noop\n");
440 HazardRec->EmitNoop();
441 Sequence.push_back(0); // NULL SUnit* -> noop
447 // Verify that all SUnits were scheduled.
448 bool AnyNotSched = false;
449 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
450 if (SUnits[i].NumPredsLeft != 0 || SUnits[i].NumChainPredsLeft != 0) {
452 std::cerr << "*** List scheduling failed! ***\n";
453 SUnits[i].dump(&DAG);
454 std::cerr << "has not been scheduled!\n";
458 assert(!AnyNotSched);
463 void ScheduleDAGList::BuildSchedUnits() {
464 // Reserve entries in the vector for each of the SUnits we are creating. This
465 // ensure that reallocation of the vector won't happen, so SUnit*'s won't get
467 SUnits.reserve(NodeCount);
469 // Pass 1: create the SUnit's.
470 for (unsigned i = 0, NC = NodeCount; i < NC; i++) {
471 NodeInfo *NI = &Info[i];
472 SDNode *N = NI->Node;
473 if (isPassiveNode(N))
477 if (NI->isInGroup()) {
478 if (NI != NI->Group->getBottom()) // Bottom up, so only look at bottom
479 continue; // node of the NodeGroup
482 // Find the flagged nodes.
483 SDOperand FlagOp = N->getOperand(N->getNumOperands() - 1);
484 SDNode *Flag = FlagOp.Val;
485 unsigned ResNo = FlagOp.ResNo;
486 while (Flag->getValueType(ResNo) == MVT::Flag) {
487 NodeInfo *FNI = getNI(Flag);
488 assert(FNI->Group == NI->Group);
489 SU->FlaggedNodes.insert(SU->FlaggedNodes.begin(), Flag);
492 FlagOp = Flag->getOperand(Flag->getNumOperands() - 1);
494 ResNo = FlagOp.ResNo;
501 // FIXME: assumes uniform latency for now.
505 // Pass 2: add the preds, succs, etc.
506 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
507 SUnit *SU = &SUnits[i];
508 SDNode *N = SU->Node;
509 NodeInfo *NI = getNI(N);
511 if (N->isTargetOpcode() && TII->isTwoAddrInstr(N->getTargetOpcode()))
512 SU->isTwoAddress = true;
514 if (NI->isInGroup()) {
515 // Find all predecessors (of the group).
516 NodeGroupOpIterator NGOI(NI);
517 while (!NGOI.isEnd()) {
518 SDOperand Op = NGOI.next();
519 SDNode *OpN = Op.Val;
520 MVT::ValueType VT = OpN->getValueType(Op.ResNo);
521 NodeInfo *OpNI = getNI(OpN);
522 if (OpNI->Group != NI->Group && !isPassiveNode(OpN)) {
523 assert(VT != MVT::Flag);
524 SUnit *OpSU = SUnitMap[OpN];
525 if (VT == MVT::Other) {
526 if (SU->ChainPreds.insert(OpSU).second)
527 SU->NumChainPredsLeft++;
528 if (OpSU->ChainSuccs.insert(SU).second)
529 OpSU->NumChainSuccsLeft++;
531 if (SU->Preds.insert(OpSU).second)
533 if (OpSU->Succs.insert(SU).second)
534 OpSU->NumSuccsLeft++;
539 // Find node predecessors.
540 for (unsigned j = 0, e = N->getNumOperands(); j != e; j++) {
541 SDOperand Op = N->getOperand(j);
542 SDNode *OpN = Op.Val;
543 MVT::ValueType VT = OpN->getValueType(Op.ResNo);
544 if (!isPassiveNode(OpN)) {
545 assert(VT != MVT::Flag);
546 SUnit *OpSU = SUnitMap[OpN];
547 if (VT == MVT::Other) {
548 if (SU->ChainPreds.insert(OpSU).second)
549 SU->NumChainPredsLeft++;
550 if (OpSU->ChainSuccs.insert(SU).second)
551 OpSU->NumChainSuccsLeft++;
553 if (SU->Preds.insert(OpSU).second)
555 if (OpSU->Succs.insert(SU).second)
556 OpSU->NumSuccsLeft++;
557 if (j == 0 && SU->isTwoAddress)
558 OpSU->isDefNUseOperand = true;
566 /// EmitSchedule - Emit the machine code in scheduled order.
567 void ScheduleDAGList::EmitSchedule() {
568 for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
569 if (SUnit *SU = Sequence[i]) {
570 for (unsigned j = 0, ee = SU->FlaggedNodes.size(); j != ee; j++) {
571 SDNode *N = SU->FlaggedNodes[j];
574 EmitNode(getNI(SU->Node));
576 // Null SUnit* is a noop.
582 /// dump - dump the schedule.
583 void ScheduleDAGList::dump() const {
584 for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
585 if (SUnit *SU = Sequence[i])
586 SU->dump(&DAG, false);
588 std::cerr << "**** NOOP ****\n";
592 /// Schedule - Schedule the DAG using list scheduling.
593 /// FIXME: Right now it only supports the burr (bottom up register reducing)
595 void ScheduleDAGList::Schedule() {
596 DEBUG(std::cerr << "********** List Scheduling **********\n");
598 // Build scheduling units.
601 PriorityQueue->initNodes(SUnits);
603 // Execute the actual scheduling loop Top-Down or Bottom-Up as appropriate.
605 ListScheduleBottomUp(*PriorityQueue);
607 ListScheduleTopDown(*PriorityQueue);
609 PriorityQueue->releaseState();
611 DEBUG(std::cerr << "*** Final schedule ***\n");
613 DEBUG(std::cerr << "\n");
615 // Emit in scheduled order
619 //===----------------------------------------------------------------------===//
620 // RegReductionPriorityQueue Implementation
621 //===----------------------------------------------------------------------===//
623 // This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers
624 // to reduce register pressure.
627 class RegReductionPriorityQueue;
629 /// Sorting functions for the Available queue.
630 struct ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> {
631 RegReductionPriorityQueue *SPQ;
632 ls_rr_sort(RegReductionPriorityQueue *spq) : SPQ(spq) {}
633 ls_rr_sort(const ls_rr_sort &RHS) : SPQ(RHS.SPQ) {}
635 bool operator()(const SUnit* left, const SUnit* right) const;
637 } // end anonymous namespace
640 class RegReductionPriorityQueue : public SchedulingPriorityQueue {
641 // SUnits - The SUnits for the current graph.
642 const std::vector<SUnit> *SUnits;
644 // SethiUllmanNumbers - The SethiUllman number for each node.
645 std::vector<int> SethiUllmanNumbers;
647 std::priority_queue<SUnit*, std::vector<SUnit*>, ls_rr_sort> Queue;
649 RegReductionPriorityQueue() : Queue(ls_rr_sort(this)) {
652 void initNodes(const std::vector<SUnit> &sunits) {
654 // Calculate node priorities.
655 CalculatePriorities();
657 void releaseState() {
659 SethiUllmanNumbers.clear();
662 unsigned getSethiUllmanNumber(unsigned NodeNum) const {
663 assert(NodeNum < SethiUllmanNumbers.size());
664 return SethiUllmanNumbers[NodeNum];
667 bool empty() const { return Queue.empty(); }
669 void push(SUnit *U) {
673 SUnit *V = Queue.top();
678 void CalculatePriorities();
679 int CalcNodePriority(const SUnit *SU);
683 bool ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
684 unsigned LeftNum = left->NodeNum;
685 unsigned RightNum = right->NodeNum;
687 int LBonus = (int)left ->isDefNUseOperand;
688 int RBonus = (int)right->isDefNUseOperand;
690 // Special tie breaker: if two nodes share a operand, the one that
691 // use it as a def&use operand is preferred.
692 if (left->isTwoAddress && !right->isTwoAddress) {
693 SDNode *DUNode = left->Node->getOperand(0).Val;
694 if (DUNode->isOperand(right->Node))
697 if (!left->isTwoAddress && right->isTwoAddress) {
698 SDNode *DUNode = right->Node->getOperand(0).Val;
699 if (DUNode->isOperand(left->Node))
703 // Priority1 is just the number of live range genned.
704 int LPriority1 = left ->NumPredsLeft - LBonus;
705 int RPriority1 = right->NumPredsLeft - RBonus;
706 int LPriority2 = SPQ->getSethiUllmanNumber(LeftNum) + LBonus;
707 int RPriority2 = SPQ->getSethiUllmanNumber(RightNum) + RBonus;
709 if (LPriority1 > RPriority1)
711 else if (LPriority1 == RPriority1)
712 if (LPriority2 < RPriority2)
714 else if (LPriority2 == RPriority2)
715 if (left->CycleBound > right->CycleBound)
722 /// CalcNodePriority - Priority is the Sethi Ullman number.
723 /// Smaller number is the higher priority.
724 int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
725 int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
726 if (SethiUllmanNumber != INT_MIN)
727 return SethiUllmanNumber;
729 if (SU->Preds.size() == 0) {
730 SethiUllmanNumber = 1;
733 for (std::set<SUnit*>::iterator I = SU->Preds.begin(),
734 E = SU->Preds.end(); I != E; ++I) {
736 int PredSethiUllman = CalcNodePriority(PredSU);
737 if (PredSethiUllman > SethiUllmanNumber) {
738 SethiUllmanNumber = PredSethiUllman;
740 } else if (PredSethiUllman == SethiUllmanNumber)
744 if (SU->Node->getOpcode() != ISD::TokenFactor)
745 SethiUllmanNumber += Extra;
747 SethiUllmanNumber = (Extra == 1) ? 0 : Extra-1;
750 return SethiUllmanNumber;
753 /// CalculatePriorities - Calculate priorities of all scheduling units.
754 void RegReductionPriorityQueue::CalculatePriorities() {
755 SethiUllmanNumbers.assign(SUnits->size(), INT_MIN);
757 for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
758 CalcNodePriority(&(*SUnits)[i]);
762 //===----------------------------------------------------------------------===//
763 // Public Constructor Functions
764 //===----------------------------------------------------------------------===//
766 llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAG &DAG,
767 MachineBasicBlock *BB) {
768 return new ScheduleDAGList(DAG, BB, DAG.getTarget(), true,
769 new RegReductionPriorityQueue(),
770 new HazardRecognizer());
773 /// createTDListDAGScheduler - This creates a top-down list scheduler with the
774 /// specified hazard recognizer.
775 ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAG &DAG,
776 MachineBasicBlock *BB,
777 HazardRecognizer *HR) {
778 return new ScheduleDAGList(DAG, BB, DAG.getTarget(), false,
779 new RegReductionPriorityQueue(),