1 //===---- ScheduleDAGList.cpp - Implement a list scheduler for isel DAG ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements a top-down list scheduler, using standard algorithms.
11 // The basic approach uses a priority queue of available nodes to schedule.
12 // One at a time, nodes are taken from the priority queue (thus in priority
13 // order), checked for legality to schedule, and emitted if legal.
15 // Nodes may not be legal to schedule either due to structural hazards (e.g.
16 // pipeline or resource constraints) or because an input to the instruction has
17 // not completed execution.
19 //===----------------------------------------------------------------------===//
21 #define DEBUG_TYPE "pre-RA-sched"
22 #include "llvm/CodeGen/LatencyPriorityQueue.h"
23 #include "llvm/CodeGen/ScheduleDAGSDNodes.h"
24 #include "llvm/CodeGen/SchedulerRegistry.h"
25 #include "llvm/CodeGen/SelectionDAGISel.h"
26 #include "llvm/Target/TargetRegisterInfo.h"
27 #include "llvm/Target/TargetData.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetInstrInfo.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Compiler.h"
32 #include "llvm/ADT/PriorityQueue.h"
33 #include "llvm/ADT/Statistic.h"
37 STATISTIC(NumNoops , "Number of noops inserted");
38 STATISTIC(NumStalls, "Number of pipeline stalls");
40 static RegisterScheduler
41 tdListDAGScheduler("list-td", "Top-down list scheduler",
42 createTDListDAGScheduler);
45 //===----------------------------------------------------------------------===//
46 /// ScheduleDAGList - The actual list scheduler implementation. This supports
47 /// top-down scheduling.
49 class VISIBILITY_HIDDEN ScheduleDAGList : public ScheduleDAGSDNodes {
51 /// AvailableQueue - The priority queue to use for the available SUnits.
53 SchedulingPriorityQueue *AvailableQueue;
55 /// PendingQueue - This contains all of the instructions whose operands have
56 /// been issued, but their results are not ready yet (due to the latency of
57 /// the operation). Once the operands become available, the instruction is
58 /// added to the AvailableQueue.
59 std::vector<SUnit*> PendingQueue;
61 /// HazardRec - The hazard recognizer to use.
62 HazardRecognizer *HazardRec;
65 ScheduleDAGList(SelectionDAG *dag, MachineBasicBlock *bb,
66 const TargetMachine &tm,
67 SchedulingPriorityQueue *availqueue,
69 : ScheduleDAGSDNodes(dag, bb, tm),
70 AvailableQueue(availqueue), HazardRec(HR) {
75 delete AvailableQueue;
81 void ReleaseSucc(SUnit *SU, const SDep &D);
82 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
83 void ListScheduleTopDown();
85 } // end anonymous namespace
87 HazardRecognizer::~HazardRecognizer() {}
90 /// Schedule - Schedule the DAG using list scheduling.
91 void ScheduleDAGList::Schedule() {
92 DOUT << "********** List Scheduling **********\n";
94 // Build the scheduling graph.
97 AvailableQueue->initNodes(SUnits);
99 ListScheduleTopDown();
101 AvailableQueue->releaseState();
104 //===----------------------------------------------------------------------===//
105 // Top-Down Scheduling
106 //===----------------------------------------------------------------------===//
108 /// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to
109 /// the PendingQueue if the count reaches zero. Also update its cycle bound.
110 void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) {
111 SUnit *SuccSU = D.getSUnit();
112 --SuccSU->NumPredsLeft;
115 if (SuccSU->NumPredsLeft < 0) {
116 cerr << "*** Scheduling failed! ***\n";
118 cerr << " has been released too many times!\n";
123 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency());
125 if (SuccSU->NumPredsLeft == 0) {
126 PendingQueue.push_back(SuccSU);
130 /// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pending
131 /// count of its successors. If a successor pending count is zero, add it to
132 /// the Available queue.
133 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
134 DOUT << "*** Scheduling [" << CurCycle << "]: ";
135 DEBUG(SU->dump(this));
137 Sequence.push_back(SU);
138 assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!");
139 SU->setDepthToAtLeast(CurCycle);
141 // Top down: release successors.
142 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
146 SU->isScheduled = true;
147 AvailableQueue->ScheduledNode(SU);
150 /// ListScheduleTopDown - The main loop of list scheduling for top-down
152 void ScheduleDAGList::ListScheduleTopDown() {
153 unsigned CurCycle = 0;
155 // All leaves to Available queue.
156 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
157 // It is available if it has no predecessors.
158 if (SUnits[i].Preds.empty()) {
159 AvailableQueue->push(&SUnits[i]);
160 SUnits[i].isAvailable = true;
164 // While Available queue is not empty, grab the node with the highest
165 // priority. If it is not ready put it back. Schedule the node.
166 std::vector<SUnit*> NotReady;
167 Sequence.reserve(SUnits.size());
168 while (!AvailableQueue->empty() || !PendingQueue.empty()) {
169 // Check to see if any of the pending instructions are ready to issue. If
170 // so, add them to the available queue.
171 for (unsigned i = 0, e = PendingQueue.size(); i != e; ++i) {
172 if (PendingQueue[i]->getDepth() == CurCycle) {
173 AvailableQueue->push(PendingQueue[i]);
174 PendingQueue[i]->isAvailable = true;
175 PendingQueue[i] = PendingQueue.back();
176 PendingQueue.pop_back();
179 assert(PendingQueue[i]->getDepth() > CurCycle && "Negative latency?");
183 // If there are no instructions available, don't try to issue anything, and
184 // don't advance the hazard recognizer.
185 if (AvailableQueue->empty()) {
190 SUnit *FoundSUnit = 0;
191 SDNode *FoundNode = 0;
193 bool HasNoopHazards = false;
194 while (!AvailableQueue->empty()) {
195 SUnit *CurSUnit = AvailableQueue->pop();
197 // Get the node represented by this SUnit.
198 FoundNode = CurSUnit->getNode();
200 // If this is a pseudo op, like copyfromreg, look to see if there is a
201 // real target node flagged to it. If so, use the target node.
202 while (!FoundNode->isMachineOpcode()) {
203 SDNode *N = FoundNode->getFlaggedNode();
208 HazardRecognizer::HazardType HT = HazardRec->getHazardType(FoundNode);
209 if (HT == HazardRecognizer::NoHazard) {
210 FoundSUnit = CurSUnit;
214 // Remember if this is a noop hazard.
215 HasNoopHazards |= HT == HazardRecognizer::NoopHazard;
217 NotReady.push_back(CurSUnit);
220 // Add the nodes that aren't ready back onto the available list.
221 if (!NotReady.empty()) {
222 AvailableQueue->push_all(NotReady);
226 // If we found a node to schedule, do it now.
228 ScheduleNodeTopDown(FoundSUnit, CurCycle);
229 HazardRec->EmitInstruction(FoundNode);
231 // If this is a pseudo-op node, we don't want to increment the current
233 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
235 } else if (!HasNoopHazards) {
236 // Otherwise, we have a pipeline stall, but no other problem, just advance
237 // the current cycle and try again.
238 DOUT << "*** Advancing cycle, no work to do\n";
239 HazardRec->AdvanceCycle();
243 // Otherwise, we have no instructions to issue and we have instructions
244 // that will fault if we don't do this right. This is the case for
245 // processors without pipeline interlocks and other cases.
246 DOUT << "*** Emitting noop\n";
247 HazardRec->EmitNoop();
248 Sequence.push_back(0); // NULL SUnit* -> noop
255 VerifySchedule(/*isBottomUp=*/false);
259 //===----------------------------------------------------------------------===//
260 // Public Constructor Functions
261 //===----------------------------------------------------------------------===//
263 /// createTDListDAGScheduler - This creates a top-down list scheduler with a
264 /// new hazard recognizer. This scheduler takes ownership of the hazard
265 /// recognizer and deletes it when done.
266 ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAGISel *IS,
268 const TargetMachine *TM,
269 MachineBasicBlock *BB, bool Fast) {
270 return new ScheduleDAGList(DAG, BB, *TM,
271 new LatencyPriorityQueue(),
272 IS->CreateTargetHazardRecognizer());