1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getAddressingMode());
433 ID.AddInteger(LD->getExtensionType());
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawFlags());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getAddressingMode());
441 ID.AddInteger(ST->isTruncatingStore());
442 ID.AddInteger(ST->getMemoryVT().getRawBits());
443 ID.AddInteger(ST->getRawFlags());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX: {
458 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
459 ID.AddInteger(AT->getRawFlags());
462 } // end switch (N->getOpcode())
465 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
467 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
468 AddNodeIDOpcode(ID, N->getOpcode());
469 // Add the return value info.
470 AddNodeIDValueTypes(ID, N->getVTList());
471 // Add the operand info.
472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
474 // Handle SDNode leafs with special info.
475 AddNodeIDCustom(ID, N);
478 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
479 /// the CSE map that carries both alignment and volatility information.
481 static inline unsigned
482 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
483 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 case ISD::DBG_STOPPOINT:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Flag)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
600 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
601 /// correspond to it. This is useful when we're about to delete or repurpose
602 /// the node. We don't want future request for structurally identical nodes
603 /// to return N anymore.
604 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
606 switch (N->getOpcode()) {
607 case ISD::EntryToken:
608 assert(0 && "EntryToken should not be in CSEMaps!");
610 case ISD::HANDLENODE: return false; // noop.
612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
613 "Cond code doesn't exist!");
614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
617 case ISD::ExternalSymbol:
618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
620 case ISD::TargetExternalSymbol:
622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624 case ISD::VALUETYPE: {
625 MVT VT = cast<VTSDNode>(N)->getVT();
626 if (VT.isExtended()) {
627 Erased = ExtendedValueTypeNodes.erase(VT);
629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
630 ValueTypeNodes[VT.getSimpleVT()] = 0;
635 // Remove it from the CSE Map.
636 Erased = CSEMap.RemoveNode(N);
640 // Verify that the node was actually in one of the CSE maps, unless it has a
641 // flag result (which cannot be CSE'd) or is one of the special cases that are
642 // not subject to CSE.
643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
644 !N->isMachineOpcode() && !doNotCSE(N)) {
647 assert(0 && "Node is not in map!");
653 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
654 /// maps and modified in place. Add it back to the CSE maps, unless an identical
655 /// node already exists, in which case transfer all its users to the existing
656 /// node. This transfer can potentially trigger recursive merging.
659 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
660 DAGUpdateListener *UpdateListener) {
661 // For node types that aren't CSE'd, just act as if no identical node
664 SDNode *Existing = CSEMap.GetOrInsertNode(N);
666 // If there was already an existing matching node, use ReplaceAllUsesWith
667 // to replace the dead one with the existing one. This can cause
668 // recursive merging of other unrelated nodes down the line.
669 ReplaceAllUsesWith(N, Existing, UpdateListener);
671 // N is now dead. Inform the listener if it exists and delete it.
673 UpdateListener->NodeDeleted(N, Existing);
674 DeleteNodeNotInCSEMaps(N);
679 // If the node doesn't already exist, we updated it. Inform a listener if
682 UpdateListener->NodeUpdated(N);
685 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
686 /// were replaced with those specified. If this node is never memoized,
687 /// return null, otherwise return a pointer to the slot it would take. If a
688 /// node already exists with these operands, the slot will be non-null.
689 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
694 SDValue Ops[] = { Op };
696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
697 AddNodeIDCustom(ID, N);
698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
706 SDValue Op1, SDValue Op2,
711 SDValue Ops[] = { Op1, Op2 };
713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
714 AddNodeIDCustom(ID, N);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
720 /// were replaced with those specified. If this node is never memoized,
721 /// return null, otherwise return a pointer to the slot it would take. If a
722 /// node already exists with these operands, the slot will be non-null.
723 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
724 const SDValue *Ops,unsigned NumOps,
730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
731 AddNodeIDCustom(ID, N);
732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
736 void SelectionDAG::VerifyNode(SDNode *N) {
737 switch (N->getOpcode()) {
740 case ISD::BUILD_PAIR: {
741 MVT VT = N->getValueType(0);
742 assert(N->getNumValues() == 1 && "Too many results!");
743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
744 "Wrong return type!");
745 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
747 "Mismatched operand types!");
748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
749 "Wrong operand type!");
750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
751 "Wrong return type size");
754 case ISD::BUILD_VECTOR: {
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(N->getValueType(0).isVector() && "Wrong return type!");
757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
758 "Wrong number of operands!");
759 // FIXME: Change vector_shuffle to a variadic node with mask elements being
760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
761 // operand, and it is not always possible to legalize it. Turning off the
762 // following checks at least makes it possible to legalize most of the time.
763 // MVT EltVT = N->getValueType(0).getVectorElementType();
764 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
765 // assert(I->getValueType() == EltVT &&
766 // "Wrong operand type!");
772 /// getMVTAlignment - Compute the default alignment value for the
775 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
776 const Type *Ty = VT == MVT::iPTR ?
777 PointerType::get(Type::Int8Ty, 0) :
780 return TLI.getTargetData()->getABITypeAlignment(Ty);
783 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
784 : TLI(tli), FLI(fli),
785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
786 Root(getEntryNode()) {
787 AllNodes.push_back(&EntryNode);
790 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
797 SelectionDAG::~SelectionDAG() {
801 void SelectionDAG::allnodes_clear() {
802 assert(&*AllNodes.begin() == &EntryNode);
803 AllNodes.remove(AllNodes.begin());
804 while (!AllNodes.empty())
805 DeallocateNode(AllNodes.begin());
808 void SelectionDAG::clear() {
810 OperandAllocator.Reset();
813 ExtendedValueTypeNodes.clear();
814 ExternalSymbols.clear();
815 TargetExternalSymbols.clear();
816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
817 static_cast<CondCodeSDNode*>(0));
818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
819 static_cast<SDNode*>(0));
821 EntryNode.UseList = 0;
822 AllNodes.push_back(&EntryNode);
823 Root = getEntryNode();
826 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
827 if (Op.getValueType() == VT) return Op;
828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
830 return getNode(ISD::AND, Op.getValueType(), Op,
831 getConstant(Imm, Op.getValueType()));
834 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
836 SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) {
839 MVT EltVT = VT.getVectorElementType();
840 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT);
841 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
842 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size());
844 NegOne = getConstant(VT.getIntegerVTBitMask(), VT);
846 return getNode(ISD::XOR, VT, Val, NegOne);
849 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
850 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
851 assert((EltVT.getSizeInBits() >= 64 ||
852 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
853 "getConstant with a uint64_t value that doesn't fit in the type!");
854 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
857 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
858 return getConstant(*ConstantInt::get(Val), VT, isT);
861 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
862 assert(VT.isInteger() && "Cannot create FP integer constant!");
864 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
865 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
866 "APInt size does not match type size!");
868 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
870 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
874 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
876 return SDValue(N, 0);
878 N = NodeAllocator.Allocate<ConstantSDNode>();
879 new (N) ConstantSDNode(isT, &Val, EltVT);
880 CSEMap.InsertNode(N, IP);
881 AllNodes.push_back(N);
884 SDValue Result(N, 0);
886 SmallVector<SDValue, 8> Ops;
887 Ops.assign(VT.getVectorNumElements(), Result);
888 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
893 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
894 return getConstant(Val, TLI.getPointerTy(), isTarget);
898 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
899 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
902 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
903 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
906 VT.isVector() ? VT.getVectorElementType() : VT;
908 // Do the map lookup using the actual bit pattern for the floating point
909 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
910 // we don't have issues with SNANs.
911 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
913 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
917 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
919 return SDValue(N, 0);
921 N = NodeAllocator.Allocate<ConstantFPSDNode>();
922 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
923 CSEMap.InsertNode(N, IP);
924 AllNodes.push_back(N);
927 SDValue Result(N, 0);
929 SmallVector<SDValue, 8> Ops;
930 Ops.assign(VT.getVectorNumElements(), Result);
931 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
936 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
938 VT.isVector() ? VT.getVectorElementType() : VT;
940 return getConstantFP(APFloat((float)Val), VT, isTarget);
942 return getConstantFP(APFloat(Val), VT, isTarget);
945 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
946 MVT VT, int64_t Offset,
950 // Truncate (with sign-extension) the offset value to the pointer size.
951 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
953 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
955 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
957 // If GV is an alias then use the aliasee for determining thread-localness.
958 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
959 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
962 if (GVar && GVar->isThreadLocal())
963 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
965 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
968 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
970 ID.AddInteger(Offset);
972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
973 return SDValue(E, 0);
974 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
975 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
976 CSEMap.InsertNode(N, IP);
977 AllNodes.push_back(N);
978 return SDValue(N, 0);
981 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
982 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
988 return SDValue(E, 0);
989 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
990 new (N) FrameIndexSDNode(FI, VT, isTarget);
991 CSEMap.InsertNode(N, IP);
992 AllNodes.push_back(N);
993 return SDValue(N, 0);
996 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
997 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1003 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1005 new (N) JumpTableSDNode(JTI, VT, isTarget);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1012 unsigned Alignment, int Offset,
1016 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1017 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1018 FoldingSetNodeID ID;
1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1020 ID.AddInteger(Alignment);
1021 ID.AddInteger(Offset);
1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1025 return SDValue(E, 0);
1026 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1027 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1028 CSEMap.InsertNode(N, IP);
1029 AllNodes.push_back(N);
1030 return SDValue(N, 0);
1034 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1035 unsigned Alignment, int Offset,
1039 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1040 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1041 FoldingSetNodeID ID;
1042 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1043 ID.AddInteger(Alignment);
1044 ID.AddInteger(Offset);
1045 C->AddSelectionDAGCSEId(ID);
1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1048 return SDValue(E, 0);
1049 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1050 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1051 CSEMap.InsertNode(N, IP);
1052 AllNodes.push_back(N);
1053 return SDValue(N, 0);
1057 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1058 FoldingSetNodeID ID;
1059 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1063 return SDValue(E, 0);
1064 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1065 new (N) BasicBlockSDNode(MBB);
1066 CSEMap.InsertNode(N, IP);
1067 AllNodes.push_back(N);
1068 return SDValue(N, 0);
1071 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1072 FoldingSetNodeID ID;
1073 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1077 return SDValue(E, 0);
1078 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1079 new (N) BasicBlockSDNode(MBB, dl);
1080 CSEMap.InsertNode(N, IP);
1081 AllNodes.push_back(N);
1082 return SDValue(N, 0);
1085 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1086 FoldingSetNodeID ID;
1087 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1088 ID.AddInteger(Flags.getRawBits());
1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1091 return SDValue(E, 0);
1092 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1093 new (N) ARG_FLAGSSDNode(Flags);
1094 CSEMap.InsertNode(N, IP);
1095 AllNodes.push_back(N);
1096 return SDValue(N, 0);
1099 SDValue SelectionDAG::getValueType(MVT VT) {
1100 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1101 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1103 SDNode *&N = VT.isExtended() ?
1104 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1106 if (N) return SDValue(N, 0);
1107 N = NodeAllocator.Allocate<VTSDNode>();
1108 new (N) VTSDNode(VT);
1109 AllNodes.push_back(N);
1110 return SDValue(N, 0);
1113 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1114 SDNode *&N = ExternalSymbols[Sym];
1115 if (N) return SDValue(N, 0);
1116 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1117 new (N) ExternalSymbolSDNode(false, Sym, VT);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1123 SDNode *&N = ExternalSymbols[Sym];
1124 if (N) return SDValue(N, 0);
1125 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1126 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1127 AllNodes.push_back(N);
1128 return SDValue(N, 0);
1131 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1132 SDNode *&N = TargetExternalSymbols[Sym];
1133 if (N) return SDValue(N, 0);
1134 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1135 new (N) ExternalSymbolSDNode(true, Sym, VT);
1136 AllNodes.push_back(N);
1137 return SDValue(N, 0);
1140 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1142 SDNode *&N = TargetExternalSymbols[Sym];
1143 if (N) return SDValue(N, 0);
1144 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1145 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1146 AllNodes.push_back(N);
1147 return SDValue(N, 0);
1150 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1151 if ((unsigned)Cond >= CondCodeNodes.size())
1152 CondCodeNodes.resize(Cond+1);
1154 if (CondCodeNodes[Cond] == 0) {
1155 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1156 new (N) CondCodeSDNode(Cond);
1157 CondCodeNodes[Cond] = N;
1158 AllNodes.push_back(N);
1160 return SDValue(CondCodeNodes[Cond], 0);
1163 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1164 SDValue STy, SDValue Rnd, SDValue Sat,
1165 ISD::CvtCode Code) {
1166 // If the src and dest types are the same, no conversion is necessary.
1170 FoldingSetNodeID ID;
1172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1173 return SDValue(E, 0);
1174 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1175 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1176 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1177 CSEMap.InsertNode(N, IP);
1178 AllNodes.push_back(N);
1179 return SDValue(N, 0);
1182 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1183 FoldingSetNodeID ID;
1184 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1185 ID.AddInteger(RegNo);
1187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1188 return SDValue(E, 0);
1189 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1190 new (N) RegisterSDNode(RegNo, VT);
1191 CSEMap.InsertNode(N, IP);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1197 unsigned Line, unsigned Col,
1199 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1200 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1201 AllNodes.push_back(N);
1202 return SDValue(N, 0);
1205 SDValue SelectionDAG::getLabel(unsigned Opcode,
1208 FoldingSetNodeID ID;
1209 SDValue Ops[] = { Root };
1210 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1211 ID.AddInteger(LabelID);
1213 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1214 return SDValue(E, 0);
1215 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1216 new (N) LabelSDNode(Opcode, Root, LabelID);
1217 CSEMap.InsertNode(N, IP);
1218 AllNodes.push_back(N);
1219 return SDValue(N, 0);
1222 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1225 FoldingSetNodeID ID;
1226 SDValue Ops[] = { Root };
1227 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1228 ID.AddInteger(LabelID);
1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1231 return SDValue(E, 0);
1232 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1233 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1234 CSEMap.InsertNode(N, IP);
1235 AllNodes.push_back(N);
1236 return SDValue(N, 0);
1239 SDValue SelectionDAG::getSrcValue(const Value *V) {
1240 assert((!V || isa<PointerType>(V->getType())) &&
1241 "SrcValue is not a pointer?");
1243 FoldingSetNodeID ID;
1244 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1249 return SDValue(E, 0);
1251 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1252 new (N) SrcValueSDNode(V);
1253 CSEMap.InsertNode(N, IP);
1254 AllNodes.push_back(N);
1255 return SDValue(N, 0);
1258 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1260 const Value *v = MO.getValue();
1261 assert((!v || isa<PointerType>(v->getType())) &&
1262 "SrcValue is not a pointer?");
1265 FoldingSetNodeID ID;
1266 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1270 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1271 return SDValue(E, 0);
1273 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1274 new (N) MemOperandSDNode(MO);
1275 CSEMap.InsertNode(N, IP);
1276 AllNodes.push_back(N);
1277 return SDValue(N, 0);
1280 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1281 /// specified value type.
1282 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1283 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1284 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1285 const Type *Ty = VT.getTypeForMVT();
1286 unsigned StackAlign =
1287 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1289 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1290 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1293 /// CreateStackTemporary - Create a stack temporary suitable for holding
1294 /// either of the specified value types.
1295 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1296 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1297 VT2.getStoreSizeInBits())/8;
1298 const Type *Ty1 = VT1.getTypeForMVT();
1299 const Type *Ty2 = VT2.getTypeForMVT();
1300 const TargetData *TD = TLI.getTargetData();
1301 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1302 TD->getPrefTypeAlignment(Ty2));
1304 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1305 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1306 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1309 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1310 SDValue N2, ISD::CondCode Cond) {
1311 // These setcc operations always fold.
1315 case ISD::SETFALSE2: return getConstant(0, VT);
1317 case ISD::SETTRUE2: return getConstant(1, VT);
1329 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1333 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1334 const APInt &C2 = N2C->getAPIntValue();
1335 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1336 const APInt &C1 = N1C->getAPIntValue();
1339 default: assert(0 && "Unknown integer setcc!");
1340 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1341 case ISD::SETNE: return getConstant(C1 != C2, VT);
1342 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1343 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1344 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1345 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1346 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1347 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1348 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1349 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1353 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1354 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1355 // No compile time operations on this type yet.
1356 if (N1C->getValueType(0) == MVT::ppcf128)
1359 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1362 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1363 return getNode(ISD::UNDEF, VT);
1365 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1366 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1367 return getNode(ISD::UNDEF, VT);
1369 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1370 R==APFloat::cmpLessThan, VT);
1371 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1372 return getNode(ISD::UNDEF, VT);
1374 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1375 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1376 return getNode(ISD::UNDEF, VT);
1378 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1379 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1380 return getNode(ISD::UNDEF, VT);
1382 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1383 R==APFloat::cmpEqual, VT);
1384 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1385 return getNode(ISD::UNDEF, VT);
1387 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1388 R==APFloat::cmpEqual, VT);
1389 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1390 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1391 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1392 R==APFloat::cmpEqual, VT);
1393 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1394 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1395 R==APFloat::cmpLessThan, VT);
1396 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1397 R==APFloat::cmpUnordered, VT);
1398 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1399 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1402 // Ensure that the constant occurs on the RHS.
1403 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1407 // Could not fold it.
1411 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1412 /// use this predicate to simplify operations downstream.
1413 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1414 unsigned BitWidth = Op.getValueSizeInBits();
1415 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1418 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1419 /// this predicate to simplify operations downstream. Mask is known to be zero
1420 /// for bits that V cannot have.
1421 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1422 unsigned Depth) const {
1423 APInt KnownZero, KnownOne;
1424 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1425 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1426 return (KnownZero & Mask) == Mask;
1429 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1430 /// known to be either zero or one and return them in the KnownZero/KnownOne
1431 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1433 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1434 APInt &KnownZero, APInt &KnownOne,
1435 unsigned Depth) const {
1436 unsigned BitWidth = Mask.getBitWidth();
1437 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1438 "Mask size mismatches value type size!");
1440 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1441 if (Depth == 6 || Mask == 0)
1442 return; // Limit search depth.
1444 APInt KnownZero2, KnownOne2;
1446 switch (Op.getOpcode()) {
1448 // We know all of the bits for a constant!
1449 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1450 KnownZero = ~KnownOne & Mask;
1453 // If either the LHS or the RHS are Zero, the result is zero.
1454 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1455 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1456 KnownZero2, KnownOne2, Depth+1);
1457 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1458 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1460 // Output known-1 bits are only known if set in both the LHS & RHS.
1461 KnownOne &= KnownOne2;
1462 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1463 KnownZero |= KnownZero2;
1466 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1467 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1468 KnownZero2, KnownOne2, Depth+1);
1469 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1470 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1472 // Output known-0 bits are only known if clear in both the LHS & RHS.
1473 KnownZero &= KnownZero2;
1474 // Output known-1 are known to be set if set in either the LHS | RHS.
1475 KnownOne |= KnownOne2;
1478 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1479 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1480 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1481 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1483 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1484 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1485 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1486 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1487 KnownZero = KnownZeroOut;
1491 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1492 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1493 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1494 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1495 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1497 // If low bits are zero in either operand, output low known-0 bits.
1498 // Also compute a conserative estimate for high known-0 bits.
1499 // More trickiness is possible, but this is sufficient for the
1500 // interesting case of alignment computation.
1502 unsigned TrailZ = KnownZero.countTrailingOnes() +
1503 KnownZero2.countTrailingOnes();
1504 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1505 KnownZero2.countLeadingOnes(),
1506 BitWidth) - BitWidth;
1508 TrailZ = std::min(TrailZ, BitWidth);
1509 LeadZ = std::min(LeadZ, BitWidth);
1510 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1511 APInt::getHighBitsSet(BitWidth, LeadZ);
1516 // For the purposes of computing leading zeros we can conservatively
1517 // treat a udiv as a logical right shift by the power of 2 known to
1518 // be less than the denominator.
1519 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1520 ComputeMaskedBits(Op.getOperand(0),
1521 AllOnes, KnownZero2, KnownOne2, Depth+1);
1522 unsigned LeadZ = KnownZero2.countLeadingOnes();
1526 ComputeMaskedBits(Op.getOperand(1),
1527 AllOnes, KnownZero2, KnownOne2, Depth+1);
1528 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1529 if (RHSUnknownLeadingOnes != BitWidth)
1530 LeadZ = std::min(BitWidth,
1531 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1533 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1537 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1538 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1539 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1540 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1542 // Only known if known in both the LHS and RHS.
1543 KnownOne &= KnownOne2;
1544 KnownZero &= KnownZero2;
1546 case ISD::SELECT_CC:
1547 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1548 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1549 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1550 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1552 // Only known if known in both the LHS and RHS.
1553 KnownOne &= KnownOne2;
1554 KnownZero &= KnownZero2;
1562 if (Op.getResNo() != 1)
1564 // The boolean result conforms to getBooleanContents. Fall through.
1566 // If we know the result of a setcc has the top bits zero, use this info.
1567 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1569 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1572 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1573 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1574 unsigned ShAmt = SA->getZExtValue();
1576 // If the shift count is an invalid immediate, don't do anything.
1577 if (ShAmt >= BitWidth)
1580 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1581 KnownZero, KnownOne, Depth+1);
1582 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1583 KnownZero <<= ShAmt;
1585 // low bits known zero.
1586 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1590 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1591 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1592 unsigned ShAmt = SA->getZExtValue();
1594 // If the shift count is an invalid immediate, don't do anything.
1595 if (ShAmt >= BitWidth)
1598 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1599 KnownZero, KnownOne, Depth+1);
1600 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1601 KnownZero = KnownZero.lshr(ShAmt);
1602 KnownOne = KnownOne.lshr(ShAmt);
1604 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1605 KnownZero |= HighBits; // High bits known zero.
1609 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1610 unsigned ShAmt = SA->getZExtValue();
1612 // If the shift count is an invalid immediate, don't do anything.
1613 if (ShAmt >= BitWidth)
1616 APInt InDemandedMask = (Mask << ShAmt);
1617 // If any of the demanded bits are produced by the sign extension, we also
1618 // demand the input sign bit.
1619 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1620 if (HighBits.getBoolValue())
1621 InDemandedMask |= APInt::getSignBit(BitWidth);
1623 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 KnownZero = KnownZero.lshr(ShAmt);
1627 KnownOne = KnownOne.lshr(ShAmt);
1629 // Handle the sign bits.
1630 APInt SignBit = APInt::getSignBit(BitWidth);
1631 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1633 if (KnownZero.intersects(SignBit)) {
1634 KnownZero |= HighBits; // New bits are known zero.
1635 } else if (KnownOne.intersects(SignBit)) {
1636 KnownOne |= HighBits; // New bits are known one.
1640 case ISD::SIGN_EXTEND_INREG: {
1641 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1642 unsigned EBits = EVT.getSizeInBits();
1644 // Sign extension. Compute the demanded bits in the result that are not
1645 // present in the input.
1646 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1648 APInt InSignBit = APInt::getSignBit(EBits);
1649 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1651 // If the sign extended bits are demanded, we know that the sign
1653 InSignBit.zext(BitWidth);
1654 if (NewBits.getBoolValue())
1655 InputDemandedBits |= InSignBit;
1657 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1658 KnownZero, KnownOne, Depth+1);
1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1661 // If the sign bit of the input is known set or clear, then we know the
1662 // top bits of the result.
1663 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1664 KnownZero |= NewBits;
1665 KnownOne &= ~NewBits;
1666 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1667 KnownOne |= NewBits;
1668 KnownZero &= ~NewBits;
1669 } else { // Input sign bit unknown
1670 KnownZero &= ~NewBits;
1671 KnownOne &= ~NewBits;
1678 unsigned LowBits = Log2_32(BitWidth)+1;
1679 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1684 if (ISD::isZEXTLoad(Op.getNode())) {
1685 LoadSDNode *LD = cast<LoadSDNode>(Op);
1686 MVT VT = LD->getMemoryVT();
1687 unsigned MemBits = VT.getSizeInBits();
1688 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1692 case ISD::ZERO_EXTEND: {
1693 MVT InVT = Op.getOperand(0).getValueType();
1694 unsigned InBits = InVT.getSizeInBits();
1695 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1696 APInt InMask = Mask;
1697 InMask.trunc(InBits);
1698 KnownZero.trunc(InBits);
1699 KnownOne.trunc(InBits);
1700 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1701 KnownZero.zext(BitWidth);
1702 KnownOne.zext(BitWidth);
1703 KnownZero |= NewBits;
1706 case ISD::SIGN_EXTEND: {
1707 MVT InVT = Op.getOperand(0).getValueType();
1708 unsigned InBits = InVT.getSizeInBits();
1709 APInt InSignBit = APInt::getSignBit(InBits);
1710 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1711 APInt InMask = Mask;
1712 InMask.trunc(InBits);
1714 // If any of the sign extended bits are demanded, we know that the sign
1715 // bit is demanded. Temporarily set this bit in the mask for our callee.
1716 if (NewBits.getBoolValue())
1717 InMask |= InSignBit;
1719 KnownZero.trunc(InBits);
1720 KnownOne.trunc(InBits);
1721 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1723 // Note if the sign bit is known to be zero or one.
1724 bool SignBitKnownZero = KnownZero.isNegative();
1725 bool SignBitKnownOne = KnownOne.isNegative();
1726 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1727 "Sign bit can't be known to be both zero and one!");
1729 // If the sign bit wasn't actually demanded by our caller, we don't
1730 // want it set in the KnownZero and KnownOne result values. Reset the
1731 // mask and reapply it to the result values.
1733 InMask.trunc(InBits);
1734 KnownZero &= InMask;
1737 KnownZero.zext(BitWidth);
1738 KnownOne.zext(BitWidth);
1740 // If the sign bit is known zero or one, the top bits match.
1741 if (SignBitKnownZero)
1742 KnownZero |= NewBits;
1743 else if (SignBitKnownOne)
1744 KnownOne |= NewBits;
1747 case ISD::ANY_EXTEND: {
1748 MVT InVT = Op.getOperand(0).getValueType();
1749 unsigned InBits = InVT.getSizeInBits();
1750 APInt InMask = Mask;
1751 InMask.trunc(InBits);
1752 KnownZero.trunc(InBits);
1753 KnownOne.trunc(InBits);
1754 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1755 KnownZero.zext(BitWidth);
1756 KnownOne.zext(BitWidth);
1759 case ISD::TRUNCATE: {
1760 MVT InVT = Op.getOperand(0).getValueType();
1761 unsigned InBits = InVT.getSizeInBits();
1762 APInt InMask = Mask;
1763 InMask.zext(InBits);
1764 KnownZero.zext(InBits);
1765 KnownOne.zext(InBits);
1766 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1767 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1768 KnownZero.trunc(BitWidth);
1769 KnownOne.trunc(BitWidth);
1772 case ISD::AssertZext: {
1773 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1774 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1775 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1777 KnownZero |= (~InMask) & Mask;
1781 // All bits are zero except the low bit.
1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1786 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1787 // We know that the top bits of C-X are clear if X contains less bits
1788 // than C (i.e. no wrap-around can happen). For example, 20-X is
1789 // positive if we can prove that X is >= 0 and < 16.
1790 if (CLHS->getAPIntValue().isNonNegative()) {
1791 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1792 // NLZ can't be BitWidth with no sign bit
1793 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1794 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1797 // If all of the MaskV bits are known to be zero, then we know the
1798 // output top bits are zero, because we now know that the output is
1800 if ((KnownZero2 & MaskV) == MaskV) {
1801 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1802 // Top bits known zero.
1803 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1810 // Output known-0 bits are known if clear or set in both the low clear bits
1811 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1812 // low 3 bits clear.
1813 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1814 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1815 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1816 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1818 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1819 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1820 KnownZeroOut = std::min(KnownZeroOut,
1821 KnownZero2.countTrailingOnes());
1823 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1827 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1828 const APInt &RA = Rem->getAPIntValue();
1829 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1830 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1831 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1832 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1834 // If the sign bit of the first operand is zero, the sign bit of
1835 // the result is zero. If the first operand has no one bits below
1836 // the second operand's single 1 bit, its sign will be zero.
1837 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1838 KnownZero2 |= ~LowBits;
1840 KnownZero |= KnownZero2 & Mask;
1842 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1847 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1848 const APInt &RA = Rem->getAPIntValue();
1849 if (RA.isPowerOf2()) {
1850 APInt LowBits = (RA - 1);
1851 APInt Mask2 = LowBits & Mask;
1852 KnownZero |= ~LowBits & Mask;
1853 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1854 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1859 // Since the result is less than or equal to either operand, any leading
1860 // zero bits in either operand must also exist in the result.
1861 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1862 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1864 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1867 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1868 KnownZero2.countLeadingOnes());
1870 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1874 // Allow the target to implement this method for its nodes.
1875 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1876 case ISD::INTRINSIC_WO_CHAIN:
1877 case ISD::INTRINSIC_W_CHAIN:
1878 case ISD::INTRINSIC_VOID:
1879 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1885 /// ComputeNumSignBits - Return the number of times the sign bit of the
1886 /// register is replicated into the other bits. We know that at least 1 bit
1887 /// is always equal to the sign bit (itself), but other cases can give us
1888 /// information. For example, immediately after an "SRA X, 2", we know that
1889 /// the top 3 bits are all equal to each other, so we return 3.
1890 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1891 MVT VT = Op.getValueType();
1892 assert(VT.isInteger() && "Invalid VT!");
1893 unsigned VTBits = VT.getSizeInBits();
1895 unsigned FirstAnswer = 1;
1898 return 1; // Limit search depth.
1900 switch (Op.getOpcode()) {
1902 case ISD::AssertSext:
1903 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1904 return VTBits-Tmp+1;
1905 case ISD::AssertZext:
1906 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1909 case ISD::Constant: {
1910 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1911 // If negative, return # leading ones.
1912 if (Val.isNegative())
1913 return Val.countLeadingOnes();
1915 // Return # leading zeros.
1916 return Val.countLeadingZeros();
1919 case ISD::SIGN_EXTEND:
1920 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1921 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1923 case ISD::SIGN_EXTEND_INREG:
1924 // Max of the input and what this extends.
1925 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1928 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1929 return std::max(Tmp, Tmp2);
1932 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1933 // SRA X, C -> adds C sign bits.
1934 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1935 Tmp += C->getZExtValue();
1936 if (Tmp > VTBits) Tmp = VTBits;
1940 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1941 // shl destroys sign bits.
1942 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1943 if (C->getZExtValue() >= VTBits || // Bad shift.
1944 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1945 return Tmp - C->getZExtValue();
1950 case ISD::XOR: // NOT is handled here.
1951 // Logical binary ops preserve the number of sign bits at the worst.
1952 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1954 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1955 FirstAnswer = std::min(Tmp, Tmp2);
1956 // We computed what we know about the sign bits as our first
1957 // answer. Now proceed to the generic code that uses
1958 // ComputeMaskedBits, and pick whichever answer is better.
1963 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1964 if (Tmp == 1) return 1; // Early out.
1965 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1966 return std::min(Tmp, Tmp2);
1974 if (Op.getResNo() != 1)
1976 // The boolean result conforms to getBooleanContents. Fall through.
1978 // If setcc returns 0/-1, all bits are sign bits.
1979 if (TLI.getBooleanContents() ==
1980 TargetLowering::ZeroOrNegativeOneBooleanContent)
1985 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1986 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1988 // Handle rotate right by N like a rotate left by 32-N.
1989 if (Op.getOpcode() == ISD::ROTR)
1990 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1992 // If we aren't rotating out all of the known-in sign bits, return the
1993 // number that are left. This handles rotl(sext(x), 1) for example.
1994 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1995 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1999 // Add can have at most one carry bit. Thus we know that the output
2000 // is, at worst, one more bit than the inputs.
2001 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2002 if (Tmp == 1) return 1; // Early out.
2004 // Special case decrementing a value (ADD X, -1):
2005 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2006 if (CRHS->isAllOnesValue()) {
2007 APInt KnownZero, KnownOne;
2008 APInt Mask = APInt::getAllOnesValue(VTBits);
2009 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2011 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2013 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2016 // If we are subtracting one from a positive number, there is no carry
2017 // out of the result.
2018 if (KnownZero.isNegative())
2022 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2023 if (Tmp2 == 1) return 1;
2024 return std::min(Tmp, Tmp2)-1;
2028 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2029 if (Tmp2 == 1) return 1;
2032 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2033 if (CLHS->isNullValue()) {
2034 APInt KnownZero, KnownOne;
2035 APInt Mask = APInt::getAllOnesValue(VTBits);
2036 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2037 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2039 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2042 // If the input is known to be positive (the sign bit is known clear),
2043 // the output of the NEG has the same number of sign bits as the input.
2044 if (KnownZero.isNegative())
2047 // Otherwise, we treat this like a SUB.
2050 // Sub can have at most one carry bit. Thus we know that the output
2051 // is, at worst, one more bit than the inputs.
2052 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2053 if (Tmp == 1) return 1; // Early out.
2054 return std::min(Tmp, Tmp2)-1;
2057 // FIXME: it's tricky to do anything useful for this, but it is an important
2058 // case for targets like X86.
2062 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2063 if (Op.getOpcode() == ISD::LOAD) {
2064 LoadSDNode *LD = cast<LoadSDNode>(Op);
2065 unsigned ExtType = LD->getExtensionType();
2068 case ISD::SEXTLOAD: // '17' bits known
2069 Tmp = LD->getMemoryVT().getSizeInBits();
2070 return VTBits-Tmp+1;
2071 case ISD::ZEXTLOAD: // '16' bits known
2072 Tmp = LD->getMemoryVT().getSizeInBits();
2077 // Allow the target to implement this method for its nodes.
2078 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2079 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2080 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2081 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2082 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2083 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2086 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2087 // use this information.
2088 APInt KnownZero, KnownOne;
2089 APInt Mask = APInt::getAllOnesValue(VTBits);
2090 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2092 if (KnownZero.isNegative()) { // sign bit is 0
2094 } else if (KnownOne.isNegative()) { // sign bit is 1;
2101 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2102 // the number of identical bits in the top of the input value.
2104 Mask <<= Mask.getBitWidth()-VTBits;
2105 // Return # leading zeros. We use 'min' here in case Val was zero before
2106 // shifting. We don't want to return '64' as for an i32 "0".
2107 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2111 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2112 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2113 if (!GA) return false;
2114 if (GA->getOffset() != 0) return false;
2115 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2116 if (!GV) return false;
2117 MachineModuleInfo *MMI = getMachineModuleInfo();
2118 return MMI && MMI->hasDebugInfo();
2122 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2123 /// element of the result of the vector shuffle.
2124 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2125 MVT VT = N->getValueType(0);
2126 SDValue PermMask = N->getOperand(2);
2127 SDValue Idx = PermMask.getOperand(i);
2128 if (Idx.getOpcode() == ISD::UNDEF)
2129 return getNode(ISD::UNDEF, VT.getVectorElementType());
2130 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2131 unsigned NumElems = PermMask.getNumOperands();
2132 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2135 if (V.getOpcode() == ISD::BIT_CONVERT) {
2136 V = V.getOperand(0);
2137 MVT VVT = V.getValueType();
2138 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2141 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2142 return (Index == 0) ? V.getOperand(0)
2143 : getNode(ISD::UNDEF, VT.getVectorElementType());
2144 if (V.getOpcode() == ISD::BUILD_VECTOR)
2145 return V.getOperand(Index);
2146 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2147 return getShuffleScalarElt(V.getNode(), Index);
2152 /// getNode - Gets or creates the specified node.
2154 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2155 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2158 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2159 FoldingSetNodeID ID;
2160 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2162 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2163 return SDValue(E, 0);
2164 SDNode *N = NodeAllocator.Allocate<SDNode>();
2165 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2166 CSEMap.InsertNode(N, IP);
2168 AllNodes.push_back(N);
2172 return SDValue(N, 0);
2175 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2176 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2179 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2180 MVT VT, SDValue Operand) {
2181 // Constant fold unary operations with an integer constant operand.
2182 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2183 const APInt &Val = C->getAPIntValue();
2184 unsigned BitWidth = VT.getSizeInBits();
2187 case ISD::SIGN_EXTEND:
2188 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2189 case ISD::ANY_EXTEND:
2190 case ISD::ZERO_EXTEND:
2192 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2193 case ISD::UINT_TO_FP:
2194 case ISD::SINT_TO_FP: {
2195 const uint64_t zero[] = {0, 0};
2196 // No compile time operations on this type.
2197 if (VT==MVT::ppcf128)
2199 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2200 (void)apf.convertFromAPInt(Val,
2201 Opcode==ISD::SINT_TO_FP,
2202 APFloat::rmNearestTiesToEven);
2203 return getConstantFP(apf, VT);
2205 case ISD::BIT_CONVERT:
2206 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2207 return getConstantFP(Val.bitsToFloat(), VT);
2208 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2209 return getConstantFP(Val.bitsToDouble(), VT);
2212 return getConstant(Val.byteSwap(), VT);
2214 return getConstant(Val.countPopulation(), VT);
2216 return getConstant(Val.countLeadingZeros(), VT);
2218 return getConstant(Val.countTrailingZeros(), VT);
2222 // Constant fold unary operations with a floating point constant operand.
2223 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2224 APFloat V = C->getValueAPF(); // make copy
2225 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2229 return getConstantFP(V, VT);
2232 return getConstantFP(V, VT);
2234 case ISD::FP_EXTEND: {
2236 // This can return overflow, underflow, or inexact; we don't care.
2237 // FIXME need to be more flexible about rounding mode.
2238 (void)V.convert(*MVTToAPFloatSemantics(VT),
2239 APFloat::rmNearestTiesToEven, &ignored);
2240 return getConstantFP(V, VT);
2242 case ISD::FP_TO_SINT:
2243 case ISD::FP_TO_UINT: {
2246 assert(integerPartWidth >= 64);
2247 // FIXME need to be more flexible about rounding mode.
2248 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2249 Opcode==ISD::FP_TO_SINT,
2250 APFloat::rmTowardZero, &ignored);
2251 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2253 return getConstant(x, VT);
2255 case ISD::BIT_CONVERT:
2256 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2257 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2258 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2259 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2265 unsigned OpOpcode = Operand.getNode()->getOpcode();
2267 case ISD::TokenFactor:
2268 case ISD::MERGE_VALUES:
2269 case ISD::CONCAT_VECTORS:
2270 return Operand; // Factor, merge or concat of one node? No need.
2271 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2272 case ISD::FP_EXTEND:
2273 assert(VT.isFloatingPoint() &&
2274 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2275 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2276 if (Operand.getOpcode() == ISD::UNDEF)
2277 return getNode(ISD::UNDEF, VT);
2279 case ISD::SIGN_EXTEND:
2280 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2281 "Invalid SIGN_EXTEND!");
2282 if (Operand.getValueType() == VT) return Operand; // noop extension
2283 assert(Operand.getValueType().bitsLT(VT)
2284 && "Invalid sext node, dst < src!");
2285 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2286 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2288 case ISD::ZERO_EXTEND:
2289 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2290 "Invalid ZERO_EXTEND!");
2291 if (Operand.getValueType() == VT) return Operand; // noop extension
2292 assert(Operand.getValueType().bitsLT(VT)
2293 && "Invalid zext node, dst < src!");
2294 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2295 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2297 case ISD::ANY_EXTEND:
2298 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2299 "Invalid ANY_EXTEND!");
2300 if (Operand.getValueType() == VT) return Operand; // noop extension
2301 assert(Operand.getValueType().bitsLT(VT)
2302 && "Invalid anyext node, dst < src!");
2303 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2304 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2305 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2308 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2309 "Invalid TRUNCATE!");
2310 if (Operand.getValueType() == VT) return Operand; // noop truncate
2311 assert(Operand.getValueType().bitsGT(VT)
2312 && "Invalid truncate node, src < dst!");
2313 if (OpOpcode == ISD::TRUNCATE)
2314 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2315 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2316 OpOpcode == ISD::ANY_EXTEND) {
2317 // If the source is smaller than the dest, we still need an extend.
2318 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2319 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2320 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2321 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2323 return Operand.getNode()->getOperand(0);
2326 case ISD::BIT_CONVERT:
2327 // Basic sanity checking.
2328 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2329 && "Cannot BIT_CONVERT between types of different sizes!");
2330 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2331 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2332 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2333 if (OpOpcode == ISD::UNDEF)
2334 return getNode(ISD::UNDEF, VT);
2336 case ISD::SCALAR_TO_VECTOR:
2337 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2338 VT.getVectorElementType() == Operand.getValueType() &&
2339 "Illegal SCALAR_TO_VECTOR node!");
2340 if (OpOpcode == ISD::UNDEF)
2341 return getNode(ISD::UNDEF, VT);
2342 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2343 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2344 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2345 Operand.getConstantOperandVal(1) == 0 &&
2346 Operand.getOperand(0).getValueType() == VT)
2347 return Operand.getOperand(0);
2350 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2351 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2352 Operand.getNode()->getOperand(0));
2353 if (OpOpcode == ISD::FNEG) // --X -> X
2354 return Operand.getNode()->getOperand(0);
2357 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2358 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2363 SDVTList VTs = getVTList(VT);
2364 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2365 FoldingSetNodeID ID;
2366 SDValue Ops[1] = { Operand };
2367 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2370 return SDValue(E, 0);
2371 N = NodeAllocator.Allocate<UnarySDNode>();
2372 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2373 CSEMap.InsertNode(N, IP);
2375 N = NodeAllocator.Allocate<UnarySDNode>();
2376 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2379 AllNodes.push_back(N);
2383 return SDValue(N, 0);
2386 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2388 ConstantSDNode *Cst1,
2389 ConstantSDNode *Cst2) {
2390 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2393 case ISD::ADD: return getConstant(C1 + C2, VT);
2394 case ISD::SUB: return getConstant(C1 - C2, VT);
2395 case ISD::MUL: return getConstant(C1 * C2, VT);
2397 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2400 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2403 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2406 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2408 case ISD::AND: return getConstant(C1 & C2, VT);
2409 case ISD::OR: return getConstant(C1 | C2, VT);
2410 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2411 case ISD::SHL: return getConstant(C1 << C2, VT);
2412 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2413 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2414 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2415 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2422 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2423 SDValue N1, SDValue N2) {
2424 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2427 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2428 SDValue N1, SDValue N2) {
2429 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2430 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2433 case ISD::TokenFactor:
2434 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2435 N2.getValueType() == MVT::Other && "Invalid token factor!");
2436 // Fold trivial token factors.
2437 if (N1.getOpcode() == ISD::EntryToken) return N2;
2438 if (N2.getOpcode() == ISD::EntryToken) return N1;
2439 if (N1 == N2) return N1;
2441 case ISD::CONCAT_VECTORS:
2442 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2443 // one big BUILD_VECTOR.
2444 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2445 N2.getOpcode() == ISD::BUILD_VECTOR) {
2446 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2447 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2448 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2452 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2453 N1.getValueType() == VT && "Binary operator types must match!");
2454 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2455 // worth handling here.
2456 if (N2C && N2C->isNullValue())
2458 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2465 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2466 N1.getValueType() == VT && "Binary operator types must match!");
2467 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2468 // it's worth handling here.
2469 if (N2C && N2C->isNullValue())
2479 assert(VT.isInteger() && "This operator does not apply to FP types!");
2487 if (Opcode == ISD::FADD) {
2489 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2490 if (CFP->getValueAPF().isZero())
2493 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2494 if (CFP->getValueAPF().isZero())
2496 } else if (Opcode == ISD::FSUB) {
2498 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2499 if (CFP->getValueAPF().isZero())
2503 assert(N1.getValueType() == N2.getValueType() &&
2504 N1.getValueType() == VT && "Binary operator types must match!");
2506 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2507 assert(N1.getValueType() == VT &&
2508 N1.getValueType().isFloatingPoint() &&
2509 N2.getValueType().isFloatingPoint() &&
2510 "Invalid FCOPYSIGN!");
2517 assert(VT == N1.getValueType() &&
2518 "Shift operators return type must be the same as their first arg");
2519 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2520 "Shifts only work on integers");
2521 assert((N2.getValueType() == TLI.getShiftAmountTy() ||
2522 (N2.getValueType().isVector() && N2.getValueType().isInteger())) &&
2523 "Wrong type for shift amount");
2525 // Always fold shifts of i1 values so the code generator doesn't need to
2526 // handle them. Since we know the size of the shift has to be less than the
2527 // size of the value, the shift/rotate count is guaranteed to be zero.
2531 case ISD::FP_ROUND_INREG: {
2532 MVT EVT = cast<VTSDNode>(N2)->getVT();
2533 assert(VT == N1.getValueType() && "Not an inreg round!");
2534 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2535 "Cannot FP_ROUND_INREG integer types");
2536 assert(EVT.bitsLE(VT) && "Not rounding down!");
2537 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2541 assert(VT.isFloatingPoint() &&
2542 N1.getValueType().isFloatingPoint() &&
2543 VT.bitsLE(N1.getValueType()) &&
2544 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2545 if (N1.getValueType() == VT) return N1; // noop conversion.
2547 case ISD::AssertSext:
2548 case ISD::AssertZext: {
2549 MVT EVT = cast<VTSDNode>(N2)->getVT();
2550 assert(VT == N1.getValueType() && "Not an inreg extend!");
2551 assert(VT.isInteger() && EVT.isInteger() &&
2552 "Cannot *_EXTEND_INREG FP types");
2553 assert(EVT.bitsLE(VT) && "Not extending!");
2554 if (VT == EVT) return N1; // noop assertion.
2557 case ISD::SIGN_EXTEND_INREG: {
2558 MVT EVT = cast<VTSDNode>(N2)->getVT();
2559 assert(VT == N1.getValueType() && "Not an inreg extend!");
2560 assert(VT.isInteger() && EVT.isInteger() &&
2561 "Cannot *_EXTEND_INREG FP types");
2562 assert(EVT.bitsLE(VT) && "Not extending!");
2563 if (EVT == VT) return N1; // Not actually extending
2566 APInt Val = N1C->getAPIntValue();
2567 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2568 Val <<= Val.getBitWidth()-FromBits;
2569 Val = Val.ashr(Val.getBitWidth()-FromBits);
2570 return getConstant(Val, VT);
2574 case ISD::EXTRACT_VECTOR_ELT:
2575 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2576 if (N1.getOpcode() == ISD::UNDEF)
2577 return getNode(ISD::UNDEF, VT);
2579 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2580 // expanding copies of large vectors from registers.
2582 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2583 N1.getNumOperands() > 0) {
2585 N1.getOperand(0).getValueType().getVectorNumElements();
2586 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2587 N1.getOperand(N2C->getZExtValue() / Factor),
2588 getConstant(N2C->getZExtValue() % Factor,
2589 N2.getValueType()));
2592 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2593 // expanding large vector constants.
2594 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2595 return N1.getOperand(N2C->getZExtValue());
2597 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2598 // operations are lowered to scalars.
2599 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2600 // If the indices are the same, return the inserted element.
2601 if (N1.getOperand(2) == N2)
2602 return N1.getOperand(1);
2603 // If the indices are known different, extract the element from
2604 // the original vector.
2605 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2606 isa<ConstantSDNode>(N2))
2607 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2610 case ISD::EXTRACT_ELEMENT:
2611 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2612 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2613 (N1.getValueType().isInteger() == VT.isInteger()) &&
2614 "Wrong types for EXTRACT_ELEMENT!");
2616 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2617 // 64-bit integers into 32-bit parts. Instead of building the extract of
2618 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2619 if (N1.getOpcode() == ISD::BUILD_PAIR)
2620 return N1.getOperand(N2C->getZExtValue());
2622 // EXTRACT_ELEMENT of a constant int is also very common.
2623 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2624 unsigned ElementSize = VT.getSizeInBits();
2625 unsigned Shift = ElementSize * N2C->getZExtValue();
2626 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2627 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2630 case ISD::EXTRACT_SUBVECTOR:
2631 if (N1.getValueType() == VT) // Trivial extraction.
2638 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2639 if (SV.getNode()) return SV;
2640 } else { // Cannonicalize constant to RHS if commutative
2641 if (isCommutativeBinOp(Opcode)) {
2642 std::swap(N1C, N2C);
2648 // Constant fold FP operations.
2649 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2650 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2652 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2653 // Cannonicalize constant to RHS if commutative
2654 std::swap(N1CFP, N2CFP);
2656 } else if (N2CFP && VT != MVT::ppcf128) {
2657 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2658 APFloat::opStatus s;
2661 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2662 if (s != APFloat::opInvalidOp)
2663 return getConstantFP(V1, VT);
2666 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2667 if (s!=APFloat::opInvalidOp)
2668 return getConstantFP(V1, VT);
2671 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2672 if (s!=APFloat::opInvalidOp)
2673 return getConstantFP(V1, VT);
2676 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2677 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2678 return getConstantFP(V1, VT);
2681 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2682 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2683 return getConstantFP(V1, VT);
2685 case ISD::FCOPYSIGN:
2687 return getConstantFP(V1, VT);
2693 // Canonicalize an UNDEF to the RHS, even over a constant.
2694 if (N1.getOpcode() == ISD::UNDEF) {
2695 if (isCommutativeBinOp(Opcode)) {
2699 case ISD::FP_ROUND_INREG:
2700 case ISD::SIGN_EXTEND_INREG:
2706 return N1; // fold op(undef, arg2) -> undef
2714 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2715 // For vectors, we can't easily build an all zero vector, just return
2722 // Fold a bunch of operators when the RHS is undef.
2723 if (N2.getOpcode() == ISD::UNDEF) {
2726 if (N1.getOpcode() == ISD::UNDEF)
2727 // Handle undef ^ undef -> 0 special case. This is a common
2729 return getConstant(0, VT);
2744 return N2; // fold op(arg1, undef) -> undef
2750 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2751 // For vectors, we can't easily build an all zero vector, just return
2756 return getConstant(VT.getIntegerVTBitMask(), VT);
2757 // For vectors, we can't easily build an all one vector, just return
2765 // Memoize this node if possible.
2767 SDVTList VTs = getVTList(VT);
2768 if (VT != MVT::Flag) {
2769 SDValue Ops[] = { N1, N2 };
2770 FoldingSetNodeID ID;
2771 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2773 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2774 return SDValue(E, 0);
2775 N = NodeAllocator.Allocate<BinarySDNode>();
2776 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2777 CSEMap.InsertNode(N, IP);
2779 N = NodeAllocator.Allocate<BinarySDNode>();
2780 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2783 AllNodes.push_back(N);
2787 return SDValue(N, 0);
2790 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2791 SDValue N1, SDValue N2, SDValue N3) {
2792 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2795 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2796 SDValue N1, SDValue N2, SDValue N3) {
2797 // Perform various simplifications.
2798 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2799 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2801 case ISD::CONCAT_VECTORS:
2802 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2803 // one big BUILD_VECTOR.
2804 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2805 N2.getOpcode() == ISD::BUILD_VECTOR &&
2806 N3.getOpcode() == ISD::BUILD_VECTOR) {
2807 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2808 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2809 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2810 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2814 // Use FoldSetCC to simplify SETCC's.
2815 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2816 if (Simp.getNode()) return Simp;
2821 if (N1C->getZExtValue())
2822 return N2; // select true, X, Y -> X
2824 return N3; // select false, X, Y -> Y
2827 if (N2 == N3) return N2; // select C, X, X -> X
2831 if (N2C->getZExtValue()) // Unconditional branch
2832 return getNode(ISD::BR, MVT::Other, N1, N3);
2834 return N1; // Never-taken branch
2837 case ISD::VECTOR_SHUFFLE:
2838 assert(N1.getValueType() == N2.getValueType() &&
2839 N1.getValueType().isVector() &&
2840 VT.isVector() && N3.getValueType().isVector() &&
2841 N3.getOpcode() == ISD::BUILD_VECTOR &&
2842 VT.getVectorNumElements() == N3.getNumOperands() &&
2843 "Illegal VECTOR_SHUFFLE node!");
2845 case ISD::BIT_CONVERT:
2846 // Fold bit_convert nodes from a type to themselves.
2847 if (N1.getValueType() == VT)
2852 // Memoize node if it doesn't produce a flag.
2854 SDVTList VTs = getVTList(VT);
2855 if (VT != MVT::Flag) {
2856 SDValue Ops[] = { N1, N2, N3 };
2857 FoldingSetNodeID ID;
2858 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2860 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2861 return SDValue(E, 0);
2862 N = NodeAllocator.Allocate<TernarySDNode>();
2863 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2864 CSEMap.InsertNode(N, IP);
2866 N = NodeAllocator.Allocate<TernarySDNode>();
2867 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2869 AllNodes.push_back(N);
2873 return SDValue(N, 0);
2876 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2877 SDValue N1, SDValue N2, SDValue N3,
2879 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2882 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2883 SDValue N1, SDValue N2, SDValue N3,
2885 SDValue Ops[] = { N1, N2, N3, N4 };
2886 return getNode(Opcode, DL, VT, Ops, 4);
2889 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2890 SDValue N1, SDValue N2, SDValue N3,
2891 SDValue N4, SDValue N5) {
2892 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2895 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2896 SDValue N1, SDValue N2, SDValue N3,
2897 SDValue N4, SDValue N5) {
2898 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2899 return getNode(Opcode, DL, VT, Ops, 5);
2902 /// getMemsetValue - Vectorized representation of the memset value
2904 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2905 unsigned NumBits = VT.isVector() ?
2906 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2907 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2908 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2910 for (unsigned i = NumBits; i > 8; i >>= 1) {
2911 Val = (Val << Shift) | Val;
2915 return DAG.getConstant(Val, VT);
2916 return DAG.getConstantFP(APFloat(Val), VT);
2919 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2920 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2922 for (unsigned i = NumBits; i > 8; i >>= 1) {
2923 Value = DAG.getNode(ISD::OR, VT,
2924 DAG.getNode(ISD::SHL, VT, Value,
2925 DAG.getConstant(Shift,
2926 TLI.getShiftAmountTy())),
2934 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2935 /// used when a memcpy is turned into a memset when the source is a constant
2937 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2938 const TargetLowering &TLI,
2939 std::string &Str, unsigned Offset) {
2940 // Handle vector with all elements zero.
2943 return DAG.getConstant(0, VT);
2944 unsigned NumElts = VT.getVectorNumElements();
2945 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2946 return DAG.getNode(ISD::BIT_CONVERT, VT,
2947 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2950 assert(!VT.isVector() && "Can't handle vector type here!");
2951 unsigned NumBits = VT.getSizeInBits();
2952 unsigned MSB = NumBits / 8;
2954 if (TLI.isLittleEndian())
2955 Offset = Offset + MSB - 1;
2956 for (unsigned i = 0; i != MSB; ++i) {
2957 Val = (Val << 8) | (unsigned char)Str[Offset];
2958 Offset += TLI.isLittleEndian() ? -1 : 1;
2960 return DAG.getConstant(Val, VT);
2963 /// getMemBasePlusOffset - Returns base and offset node for the
2965 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2966 SelectionDAG &DAG) {
2967 MVT VT = Base.getValueType();
2968 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2971 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2973 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2974 unsigned SrcDelta = 0;
2975 GlobalAddressSDNode *G = NULL;
2976 if (Src.getOpcode() == ISD::GlobalAddress)
2977 G = cast<GlobalAddressSDNode>(Src);
2978 else if (Src.getOpcode() == ISD::ADD &&
2979 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2980 Src.getOperand(1).getOpcode() == ISD::Constant) {
2981 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2982 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2987 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2988 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2994 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2995 /// to replace the memset / memcpy is below the threshold. It also returns the
2996 /// types of the sequence of memory ops to perform memset / memcpy.
2998 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2999 SDValue Dst, SDValue Src,
3000 unsigned Limit, uint64_t Size, unsigned &Align,
3001 std::string &Str, bool &isSrcStr,
3003 const TargetLowering &TLI) {
3004 isSrcStr = isMemSrcFromString(Src, Str);
3005 bool isSrcConst = isa<ConstantSDNode>(Src);
3006 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3007 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3008 if (VT != MVT::iAny) {
3009 unsigned NewAlign = (unsigned)
3010 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3011 // If source is a string constant, this will require an unaligned load.
3012 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3013 if (Dst.getOpcode() != ISD::FrameIndex) {
3014 // Can't change destination alignment. It requires a unaligned store.
3018 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3019 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3020 if (MFI->isFixedObjectIndex(FI)) {
3021 // Can't change destination alignment. It requires a unaligned store.
3025 // Give the stack frame object a larger alignment if needed.
3026 if (MFI->getObjectAlignment(FI) < NewAlign)
3027 MFI->setObjectAlignment(FI, NewAlign);
3034 if (VT == MVT::iAny) {
3038 switch (Align & 7) {
3039 case 0: VT = MVT::i64; break;
3040 case 4: VT = MVT::i32; break;
3041 case 2: VT = MVT::i16; break;
3042 default: VT = MVT::i8; break;
3047 while (!TLI.isTypeLegal(LVT))
3048 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3049 assert(LVT.isInteger());
3055 unsigned NumMemOps = 0;
3057 unsigned VTSize = VT.getSizeInBits() / 8;
3058 while (VTSize > Size) {
3059 // For now, only use non-vector load / store's for the left-over pieces.
3060 if (VT.isVector()) {
3062 while (!TLI.isTypeLegal(VT))
3063 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3064 VTSize = VT.getSizeInBits() / 8;
3066 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3071 if (++NumMemOps > Limit)
3073 MemOps.push_back(VT);
3080 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
3081 SDValue Chain, SDValue Dst,
3082 SDValue Src, uint64_t Size,
3083 unsigned Align, bool AlwaysInline,
3084 const Value *DstSV, uint64_t DstSVOff,
3085 const Value *SrcSV, uint64_t SrcSVOff){
3086 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3088 // Expand memcpy to a series of load and store ops if the size operand falls
3089 // below a certain threshold.
3090 std::vector<MVT> MemOps;
3091 uint64_t Limit = -1ULL;
3093 Limit = TLI.getMaxStoresPerMemcpy();
3094 unsigned DstAlign = Align; // Destination alignment can change.
3097 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3098 Str, CopyFromStr, DAG, TLI))
3102 bool isZeroStr = CopyFromStr && Str.empty();
3103 SmallVector<SDValue, 8> OutChains;
3104 unsigned NumMemOps = MemOps.size();
3105 uint64_t SrcOff = 0, DstOff = 0;
3106 for (unsigned i = 0; i < NumMemOps; i++) {
3108 unsigned VTSize = VT.getSizeInBits() / 8;
3109 SDValue Value, Store;
3111 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3112 // It's unlikely a store of a vector immediate can be done in a single
3113 // instruction. It would require a load from a constantpool first.
3114 // We also handle store a vector with all zero's.
3115 // FIXME: Handle other cases where store of vector immediate is done in
3116 // a single instruction.
3117 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3118 Store = DAG.getStore(Chain, Value,
3119 getMemBasePlusOffset(Dst, DstOff, DAG),
3120 DstSV, DstSVOff + DstOff, false, DstAlign);
3122 Value = DAG.getLoad(VT, Chain,
3123 getMemBasePlusOffset(Src, SrcOff, DAG),
3124 SrcSV, SrcSVOff + SrcOff, false, Align);
3125 Store = DAG.getStore(Chain, Value,
3126 getMemBasePlusOffset(Dst, DstOff, DAG),
3127 DstSV, DstSVOff + DstOff, false, DstAlign);
3129 OutChains.push_back(Store);
3134 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3135 &OutChains[0], OutChains.size());
3138 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3139 SDValue Chain, SDValue Dst,
3140 SDValue Src, uint64_t Size,
3141 unsigned Align, bool AlwaysInline,
3142 const Value *DstSV, uint64_t DstSVOff,
3143 const Value *SrcSV, uint64_t SrcSVOff){
3144 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3146 // Expand memmove to a series of load and store ops if the size operand falls
3147 // below a certain threshold.
3148 std::vector<MVT> MemOps;
3149 uint64_t Limit = -1ULL;
3151 Limit = TLI.getMaxStoresPerMemmove();
3152 unsigned DstAlign = Align; // Destination alignment can change.
3155 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3156 Str, CopyFromStr, DAG, TLI))
3159 uint64_t SrcOff = 0, DstOff = 0;
3161 SmallVector<SDValue, 8> LoadValues;
3162 SmallVector<SDValue, 8> LoadChains;
3163 SmallVector<SDValue, 8> OutChains;
3164 unsigned NumMemOps = MemOps.size();
3165 for (unsigned i = 0; i < NumMemOps; i++) {
3167 unsigned VTSize = VT.getSizeInBits() / 8;
3168 SDValue Value, Store;
3170 Value = DAG.getLoad(VT, Chain,
3171 getMemBasePlusOffset(Src, SrcOff, DAG),
3172 SrcSV, SrcSVOff + SrcOff, false, Align);
3173 LoadValues.push_back(Value);
3174 LoadChains.push_back(Value.getValue(1));
3177 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3178 &LoadChains[0], LoadChains.size());
3180 for (unsigned i = 0; i < NumMemOps; i++) {
3182 unsigned VTSize = VT.getSizeInBits() / 8;
3183 SDValue Value, Store;
3185 Store = DAG.getStore(Chain, LoadValues[i],
3186 getMemBasePlusOffset(Dst, DstOff, DAG),
3187 DstSV, DstSVOff + DstOff, false, DstAlign);
3188 OutChains.push_back(Store);
3192 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3193 &OutChains[0], OutChains.size());
3196 static SDValue getMemsetStores(SelectionDAG &DAG,
3197 SDValue Chain, SDValue Dst,
3198 SDValue Src, uint64_t Size,
3200 const Value *DstSV, uint64_t DstSVOff) {
3201 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3203 // Expand memset to a series of load/store ops if the size operand
3204 // falls below a certain threshold.
3205 std::vector<MVT> MemOps;
3208 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3209 Size, Align, Str, CopyFromStr, DAG, TLI))
3212 SmallVector<SDValue, 8> OutChains;
3213 uint64_t DstOff = 0;
3215 unsigned NumMemOps = MemOps.size();
3216 for (unsigned i = 0; i < NumMemOps; i++) {
3218 unsigned VTSize = VT.getSizeInBits() / 8;
3219 SDValue Value = getMemsetValue(Src, VT, DAG);
3220 SDValue Store = DAG.getStore(Chain, Value,
3221 getMemBasePlusOffset(Dst, DstOff, DAG),
3222 DstSV, DstSVOff + DstOff);
3223 OutChains.push_back(Store);
3227 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3228 &OutChains[0], OutChains.size());
3231 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3232 SDValue Src, SDValue Size,
3233 unsigned Align, bool AlwaysInline,
3234 const Value *DstSV, uint64_t DstSVOff,
3235 const Value *SrcSV, uint64_t SrcSVOff) {
3237 // Check to see if we should lower the memcpy to loads and stores first.
3238 // For cases within the target-specified limits, this is the best choice.
3239 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3241 // Memcpy with size zero? Just return the original chain.
3242 if (ConstantSize->isNullValue())
3246 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3247 ConstantSize->getZExtValue(),
3248 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3249 if (Result.getNode())
3253 // Then check to see if we should lower the memcpy with target-specific
3254 // code. If the target chooses to do this, this is the next best.
3256 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3258 DstSV, DstSVOff, SrcSV, SrcSVOff);
3259 if (Result.getNode())
3262 // If we really need inline code and the target declined to provide it,
3263 // use a (potentially long) sequence of loads and stores.
3265 assert(ConstantSize && "AlwaysInline requires a constant size!");
3266 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3267 ConstantSize->getZExtValue(), Align, true,
3268 DstSV, DstSVOff, SrcSV, SrcSVOff);
3271 // Emit a library call.
3272 TargetLowering::ArgListTy Args;
3273 TargetLowering::ArgListEntry Entry;
3274 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3275 Entry.Node = Dst; Args.push_back(Entry);
3276 Entry.Node = Src; Args.push_back(Entry);
3277 Entry.Node = Size; Args.push_back(Entry);
3278 std::pair<SDValue,SDValue> CallResult =
3279 TLI.LowerCallTo(Chain, Type::VoidTy,
3280 false, false, false, false, CallingConv::C, false,
3281 getExternalSymbol("memcpy", TLI.getPointerTy()),
3283 return CallResult.second;
3286 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3287 SDValue Src, SDValue Size,
3289 const Value *DstSV, uint64_t DstSVOff,
3290 const Value *SrcSV, uint64_t SrcSVOff) {
3292 // Check to see if we should lower the memmove to loads and stores first.
3293 // For cases within the target-specified limits, this is the best choice.
3294 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3296 // Memmove with size zero? Just return the original chain.
3297 if (ConstantSize->isNullValue())
3301 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3302 ConstantSize->getZExtValue(),
3303 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3304 if (Result.getNode())
3308 // Then check to see if we should lower the memmove with target-specific
3309 // code. If the target chooses to do this, this is the next best.
3311 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3312 DstSV, DstSVOff, SrcSV, SrcSVOff);
3313 if (Result.getNode())
3316 // Emit a library call.
3317 TargetLowering::ArgListTy Args;
3318 TargetLowering::ArgListEntry Entry;
3319 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3320 Entry.Node = Dst; Args.push_back(Entry);
3321 Entry.Node = Src; Args.push_back(Entry);
3322 Entry.Node = Size; Args.push_back(Entry);
3323 std::pair<SDValue,SDValue> CallResult =
3324 TLI.LowerCallTo(Chain, Type::VoidTy,
3325 false, false, false, false, CallingConv::C, false,
3326 getExternalSymbol("memmove", TLI.getPointerTy()),
3328 return CallResult.second;
3331 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3332 SDValue Src, SDValue Size,
3334 const Value *DstSV, uint64_t DstSVOff) {
3336 // Check to see if we should lower the memset to stores first.
3337 // For cases within the target-specified limits, this is the best choice.
3338 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3340 // Memset with size zero? Just return the original chain.
3341 if (ConstantSize->isNullValue())
3345 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3346 Align, DstSV, DstSVOff);
3347 if (Result.getNode())
3351 // Then check to see if we should lower the memset with target-specific
3352 // code. If the target chooses to do this, this is the next best.
3354 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3356 if (Result.getNode())
3359 // Emit a library call.
3360 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3361 TargetLowering::ArgListTy Args;
3362 TargetLowering::ArgListEntry Entry;
3363 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3364 Args.push_back(Entry);
3365 // Extend or truncate the argument to be an i32 value for the call.
3366 if (Src.getValueType().bitsGT(MVT::i32))
3367 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3369 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3370 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3371 Args.push_back(Entry);
3372 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3373 Args.push_back(Entry);
3374 std::pair<SDValue,SDValue> CallResult =
3375 TLI.LowerCallTo(Chain, Type::VoidTy,
3376 false, false, false, false, CallingConv::C, false,
3377 getExternalSymbol("memset", TLI.getPointerTy()),
3379 return CallResult.second;
3382 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3384 SDValue Ptr, SDValue Cmp,
3385 SDValue Swp, const Value* PtrVal,
3386 unsigned Alignment) {
3387 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3388 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3390 MVT VT = Cmp.getValueType();
3392 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3393 Alignment = getMVTAlignment(MemVT);
3395 SDVTList VTs = getVTList(VT, MVT::Other);
3396 FoldingSetNodeID ID;
3397 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3398 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3400 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3401 return SDValue(E, 0);
3402 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3403 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3404 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3405 CSEMap.InsertNode(N, IP);
3406 AllNodes.push_back(N);
3407 return SDValue(N, 0);
3410 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3412 SDValue Ptr, SDValue Cmp,
3413 SDValue Swp, const Value* PtrVal,
3414 unsigned Alignment) {
3415 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3416 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3418 MVT VT = Cmp.getValueType();
3420 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3421 Alignment = getMVTAlignment(MemVT);
3423 SDVTList VTs = getVTList(VT, MVT::Other);
3424 FoldingSetNodeID ID;
3425 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3426 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3429 return SDValue(E, 0);
3430 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3431 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3432 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3433 CSEMap.InsertNode(N, IP);
3434 AllNodes.push_back(N);
3435 return SDValue(N, 0);
3438 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3440 SDValue Ptr, SDValue Val,
3441 const Value* PtrVal,
3442 unsigned Alignment) {
3443 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3444 Opcode == ISD::ATOMIC_LOAD_SUB ||
3445 Opcode == ISD::ATOMIC_LOAD_AND ||
3446 Opcode == ISD::ATOMIC_LOAD_OR ||
3447 Opcode == ISD::ATOMIC_LOAD_XOR ||
3448 Opcode == ISD::ATOMIC_LOAD_NAND ||
3449 Opcode == ISD::ATOMIC_LOAD_MIN ||
3450 Opcode == ISD::ATOMIC_LOAD_MAX ||
3451 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3452 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3453 Opcode == ISD::ATOMIC_SWAP) &&
3454 "Invalid Atomic Op");
3456 MVT VT = Val.getValueType();
3458 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3459 Alignment = getMVTAlignment(MemVT);
3461 SDVTList VTs = getVTList(VT, MVT::Other);
3462 FoldingSetNodeID ID;
3463 SDValue Ops[] = {Chain, Ptr, Val};
3464 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3466 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3467 return SDValue(E, 0);
3468 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3469 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3470 Chain, Ptr, Val, PtrVal, Alignment);
3471 CSEMap.InsertNode(N, IP);
3472 AllNodes.push_back(N);
3473 return SDValue(N, 0);
3476 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3478 SDValue Ptr, SDValue Val,
3479 const Value* PtrVal,
3480 unsigned Alignment) {
3481 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3482 Opcode == ISD::ATOMIC_LOAD_SUB ||
3483 Opcode == ISD::ATOMIC_LOAD_AND ||
3484 Opcode == ISD::ATOMIC_LOAD_OR ||
3485 Opcode == ISD::ATOMIC_LOAD_XOR ||
3486 Opcode == ISD::ATOMIC_LOAD_NAND ||
3487 Opcode == ISD::ATOMIC_LOAD_MIN ||
3488 Opcode == ISD::ATOMIC_LOAD_MAX ||
3489 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3490 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3491 Opcode == ISD::ATOMIC_SWAP) &&
3492 "Invalid Atomic Op");
3494 MVT VT = Val.getValueType();
3496 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3497 Alignment = getMVTAlignment(MemVT);
3499 SDVTList VTs = getVTList(VT, MVT::Other);
3500 FoldingSetNodeID ID;
3501 SDValue Ops[] = {Chain, Ptr, Val};
3502 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3504 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3505 return SDValue(E, 0);
3506 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3507 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3508 Chain, Ptr, Val, PtrVal, Alignment);
3509 CSEMap.InsertNode(N, IP);
3510 AllNodes.push_back(N);
3511 return SDValue(N, 0);
3514 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3515 /// Allowed to return something different (and simpler) if Simplify is true.
3516 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3520 SmallVector<MVT, 4> VTs;
3521 VTs.reserve(NumOps);
3522 for (unsigned i = 0; i < NumOps; ++i)
3523 VTs.push_back(Ops[i].getValueType());
3524 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3528 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3529 const MVT *VTs, unsigned NumVTs,
3530 const SDValue *Ops, unsigned NumOps,
3531 MVT MemVT, const Value *srcValue, int SVOff,
3532 unsigned Align, bool Vol,
3533 bool ReadMem, bool WriteMem) {
3534 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3535 MemVT, srcValue, SVOff, Align, Vol,
3540 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3541 const MVT *VTs, unsigned NumVTs,
3542 const SDValue *Ops, unsigned NumOps,
3543 MVT MemVT, const Value *srcValue, int SVOff,
3544 unsigned Align, bool Vol,
3545 bool ReadMem, bool WriteMem) {
3546 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3547 MemVT, srcValue, SVOff, Align, Vol,
3552 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3553 const SDValue *Ops, unsigned NumOps,
3554 MVT MemVT, const Value *srcValue, int SVOff,
3555 unsigned Align, bool Vol,
3556 bool ReadMem, bool WriteMem) {
3557 // Memoize the node unless it returns a flag.
3558 MemIntrinsicSDNode *N;
3559 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3560 FoldingSetNodeID ID;
3561 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3563 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3564 return SDValue(E, 0);
3566 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3567 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3568 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3569 CSEMap.InsertNode(N, IP);
3571 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3572 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3573 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3575 AllNodes.push_back(N);
3576 return SDValue(N, 0);
3580 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3581 const SDValue *Ops, unsigned NumOps,
3582 MVT MemVT, const Value *srcValue, int SVOff,
3583 unsigned Align, bool Vol,
3584 bool ReadMem, bool WriteMem) {
3585 // Memoize the node unless it returns a flag.
3586 MemIntrinsicSDNode *N;
3587 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3588 FoldingSetNodeID ID;
3589 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3591 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3592 return SDValue(E, 0);
3594 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3595 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3596 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3597 CSEMap.InsertNode(N, IP);
3599 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3600 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3601 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3603 AllNodes.push_back(N);
3604 return SDValue(N, 0);
3608 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3609 bool IsInreg, SDVTList VTs,
3610 const SDValue *Operands, unsigned NumOperands) {
3611 // Do not include isTailCall in the folding set profile.
3612 FoldingSetNodeID ID;
3613 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3614 ID.AddInteger(CallingConv);
3615 ID.AddInteger(IsVarArgs);
3617 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3618 // Instead of including isTailCall in the folding set, we just
3619 // set the flag of the existing node.
3621 cast<CallSDNode>(E)->setNotTailCall();
3622 return SDValue(E, 0);
3624 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3625 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3626 VTs, Operands, NumOperands);
3627 CSEMap.InsertNode(N, IP);
3628 AllNodes.push_back(N);
3629 return SDValue(N, 0);
3633 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3634 bool IsTailCall, bool IsInreg, SDVTList VTs,
3635 const SDValue *Operands, unsigned NumOperands) {
3636 // Do not include isTailCall in the folding set profile.
3637 FoldingSetNodeID ID;
3638 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3639 ID.AddInteger(CallingConv);
3640 ID.AddInteger(IsVarArgs);
3642 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3643 // Instead of including isTailCall in the folding set, we just
3644 // set the flag of the existing node.
3646 cast<CallSDNode>(E)->setNotTailCall();
3647 return SDValue(E, 0);
3649 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3650 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3651 VTs, Operands, NumOperands);
3652 CSEMap.InsertNode(N, IP);
3653 AllNodes.push_back(N);
3654 return SDValue(N, 0);
3658 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3659 MVT VT, SDValue Chain,
3660 SDValue Ptr, SDValue Offset,
3661 const Value *SV, int SVOffset, MVT EVT,
3662 bool isVolatile, unsigned Alignment) {
3663 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3664 Alignment = getMVTAlignment(VT);
3667 ExtType = ISD::NON_EXTLOAD;
3668 } else if (ExtType == ISD::NON_EXTLOAD) {
3669 assert(VT == EVT && "Non-extending load from different memory type!");
3673 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3674 "Invalid vector extload!");
3676 assert(EVT.bitsLT(VT) &&
3677 "Should only be an extending load, not truncating!");
3678 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3679 "Cannot sign/zero extend a FP/Vector load!");
3680 assert(VT.isInteger() == EVT.isInteger() &&
3681 "Cannot convert from FP to Int or Int -> FP!");
3684 bool Indexed = AM != ISD::UNINDEXED;
3685 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3686 "Unindexed load with an offset!");
3688 SDVTList VTs = Indexed ?
3689 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3690 SDValue Ops[] = { Chain, Ptr, Offset };
3691 FoldingSetNodeID ID;
3692 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3694 ID.AddInteger(ExtType);
3695 ID.AddInteger(EVT.getRawBits());
3696 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3698 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3699 return SDValue(E, 0);
3700 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3701 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3702 Alignment, isVolatile);
3703 CSEMap.InsertNode(N, IP);
3704 AllNodes.push_back(N);
3705 return SDValue(N, 0);
3709 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3710 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3711 SDValue Ptr, SDValue Offset,
3712 const Value *SV, int SVOffset, MVT EVT,
3713 bool isVolatile, unsigned Alignment) {
3714 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3715 Alignment = getMVTAlignment(VT);
3718 ExtType = ISD::NON_EXTLOAD;
3719 } else if (ExtType == ISD::NON_EXTLOAD) {
3720 assert(VT == EVT && "Non-extending load from different memory type!");
3724 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3725 "Invalid vector extload!");
3727 assert(EVT.bitsLT(VT) &&
3728 "Should only be an extending load, not truncating!");
3729 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3730 "Cannot sign/zero extend a FP/Vector load!");
3731 assert(VT.isInteger() == EVT.isInteger() &&
3732 "Cannot convert from FP to Int or Int -> FP!");
3735 bool Indexed = AM != ISD::UNINDEXED;
3736 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3737 "Unindexed load with an offset!");
3739 SDVTList VTs = Indexed ?
3740 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3741 SDValue Ops[] = { Chain, Ptr, Offset };
3742 FoldingSetNodeID ID;
3743 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3745 ID.AddInteger(ExtType);
3746 ID.AddInteger(EVT.getRawBits());
3747 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3749 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3750 return SDValue(E, 0);
3751 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3752 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3753 Alignment, isVolatile);
3754 CSEMap.InsertNode(N, IP);
3755 AllNodes.push_back(N);
3756 return SDValue(N, 0);
3759 SDValue SelectionDAG::getLoad(MVT VT,
3760 SDValue Chain, SDValue Ptr,
3761 const Value *SV, int SVOffset,
3762 bool isVolatile, unsigned Alignment) {
3763 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3764 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3765 SV, SVOffset, VT, isVolatile, Alignment);
3768 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3769 SDValue Chain, SDValue Ptr,
3770 const Value *SV, int SVOffset,
3771 bool isVolatile, unsigned Alignment) {
3772 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3773 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3774 SV, SVOffset, VT, isVolatile, Alignment);
3777 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3778 SDValue Chain, SDValue Ptr,
3780 int SVOffset, MVT EVT,
3781 bool isVolatile, unsigned Alignment) {
3782 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3783 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3784 SV, SVOffset, EVT, isVolatile, Alignment);
3787 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3788 SDValue Chain, SDValue Ptr,
3790 int SVOffset, MVT EVT,
3791 bool isVolatile, unsigned Alignment) {
3792 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3793 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3794 SV, SVOffset, EVT, isVolatile, Alignment);
3798 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3799 SDValue Offset, ISD::MemIndexedMode AM) {
3800 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3801 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3802 "Load is already a indexed load!");
3803 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3804 LD->getChain(), Base, Offset, LD->getSrcValue(),
3805 LD->getSrcValueOffset(), LD->getMemoryVT(),
3806 LD->isVolatile(), LD->getAlignment());
3810 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3811 SDValue Offset, ISD::MemIndexedMode AM) {
3812 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3813 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3814 "Load is already a indexed load!");
3815 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3816 LD->getChain(), Base, Offset, LD->getSrcValue(),
3817 LD->getSrcValueOffset(), LD->getMemoryVT(),
3818 LD->isVolatile(), LD->getAlignment());
3821 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3822 SDValue Ptr, const Value *SV, int SVOffset,
3823 bool isVolatile, unsigned Alignment) {
3824 MVT VT = Val.getValueType();
3826 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3827 Alignment = getMVTAlignment(VT);
3829 SDVTList VTs = getVTList(MVT::Other);
3830 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3831 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3832 FoldingSetNodeID ID;
3833 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3834 ID.AddInteger(ISD::UNINDEXED);
3835 ID.AddInteger(false);
3836 ID.AddInteger(VT.getRawBits());
3837 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3839 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3840 return SDValue(E, 0);
3841 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3842 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3843 VT, SV, SVOffset, Alignment, isVolatile);
3844 CSEMap.InsertNode(N, IP);
3845 AllNodes.push_back(N);
3846 return SDValue(N, 0);
3849 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3850 SDValue Ptr, const Value *SV, int SVOffset,
3851 bool isVolatile, unsigned Alignment) {
3852 MVT VT = Val.getValueType();
3854 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3855 Alignment = getMVTAlignment(VT);
3857 SDVTList VTs = getVTList(MVT::Other);
3858 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3859 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3860 FoldingSetNodeID ID;
3861 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3862 ID.AddInteger(ISD::UNINDEXED);
3863 ID.AddInteger(false);
3864 ID.AddInteger(VT.getRawBits());
3865 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3867 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3868 return SDValue(E, 0);
3869 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3870 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3871 VT, SV, SVOffset, Alignment, isVolatile);
3872 CSEMap.InsertNode(N, IP);
3873 AllNodes.push_back(N);
3874 return SDValue(N, 0);
3877 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3878 SDValue Ptr, const Value *SV,
3879 int SVOffset, MVT SVT,
3880 bool isVolatile, unsigned Alignment) {
3881 MVT VT = Val.getValueType();
3884 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3886 assert(VT.bitsGT(SVT) && "Not a truncation?");
3887 assert(VT.isInteger() == SVT.isInteger() &&
3888 "Can't do FP-INT conversion!");
3890 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3891 Alignment = getMVTAlignment(VT);
3893 SDVTList VTs = getVTList(MVT::Other);
3894 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3895 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3896 FoldingSetNodeID ID;
3897 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3898 ID.AddInteger(ISD::UNINDEXED);
3900 ID.AddInteger(SVT.getRawBits());
3901 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3903 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3904 return SDValue(E, 0);
3905 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3906 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3907 SVT, SV, SVOffset, Alignment, isVolatile);
3908 CSEMap.InsertNode(N, IP);
3909 AllNodes.push_back(N);
3910 return SDValue(N, 0);
3913 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3914 SDValue Ptr, const Value *SV,
3915 int SVOffset, MVT SVT,
3916 bool isVolatile, unsigned Alignment) {
3917 MVT VT = Val.getValueType();
3920 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3922 assert(VT.bitsGT(SVT) && "Not a truncation?");
3923 assert(VT.isInteger() == SVT.isInteger() &&
3924 "Can't do FP-INT conversion!");
3926 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3927 Alignment = getMVTAlignment(VT);
3929 SDVTList VTs = getVTList(MVT::Other);
3930 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3931 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3932 FoldingSetNodeID ID;
3933 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3934 ID.AddInteger(ISD::UNINDEXED);
3936 ID.AddInteger(SVT.getRawBits());
3937 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3939 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3940 return SDValue(E, 0);
3941 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3942 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3943 SVT, SV, SVOffset, Alignment, isVolatile);
3944 CSEMap.InsertNode(N, IP);
3945 AllNodes.push_back(N);
3946 return SDValue(N, 0);
3950 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3951 SDValue Offset, ISD::MemIndexedMode AM) {
3952 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3953 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3954 "Store is already a indexed store!");
3955 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3956 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3957 FoldingSetNodeID ID;
3958 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3960 ID.AddInteger(ST->isTruncatingStore());
3961 ID.AddInteger(ST->getMemoryVT().getRawBits());
3962 ID.AddInteger(ST->getRawFlags());
3964 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3965 return SDValue(E, 0);
3966 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3967 new (N) StoreSDNode(Ops, VTs, AM,
3968 ST->isTruncatingStore(), ST->getMemoryVT(),
3969 ST->getSrcValue(), ST->getSrcValueOffset(),
3970 ST->getAlignment(), ST->isVolatile());
3971 CSEMap.InsertNode(N, IP);
3972 AllNodes.push_back(N);
3973 return SDValue(N, 0);
3977 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3978 SDValue Offset, ISD::MemIndexedMode AM) {
3979 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3980 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3981 "Store is already a indexed store!");
3982 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3983 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3984 FoldingSetNodeID ID;
3985 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3987 ID.AddInteger(ST->isTruncatingStore());
3988 ID.AddInteger(ST->getMemoryVT().getRawBits());
3989 ID.AddInteger(ST->getRawFlags());
3991 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3992 return SDValue(E, 0);
3993 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3994 new (N) StoreSDNode(Ops, dl, VTs, AM,
3995 ST->isTruncatingStore(), ST->getMemoryVT(),
3996 ST->getSrcValue(), ST->getSrcValueOffset(),
3997 ST->getAlignment(), ST->isVolatile());
3998 CSEMap.InsertNode(N, IP);
3999 AllNodes.push_back(N);
4000 return SDValue(N, 0);
4003 SDValue SelectionDAG::getVAArg(MVT VT,
4004 SDValue Chain, SDValue Ptr,
4006 SDValue Ops[] = { Chain, Ptr, SV };
4007 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
4010 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4011 const SDUse *Ops, unsigned NumOps) {
4012 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4015 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4016 const SDUse *Ops, unsigned NumOps) {
4018 case 0: return getNode(Opcode, DL, VT);
4019 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4020 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4021 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4025 // Copy from an SDUse array into an SDValue array for use with
4026 // the regular getNode logic.
4027 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4028 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4031 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4032 const SDValue *Ops, unsigned NumOps) {
4033 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4036 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4037 const SDValue *Ops, unsigned NumOps) {
4039 case 0: return getNode(Opcode, DL, VT);
4040 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4041 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4042 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4048 case ISD::SELECT_CC: {
4049 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4050 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4051 "LHS and RHS of condition must have same type!");
4052 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4053 "True and False arms of SelectCC must have same type!");
4054 assert(Ops[2].getValueType() == VT &&
4055 "select_cc node must be of same type as true and false value!");
4059 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4060 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4061 "LHS/RHS of comparison should match types!");
4068 SDVTList VTs = getVTList(VT);
4070 if (VT != MVT::Flag) {
4071 FoldingSetNodeID ID;
4072 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4076 return SDValue(E, 0);
4078 N = NodeAllocator.Allocate<SDNode>();
4079 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4080 CSEMap.InsertNode(N, IP);
4082 N = NodeAllocator.Allocate<SDNode>();
4083 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4086 AllNodes.push_back(N);
4090 return SDValue(N, 0);
4093 SDValue SelectionDAG::getNode(unsigned Opcode,
4094 const std::vector<MVT> &ResultTys,
4095 const SDValue *Ops, unsigned NumOps) {
4096 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
4099 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4100 const std::vector<MVT> &ResultTys,
4101 const SDValue *Ops, unsigned NumOps) {
4102 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
4106 SDValue SelectionDAG::getNode(unsigned Opcode,
4107 const MVT *VTs, unsigned NumVTs,
4108 const SDValue *Ops, unsigned NumOps) {
4109 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
4112 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4113 const MVT *VTs, unsigned NumVTs,
4114 const SDValue *Ops, unsigned NumOps) {
4116 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4117 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4120 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4121 const SDValue *Ops, unsigned NumOps) {
4122 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
4125 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4126 const SDValue *Ops, unsigned NumOps) {
4127 if (VTList.NumVTs == 1)
4128 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4131 // FIXME: figure out how to safely handle things like
4132 // int foo(int x) { return 1 << (x & 255); }
4133 // int bar() { return foo(256); }
4135 case ISD::SRA_PARTS:
4136 case ISD::SRL_PARTS:
4137 case ISD::SHL_PARTS:
4138 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4139 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4140 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4141 else if (N3.getOpcode() == ISD::AND)
4142 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4143 // If the and is only masking out bits that cannot effect the shift,
4144 // eliminate the and.
4145 unsigned NumBits = VT.getSizeInBits()*2;
4146 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4147 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4153 // Memoize the node unless it returns a flag.
4155 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4156 FoldingSetNodeID ID;
4157 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4159 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4160 return SDValue(E, 0);
4162 N = NodeAllocator.Allocate<UnarySDNode>();
4163 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4164 } else if (NumOps == 2) {
4165 N = NodeAllocator.Allocate<BinarySDNode>();
4166 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4167 } else if (NumOps == 3) {
4168 N = NodeAllocator.Allocate<TernarySDNode>();
4169 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4171 N = NodeAllocator.Allocate<SDNode>();
4172 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4174 CSEMap.InsertNode(N, IP);
4177 N = NodeAllocator.Allocate<UnarySDNode>();
4178 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4179 } else if (NumOps == 2) {
4180 N = NodeAllocator.Allocate<BinarySDNode>();
4181 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4182 } else if (NumOps == 3) {
4183 N = NodeAllocator.Allocate<TernarySDNode>();
4184 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4186 N = NodeAllocator.Allocate<SDNode>();
4187 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4190 AllNodes.push_back(N);
4194 return SDValue(N, 0);
4197 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
4198 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList);
4201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4202 return getNode(Opcode, DL, VTList, 0, 0);
4205 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4207 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1);
4210 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4212 SDValue Ops[] = { N1 };
4213 return getNode(Opcode, DL, VTList, Ops, 1);
4216 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4217 SDValue N1, SDValue N2) {
4218 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2);
4221 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4222 SDValue N1, SDValue N2) {
4223 SDValue Ops[] = { N1, N2 };
4224 return getNode(Opcode, DL, VTList, Ops, 2);
4227 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4228 SDValue N1, SDValue N2, SDValue N3) {
4229 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3);
4232 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4233 SDValue N1, SDValue N2, SDValue N3) {
4234 SDValue Ops[] = { N1, N2, N3 };
4235 return getNode(Opcode, DL, VTList, Ops, 3);
4238 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4239 SDValue N1, SDValue N2, SDValue N3,
4241 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4);
4244 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4245 SDValue N1, SDValue N2, SDValue N3,
4247 SDValue Ops[] = { N1, N2, N3, N4 };
4248 return getNode(Opcode, DL, VTList, Ops, 4);
4251 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4252 SDValue N1, SDValue N2, SDValue N3,
4253 SDValue N4, SDValue N5) {
4254 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5);
4257 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4258 SDValue N1, SDValue N2, SDValue N3,
4259 SDValue N4, SDValue N5) {
4260 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4261 return getNode(Opcode, DL, VTList, Ops, 5);
4264 SDVTList SelectionDAG::getVTList(MVT VT) {
4265 return makeVTList(SDNode::getValueTypeList(VT), 1);
4268 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4269 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4270 E = VTList.rend(); I != E; ++I)
4271 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4274 MVT *Array = Allocator.Allocate<MVT>(2);
4277 SDVTList Result = makeVTList(Array, 2);
4278 VTList.push_back(Result);
4282 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4283 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4284 E = VTList.rend(); I != E; ++I)
4285 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4289 MVT *Array = Allocator.Allocate<MVT>(3);
4293 SDVTList Result = makeVTList(Array, 3);
4294 VTList.push_back(Result);
4298 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4299 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4300 E = VTList.rend(); I != E; ++I)
4301 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4302 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4305 MVT *Array = Allocator.Allocate<MVT>(3);
4310 SDVTList Result = makeVTList(Array, 4);
4311 VTList.push_back(Result);
4315 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4317 case 0: assert(0 && "Cannot have nodes without results!");
4318 case 1: return getVTList(VTs[0]);
4319 case 2: return getVTList(VTs[0], VTs[1]);
4320 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4324 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4325 E = VTList.rend(); I != E; ++I) {
4326 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4329 bool NoMatch = false;
4330 for (unsigned i = 2; i != NumVTs; ++i)
4331 if (VTs[i] != I->VTs[i]) {
4339 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4340 std::copy(VTs, VTs+NumVTs, Array);
4341 SDVTList Result = makeVTList(Array, NumVTs);
4342 VTList.push_back(Result);
4347 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4348 /// specified operands. If the resultant node already exists in the DAG,
4349 /// this does not modify the specified node, instead it returns the node that
4350 /// already exists. If the resultant node does not exist in the DAG, the
4351 /// input node is returned. As a degenerate case, if you specify the same
4352 /// input operands as the node already has, the input node is returned.
4353 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4354 SDNode *N = InN.getNode();
4355 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4357 // Check to see if there is no change.
4358 if (Op == N->getOperand(0)) return InN;
4360 // See if the modified node already exists.
4361 void *InsertPos = 0;
4362 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4363 return SDValue(Existing, InN.getResNo());
4365 // Nope it doesn't. Remove the node from its current place in the maps.
4367 if (!RemoveNodeFromCSEMaps(N))
4370 // Now we update the operands.
4371 N->OperandList[0].set(Op);
4373 // If this gets put into a CSE map, add it.
4374 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4378 SDValue SelectionDAG::
4379 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4380 SDNode *N = InN.getNode();
4381 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4383 // Check to see if there is no change.
4384 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4385 return InN; // No operands changed, just return the input node.
4387 // See if the modified node already exists.
4388 void *InsertPos = 0;
4389 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4390 return SDValue(Existing, InN.getResNo());
4392 // Nope it doesn't. Remove the node from its current place in the maps.
4394 if (!RemoveNodeFromCSEMaps(N))
4397 // Now we update the operands.
4398 if (N->OperandList[0] != Op1)
4399 N->OperandList[0].set(Op1);
4400 if (N->OperandList[1] != Op2)
4401 N->OperandList[1].set(Op2);
4403 // If this gets put into a CSE map, add it.
4404 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4408 SDValue SelectionDAG::
4409 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4410 SDValue Ops[] = { Op1, Op2, Op3 };
4411 return UpdateNodeOperands(N, Ops, 3);
4414 SDValue SelectionDAG::
4415 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4416 SDValue Op3, SDValue Op4) {
4417 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4418 return UpdateNodeOperands(N, Ops, 4);
4421 SDValue SelectionDAG::
4422 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4423 SDValue Op3, SDValue Op4, SDValue Op5) {
4424 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4425 return UpdateNodeOperands(N, Ops, 5);
4428 SDValue SelectionDAG::
4429 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4430 SDNode *N = InN.getNode();
4431 assert(N->getNumOperands() == NumOps &&
4432 "Update with wrong number of operands");
4434 // Check to see if there is no change.
4435 bool AnyChange = false;
4436 for (unsigned i = 0; i != NumOps; ++i) {
4437 if (Ops[i] != N->getOperand(i)) {
4443 // No operands changed, just return the input node.
4444 if (!AnyChange) return InN;
4446 // See if the modified node already exists.
4447 void *InsertPos = 0;
4448 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4449 return SDValue(Existing, InN.getResNo());
4451 // Nope it doesn't. Remove the node from its current place in the maps.
4453 if (!RemoveNodeFromCSEMaps(N))
4456 // Now we update the operands.
4457 for (unsigned i = 0; i != NumOps; ++i)
4458 if (N->OperandList[i] != Ops[i])
4459 N->OperandList[i].set(Ops[i]);
4461 // If this gets put into a CSE map, add it.
4462 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4466 /// DropOperands - Release the operands and set this node to have
4468 void SDNode::DropOperands() {
4469 // Unlike the code in MorphNodeTo that does this, we don't need to
4470 // watch for dead nodes here.
4471 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4477 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4480 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4482 SDVTList VTs = getVTList(VT);
4483 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4486 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4487 MVT VT, SDValue Op1) {
4488 SDVTList VTs = getVTList(VT);
4489 SDValue Ops[] = { Op1 };
4490 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4493 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4494 MVT VT, SDValue Op1,
4496 SDVTList VTs = getVTList(VT);
4497 SDValue Ops[] = { Op1, Op2 };
4498 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4501 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4502 MVT VT, SDValue Op1,
4503 SDValue Op2, SDValue Op3) {
4504 SDVTList VTs = getVTList(VT);
4505 SDValue Ops[] = { Op1, Op2, Op3 };
4506 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4509 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4510 MVT VT, const SDValue *Ops,
4512 SDVTList VTs = getVTList(VT);
4513 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4516 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4517 MVT VT1, MVT VT2, const SDValue *Ops,
4519 SDVTList VTs = getVTList(VT1, VT2);
4520 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4523 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4525 SDVTList VTs = getVTList(VT1, VT2);
4526 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4529 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4530 MVT VT1, MVT VT2, MVT VT3,
4531 const SDValue *Ops, unsigned NumOps) {
4532 SDVTList VTs = getVTList(VT1, VT2, VT3);
4533 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4536 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4537 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4538 const SDValue *Ops, unsigned NumOps) {
4539 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4540 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4543 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4546 SDVTList VTs = getVTList(VT1, VT2);
4547 SDValue Ops[] = { Op1 };
4548 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4551 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4553 SDValue Op1, SDValue Op2) {
4554 SDVTList VTs = getVTList(VT1, VT2);
4555 SDValue Ops[] = { Op1, Op2 };
4556 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4559 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4561 SDValue Op1, SDValue Op2,
4563 SDVTList VTs = getVTList(VT1, VT2);
4564 SDValue Ops[] = { Op1, Op2, Op3 };
4565 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4568 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4569 MVT VT1, MVT VT2, MVT VT3,
4570 SDValue Op1, SDValue Op2,
4572 SDVTList VTs = getVTList(VT1, VT2, VT3);
4573 SDValue Ops[] = { Op1, Op2, Op3 };
4574 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4577 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4578 SDVTList VTs, const SDValue *Ops,
4580 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4583 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4585 SDVTList VTs = getVTList(VT);
4586 return MorphNodeTo(N, Opc, VTs, 0, 0);
4589 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4590 MVT VT, SDValue Op1) {
4591 SDVTList VTs = getVTList(VT);
4592 SDValue Ops[] = { Op1 };
4593 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4596 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4597 MVT VT, SDValue Op1,
4599 SDVTList VTs = getVTList(VT);
4600 SDValue Ops[] = { Op1, Op2 };
4601 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4604 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4605 MVT VT, SDValue Op1,
4606 SDValue Op2, SDValue Op3) {
4607 SDVTList VTs = getVTList(VT);
4608 SDValue Ops[] = { Op1, Op2, Op3 };
4609 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4612 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4613 MVT VT, const SDValue *Ops,
4615 SDVTList VTs = getVTList(VT);
4616 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4619 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4620 MVT VT1, MVT VT2, const SDValue *Ops,
4622 SDVTList VTs = getVTList(VT1, VT2);
4623 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4626 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4628 SDVTList VTs = getVTList(VT1, VT2);
4629 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4632 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4633 MVT VT1, MVT VT2, MVT VT3,
4634 const SDValue *Ops, unsigned NumOps) {
4635 SDVTList VTs = getVTList(VT1, VT2, VT3);
4636 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4639 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4642 SDVTList VTs = getVTList(VT1, VT2);
4643 SDValue Ops[] = { Op1 };
4644 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4647 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4649 SDValue Op1, SDValue Op2) {
4650 SDVTList VTs = getVTList(VT1, VT2);
4651 SDValue Ops[] = { Op1, Op2 };
4652 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4655 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4657 SDValue Op1, SDValue Op2,
4659 SDVTList VTs = getVTList(VT1, VT2);
4660 SDValue Ops[] = { Op1, Op2, Op3 };
4661 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4664 /// MorphNodeTo - These *mutate* the specified node to have the specified
4665 /// return type, opcode, and operands.
4667 /// Note that MorphNodeTo returns the resultant node. If there is already a
4668 /// node of the specified opcode and operands, it returns that node instead of
4669 /// the current one.
4671 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4672 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4673 /// node, and because it doesn't require CSE recalculation for any of
4674 /// the node's users.
4676 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4677 SDVTList VTs, const SDValue *Ops,
4679 // If an identical node already exists, use it.
4681 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4682 FoldingSetNodeID ID;
4683 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4684 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4688 if (!RemoveNodeFromCSEMaps(N))
4691 // Start the morphing.
4693 N->ValueList = VTs.VTs;
4694 N->NumValues = VTs.NumVTs;
4696 // Clear the operands list, updating used nodes to remove this from their
4697 // use list. Keep track of any operands that become dead as a result.
4698 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4699 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4701 SDNode *Used = Use.getNode();
4703 if (Used->use_empty())
4704 DeadNodeSet.insert(Used);
4707 // If NumOps is larger than the # of operands we currently have, reallocate
4708 // the operand list.
4709 if (NumOps > N->NumOperands) {
4710 if (N->OperandsNeedDelete)
4711 delete[] N->OperandList;
4713 if (N->isMachineOpcode()) {
4714 // We're creating a final node that will live unmorphed for the
4715 // remainder of the current SelectionDAG iteration, so we can allocate
4716 // the operands directly out of a pool with no recycling metadata.
4717 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4718 N->OperandsNeedDelete = false;
4720 N->OperandList = new SDUse[NumOps];
4721 N->OperandsNeedDelete = true;
4725 // Assign the new operands.
4726 N->NumOperands = NumOps;
4727 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4728 N->OperandList[i].setUser(N);
4729 N->OperandList[i].setInitial(Ops[i]);
4732 // Delete any nodes that are still dead after adding the uses for the
4734 SmallVector<SDNode *, 16> DeadNodes;
4735 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4736 E = DeadNodeSet.end(); I != E; ++I)
4737 if ((*I)->use_empty())
4738 DeadNodes.push_back(*I);
4739 RemoveDeadNodes(DeadNodes);
4742 CSEMap.InsertNode(N, IP); // Memoize the new node.
4747 /// getTargetNode - These are used for target selectors to create a new node
4748 /// with specified return type(s), target opcode, and operands.
4750 /// Note that getTargetNode returns the resultant node. If there is already a
4751 /// node of the specified opcode and operands, it returns that node instead of
4752 /// the current one.
4753 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4754 return getNode(~Opcode, VT).getNode();
4756 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4757 return getNode(~Opcode, dl, VT).getNode();
4760 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4761 return getNode(~Opcode, VT, Op1).getNode();
4763 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4765 return getNode(~Opcode, dl, VT, Op1).getNode();
4768 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4769 SDValue Op1, SDValue Op2) {
4770 return getNode(~Opcode, VT, Op1, Op2).getNode();
4772 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4773 SDValue Op1, SDValue Op2) {
4774 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4777 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4778 SDValue Op1, SDValue Op2,
4780 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4782 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4783 SDValue Op1, SDValue Op2,
4785 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4788 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4789 const SDValue *Ops, unsigned NumOps) {
4790 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4792 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4793 const SDValue *Ops, unsigned NumOps) {
4794 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4797 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4798 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4800 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4802 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4804 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4806 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4809 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4810 MVT VT2, SDValue Op1) {
4811 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4812 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4814 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4815 MVT VT2, SDValue Op1) {
4816 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4817 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4820 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4821 MVT VT2, SDValue Op1,
4823 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4824 SDValue Ops[] = { Op1, Op2 };
4825 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4827 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4828 MVT VT2, SDValue Op1,
4830 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4831 SDValue Ops[] = { Op1, Op2 };
4832 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4835 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4836 MVT VT2, SDValue Op1,
4837 SDValue Op2, SDValue Op3) {
4838 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4839 SDValue Ops[] = { Op1, Op2, Op3 };
4840 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4842 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4843 MVT VT2, SDValue Op1,
4844 SDValue Op2, SDValue Op3) {
4845 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4846 SDValue Ops[] = { Op1, Op2, Op3 };
4847 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4850 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4851 const SDValue *Ops, unsigned NumOps) {
4852 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4853 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4855 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4857 const SDValue *Ops, unsigned NumOps) {
4858 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4859 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4862 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4863 SDValue Op1, SDValue Op2) {
4864 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4865 SDValue Ops[] = { Op1, Op2 };
4866 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4868 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4869 MVT VT1, MVT VT2, MVT VT3,
4870 SDValue Op1, SDValue Op2) {
4871 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4872 SDValue Ops[] = { Op1, Op2 };
4873 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4876 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4877 SDValue Op1, SDValue Op2,
4879 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4880 SDValue Ops[] = { Op1, Op2, Op3 };
4881 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4883 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4884 MVT VT1, MVT VT2, MVT VT3,
4885 SDValue Op1, SDValue Op2,
4887 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4888 SDValue Ops[] = { Op1, Op2, Op3 };
4889 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4892 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4893 const SDValue *Ops, unsigned NumOps) {
4894 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4895 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4897 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4898 MVT VT1, MVT VT2, MVT VT3,
4899 const SDValue *Ops, unsigned NumOps) {
4900 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4901 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4904 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4905 MVT VT2, MVT VT3, MVT VT4,
4906 const SDValue *Ops, unsigned NumOps) {
4907 std::vector<MVT> VTList;
4908 VTList.push_back(VT1);
4909 VTList.push_back(VT2);
4910 VTList.push_back(VT3);
4911 VTList.push_back(VT4);
4912 const MVT *VTs = getNodeValueTypes(VTList);
4913 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4915 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4916 MVT VT2, MVT VT3, MVT VT4,
4917 const SDValue *Ops, unsigned NumOps) {
4918 std::vector<MVT> VTList;
4919 VTList.push_back(VT1);
4920 VTList.push_back(VT2);
4921 VTList.push_back(VT3);
4922 VTList.push_back(VT4);
4923 const MVT *VTs = getNodeValueTypes(VTList);
4924 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4927 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4928 const std::vector<MVT> &ResultTys,
4929 const SDValue *Ops, unsigned NumOps) {
4930 const MVT *VTs = getNodeValueTypes(ResultTys);
4931 return getNode(~Opcode, VTs, ResultTys.size(),
4932 Ops, NumOps).getNode();
4934 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4935 const std::vector<MVT> &ResultTys,
4936 const SDValue *Ops, unsigned NumOps) {
4937 const MVT *VTs = getNodeValueTypes(ResultTys);
4938 return getNode(~Opcode, dl, VTs, ResultTys.size(),
4939 Ops, NumOps).getNode();
4942 /// getNodeIfExists - Get the specified node if it's already available, or
4943 /// else return NULL.
4944 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4945 const SDValue *Ops, unsigned NumOps) {
4946 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4947 FoldingSetNodeID ID;
4948 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4956 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4957 /// This can cause recursive merging of nodes in the DAG.
4959 /// This version assumes From has a single result value.
4961 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4962 DAGUpdateListener *UpdateListener) {
4963 SDNode *From = FromN.getNode();
4964 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4965 "Cannot replace with this method!");
4966 assert(From != To.getNode() && "Cannot replace uses of with self");
4968 // Iterate over all the existing uses of From. New uses will be added
4969 // to the beginning of the use list, which we avoid visiting.
4970 // This specifically avoids visiting uses of From that arise while the
4971 // replacement is happening, because any such uses would be the result
4972 // of CSE: If an existing node looks like From after one of its operands
4973 // is replaced by To, we don't want to replace of all its users with To
4974 // too. See PR3018 for more info.
4975 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4979 // This node is about to morph, remove its old self from the CSE maps.
4980 RemoveNodeFromCSEMaps(User);
4982 // A user can appear in a use list multiple times, and when this
4983 // happens the uses are usually next to each other in the list.
4984 // To help reduce the number of CSE recomputations, process all
4985 // the uses of this user that we can find this way.
4987 SDUse &Use = UI.getUse();
4990 } while (UI != UE && *UI == User);
4992 // Now that we have modified User, add it back to the CSE maps. If it
4993 // already exists there, recursively merge the results together.
4994 AddModifiedNodeToCSEMaps(User, UpdateListener);
4998 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4999 /// This can cause recursive merging of nodes in the DAG.
5001 /// This version assumes From/To have matching types and numbers of result
5004 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5005 DAGUpdateListener *UpdateListener) {
5006 assert(From->getVTList().VTs == To->getVTList().VTs &&
5007 From->getNumValues() == To->getNumValues() &&
5008 "Cannot use this version of ReplaceAllUsesWith!");
5010 // Handle the trivial case.
5014 // Iterate over just the existing users of From. See the comments in
5015 // the ReplaceAllUsesWith above.
5016 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5020 // This node is about to morph, remove its old self from the CSE maps.
5021 RemoveNodeFromCSEMaps(User);
5023 // A user can appear in a use list multiple times, and when this
5024 // happens the uses are usually next to each other in the list.
5025 // To help reduce the number of CSE recomputations, process all
5026 // the uses of this user that we can find this way.
5028 SDUse &Use = UI.getUse();
5031 } while (UI != UE && *UI == User);
5033 // Now that we have modified User, add it back to the CSE maps. If it
5034 // already exists there, recursively merge the results together.
5035 AddModifiedNodeToCSEMaps(User, UpdateListener);
5039 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5040 /// This can cause recursive merging of nodes in the DAG.
5042 /// This version can replace From with any result values. To must match the
5043 /// number and types of values returned by From.
5044 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5046 DAGUpdateListener *UpdateListener) {
5047 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5048 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5050 // Iterate over just the existing users of From. See the comments in
5051 // the ReplaceAllUsesWith above.
5052 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5056 // This node is about to morph, remove its old self from the CSE maps.
5057 RemoveNodeFromCSEMaps(User);
5059 // A user can appear in a use list multiple times, and when this
5060 // happens the uses are usually next to each other in the list.
5061 // To help reduce the number of CSE recomputations, process all
5062 // the uses of this user that we can find this way.
5064 SDUse &Use = UI.getUse();
5065 const SDValue &ToOp = To[Use.getResNo()];
5068 } while (UI != UE && *UI == User);
5070 // Now that we have modified User, add it back to the CSE maps. If it
5071 // already exists there, recursively merge the results together.
5072 AddModifiedNodeToCSEMaps(User, UpdateListener);
5076 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5077 /// uses of other values produced by From.getNode() alone. The Deleted
5078 /// vector is handled the same way as for ReplaceAllUsesWith.
5079 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5080 DAGUpdateListener *UpdateListener){
5081 // Handle the really simple, really trivial case efficiently.
5082 if (From == To) return;
5084 // Handle the simple, trivial, case efficiently.
5085 if (From.getNode()->getNumValues() == 1) {
5086 ReplaceAllUsesWith(From, To, UpdateListener);
5090 // Iterate over just the existing users of From. See the comments in
5091 // the ReplaceAllUsesWith above.
5092 SDNode::use_iterator UI = From.getNode()->use_begin(),
5093 UE = From.getNode()->use_end();
5096 bool UserRemovedFromCSEMaps = false;
5098 // A user can appear in a use list multiple times, and when this
5099 // happens the uses are usually next to each other in the list.
5100 // To help reduce the number of CSE recomputations, process all
5101 // the uses of this user that we can find this way.
5103 SDUse &Use = UI.getUse();
5105 // Skip uses of different values from the same node.
5106 if (Use.getResNo() != From.getResNo()) {
5111 // If this node hasn't been modified yet, it's still in the CSE maps,
5112 // so remove its old self from the CSE maps.
5113 if (!UserRemovedFromCSEMaps) {
5114 RemoveNodeFromCSEMaps(User);
5115 UserRemovedFromCSEMaps = true;
5120 } while (UI != UE && *UI == User);
5122 // We are iterating over all uses of the From node, so if a use
5123 // doesn't use the specific value, no changes are made.
5124 if (!UserRemovedFromCSEMaps)
5127 // Now that we have modified User, add it back to the CSE maps. If it
5128 // already exists there, recursively merge the results together.
5129 AddModifiedNodeToCSEMaps(User, UpdateListener);
5134 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5135 /// to record information about a use.
5142 /// operator< - Sort Memos by User.
5143 bool operator<(const UseMemo &L, const UseMemo &R) {
5144 return (intptr_t)L.User < (intptr_t)R.User;
5148 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5149 /// uses of other values produced by From.getNode() alone. The same value
5150 /// may appear in both the From and To list. The Deleted vector is
5151 /// handled the same way as for ReplaceAllUsesWith.
5152 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5155 DAGUpdateListener *UpdateListener){
5156 // Handle the simple, trivial case efficiently.
5158 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5160 // Read up all the uses and make records of them. This helps
5161 // processing new uses that are introduced during the
5162 // replacement process.
5163 SmallVector<UseMemo, 4> Uses;
5164 for (unsigned i = 0; i != Num; ++i) {
5165 unsigned FromResNo = From[i].getResNo();
5166 SDNode *FromNode = From[i].getNode();
5167 for (SDNode::use_iterator UI = FromNode->use_begin(),
5168 E = FromNode->use_end(); UI != E; ++UI) {
5169 SDUse &Use = UI.getUse();
5170 if (Use.getResNo() == FromResNo) {
5171 UseMemo Memo = { *UI, i, &Use };
5172 Uses.push_back(Memo);
5177 // Sort the uses, so that all the uses from a given User are together.
5178 std::sort(Uses.begin(), Uses.end());
5180 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5181 UseIndex != UseIndexEnd; ) {
5182 // We know that this user uses some value of From. If it is the right
5183 // value, update it.
5184 SDNode *User = Uses[UseIndex].User;
5186 // This node is about to morph, remove its old self from the CSE maps.
5187 RemoveNodeFromCSEMaps(User);
5189 // The Uses array is sorted, so all the uses for a given User
5190 // are next to each other in the list.
5191 // To help reduce the number of CSE recomputations, process all
5192 // the uses of this user that we can find this way.
5194 unsigned i = Uses[UseIndex].Index;
5195 SDUse &Use = *Uses[UseIndex].Use;
5199 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5201 // Now that we have modified User, add it back to the CSE maps. If it
5202 // already exists there, recursively merge the results together.
5203 AddModifiedNodeToCSEMaps(User, UpdateListener);
5207 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5208 /// based on their topological order. It returns the maximum id and a vector
5209 /// of the SDNodes* in assigned order by reference.
5210 unsigned SelectionDAG::AssignTopologicalOrder() {
5212 unsigned DAGSize = 0;
5214 // SortedPos tracks the progress of the algorithm. Nodes before it are
5215 // sorted, nodes after it are unsorted. When the algorithm completes
5216 // it is at the end of the list.
5217 allnodes_iterator SortedPos = allnodes_begin();
5219 // Visit all the nodes. Move nodes with no operands to the front of
5220 // the list immediately. Annotate nodes that do have operands with their
5221 // operand count. Before we do this, the Node Id fields of the nodes
5222 // may contain arbitrary values. After, the Node Id fields for nodes
5223 // before SortedPos will contain the topological sort index, and the
5224 // Node Id fields for nodes At SortedPos and after will contain the
5225 // count of outstanding operands.
5226 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5228 unsigned Degree = N->getNumOperands();
5230 // A node with no uses, add it to the result array immediately.
5231 N->setNodeId(DAGSize++);
5232 allnodes_iterator Q = N;
5234 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5237 // Temporarily use the Node Id as scratch space for the degree count.
5238 N->setNodeId(Degree);
5242 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5243 // such that by the time the end is reached all nodes will be sorted.
5244 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5246 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5249 unsigned Degree = P->getNodeId();
5252 // All of P's operands are sorted, so P may sorted now.
5253 P->setNodeId(DAGSize++);
5255 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5258 // Update P's outstanding operand count.
5259 P->setNodeId(Degree);
5264 assert(SortedPos == AllNodes.end() &&
5265 "Topological sort incomplete!");
5266 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5267 "First node in topological sort is not the entry token!");
5268 assert(AllNodes.front().getNodeId() == 0 &&
5269 "First node in topological sort has non-zero id!");
5270 assert(AllNodes.front().getNumOperands() == 0 &&
5271 "First node in topological sort has operands!");
5272 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5273 "Last node in topologic sort has unexpected id!");
5274 assert(AllNodes.back().use_empty() &&
5275 "Last node in topologic sort has users!");
5276 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5282 //===----------------------------------------------------------------------===//
5284 //===----------------------------------------------------------------------===//
5286 HandleSDNode::~HandleSDNode() {
5290 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
5292 : SDNode(isa<GlobalVariable>(GA) &&
5293 cast<GlobalVariable>(GA)->isThreadLocal() ?
5295 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
5297 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
5298 getSDVTList(VT)), Offset(o) {
5299 TheGlobal = const_cast<GlobalValue*>(GA);
5302 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
5303 const Value *srcValue, int SVO,
5304 unsigned alignment, bool vol)
5305 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5306 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5308 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5309 assert(getAlignment() == alignment && "Alignment representation error!");
5310 assert(isVolatile() == vol && "Volatile representation error!");
5313 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
5314 unsigned NumOps, MVT memvt, const Value *srcValue,
5315 int SVO, unsigned alignment, bool vol)
5316 : SDNode(Opc, VTs, Ops, NumOps),
5317 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5318 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5319 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5320 assert(getAlignment() == alignment && "Alignment representation error!");
5321 assert(isVolatile() == vol && "Volatile representation error!");
5324 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
5325 const Value *srcValue, int SVO,
5326 unsigned alignment, bool vol)
5327 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5328 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5330 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5331 assert(getAlignment() == alignment && "Alignment representation error!");
5332 assert(isVolatile() == vol && "Volatile representation error!");
5335 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5337 unsigned NumOps, MVT memvt, const Value *srcValue,
5338 int SVO, unsigned alignment, bool vol)
5339 : SDNode(Opc, dl, VTs, Ops, NumOps),
5340 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5341 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5342 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5343 assert(getAlignment() == alignment && "Alignment representation error!");
5344 assert(isVolatile() == vol && "Volatile representation error!");
5347 /// getMemOperand - Return a MachineMemOperand object describing the memory
5348 /// reference performed by this memory reference.
5349 MachineMemOperand MemSDNode::getMemOperand() const {
5351 if (isa<LoadSDNode>(this))
5352 Flags = MachineMemOperand::MOLoad;
5353 else if (isa<StoreSDNode>(this))
5354 Flags = MachineMemOperand::MOStore;
5355 else if (isa<AtomicSDNode>(this)) {
5356 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5359 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5360 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5361 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5362 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5365 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5366 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5368 // Check if the memory reference references a frame index
5369 const FrameIndexSDNode *FI =
5370 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5371 if (!getSrcValue() && FI)
5372 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5373 Flags, 0, Size, getAlignment());
5375 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5376 Size, getAlignment());
5379 /// Profile - Gather unique data for the node.
5381 void SDNode::Profile(FoldingSetNodeID &ID) const {
5382 AddNodeIDNode(ID, this);
5385 /// getValueTypeList - Return a pointer to the specified value type.
5387 const MVT *SDNode::getValueTypeList(MVT VT) {
5388 if (VT.isExtended()) {
5389 static std::set<MVT, MVT::compareRawBits> EVTs;
5390 return &(*EVTs.insert(VT).first);
5392 static MVT VTs[MVT::LAST_VALUETYPE];
5393 VTs[VT.getSimpleVT()] = VT;
5394 return &VTs[VT.getSimpleVT()];
5398 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5399 /// indicated value. This method ignores uses of other values defined by this
5401 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5402 assert(Value < getNumValues() && "Bad value!");
5404 // TODO: Only iterate over uses of a given value of the node
5405 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5406 if (UI.getUse().getResNo() == Value) {
5413 // Found exactly the right number of uses?
5418 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5419 /// value. This method ignores uses of other values defined by this operation.
5420 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5421 assert(Value < getNumValues() && "Bad value!");
5423 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5424 if (UI.getUse().getResNo() == Value)
5431 /// isOnlyUserOf - Return true if this node is the only use of N.
5433 bool SDNode::isOnlyUserOf(SDNode *N) const {
5435 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5446 /// isOperand - Return true if this node is an operand of N.
5448 bool SDValue::isOperandOf(SDNode *N) const {
5449 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5450 if (*this == N->getOperand(i))
5455 bool SDNode::isOperandOf(SDNode *N) const {
5456 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5457 if (this == N->OperandList[i].getNode())
5462 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5463 /// be a chain) reaches the specified operand without crossing any
5464 /// side-effecting instructions. In practice, this looks through token
5465 /// factors and non-volatile loads. In order to remain efficient, this only
5466 /// looks a couple of nodes in, it does not do an exhaustive search.
5467 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5468 unsigned Depth) const {
5469 if (*this == Dest) return true;
5471 // Don't search too deeply, we just want to be able to see through
5472 // TokenFactor's etc.
5473 if (Depth == 0) return false;
5475 // If this is a token factor, all inputs to the TF happen in parallel. If any
5476 // of the operands of the TF reach dest, then we can do the xform.
5477 if (getOpcode() == ISD::TokenFactor) {
5478 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5479 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5484 // Loads don't have side effects, look through them.
5485 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5486 if (!Ld->isVolatile())
5487 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5493 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5494 SmallPtrSet<SDNode *, 32> &Visited) {
5495 if (found || !Visited.insert(N))
5498 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5499 SDNode *Op = N->getOperand(i).getNode();
5504 findPredecessor(Op, P, found, Visited);
5508 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5509 /// is either an operand of N or it can be reached by recursively traversing
5510 /// up the operands.
5511 /// NOTE: this is an expensive method. Use it carefully.
5512 bool SDNode::isPredecessorOf(SDNode *N) const {
5513 SmallPtrSet<SDNode *, 32> Visited;
5515 findPredecessor(N, this, found, Visited);
5519 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5520 assert(Num < NumOperands && "Invalid child # of SDNode!");
5521 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5524 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5525 switch (getOpcode()) {
5527 if (getOpcode() < ISD::BUILTIN_OP_END)
5528 return "<<Unknown DAG Node>>";
5529 if (isMachineOpcode()) {
5531 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5532 if (getMachineOpcode() < TII->getNumOpcodes())
5533 return TII->get(getMachineOpcode()).getName();
5534 return "<<Unknown Machine Node>>";
5537 const TargetLowering &TLI = G->getTargetLoweringInfo();
5538 const char *Name = TLI.getTargetNodeName(getOpcode());
5539 if (Name) return Name;
5540 return "<<Unknown Target Node>>";
5542 return "<<Unknown Node>>";
5545 case ISD::DELETED_NODE:
5546 return "<<Deleted Node!>>";
5548 case ISD::PREFETCH: return "Prefetch";
5549 case ISD::MEMBARRIER: return "MemBarrier";
5550 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5551 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5552 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5553 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5554 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5555 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5556 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5557 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5558 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5559 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5560 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5561 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5562 case ISD::PCMARKER: return "PCMarker";
5563 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5564 case ISD::SRCVALUE: return "SrcValue";
5565 case ISD::MEMOPERAND: return "MemOperand";
5566 case ISD::EntryToken: return "EntryToken";
5567 case ISD::TokenFactor: return "TokenFactor";
5568 case ISD::AssertSext: return "AssertSext";
5569 case ISD::AssertZext: return "AssertZext";
5571 case ISD::BasicBlock: return "BasicBlock";
5572 case ISD::ARG_FLAGS: return "ArgFlags";
5573 case ISD::VALUETYPE: return "ValueType";
5574 case ISD::Register: return "Register";
5576 case ISD::Constant: return "Constant";
5577 case ISD::ConstantFP: return "ConstantFP";
5578 case ISD::GlobalAddress: return "GlobalAddress";
5579 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5580 case ISD::FrameIndex: return "FrameIndex";
5581 case ISD::JumpTable: return "JumpTable";
5582 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5583 case ISD::RETURNADDR: return "RETURNADDR";
5584 case ISD::FRAMEADDR: return "FRAMEADDR";
5585 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5586 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5587 case ISD::EHSELECTION: return "EHSELECTION";
5588 case ISD::EH_RETURN: return "EH_RETURN";
5589 case ISD::ConstantPool: return "ConstantPool";
5590 case ISD::ExternalSymbol: return "ExternalSymbol";
5591 case ISD::INTRINSIC_WO_CHAIN: {
5592 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5593 return Intrinsic::getName((Intrinsic::ID)IID);
5595 case ISD::INTRINSIC_VOID:
5596 case ISD::INTRINSIC_W_CHAIN: {
5597 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5598 return Intrinsic::getName((Intrinsic::ID)IID);
5601 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5602 case ISD::TargetConstant: return "TargetConstant";
5603 case ISD::TargetConstantFP:return "TargetConstantFP";
5604 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5605 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5606 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5607 case ISD::TargetJumpTable: return "TargetJumpTable";
5608 case ISD::TargetConstantPool: return "TargetConstantPool";
5609 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5611 case ISD::CopyToReg: return "CopyToReg";
5612 case ISD::CopyFromReg: return "CopyFromReg";
5613 case ISD::UNDEF: return "undef";
5614 case ISD::MERGE_VALUES: return "merge_values";
5615 case ISD::INLINEASM: return "inlineasm";
5616 case ISD::DBG_LABEL: return "dbg_label";
5617 case ISD::EH_LABEL: return "eh_label";
5618 case ISD::DECLARE: return "declare";
5619 case ISD::HANDLENODE: return "handlenode";
5620 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5621 case ISD::CALL: return "call";
5624 case ISD::FABS: return "fabs";
5625 case ISD::FNEG: return "fneg";
5626 case ISD::FSQRT: return "fsqrt";
5627 case ISD::FSIN: return "fsin";
5628 case ISD::FCOS: return "fcos";
5629 case ISD::FPOWI: return "fpowi";
5630 case ISD::FPOW: return "fpow";
5631 case ISD::FTRUNC: return "ftrunc";
5632 case ISD::FFLOOR: return "ffloor";
5633 case ISD::FCEIL: return "fceil";
5634 case ISD::FRINT: return "frint";
5635 case ISD::FNEARBYINT: return "fnearbyint";
5638 case ISD::ADD: return "add";
5639 case ISD::SUB: return "sub";
5640 case ISD::MUL: return "mul";
5641 case ISD::MULHU: return "mulhu";
5642 case ISD::MULHS: return "mulhs";
5643 case ISD::SDIV: return "sdiv";
5644 case ISD::UDIV: return "udiv";
5645 case ISD::SREM: return "srem";
5646 case ISD::UREM: return "urem";
5647 case ISD::SMUL_LOHI: return "smul_lohi";
5648 case ISD::UMUL_LOHI: return "umul_lohi";
5649 case ISD::SDIVREM: return "sdivrem";
5650 case ISD::UDIVREM: return "udivrem";
5651 case ISD::AND: return "and";
5652 case ISD::OR: return "or";
5653 case ISD::XOR: return "xor";
5654 case ISD::SHL: return "shl";
5655 case ISD::SRA: return "sra";
5656 case ISD::SRL: return "srl";
5657 case ISD::ROTL: return "rotl";
5658 case ISD::ROTR: return "rotr";
5659 case ISD::FADD: return "fadd";
5660 case ISD::FSUB: return "fsub";
5661 case ISD::FMUL: return "fmul";
5662 case ISD::FDIV: return "fdiv";
5663 case ISD::FREM: return "frem";
5664 case ISD::FCOPYSIGN: return "fcopysign";
5665 case ISD::FGETSIGN: return "fgetsign";
5667 case ISD::SETCC: return "setcc";
5668 case ISD::VSETCC: return "vsetcc";
5669 case ISD::SELECT: return "select";
5670 case ISD::SELECT_CC: return "select_cc";
5671 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5672 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5673 case ISD::CONCAT_VECTORS: return "concat_vectors";
5674 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5675 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5676 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5677 case ISD::CARRY_FALSE: return "carry_false";
5678 case ISD::ADDC: return "addc";
5679 case ISD::ADDE: return "adde";
5680 case ISD::SADDO: return "saddo";
5681 case ISD::UADDO: return "uaddo";
5682 case ISD::SSUBO: return "ssubo";
5683 case ISD::USUBO: return "usubo";
5684 case ISD::SMULO: return "smulo";
5685 case ISD::UMULO: return "umulo";
5686 case ISD::SUBC: return "subc";
5687 case ISD::SUBE: return "sube";
5688 case ISD::SHL_PARTS: return "shl_parts";
5689 case ISD::SRA_PARTS: return "sra_parts";
5690 case ISD::SRL_PARTS: return "srl_parts";
5692 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5693 case ISD::INSERT_SUBREG: return "insert_subreg";
5695 // Conversion operators.
5696 case ISD::SIGN_EXTEND: return "sign_extend";
5697 case ISD::ZERO_EXTEND: return "zero_extend";
5698 case ISD::ANY_EXTEND: return "any_extend";
5699 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5700 case ISD::TRUNCATE: return "truncate";
5701 case ISD::FP_ROUND: return "fp_round";
5702 case ISD::FLT_ROUNDS_: return "flt_rounds";
5703 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5704 case ISD::FP_EXTEND: return "fp_extend";
5706 case ISD::SINT_TO_FP: return "sint_to_fp";
5707 case ISD::UINT_TO_FP: return "uint_to_fp";
5708 case ISD::FP_TO_SINT: return "fp_to_sint";
5709 case ISD::FP_TO_UINT: return "fp_to_uint";
5710 case ISD::BIT_CONVERT: return "bit_convert";
5712 case ISD::CONVERT_RNDSAT: {
5713 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5714 default: assert(0 && "Unknown cvt code!");
5715 case ISD::CVT_FF: return "cvt_ff";
5716 case ISD::CVT_FS: return "cvt_fs";
5717 case ISD::CVT_FU: return "cvt_fu";
5718 case ISD::CVT_SF: return "cvt_sf";
5719 case ISD::CVT_UF: return "cvt_uf";
5720 case ISD::CVT_SS: return "cvt_ss";
5721 case ISD::CVT_SU: return "cvt_su";
5722 case ISD::CVT_US: return "cvt_us";
5723 case ISD::CVT_UU: return "cvt_uu";
5727 // Control flow instructions
5728 case ISD::BR: return "br";
5729 case ISD::BRIND: return "brind";
5730 case ISD::BR_JT: return "br_jt";
5731 case ISD::BRCOND: return "brcond";
5732 case ISD::BR_CC: return "br_cc";
5733 case ISD::RET: return "ret";
5734 case ISD::CALLSEQ_START: return "callseq_start";
5735 case ISD::CALLSEQ_END: return "callseq_end";
5738 case ISD::LOAD: return "load";
5739 case ISD::STORE: return "store";
5740 case ISD::VAARG: return "vaarg";
5741 case ISD::VACOPY: return "vacopy";
5742 case ISD::VAEND: return "vaend";
5743 case ISD::VASTART: return "vastart";
5744 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5745 case ISD::EXTRACT_ELEMENT: return "extract_element";
5746 case ISD::BUILD_PAIR: return "build_pair";
5747 case ISD::STACKSAVE: return "stacksave";
5748 case ISD::STACKRESTORE: return "stackrestore";
5749 case ISD::TRAP: return "trap";
5752 case ISD::BSWAP: return "bswap";
5753 case ISD::CTPOP: return "ctpop";
5754 case ISD::CTTZ: return "cttz";
5755 case ISD::CTLZ: return "ctlz";
5758 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5759 case ISD::DEBUG_LOC: return "debug_loc";
5762 case ISD::TRAMPOLINE: return "trampoline";
5765 switch (cast<CondCodeSDNode>(this)->get()) {
5766 default: assert(0 && "Unknown setcc condition!");
5767 case ISD::SETOEQ: return "setoeq";
5768 case ISD::SETOGT: return "setogt";
5769 case ISD::SETOGE: return "setoge";
5770 case ISD::SETOLT: return "setolt";
5771 case ISD::SETOLE: return "setole";
5772 case ISD::SETONE: return "setone";
5774 case ISD::SETO: return "seto";
5775 case ISD::SETUO: return "setuo";
5776 case ISD::SETUEQ: return "setue";
5777 case ISD::SETUGT: return "setugt";
5778 case ISD::SETUGE: return "setuge";
5779 case ISD::SETULT: return "setult";
5780 case ISD::SETULE: return "setule";
5781 case ISD::SETUNE: return "setune";
5783 case ISD::SETEQ: return "seteq";
5784 case ISD::SETGT: return "setgt";
5785 case ISD::SETGE: return "setge";
5786 case ISD::SETLT: return "setlt";
5787 case ISD::SETLE: return "setle";
5788 case ISD::SETNE: return "setne";
5793 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5802 return "<post-inc>";
5804 return "<post-dec>";
5808 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5809 std::string S = "< ";
5823 if (getByValAlign())
5824 S += "byval-align:" + utostr(getByValAlign()) + " ";
5826 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5828 S += "byval-size:" + utostr(getByValSize()) + " ";
5832 void SDNode::dump() const { dump(0); }
5833 void SDNode::dump(const SelectionDAG *G) const {
5838 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5839 OS << (void*)this << ": ";
5841 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5843 if (getValueType(i) == MVT::Other)
5846 OS << getValueType(i).getMVTString();
5848 OS << " = " << getOperationName(G);
5851 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5853 OS << (void*)getOperand(i).getNode();
5854 if (unsigned RN = getOperand(i).getResNo())
5858 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5859 SDNode *Mask = getOperand(2).getNode();
5861 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5863 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5866 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5871 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5872 OS << '<' << CSDN->getAPIntValue() << '>';
5873 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5874 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5875 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5876 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5877 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5880 CSDN->getValueAPF().bitcastToAPInt().dump();
5883 } else if (const GlobalAddressSDNode *GADN =
5884 dyn_cast<GlobalAddressSDNode>(this)) {
5885 int64_t offset = GADN->getOffset();
5887 WriteAsOperand(OS, GADN->getGlobal());
5890 OS << " + " << offset;
5892 OS << " " << offset;
5893 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5894 OS << "<" << FIDN->getIndex() << ">";
5895 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5896 OS << "<" << JTDN->getIndex() << ">";
5897 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5898 int offset = CP->getOffset();
5899 if (CP->isMachineConstantPoolEntry())
5900 OS << "<" << *CP->getMachineCPVal() << ">";
5902 OS << "<" << *CP->getConstVal() << ">";
5904 OS << " + " << offset;
5906 OS << " " << offset;
5907 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5909 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5911 OS << LBB->getName() << " ";
5912 OS << (const void*)BBDN->getBasicBlock() << ">";
5913 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5914 if (G && R->getReg() &&
5915 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5916 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5918 OS << " #" << R->getReg();
5920 } else if (const ExternalSymbolSDNode *ES =
5921 dyn_cast<ExternalSymbolSDNode>(this)) {
5922 OS << "'" << ES->getSymbol() << "'";
5923 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5925 OS << "<" << M->getValue() << ">";
5928 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5929 if (M->MO.getValue())
5930 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5932 OS << "<null:" << M->MO.getOffset() << ">";
5933 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5934 OS << N->getArgFlags().getArgFlagsString();
5935 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5936 OS << ":" << N->getVT().getMVTString();
5938 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5939 const Value *SrcValue = LD->getSrcValue();
5940 int SrcOffset = LD->getSrcValueOffset();
5946 OS << ":" << SrcOffset << ">";
5949 switch (LD->getExtensionType()) {
5950 default: doExt = false; break;
5951 case ISD::EXTLOAD: OS << " <anyext "; break;
5952 case ISD::SEXTLOAD: OS << " <sext "; break;
5953 case ISD::ZEXTLOAD: OS << " <zext "; break;
5956 OS << LD->getMemoryVT().getMVTString() << ">";
5958 const char *AM = getIndexedModeName(LD->getAddressingMode());
5961 if (LD->isVolatile())
5962 OS << " <volatile>";
5963 OS << " alignment=" << LD->getAlignment();
5964 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5965 const Value *SrcValue = ST->getSrcValue();
5966 int SrcOffset = ST->getSrcValueOffset();
5972 OS << ":" << SrcOffset << ">";
5974 if (ST->isTruncatingStore())
5975 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5977 const char *AM = getIndexedModeName(ST->getAddressingMode());
5980 if (ST->isVolatile())
5981 OS << " <volatile>";
5982 OS << " alignment=" << ST->getAlignment();
5983 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5984 const Value *SrcValue = AT->getSrcValue();
5985 int SrcOffset = AT->getSrcValueOffset();
5991 OS << ":" << SrcOffset << ">";
5992 if (AT->isVolatile())
5993 OS << " <volatile>";
5994 OS << " alignment=" << AT->getAlignment();
5998 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5999 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6000 if (N->getOperand(i).getNode()->hasOneUse())
6001 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6003 cerr << "\n" << std::string(indent+2, ' ')
6004 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6007 cerr << "\n" << std::string(indent, ' ');
6011 void SelectionDAG::dump() const {
6012 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
6014 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6016 const SDNode *N = I;
6017 if (!N->hasOneUse() && N != getRoot().getNode())
6018 DumpNodes(N, 2, this);
6021 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6026 const Type *ConstantPoolSDNode::getType() const {
6027 if (isMachineConstantPoolEntry())
6028 return Val.MachineCPVal->getType();
6029 return Val.ConstVal->getType();