1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/Support/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BITCAST)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BITCAST)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
784 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
785 static void VerifySDNode(SDNode *N) {
786 // The SDNode allocators cannot be used to allocate nodes with fields that are
787 // not present in an SDNode!
788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
811 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
813 static void VerifyMachineNode(SDNode *N) {
814 // The MachineNode allocators cannot be used to allocate nodes with fields
815 // that are not present in a MachineNode!
816 // Currently there are no such nodes.
822 /// getEVTAlignment - Compute the default alignment value for the
825 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
826 const Type *Ty = VT == MVT::iPTR ?
827 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
828 VT.getTypeForEVT(*getContext());
830 return TLI.getTargetData()->getABITypeAlignment(Ty);
833 // EntryNode could meaningfully have debug info if we can find it...
834 SelectionDAG::SelectionDAG(const TargetMachine &tm)
835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
837 Root(getEntryNode()), Ordering(0) {
838 AllNodes.push_back(&EntryNode);
839 Ordering = new SDNodeOrdering();
840 DbgInfo = new SDDbgInfo();
843 void SelectionDAG::init(MachineFunction &mf) {
845 Context = &mf.getFunction()->getContext();
848 SelectionDAG::~SelectionDAG() {
854 void SelectionDAG::allnodes_clear() {
855 assert(&*AllNodes.begin() == &EntryNode);
856 AllNodes.remove(AllNodes.begin());
857 while (!AllNodes.empty())
858 DeallocateNode(AllNodes.begin());
861 void SelectionDAG::clear() {
863 OperandAllocator.Reset();
866 ExtendedValueTypeNodes.clear();
867 ExternalSymbols.clear();
868 TargetExternalSymbols.clear();
869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
870 static_cast<CondCodeSDNode*>(0));
871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
872 static_cast<SDNode*>(0));
874 EntryNode.UseList = 0;
875 AllNodes.push_back(&EntryNode);
876 Root = getEntryNode();
881 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
882 return VT.bitsGT(Op.getValueType()) ?
883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
884 getNode(ISD::TRUNCATE, DL, VT, Op);
887 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
888 return VT.bitsGT(Op.getValueType()) ?
889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
890 getNode(ISD::TRUNCATE, DL, VT, Op);
893 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
894 assert(!VT.isVector() &&
895 "getZeroExtendInReg should use the vector element type instead of "
897 if (Op.getValueType() == VT) return Op;
898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
899 APInt Imm = APInt::getLowBitsSet(BitWidth,
901 return getNode(ISD::AND, DL, Op.getValueType(), Op,
902 getConstant(Imm, Op.getValueType()));
905 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
907 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
908 EVT EltVT = VT.getScalarType();
910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
911 return getNode(ISD::XOR, DL, VT, Val, NegOne);
914 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
915 EVT EltVT = VT.getScalarType();
916 assert((EltVT.getSizeInBits() >= 64 ||
917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
918 "getConstant with a uint64_t value that doesn't fit in the type!");
919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
922 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
926 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
927 assert(VT.isInteger() && "Cannot create FP integer constant!");
929 EVT EltVT = VT.getScalarType();
930 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
931 "APInt size does not match type size!");
933 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
935 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
939 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
941 return SDValue(N, 0);
944 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
958 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
959 return getConstant(Val, TLI.getPointerTy(), isTarget);
963 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
964 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
967 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
968 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
970 EVT EltVT = VT.getScalarType();
972 // Do the map lookup using the actual bit pattern for the floating point
973 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
974 // we don't have issues with SNANs.
975 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
977 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
981 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
983 return SDValue(N, 0);
986 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
991 SDValue Result(N, 0);
993 SmallVector<SDValue, 8> Ops;
994 Ops.assign(VT.getVectorNumElements(), Result);
995 // FIXME DebugLoc info might be appropriate here
996 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1001 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1002 EVT EltVT = VT.getScalarType();
1003 if (EltVT==MVT::f32)
1004 return getConstantFP(APFloat((float)Val), VT, isTarget);
1005 else if (EltVT==MVT::f64)
1006 return getConstantFP(APFloat(Val), VT, isTarget);
1007 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1009 APFloat apf = APFloat(Val);
1010 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1012 return getConstantFP(apf, VT, isTarget);
1014 assert(0 && "Unsupported type in getConstantFP");
1019 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1020 EVT VT, int64_t Offset,
1022 unsigned char TargetFlags) {
1023 assert((TargetFlags == 0 || isTargetGA) &&
1024 "Cannot set target flags on target-independent globals");
1026 // Truncate (with sign-extension) the offset value to the pointer size.
1027 EVT PTy = TLI.getPointerTy();
1028 unsigned BitWidth = PTy.getSizeInBits();
1030 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1032 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1034 // If GV is an alias then use the aliasee for determining thread-localness.
1035 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1036 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1040 if (GVar && GVar->isThreadLocal())
1041 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1043 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1045 FoldingSetNodeID ID;
1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1048 ID.AddInteger(Offset);
1049 ID.AddInteger(TargetFlags);
1051 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1052 return SDValue(E, 0);
1054 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1055 Offset, TargetFlags);
1056 CSEMap.InsertNode(N, IP);
1057 AllNodes.push_back(N);
1058 return SDValue(N, 0);
1061 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1062 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1063 FoldingSetNodeID ID;
1064 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1068 return SDValue(E, 0);
1070 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1076 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent jump tables");
1080 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(TargetFlags);
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1089 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1097 unsigned Alignment, int Offset,
1099 unsigned char TargetFlags) {
1100 assert((TargetFlags == 0 || isTarget) &&
1101 "Cannot set target flags on target-independent globals");
1103 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1104 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1107 ID.AddInteger(Alignment);
1108 ID.AddInteger(Offset);
1110 ID.AddInteger(TargetFlags);
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1116 Alignment, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1123 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1124 unsigned Alignment, int Offset,
1126 unsigned char TargetFlags) {
1127 assert((TargetFlags == 0 || isTarget) &&
1128 "Cannot set target flags on target-independent globals");
1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1132 FoldingSetNodeID ID;
1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1134 ID.AddInteger(Alignment);
1135 ID.AddInteger(Offset);
1136 C->AddSelectionDAGCSEId(ID);
1137 ID.AddInteger(TargetFlags);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1143 Alignment, TargetFlags);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1150 FoldingSetNodeID ID;
1151 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1158 CSEMap.InsertNode(N, IP);
1159 AllNodes.push_back(N);
1160 return SDValue(N, 0);
1163 SDValue SelectionDAG::getValueType(EVT VT) {
1164 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1165 ValueTypeNodes.size())
1166 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1168 SDNode *&N = VT.isExtended() ?
1169 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1171 if (N) return SDValue(N, 0);
1172 N = new (NodeAllocator) VTSDNode(VT);
1173 AllNodes.push_back(N);
1174 return SDValue(N, 0);
1177 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1178 SDNode *&N = ExternalSymbols[Sym];
1179 if (N) return SDValue(N, 0);
1180 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1186 unsigned char TargetFlags) {
1188 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1190 if (N) return SDValue(N, 0);
1191 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1197 if ((unsigned)Cond >= CondCodeNodes.size())
1198 CondCodeNodes.resize(Cond+1);
1200 if (CondCodeNodes[Cond] == 0) {
1201 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1202 CondCodeNodes[Cond] = N;
1203 AllNodes.push_back(N);
1206 return SDValue(CondCodeNodes[Cond], 0);
1209 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1210 // the shuffle mask M that point at N1 to point at N2, and indices that point
1211 // N2 to point at N1.
1212 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1214 int NElts = M.size();
1215 for (int i = 0; i != NElts; ++i) {
1223 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1224 SDValue N2, const int *Mask) {
1225 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1226 assert(VT.isVector() && N1.getValueType().isVector() &&
1227 "Vector Shuffle VTs must be a vectors");
1228 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1229 && "Vector Shuffle VTs must have same element type");
1231 // Canonicalize shuffle undef, undef -> undef
1232 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1233 return getUNDEF(VT);
1235 // Validate that all indices in Mask are within the range of the elements
1236 // input to the shuffle.
1237 unsigned NElts = VT.getVectorNumElements();
1238 SmallVector<int, 8> MaskVec;
1239 for (unsigned i = 0; i != NElts; ++i) {
1240 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1241 MaskVec.push_back(Mask[i]);
1244 // Canonicalize shuffle v, v -> v, undef
1247 for (unsigned i = 0; i != NElts; ++i)
1248 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1251 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1252 if (N1.getOpcode() == ISD::UNDEF)
1253 commuteShuffle(N1, N2, MaskVec);
1255 // Canonicalize all index into lhs, -> shuffle lhs, undef
1256 // Canonicalize all index into rhs, -> shuffle rhs, undef
1257 bool AllLHS = true, AllRHS = true;
1258 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1259 for (unsigned i = 0; i != NElts; ++i) {
1260 if (MaskVec[i] >= (int)NElts) {
1265 } else if (MaskVec[i] >= 0) {
1269 if (AllLHS && AllRHS)
1270 return getUNDEF(VT);
1271 if (AllLHS && !N2Undef)
1275 commuteShuffle(N1, N2, MaskVec);
1278 // If Identity shuffle, or all shuffle in to undef, return that node.
1279 bool AllUndef = true;
1280 bool Identity = true;
1281 for (unsigned i = 0; i != NElts; ++i) {
1282 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1283 if (MaskVec[i] >= 0) AllUndef = false;
1285 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1288 return getUNDEF(VT);
1290 FoldingSetNodeID ID;
1291 SDValue Ops[2] = { N1, N2 };
1292 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1293 for (unsigned i = 0; i != NElts; ++i)
1294 ID.AddInteger(MaskVec[i]);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1300 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1301 // SDNode doesn't have access to it. This memory will be "leaked" when
1302 // the node is deallocated, but recovered when the NodeAllocator is released.
1303 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1304 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1306 ShuffleVectorSDNode *N =
1307 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1308 CSEMap.InsertNode(N, IP);
1309 AllNodes.push_back(N);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1314 SDValue Val, SDValue DTy,
1315 SDValue STy, SDValue Rnd, SDValue Sat,
1316 ISD::CvtCode Code) {
1317 // If the src and dest types are the same and the conversion is between
1318 // integer types of the same sign or two floats, no conversion is necessary.
1320 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1323 FoldingSetNodeID ID;
1324 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1325 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1328 return SDValue(E, 0);
1330 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1332 CSEMap.InsertNode(N, IP);
1333 AllNodes.push_back(N);
1334 return SDValue(N, 0);
1337 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1340 ID.AddInteger(RegNo);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1346 CSEMap.InsertNode(N, IP);
1347 AllNodes.push_back(N);
1348 return SDValue(N, 0);
1351 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1352 FoldingSetNodeID ID;
1353 SDValue Ops[] = { Root };
1354 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1355 ID.AddPointer(Label);
1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1358 return SDValue(E, 0);
1360 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1367 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1369 unsigned char TargetFlags) {
1370 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1372 FoldingSetNodeID ID;
1373 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1375 ID.AddInteger(TargetFlags);
1377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1378 return SDValue(E, 0);
1380 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1381 CSEMap.InsertNode(N, IP);
1382 AllNodes.push_back(N);
1383 return SDValue(N, 0);
1386 SDValue SelectionDAG::getSrcValue(const Value *V) {
1387 assert((!V || V->getType()->isPointerTy()) &&
1388 "SrcValue is not a pointer?");
1390 FoldingSetNodeID ID;
1391 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1396 return SDValue(E, 0);
1398 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1404 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1405 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1406 FoldingSetNodeID ID;
1407 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1415 CSEMap.InsertNode(N, IP);
1416 AllNodes.push_back(N);
1417 return SDValue(N, 0);
1421 /// getShiftAmountOperand - Return the specified value casted to
1422 /// the target's desired shift amount type.
1423 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1424 EVT OpTy = Op.getValueType();
1425 MVT ShTy = TLI.getShiftAmountTy();
1426 if (OpTy == ShTy || OpTy.isVector()) return Op;
1428 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1429 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1432 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1433 /// specified value type.
1434 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1435 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1436 unsigned ByteSize = VT.getStoreSize();
1437 const Type *Ty = VT.getTypeForEVT(*getContext());
1438 unsigned StackAlign =
1439 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1441 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1442 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1445 /// CreateStackTemporary - Create a stack temporary suitable for holding
1446 /// either of the specified value types.
1447 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1448 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1449 VT2.getStoreSizeInBits())/8;
1450 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1451 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1452 const TargetData *TD = TLI.getTargetData();
1453 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1454 TD->getPrefTypeAlignment(Ty2));
1456 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1458 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1461 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1462 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1463 // These setcc operations always fold.
1467 case ISD::SETFALSE2: return getConstant(0, VT);
1469 case ISD::SETTRUE2: return getConstant(1, VT);
1481 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1485 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1486 const APInt &C2 = N2C->getAPIntValue();
1487 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1488 const APInt &C1 = N1C->getAPIntValue();
1491 default: llvm_unreachable("Unknown integer setcc!");
1492 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1493 case ISD::SETNE: return getConstant(C1 != C2, VT);
1494 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1495 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1496 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1497 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1498 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1499 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1500 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1501 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1505 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1506 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1507 // No compile time operations on this type yet.
1508 if (N1C->getValueType(0) == MVT::ppcf128)
1511 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1514 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1515 return getUNDEF(VT);
1517 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1518 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1519 return getUNDEF(VT);
1521 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1522 R==APFloat::cmpLessThan, VT);
1523 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1524 return getUNDEF(VT);
1526 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1527 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1528 return getUNDEF(VT);
1530 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1531 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1532 return getUNDEF(VT);
1534 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1535 R==APFloat::cmpEqual, VT);
1536 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1537 return getUNDEF(VT);
1539 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1540 R==APFloat::cmpEqual, VT);
1541 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1542 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1543 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1544 R==APFloat::cmpEqual, VT);
1545 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1546 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1547 R==APFloat::cmpLessThan, VT);
1548 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1549 R==APFloat::cmpUnordered, VT);
1550 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1551 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1554 // Ensure that the constant occurs on the RHS.
1555 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1559 // Could not fold it.
1563 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1564 /// use this predicate to simplify operations downstream.
1565 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1566 // This predicate is not safe for vector operations.
1567 if (Op.getValueType().isVector())
1570 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1571 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1574 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1575 /// this predicate to simplify operations downstream. Mask is known to be zero
1576 /// for bits that V cannot have.
1577 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1578 unsigned Depth) const {
1579 APInt KnownZero, KnownOne;
1580 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1581 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1582 return (KnownZero & Mask) == Mask;
1585 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1586 /// known to be either zero or one and return them in the KnownZero/KnownOne
1587 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1589 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1590 APInt &KnownZero, APInt &KnownOne,
1591 unsigned Depth) const {
1592 unsigned BitWidth = Mask.getBitWidth();
1593 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1594 "Mask size mismatches value type size!");
1596 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1597 if (Depth == 6 || Mask == 0)
1598 return; // Limit search depth.
1600 APInt KnownZero2, KnownOne2;
1602 switch (Op.getOpcode()) {
1604 // We know all of the bits for a constant!
1605 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1606 KnownZero = ~KnownOne & Mask;
1609 // If either the LHS or the RHS are Zero, the result is zero.
1610 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1611 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1612 KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // Output known-1 bits are only known if set in both the LHS & RHS.
1617 KnownOne &= KnownOne2;
1618 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1619 KnownZero |= KnownZero2;
1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1624 KnownZero2, KnownOne2, Depth+1);
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1628 // Output known-0 bits are only known if clear in both the LHS & RHS.
1629 KnownZero &= KnownZero2;
1630 // Output known-1 are known to be set if set in either the LHS | RHS.
1631 KnownOne |= KnownOne2;
1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1635 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1636 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1637 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1639 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1640 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1641 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1642 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1643 KnownZero = KnownZeroOut;
1647 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1648 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1649 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1651 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1653 // If low bits are zero in either operand, output low known-0 bits.
1654 // Also compute a conserative estimate for high known-0 bits.
1655 // More trickiness is possible, but this is sufficient for the
1656 // interesting case of alignment computation.
1658 unsigned TrailZ = KnownZero.countTrailingOnes() +
1659 KnownZero2.countTrailingOnes();
1660 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1661 KnownZero2.countLeadingOnes(),
1662 BitWidth) - BitWidth;
1664 TrailZ = std::min(TrailZ, BitWidth);
1665 LeadZ = std::min(LeadZ, BitWidth);
1666 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1667 APInt::getHighBitsSet(BitWidth, LeadZ);
1672 // For the purposes of computing leading zeros we can conservatively
1673 // treat a udiv as a logical right shift by the power of 2 known to
1674 // be less than the denominator.
1675 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1676 ComputeMaskedBits(Op.getOperand(0),
1677 AllOnes, KnownZero2, KnownOne2, Depth+1);
1678 unsigned LeadZ = KnownZero2.countLeadingOnes();
1682 ComputeMaskedBits(Op.getOperand(1),
1683 AllOnes, KnownZero2, KnownOne2, Depth+1);
1684 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1685 if (RHSUnknownLeadingOnes != BitWidth)
1686 LeadZ = std::min(BitWidth,
1687 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1689 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1693 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1694 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1698 // Only known if known in both the LHS and RHS.
1699 KnownOne &= KnownOne2;
1700 KnownZero &= KnownZero2;
1702 case ISD::SELECT_CC:
1703 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1704 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1705 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1706 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1708 // Only known if known in both the LHS and RHS.
1709 KnownOne &= KnownOne2;
1710 KnownZero &= KnownZero2;
1718 if (Op.getResNo() != 1)
1720 // The boolean result conforms to getBooleanContents. Fall through.
1722 // If we know the result of a setcc has the top bits zero, use this info.
1723 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1725 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1728 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1730 unsigned ShAmt = SA->getZExtValue();
1732 // If the shift count is an invalid immediate, don't do anything.
1733 if (ShAmt >= BitWidth)
1736 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1737 KnownZero, KnownOne, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 KnownZero <<= ShAmt;
1741 // low bits known zero.
1742 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1746 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1747 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1748 unsigned ShAmt = SA->getZExtValue();
1750 // If the shift count is an invalid immediate, don't do anything.
1751 if (ShAmt >= BitWidth)
1754 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1755 KnownZero, KnownOne, Depth+1);
1756 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1757 KnownZero = KnownZero.lshr(ShAmt);
1758 KnownOne = KnownOne.lshr(ShAmt);
1760 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1761 KnownZero |= HighBits; // High bits known zero.
1765 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1766 unsigned ShAmt = SA->getZExtValue();
1768 // If the shift count is an invalid immediate, don't do anything.
1769 if (ShAmt >= BitWidth)
1772 APInt InDemandedMask = (Mask << ShAmt);
1773 // If any of the demanded bits are produced by the sign extension, we also
1774 // demand the input sign bit.
1775 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1776 if (HighBits.getBoolValue())
1777 InDemandedMask |= APInt::getSignBit(BitWidth);
1779 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1782 KnownZero = KnownZero.lshr(ShAmt);
1783 KnownOne = KnownOne.lshr(ShAmt);
1785 // Handle the sign bits.
1786 APInt SignBit = APInt::getSignBit(BitWidth);
1787 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1789 if (KnownZero.intersects(SignBit)) {
1790 KnownZero |= HighBits; // New bits are known zero.
1791 } else if (KnownOne.intersects(SignBit)) {
1792 KnownOne |= HighBits; // New bits are known one.
1796 case ISD::SIGN_EXTEND_INREG: {
1797 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1798 unsigned EBits = EVT.getScalarType().getSizeInBits();
1800 // Sign extension. Compute the demanded bits in the result that are not
1801 // present in the input.
1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1804 APInt InSignBit = APInt::getSignBit(EBits);
1805 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1807 // If the sign extended bits are demanded, we know that the sign
1809 InSignBit.zext(BitWidth);
1810 if (NewBits.getBoolValue())
1811 InputDemandedBits |= InSignBit;
1813 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1814 KnownZero, KnownOne, Depth+1);
1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1817 // If the sign bit of the input is known set or clear, then we know the
1818 // top bits of the result.
1819 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1820 KnownZero |= NewBits;
1821 KnownOne &= ~NewBits;
1822 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1823 KnownOne |= NewBits;
1824 KnownZero &= ~NewBits;
1825 } else { // Input sign bit unknown
1826 KnownZero &= ~NewBits;
1827 KnownOne &= ~NewBits;
1834 unsigned LowBits = Log2_32(BitWidth)+1;
1835 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1840 if (ISD::isZEXTLoad(Op.getNode())) {
1841 LoadSDNode *LD = cast<LoadSDNode>(Op);
1842 EVT VT = LD->getMemoryVT();
1843 unsigned MemBits = VT.getScalarType().getSizeInBits();
1844 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1848 case ISD::ZERO_EXTEND: {
1849 EVT InVT = Op.getOperand(0).getValueType();
1850 unsigned InBits = InVT.getScalarType().getSizeInBits();
1851 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1852 APInt InMask = Mask;
1853 InMask.trunc(InBits);
1854 KnownZero.trunc(InBits);
1855 KnownOne.trunc(InBits);
1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1857 KnownZero.zext(BitWidth);
1858 KnownOne.zext(BitWidth);
1859 KnownZero |= NewBits;
1862 case ISD::SIGN_EXTEND: {
1863 EVT InVT = Op.getOperand(0).getValueType();
1864 unsigned InBits = InVT.getScalarType().getSizeInBits();
1865 APInt InSignBit = APInt::getSignBit(InBits);
1866 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1867 APInt InMask = Mask;
1868 InMask.trunc(InBits);
1870 // If any of the sign extended bits are demanded, we know that the sign
1871 // bit is demanded. Temporarily set this bit in the mask for our callee.
1872 if (NewBits.getBoolValue())
1873 InMask |= InSignBit;
1875 KnownZero.trunc(InBits);
1876 KnownOne.trunc(InBits);
1877 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1879 // Note if the sign bit is known to be zero or one.
1880 bool SignBitKnownZero = KnownZero.isNegative();
1881 bool SignBitKnownOne = KnownOne.isNegative();
1882 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1883 "Sign bit can't be known to be both zero and one!");
1885 // If the sign bit wasn't actually demanded by our caller, we don't
1886 // want it set in the KnownZero and KnownOne result values. Reset the
1887 // mask and reapply it to the result values.
1889 InMask.trunc(InBits);
1890 KnownZero &= InMask;
1893 KnownZero.zext(BitWidth);
1894 KnownOne.zext(BitWidth);
1896 // If the sign bit is known zero or one, the top bits match.
1897 if (SignBitKnownZero)
1898 KnownZero |= NewBits;
1899 else if (SignBitKnownOne)
1900 KnownOne |= NewBits;
1903 case ISD::ANY_EXTEND: {
1904 EVT InVT = Op.getOperand(0).getValueType();
1905 unsigned InBits = InVT.getScalarType().getSizeInBits();
1906 APInt InMask = Mask;
1907 InMask.trunc(InBits);
1908 KnownZero.trunc(InBits);
1909 KnownOne.trunc(InBits);
1910 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1911 KnownZero.zext(BitWidth);
1912 KnownOne.zext(BitWidth);
1915 case ISD::TRUNCATE: {
1916 EVT InVT = Op.getOperand(0).getValueType();
1917 unsigned InBits = InVT.getScalarType().getSizeInBits();
1918 APInt InMask = Mask;
1919 InMask.zext(InBits);
1920 KnownZero.zext(InBits);
1921 KnownOne.zext(InBits);
1922 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1923 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1924 KnownZero.trunc(BitWidth);
1925 KnownOne.trunc(BitWidth);
1928 case ISD::AssertZext: {
1929 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1930 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1931 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1933 KnownZero |= (~InMask) & Mask;
1937 // All bits are zero except the low bit.
1938 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1942 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1943 // We know that the top bits of C-X are clear if X contains less bits
1944 // than C (i.e. no wrap-around can happen). For example, 20-X is
1945 // positive if we can prove that X is >= 0 and < 16.
1946 if (CLHS->getAPIntValue().isNonNegative()) {
1947 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1948 // NLZ can't be BitWidth with no sign bit
1949 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1950 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1953 // If all of the MaskV bits are known to be zero, then we know the
1954 // output top bits are zero, because we now know that the output is
1956 if ((KnownZero2 & MaskV) == MaskV) {
1957 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1958 // Top bits known zero.
1959 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1966 // Output known-0 bits are known if clear or set in both the low clear bits
1967 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1968 // low 3 bits clear.
1969 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1970 BitWidth - Mask.countLeadingZeros());
1971 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1972 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1973 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1975 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1976 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1977 KnownZeroOut = std::min(KnownZeroOut,
1978 KnownZero2.countTrailingOnes());
1980 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1984 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1985 const APInt &RA = Rem->getAPIntValue().abs();
1986 if (RA.isPowerOf2()) {
1987 APInt LowBits = RA - 1;
1988 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1989 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1991 // The low bits of the first operand are unchanged by the srem.
1992 KnownZero = KnownZero2 & LowBits;
1993 KnownOne = KnownOne2 & LowBits;
1995 // If the first operand is non-negative or has all low bits zero, then
1996 // the upper bits are all zero.
1997 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1998 KnownZero |= ~LowBits;
2000 // If the first operand is negative and not all low bits are zero, then
2001 // the upper bits are all one.
2002 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2003 KnownOne |= ~LowBits;
2008 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2013 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2014 const APInt &RA = Rem->getAPIntValue();
2015 if (RA.isPowerOf2()) {
2016 APInt LowBits = (RA - 1);
2017 APInt Mask2 = LowBits & Mask;
2018 KnownZero |= ~LowBits & Mask;
2019 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2020 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2025 // Since the result is less than or equal to either operand, any leading
2026 // zero bits in either operand must also exist in the result.
2027 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2028 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2030 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2033 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2034 KnownZero2.countLeadingOnes());
2036 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2040 // Allow the target to implement this method for its nodes.
2041 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2042 case ISD::INTRINSIC_WO_CHAIN:
2043 case ISD::INTRINSIC_W_CHAIN:
2044 case ISD::INTRINSIC_VOID:
2045 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2052 /// ComputeNumSignBits - Return the number of times the sign bit of the
2053 /// register is replicated into the other bits. We know that at least 1 bit
2054 /// is always equal to the sign bit (itself), but other cases can give us
2055 /// information. For example, immediately after an "SRA X, 2", we know that
2056 /// the top 3 bits are all equal to each other, so we return 3.
2057 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2058 EVT VT = Op.getValueType();
2059 assert(VT.isInteger() && "Invalid VT!");
2060 unsigned VTBits = VT.getScalarType().getSizeInBits();
2062 unsigned FirstAnswer = 1;
2065 return 1; // Limit search depth.
2067 switch (Op.getOpcode()) {
2069 case ISD::AssertSext:
2070 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2071 return VTBits-Tmp+1;
2072 case ISD::AssertZext:
2073 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2076 case ISD::Constant: {
2077 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2078 // If negative, return # leading ones.
2079 if (Val.isNegative())
2080 return Val.countLeadingOnes();
2082 // Return # leading zeros.
2083 return Val.countLeadingZeros();
2086 case ISD::SIGN_EXTEND:
2087 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2088 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2090 case ISD::SIGN_EXTEND_INREG:
2091 // Max of the input and what this extends.
2093 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2096 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2097 return std::max(Tmp, Tmp2);
2100 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2101 // SRA X, C -> adds C sign bits.
2102 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2103 Tmp += C->getZExtValue();
2104 if (Tmp > VTBits) Tmp = VTBits;
2108 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2109 // shl destroys sign bits.
2110 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2111 if (C->getZExtValue() >= VTBits || // Bad shift.
2112 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2113 return Tmp - C->getZExtValue();
2118 case ISD::XOR: // NOT is handled here.
2119 // Logical binary ops preserve the number of sign bits at the worst.
2120 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2122 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2123 FirstAnswer = std::min(Tmp, Tmp2);
2124 // We computed what we know about the sign bits as our first
2125 // answer. Now proceed to the generic code that uses
2126 // ComputeMaskedBits, and pick whichever answer is better.
2131 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2132 if (Tmp == 1) return 1; // Early out.
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2134 return std::min(Tmp, Tmp2);
2142 if (Op.getResNo() != 1)
2144 // The boolean result conforms to getBooleanContents. Fall through.
2146 // If setcc returns 0/-1, all bits are sign bits.
2147 if (TLI.getBooleanContents() ==
2148 TargetLowering::ZeroOrNegativeOneBooleanContent)
2153 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2154 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2156 // Handle rotate right by N like a rotate left by 32-N.
2157 if (Op.getOpcode() == ISD::ROTR)
2158 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2160 // If we aren't rotating out all of the known-in sign bits, return the
2161 // number that are left. This handles rotl(sext(x), 1) for example.
2162 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2163 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2167 // Add can have at most one carry bit. Thus we know that the output
2168 // is, at worst, one more bit than the inputs.
2169 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2170 if (Tmp == 1) return 1; // Early out.
2172 // Special case decrementing a value (ADD X, -1):
2173 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2174 if (CRHS->isAllOnesValue()) {
2175 APInt KnownZero, KnownOne;
2176 APInt Mask = APInt::getAllOnesValue(VTBits);
2177 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2179 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2181 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2184 // If we are subtracting one from a positive number, there is no carry
2185 // out of the result.
2186 if (KnownZero.isNegative())
2190 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2191 if (Tmp2 == 1) return 1;
2192 return std::min(Tmp, Tmp2)-1;
2196 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2197 if (Tmp2 == 1) return 1;
2200 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2201 if (CLHS->isNullValue()) {
2202 APInt KnownZero, KnownOne;
2203 APInt Mask = APInt::getAllOnesValue(VTBits);
2204 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2205 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2207 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2210 // If the input is known to be positive (the sign bit is known clear),
2211 // the output of the NEG has the same number of sign bits as the input.
2212 if (KnownZero.isNegative())
2215 // Otherwise, we treat this like a SUB.
2218 // Sub can have at most one carry bit. Thus we know that the output
2219 // is, at worst, one more bit than the inputs.
2220 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2221 if (Tmp == 1) return 1; // Early out.
2222 return std::min(Tmp, Tmp2)-1;
2225 // FIXME: it's tricky to do anything useful for this, but it is an important
2226 // case for targets like X86.
2230 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2231 if (Op.getOpcode() == ISD::LOAD) {
2232 LoadSDNode *LD = cast<LoadSDNode>(Op);
2233 unsigned ExtType = LD->getExtensionType();
2236 case ISD::SEXTLOAD: // '17' bits known
2237 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2238 return VTBits-Tmp+1;
2239 case ISD::ZEXTLOAD: // '16' bits known
2240 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2245 // Allow the target to implement this method for its nodes.
2246 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2247 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2248 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2249 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2250 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2251 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2254 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2255 // use this information.
2256 APInt KnownZero, KnownOne;
2257 APInt Mask = APInt::getAllOnesValue(VTBits);
2258 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2260 if (KnownZero.isNegative()) { // sign bit is 0
2262 } else if (KnownOne.isNegative()) { // sign bit is 1;
2269 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2270 // the number of identical bits in the top of the input value.
2272 Mask <<= Mask.getBitWidth()-VTBits;
2273 // Return # leading zeros. We use 'min' here in case Val was zero before
2274 // shifting. We don't want to return '64' as for an i32 "0".
2275 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2278 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2279 // If we're told that NaNs won't happen, assume they won't.
2283 // If the value is a constant, we can obviously see if it is a NaN or not.
2284 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2285 return !C->getValueAPF().isNaN();
2287 // TODO: Recognize more cases here.
2292 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2293 // If the value is a constant, we can obviously see if it is a zero or not.
2294 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2295 return !C->isZero();
2297 // TODO: Recognize more cases here.
2302 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2303 // Check the obvious case.
2304 if (A == B) return true;
2306 // For for negative and positive zero.
2307 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2308 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2309 if (CA->isZero() && CB->isZero()) return true;
2311 // Otherwise they may not be equal.
2315 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2316 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2317 if (!GA) return false;
2318 if (GA->getOffset() != 0) return false;
2319 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2320 if (!GV) return false;
2321 return MF->getMMI().hasDebugInfo();
2325 /// getNode - Gets or creates the specified node.
2327 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2328 FoldingSetNodeID ID;
2329 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2331 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2332 return SDValue(E, 0);
2334 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2335 CSEMap.InsertNode(N, IP);
2337 AllNodes.push_back(N);
2341 return SDValue(N, 0);
2344 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2345 EVT VT, SDValue Operand) {
2346 // Constant fold unary operations with an integer constant operand.
2347 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2348 const APInt &Val = C->getAPIntValue();
2351 case ISD::SIGN_EXTEND:
2352 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2353 case ISD::ANY_EXTEND:
2354 case ISD::ZERO_EXTEND:
2356 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2357 case ISD::UINT_TO_FP:
2358 case ISD::SINT_TO_FP: {
2359 const uint64_t zero[] = {0, 0};
2360 // No compile time operations on ppcf128.
2361 if (VT == MVT::ppcf128) break;
2362 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2363 (void)apf.convertFromAPInt(Val,
2364 Opcode==ISD::SINT_TO_FP,
2365 APFloat::rmNearestTiesToEven);
2366 return getConstantFP(apf, VT);
2369 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2370 return getConstantFP(Val.bitsToFloat(), VT);
2371 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2372 return getConstantFP(Val.bitsToDouble(), VT);
2375 return getConstant(Val.byteSwap(), VT);
2377 return getConstant(Val.countPopulation(), VT);
2379 return getConstant(Val.countLeadingZeros(), VT);
2381 return getConstant(Val.countTrailingZeros(), VT);
2385 // Constant fold unary operations with a floating point constant operand.
2386 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2387 APFloat V = C->getValueAPF(); // make copy
2388 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2392 return getConstantFP(V, VT);
2395 return getConstantFP(V, VT);
2397 case ISD::FP_EXTEND: {
2399 // This can return overflow, underflow, or inexact; we don't care.
2400 // FIXME need to be more flexible about rounding mode.
2401 (void)V.convert(*EVTToAPFloatSemantics(VT),
2402 APFloat::rmNearestTiesToEven, &ignored);
2403 return getConstantFP(V, VT);
2405 case ISD::FP_TO_SINT:
2406 case ISD::FP_TO_UINT: {
2409 assert(integerPartWidth >= 64);
2410 // FIXME need to be more flexible about rounding mode.
2411 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2412 Opcode==ISD::FP_TO_SINT,
2413 APFloat::rmTowardZero, &ignored);
2414 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2416 APInt api(VT.getSizeInBits(), 2, x);
2417 return getConstant(api, VT);
2420 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2421 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2422 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2423 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2429 unsigned OpOpcode = Operand.getNode()->getOpcode();
2431 case ISD::TokenFactor:
2432 case ISD::MERGE_VALUES:
2433 case ISD::CONCAT_VECTORS:
2434 return Operand; // Factor, merge or concat of one node? No need.
2435 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2436 case ISD::FP_EXTEND:
2437 assert(VT.isFloatingPoint() &&
2438 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2439 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2440 assert((!VT.isVector() ||
2441 VT.getVectorNumElements() ==
2442 Operand.getValueType().getVectorNumElements()) &&
2443 "Vector element count mismatch!");
2444 if (Operand.getOpcode() == ISD::UNDEF)
2445 return getUNDEF(VT);
2447 case ISD::SIGN_EXTEND:
2448 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2449 "Invalid SIGN_EXTEND!");
2450 if (Operand.getValueType() == VT) return Operand; // noop extension
2451 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2452 "Invalid sext node, dst < src!");
2453 assert((!VT.isVector() ||
2454 VT.getVectorNumElements() ==
2455 Operand.getValueType().getVectorNumElements()) &&
2456 "Vector element count mismatch!");
2457 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2458 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2460 case ISD::ZERO_EXTEND:
2461 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2462 "Invalid ZERO_EXTEND!");
2463 if (Operand.getValueType() == VT) return Operand; // noop extension
2464 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2465 "Invalid zext node, dst < src!");
2466 assert((!VT.isVector() ||
2467 VT.getVectorNumElements() ==
2468 Operand.getValueType().getVectorNumElements()) &&
2469 "Vector element count mismatch!");
2470 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2471 return getNode(ISD::ZERO_EXTEND, DL, VT,
2472 Operand.getNode()->getOperand(0));
2474 case ISD::ANY_EXTEND:
2475 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2476 "Invalid ANY_EXTEND!");
2477 if (Operand.getValueType() == VT) return Operand; // noop extension
2478 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2479 "Invalid anyext node, dst < src!");
2480 assert((!VT.isVector() ||
2481 VT.getVectorNumElements() ==
2482 Operand.getValueType().getVectorNumElements()) &&
2483 "Vector element count mismatch!");
2485 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2486 OpOpcode == ISD::ANY_EXTEND)
2487 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2488 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2490 // (ext (trunx x)) -> x
2491 if (OpOpcode == ISD::TRUNCATE) {
2492 SDValue OpOp = Operand.getNode()->getOperand(0);
2493 if (OpOp.getValueType() == VT)
2498 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2499 "Invalid TRUNCATE!");
2500 if (Operand.getValueType() == VT) return Operand; // noop truncate
2501 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2502 "Invalid truncate node, src < dst!");
2503 assert((!VT.isVector() ||
2504 VT.getVectorNumElements() ==
2505 Operand.getValueType().getVectorNumElements()) &&
2506 "Vector element count mismatch!");
2507 if (OpOpcode == ISD::TRUNCATE)
2508 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2509 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2510 OpOpcode == ISD::ANY_EXTEND) {
2511 // If the source is smaller than the dest, we still need an extend.
2512 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2513 .bitsLT(VT.getScalarType()))
2514 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2515 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2516 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2518 return Operand.getNode()->getOperand(0);
2522 // Basic sanity checking.
2523 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2524 && "Cannot BITCAST between types of different sizes!");
2525 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2526 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2527 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2528 if (OpOpcode == ISD::UNDEF)
2529 return getUNDEF(VT);
2531 case ISD::SCALAR_TO_VECTOR:
2532 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2533 (VT.getVectorElementType() == Operand.getValueType() ||
2534 (VT.getVectorElementType().isInteger() &&
2535 Operand.getValueType().isInteger() &&
2536 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2537 "Illegal SCALAR_TO_VECTOR node!");
2538 if (OpOpcode == ISD::UNDEF)
2539 return getUNDEF(VT);
2540 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2541 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2542 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2543 Operand.getConstantOperandVal(1) == 0 &&
2544 Operand.getOperand(0).getValueType() == VT)
2545 return Operand.getOperand(0);
2548 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2549 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2550 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2551 Operand.getNode()->getOperand(0));
2552 if (OpOpcode == ISD::FNEG) // --X -> X
2553 return Operand.getNode()->getOperand(0);
2556 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2557 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2562 SDVTList VTs = getVTList(VT);
2563 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2564 FoldingSetNodeID ID;
2565 SDValue Ops[1] = { Operand };
2566 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2568 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2569 return SDValue(E, 0);
2571 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2572 CSEMap.InsertNode(N, IP);
2574 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2577 AllNodes.push_back(N);
2581 return SDValue(N, 0);
2584 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2586 ConstantSDNode *Cst1,
2587 ConstantSDNode *Cst2) {
2588 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2591 case ISD::ADD: return getConstant(C1 + C2, VT);
2592 case ISD::SUB: return getConstant(C1 - C2, VT);
2593 case ISD::MUL: return getConstant(C1 * C2, VT);
2595 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2598 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2601 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2604 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2606 case ISD::AND: return getConstant(C1 & C2, VT);
2607 case ISD::OR: return getConstant(C1 | C2, VT);
2608 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2609 case ISD::SHL: return getConstant(C1 << C2, VT);
2610 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2611 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2612 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2613 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2620 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2621 SDValue N1, SDValue N2) {
2622 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2623 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2626 case ISD::TokenFactor:
2627 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2628 N2.getValueType() == MVT::Other && "Invalid token factor!");
2629 // Fold trivial token factors.
2630 if (N1.getOpcode() == ISD::EntryToken) return N2;
2631 if (N2.getOpcode() == ISD::EntryToken) return N1;
2632 if (N1 == N2) return N1;
2634 case ISD::CONCAT_VECTORS:
2635 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2636 // one big BUILD_VECTOR.
2637 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2638 N2.getOpcode() == ISD::BUILD_VECTOR) {
2639 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2640 N1.getNode()->op_end());
2641 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2642 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2646 assert(VT.isInteger() && "This operator does not apply to FP types!");
2647 assert(N1.getValueType() == N2.getValueType() &&
2648 N1.getValueType() == VT && "Binary operator types must match!");
2649 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2650 // worth handling here.
2651 if (N2C && N2C->isNullValue())
2653 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2660 assert(VT.isInteger() && "This operator does not apply to FP types!");
2661 assert(N1.getValueType() == N2.getValueType() &&
2662 N1.getValueType() == VT && "Binary operator types must match!");
2663 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2664 // it's worth handling here.
2665 if (N2C && N2C->isNullValue())
2675 assert(VT.isInteger() && "This operator does not apply to FP types!");
2676 assert(N1.getValueType() == N2.getValueType() &&
2677 N1.getValueType() == VT && "Binary operator types must match!");
2685 if (Opcode == ISD::FADD) {
2687 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2688 if (CFP->getValueAPF().isZero())
2691 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2692 if (CFP->getValueAPF().isZero())
2694 } else if (Opcode == ISD::FSUB) {
2696 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2697 if (CFP->getValueAPF().isZero())
2701 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2702 assert(N1.getValueType() == N2.getValueType() &&
2703 N1.getValueType() == VT && "Binary operator types must match!");
2705 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2706 assert(N1.getValueType() == VT &&
2707 N1.getValueType().isFloatingPoint() &&
2708 N2.getValueType().isFloatingPoint() &&
2709 "Invalid FCOPYSIGN!");
2716 assert(VT == N1.getValueType() &&
2717 "Shift operators return type must be the same as their first arg");
2718 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2719 "Shifts only work on integers");
2721 // Always fold shifts of i1 values so the code generator doesn't need to
2722 // handle them. Since we know the size of the shift has to be less than the
2723 // size of the value, the shift/rotate count is guaranteed to be zero.
2726 if (N2C && N2C->isNullValue())
2729 case ISD::FP_ROUND_INREG: {
2730 EVT EVT = cast<VTSDNode>(N2)->getVT();
2731 assert(VT == N1.getValueType() && "Not an inreg round!");
2732 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2733 "Cannot FP_ROUND_INREG integer types");
2734 assert(EVT.isVector() == VT.isVector() &&
2735 "FP_ROUND_INREG type should be vector iff the operand "
2737 assert((!EVT.isVector() ||
2738 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2739 "Vector element counts must match in FP_ROUND_INREG");
2740 assert(EVT.bitsLE(VT) && "Not rounding down!");
2741 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2745 assert(VT.isFloatingPoint() &&
2746 N1.getValueType().isFloatingPoint() &&
2747 VT.bitsLE(N1.getValueType()) &&
2748 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2749 if (N1.getValueType() == VT) return N1; // noop conversion.
2751 case ISD::AssertSext:
2752 case ISD::AssertZext: {
2753 EVT EVT = cast<VTSDNode>(N2)->getVT();
2754 assert(VT == N1.getValueType() && "Not an inreg extend!");
2755 assert(VT.isInteger() && EVT.isInteger() &&
2756 "Cannot *_EXTEND_INREG FP types");
2757 assert(!EVT.isVector() &&
2758 "AssertSExt/AssertZExt type should be the vector element type "
2759 "rather than the vector type!");
2760 assert(EVT.bitsLE(VT) && "Not extending!");
2761 if (VT == EVT) return N1; // noop assertion.
2764 case ISD::SIGN_EXTEND_INREG: {
2765 EVT EVT = cast<VTSDNode>(N2)->getVT();
2766 assert(VT == N1.getValueType() && "Not an inreg extend!");
2767 assert(VT.isInteger() && EVT.isInteger() &&
2768 "Cannot *_EXTEND_INREG FP types");
2769 assert(EVT.isVector() == VT.isVector() &&
2770 "SIGN_EXTEND_INREG type should be vector iff the operand "
2772 assert((!EVT.isVector() ||
2773 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2774 "Vector element counts must match in SIGN_EXTEND_INREG");
2775 assert(EVT.bitsLE(VT) && "Not extending!");
2776 if (EVT == VT) return N1; // Not actually extending
2779 APInt Val = N1C->getAPIntValue();
2780 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2781 Val <<= Val.getBitWidth()-FromBits;
2782 Val = Val.ashr(Val.getBitWidth()-FromBits);
2783 return getConstant(Val, VT);
2787 case ISD::EXTRACT_VECTOR_ELT:
2788 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2789 if (N1.getOpcode() == ISD::UNDEF)
2790 return getUNDEF(VT);
2792 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2793 // expanding copies of large vectors from registers.
2795 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2796 N1.getNumOperands() > 0) {
2798 N1.getOperand(0).getValueType().getVectorNumElements();
2799 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2800 N1.getOperand(N2C->getZExtValue() / Factor),
2801 getConstant(N2C->getZExtValue() % Factor,
2802 N2.getValueType()));
2805 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2806 // expanding large vector constants.
2807 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2808 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2809 EVT VEltTy = N1.getValueType().getVectorElementType();
2810 if (Elt.getValueType() != VEltTy) {
2811 // If the vector element type is not legal, the BUILD_VECTOR operands
2812 // are promoted and implicitly truncated. Make that explicit here.
2813 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2816 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2817 // result is implicitly extended.
2818 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2823 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2824 // operations are lowered to scalars.
2825 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2826 // If the indices are the same, return the inserted element else
2827 // if the indices are known different, extract the element from
2828 // the original vector.
2829 SDValue N1Op2 = N1.getOperand(2);
2830 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2832 if (N1Op2C && N2C) {
2833 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2834 if (VT == N1.getOperand(1).getValueType())
2835 return N1.getOperand(1);
2837 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2840 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2844 case ISD::EXTRACT_ELEMENT:
2845 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2846 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2847 (N1.getValueType().isInteger() == VT.isInteger()) &&
2848 "Wrong types for EXTRACT_ELEMENT!");
2850 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2851 // 64-bit integers into 32-bit parts. Instead of building the extract of
2852 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2853 if (N1.getOpcode() == ISD::BUILD_PAIR)
2854 return N1.getOperand(N2C->getZExtValue());
2856 // EXTRACT_ELEMENT of a constant int is also very common.
2857 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2858 unsigned ElementSize = VT.getSizeInBits();
2859 unsigned Shift = ElementSize * N2C->getZExtValue();
2860 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2861 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2864 case ISD::EXTRACT_SUBVECTOR:
2865 if (N1.getValueType() == VT) // Trivial extraction.
2872 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2873 if (SV.getNode()) return SV;
2874 } else { // Cannonicalize constant to RHS if commutative
2875 if (isCommutativeBinOp(Opcode)) {
2876 std::swap(N1C, N2C);
2882 // Constant fold FP operations.
2883 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2884 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2886 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2887 // Cannonicalize constant to RHS if commutative
2888 std::swap(N1CFP, N2CFP);
2890 } else if (N2CFP && VT != MVT::ppcf128) {
2891 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2892 APFloat::opStatus s;
2895 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2896 if (s != APFloat::opInvalidOp)
2897 return getConstantFP(V1, VT);
2900 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2901 if (s!=APFloat::opInvalidOp)
2902 return getConstantFP(V1, VT);
2905 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2906 if (s!=APFloat::opInvalidOp)
2907 return getConstantFP(V1, VT);
2910 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2911 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2912 return getConstantFP(V1, VT);
2915 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2916 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2917 return getConstantFP(V1, VT);
2919 case ISD::FCOPYSIGN:
2921 return getConstantFP(V1, VT);
2927 // Canonicalize an UNDEF to the RHS, even over a constant.
2928 if (N1.getOpcode() == ISD::UNDEF) {
2929 if (isCommutativeBinOp(Opcode)) {
2933 case ISD::FP_ROUND_INREG:
2934 case ISD::SIGN_EXTEND_INREG:
2940 return N1; // fold op(undef, arg2) -> undef
2948 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2949 // For vectors, we can't easily build an all zero vector, just return
2956 // Fold a bunch of operators when the RHS is undef.
2957 if (N2.getOpcode() == ISD::UNDEF) {
2960 if (N1.getOpcode() == ISD::UNDEF)
2961 // Handle undef ^ undef -> 0 special case. This is a common
2963 return getConstant(0, VT);
2973 return N2; // fold op(arg1, undef) -> undef
2987 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2988 // For vectors, we can't easily build an all zero vector, just return
2993 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2994 // For vectors, we can't easily build an all one vector, just return
3002 // Memoize this node if possible.
3004 SDVTList VTs = getVTList(VT);
3005 if (VT != MVT::Flag) {
3006 SDValue Ops[] = { N1, N2 };
3007 FoldingSetNodeID ID;
3008 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3011 return SDValue(E, 0);
3013 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3014 CSEMap.InsertNode(N, IP);
3016 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3019 AllNodes.push_back(N);
3023 return SDValue(N, 0);
3026 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3027 SDValue N1, SDValue N2, SDValue N3) {
3028 // Perform various simplifications.
3029 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3031 case ISD::CONCAT_VECTORS:
3032 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3033 // one big BUILD_VECTOR.
3034 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3035 N2.getOpcode() == ISD::BUILD_VECTOR &&
3036 N3.getOpcode() == ISD::BUILD_VECTOR) {
3037 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3038 N1.getNode()->op_end());
3039 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3040 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3041 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3045 // Use FoldSetCC to simplify SETCC's.
3046 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3047 if (Simp.getNode()) return Simp;
3052 if (N1C->getZExtValue())
3053 return N2; // select true, X, Y -> X
3055 return N3; // select false, X, Y -> Y
3058 if (N2 == N3) return N2; // select C, X, X -> X
3060 case ISD::VECTOR_SHUFFLE:
3061 llvm_unreachable("should use getVectorShuffle constructor!");
3064 // Fold bit_convert nodes from a type to themselves.
3065 if (N1.getValueType() == VT)
3070 // Memoize node if it doesn't produce a flag.
3072 SDVTList VTs = getVTList(VT);
3073 if (VT != MVT::Flag) {
3074 SDValue Ops[] = { N1, N2, N3 };
3075 FoldingSetNodeID ID;
3076 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3079 return SDValue(E, 0);
3081 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3082 CSEMap.InsertNode(N, IP);
3084 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3087 AllNodes.push_back(N);
3091 return SDValue(N, 0);
3094 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3095 SDValue N1, SDValue N2, SDValue N3,
3097 SDValue Ops[] = { N1, N2, N3, N4 };
3098 return getNode(Opcode, DL, VT, Ops, 4);
3101 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3102 SDValue N1, SDValue N2, SDValue N3,
3103 SDValue N4, SDValue N5) {
3104 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3105 return getNode(Opcode, DL, VT, Ops, 5);
3108 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3109 /// the incoming stack arguments to be loaded from the stack.
3110 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3111 SmallVector<SDValue, 8> ArgChains;
3113 // Include the original chain at the beginning of the list. When this is
3114 // used by target LowerCall hooks, this helps legalize find the
3115 // CALLSEQ_BEGIN node.
3116 ArgChains.push_back(Chain);
3118 // Add a chain value for each stack argument.
3119 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3120 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3121 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3122 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3123 if (FI->getIndex() < 0)
3124 ArgChains.push_back(SDValue(L, 1));
3126 // Build a tokenfactor for all the chains.
3127 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3128 &ArgChains[0], ArgChains.size());
3131 /// getMemsetValue - Vectorized representation of the memset value
3133 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3135 assert(Value.getOpcode() != ISD::UNDEF);
3137 unsigned NumBits = VT.getScalarType().getSizeInBits();
3138 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3139 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3141 for (unsigned i = NumBits; i > 8; i >>= 1) {
3142 Val = (Val << Shift) | Val;
3146 return DAG.getConstant(Val, VT);
3147 return DAG.getConstantFP(APFloat(Val), VT);
3150 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3151 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3153 for (unsigned i = NumBits; i > 8; i >>= 1) {
3154 Value = DAG.getNode(ISD::OR, dl, VT,
3155 DAG.getNode(ISD::SHL, dl, VT, Value,
3156 DAG.getConstant(Shift,
3157 TLI.getShiftAmountTy())),
3165 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3166 /// used when a memcpy is turned into a memset when the source is a constant
3168 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3169 const TargetLowering &TLI,
3170 std::string &Str, unsigned Offset) {
3171 // Handle vector with all elements zero.
3174 return DAG.getConstant(0, VT);
3175 else if (VT == MVT::f32 || VT == MVT::f64)
3176 return DAG.getConstantFP(0.0, VT);
3177 else if (VT.isVector()) {
3178 unsigned NumElts = VT.getVectorNumElements();
3179 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3180 return DAG.getNode(ISD::BITCAST, dl, VT,
3181 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3184 llvm_unreachable("Expected type!");
3187 assert(!VT.isVector() && "Can't handle vector type here!");
3188 unsigned NumBits = VT.getSizeInBits();
3189 unsigned MSB = NumBits / 8;
3191 if (TLI.isLittleEndian())
3192 Offset = Offset + MSB - 1;
3193 for (unsigned i = 0; i != MSB; ++i) {
3194 Val = (Val << 8) | (unsigned char)Str[Offset];
3195 Offset += TLI.isLittleEndian() ? -1 : 1;
3197 return DAG.getConstant(Val, VT);
3200 /// getMemBasePlusOffset - Returns base and offset node for the
3202 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3203 SelectionDAG &DAG) {
3204 EVT VT = Base.getValueType();
3205 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3206 VT, Base, DAG.getConstant(Offset, VT));
3209 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3211 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3212 unsigned SrcDelta = 0;
3213 GlobalAddressSDNode *G = NULL;
3214 if (Src.getOpcode() == ISD::GlobalAddress)
3215 G = cast<GlobalAddressSDNode>(Src);
3216 else if (Src.getOpcode() == ISD::ADD &&
3217 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3218 Src.getOperand(1).getOpcode() == ISD::Constant) {
3219 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3220 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3225 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3226 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3232 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3233 /// to replace the memset / memcpy. Return true if the number of memory ops
3234 /// is below the threshold. It returns the types of the sequence of
3235 /// memory ops to perform memset / memcpy by reference.
3236 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3237 unsigned Limit, uint64_t Size,
3238 unsigned DstAlign, unsigned SrcAlign,
3239 bool NonScalarIntSafe,
3242 const TargetLowering &TLI) {
3243 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3244 "Expecting memcpy / memset source to meet alignment requirement!");
3245 // If 'SrcAlign' is zero, that means the memory operation does not need load
3246 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3247 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3248 // specified alignment of the memory operation. If it is zero, that means
3249 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3250 // indicates whether the memcpy source is constant so it does not need to be
3252 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3253 NonScalarIntSafe, MemcpyStrSrc,
3254 DAG.getMachineFunction());
3256 if (VT == MVT::Other) {
3257 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3258 TLI.allowsUnalignedMemoryAccesses(VT)) {
3259 VT = TLI.getPointerTy();
3261 switch (DstAlign & 7) {
3262 case 0: VT = MVT::i64; break;
3263 case 4: VT = MVT::i32; break;
3264 case 2: VT = MVT::i16; break;
3265 default: VT = MVT::i8; break;
3270 while (!TLI.isTypeLegal(LVT))
3271 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3272 assert(LVT.isInteger());
3278 // If we're optimizing for size, and there is a limit, bump the maximum number
3279 // of operations inserted down to 4. This is a wild guess that approximates
3280 // the size of a call to memcpy or memset (3 arguments + call).
3282 const Function *F = DAG.getMachineFunction().getFunction();
3283 if (F->hasFnAttr(Attribute::OptimizeForSize))
3287 unsigned NumMemOps = 0;
3289 unsigned VTSize = VT.getSizeInBits() / 8;
3290 while (VTSize > Size) {
3291 // For now, only use non-vector load / store's for the left-over pieces.
3292 if (VT.isVector() || VT.isFloatingPoint()) {
3294 while (!TLI.isTypeLegal(VT))
3295 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3296 VTSize = VT.getSizeInBits() / 8;
3298 // This can result in a type that is not legal on the target, e.g.
3299 // 1 or 2 bytes on PPC.
3300 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3305 if (++NumMemOps > Limit)
3307 MemOps.push_back(VT);
3314 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3315 SDValue Chain, SDValue Dst,
3316 SDValue Src, uint64_t Size,
3317 unsigned Align, bool isVol,
3319 MachinePointerInfo DstPtrInfo,
3320 MachinePointerInfo SrcPtrInfo) {
3321 // Turn a memcpy of undef to nop.
3322 if (Src.getOpcode() == ISD::UNDEF)
3325 // Expand memcpy to a series of load and store ops if the size operand falls
3326 // below a certain threshold.
3327 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3328 // rather than maybe a humongous number of loads and stores.
3329 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3330 std::vector<EVT> MemOps;
3331 bool DstAlignCanChange = false;
3332 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3333 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3334 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3335 DstAlignCanChange = true;
3336 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3337 if (Align > SrcAlign)
3340 bool CopyFromStr = isMemSrcFromString(Src, Str);
3341 bool isZeroStr = CopyFromStr && Str.empty();
3342 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3344 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3345 (DstAlignCanChange ? 0 : Align),
3346 (isZeroStr ? 0 : SrcAlign),
3347 true, CopyFromStr, DAG, TLI))
3350 if (DstAlignCanChange) {
3351 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3352 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3353 if (NewAlign > Align) {
3354 // Give the stack frame object a larger alignment if needed.
3355 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3356 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3361 SmallVector<SDValue, 8> OutChains;
3362 unsigned NumMemOps = MemOps.size();
3363 uint64_t SrcOff = 0, DstOff = 0;
3364 for (unsigned i = 0; i != NumMemOps; ++i) {
3366 unsigned VTSize = VT.getSizeInBits() / 8;
3367 SDValue Value, Store;
3370 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3371 // It's unlikely a store of a vector immediate can be done in a single
3372 // instruction. It would require a load from a constantpool first.
3373 // We only handle zero vectors here.
3374 // FIXME: Handle other cases where store of vector immediate is done in
3375 // a single instruction.
3376 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3377 Store = DAG.getStore(Chain, dl, Value,
3378 getMemBasePlusOffset(Dst, DstOff, DAG),
3379 DstPtrInfo.getWithOffset(DstOff), isVol,
3382 // The type might not be legal for the target. This should only happen
3383 // if the type is smaller than a legal type, as on PPC, so the right
3384 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3385 // to Load/Store if NVT==VT.
3386 // FIXME does the case above also need this?
3387 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3388 assert(NVT.bitsGE(VT));
3389 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3390 getMemBasePlusOffset(Src, SrcOff, DAG),
3391 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3392 MinAlign(SrcAlign, SrcOff));
3393 Store = DAG.getTruncStore(Chain, dl, Value,
3394 getMemBasePlusOffset(Dst, DstOff, DAG),
3395 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3398 OutChains.push_back(Store);
3403 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3404 &OutChains[0], OutChains.size());
3407 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3408 SDValue Chain, SDValue Dst,
3409 SDValue Src, uint64_t Size,
3410 unsigned Align, bool isVol,
3412 MachinePointerInfo DstPtrInfo,
3413 MachinePointerInfo SrcPtrInfo) {
3414 // Turn a memmove of undef to nop.
3415 if (Src.getOpcode() == ISD::UNDEF)
3418 // Expand memmove to a series of load and store ops if the size operand falls
3419 // below a certain threshold.
3420 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3421 std::vector<EVT> MemOps;
3422 bool DstAlignCanChange = false;
3423 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3424 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3425 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3426 DstAlignCanChange = true;
3427 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3428 if (Align > SrcAlign)
3430 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3432 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3433 (DstAlignCanChange ? 0 : Align),
3434 SrcAlign, true, false, DAG, TLI))
3437 if (DstAlignCanChange) {
3438 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3439 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3440 if (NewAlign > Align) {
3441 // Give the stack frame object a larger alignment if needed.
3442 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3443 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3448 uint64_t SrcOff = 0, DstOff = 0;
3449 SmallVector<SDValue, 8> LoadValues;
3450 SmallVector<SDValue, 8> LoadChains;
3451 SmallVector<SDValue, 8> OutChains;
3452 unsigned NumMemOps = MemOps.size();
3453 for (unsigned i = 0; i < NumMemOps; i++) {
3455 unsigned VTSize = VT.getSizeInBits() / 8;
3456 SDValue Value, Store;
3458 Value = DAG.getLoad(VT, dl, Chain,
3459 getMemBasePlusOffset(Src, SrcOff, DAG),
3460 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3462 LoadValues.push_back(Value);
3463 LoadChains.push_back(Value.getValue(1));
3466 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3467 &LoadChains[0], LoadChains.size());
3469 for (unsigned i = 0; i < NumMemOps; i++) {
3471 unsigned VTSize = VT.getSizeInBits() / 8;
3472 SDValue Value, Store;
3474 Store = DAG.getStore(Chain, dl, LoadValues[i],
3475 getMemBasePlusOffset(Dst, DstOff, DAG),
3476 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3477 OutChains.push_back(Store);
3481 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3482 &OutChains[0], OutChains.size());
3485 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3486 SDValue Chain, SDValue Dst,
3487 SDValue Src, uint64_t Size,
3488 unsigned Align, bool isVol,
3489 MachinePointerInfo DstPtrInfo) {
3490 // Turn a memset of undef to nop.
3491 if (Src.getOpcode() == ISD::UNDEF)
3494 // Expand memset to a series of load/store ops if the size operand
3495 // falls below a certain threshold.
3496 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3497 std::vector<EVT> MemOps;
3498 bool DstAlignCanChange = false;
3499 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3500 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3501 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3502 DstAlignCanChange = true;
3503 bool NonScalarIntSafe =
3504 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3505 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3506 Size, (DstAlignCanChange ? 0 : Align), 0,
3507 NonScalarIntSafe, false, DAG, TLI))
3510 if (DstAlignCanChange) {
3511 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3512 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3513 if (NewAlign > Align) {
3514 // Give the stack frame object a larger alignment if needed.
3515 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3516 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3521 SmallVector<SDValue, 8> OutChains;
3522 uint64_t DstOff = 0;
3523 unsigned NumMemOps = MemOps.size();
3524 for (unsigned i = 0; i < NumMemOps; i++) {
3526 unsigned VTSize = VT.getSizeInBits() / 8;
3527 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3528 SDValue Store = DAG.getStore(Chain, dl, Value,
3529 getMemBasePlusOffset(Dst, DstOff, DAG),
3530 DstPtrInfo.getWithOffset(DstOff),
3531 isVol, false, Align);
3532 OutChains.push_back(Store);
3536 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3537 &OutChains[0], OutChains.size());
3540 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3541 SDValue Src, SDValue Size,
3542 unsigned Align, bool isVol, bool AlwaysInline,
3543 MachinePointerInfo DstPtrInfo,
3544 MachinePointerInfo SrcPtrInfo) {
3546 // Check to see if we should lower the memcpy to loads and stores first.
3547 // For cases within the target-specified limits, this is the best choice.
3548 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3550 // Memcpy with size zero? Just return the original chain.
3551 if (ConstantSize->isNullValue())
3554 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3555 ConstantSize->getZExtValue(),Align,
3556 isVol, false, DstPtrInfo, SrcPtrInfo);
3557 if (Result.getNode())
3561 // Then check to see if we should lower the memcpy with target-specific
3562 // code. If the target chooses to do this, this is the next best.
3564 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3565 isVol, AlwaysInline,
3566 DstPtrInfo, SrcPtrInfo);
3567 if (Result.getNode())
3570 // If we really need inline code and the target declined to provide it,
3571 // use a (potentially long) sequence of loads and stores.
3573 assert(ConstantSize && "AlwaysInline requires a constant size!");
3574 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3575 ConstantSize->getZExtValue(), Align, isVol,
3576 true, DstPtrInfo, SrcPtrInfo);
3579 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3580 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3581 // respect volatile, so they may do things like read or write memory
3582 // beyond the given memory regions. But fixing this isn't easy, and most
3583 // people don't care.
3585 // Emit a library call.
3586 TargetLowering::ArgListTy Args;
3587 TargetLowering::ArgListEntry Entry;
3588 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3589 Entry.Node = Dst; Args.push_back(Entry);
3590 Entry.Node = Src; Args.push_back(Entry);
3591 Entry.Node = Size; Args.push_back(Entry);
3592 // FIXME: pass in DebugLoc
3593 std::pair<SDValue,SDValue> CallResult =
3594 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3595 false, false, false, false, 0,
3596 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3597 /*isReturnValueUsed=*/false,
3598 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3599 TLI.getPointerTy()),
3601 return CallResult.second;
3604 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3605 SDValue Src, SDValue Size,
3606 unsigned Align, bool isVol,
3607 MachinePointerInfo DstPtrInfo,
3608 MachinePointerInfo SrcPtrInfo) {
3610 // Check to see if we should lower the memmove to loads and stores first.
3611 // For cases within the target-specified limits, this is the best choice.
3612 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3614 // Memmove with size zero? Just return the original chain.
3615 if (ConstantSize->isNullValue())
3619 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3620 ConstantSize->getZExtValue(), Align, isVol,
3621 false, DstPtrInfo, SrcPtrInfo);
3622 if (Result.getNode())
3626 // Then check to see if we should lower the memmove with target-specific
3627 // code. If the target chooses to do this, this is the next best.
3629 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3630 DstPtrInfo, SrcPtrInfo);
3631 if (Result.getNode())
3634 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3635 // not be safe. See memcpy above for more details.
3637 // Emit a library call.
3638 TargetLowering::ArgListTy Args;
3639 TargetLowering::ArgListEntry Entry;
3640 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3641 Entry.Node = Dst; Args.push_back(Entry);
3642 Entry.Node = Src; Args.push_back(Entry);
3643 Entry.Node = Size; Args.push_back(Entry);
3644 // FIXME: pass in DebugLoc
3645 std::pair<SDValue,SDValue> CallResult =
3646 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3647 false, false, false, false, 0,
3648 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3649 /*isReturnValueUsed=*/false,
3650 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3651 TLI.getPointerTy()),
3653 return CallResult.second;
3656 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3657 SDValue Src, SDValue Size,
3658 unsigned Align, bool isVol,
3659 MachinePointerInfo DstPtrInfo) {
3661 // Check to see if we should lower the memset to stores first.
3662 // For cases within the target-specified limits, this is the best choice.
3663 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3665 // Memset with size zero? Just return the original chain.
3666 if (ConstantSize->isNullValue())
3670 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3671 Align, isVol, DstPtrInfo);
3673 if (Result.getNode())
3677 // Then check to see if we should lower the memset with target-specific
3678 // code. If the target chooses to do this, this is the next best.
3680 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3682 if (Result.getNode())
3685 // Emit a library call.
3686 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3687 TargetLowering::ArgListTy Args;
3688 TargetLowering::ArgListEntry Entry;
3689 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3690 Args.push_back(Entry);
3691 // Extend or truncate the argument to be an i32 value for the call.
3692 if (Src.getValueType().bitsGT(MVT::i32))
3693 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3695 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3697 Entry.Ty = Type::getInt32Ty(*getContext());
3698 Entry.isSExt = true;
3699 Args.push_back(Entry);
3701 Entry.Ty = IntPtrTy;
3702 Entry.isSExt = false;
3703 Args.push_back(Entry);
3704 // FIXME: pass in DebugLoc
3705 std::pair<SDValue,SDValue> CallResult =
3706 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3707 false, false, false, false, 0,
3708 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3709 /*isReturnValueUsed=*/false,
3710 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3711 TLI.getPointerTy()),
3713 return CallResult.second;
3716 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3717 SDValue Chain, SDValue Ptr, SDValue Cmp,
3718 SDValue Swp, MachinePointerInfo PtrInfo,
3719 unsigned Alignment) {
3720 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3721 Alignment = getEVTAlignment(MemVT);
3723 MachineFunction &MF = getMachineFunction();
3724 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3726 // For now, atomics are considered to be volatile always.
3727 Flags |= MachineMemOperand::MOVolatile;
3729 MachineMemOperand *MMO =
3730 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3732 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3735 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3737 SDValue Ptr, SDValue Cmp,
3738 SDValue Swp, MachineMemOperand *MMO) {
3739 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3740 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3742 EVT VT = Cmp.getValueType();
3744 SDVTList VTs = getVTList(VT, MVT::Other);
3745 FoldingSetNodeID ID;
3746 ID.AddInteger(MemVT.getRawBits());
3747 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3748 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3750 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3751 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3752 return SDValue(E, 0);
3754 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3755 Ptr, Cmp, Swp, MMO);
3756 CSEMap.InsertNode(N, IP);
3757 AllNodes.push_back(N);
3758 return SDValue(N, 0);
3761 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3763 SDValue Ptr, SDValue Val,
3764 const Value* PtrVal,
3765 unsigned Alignment) {
3766 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3767 Alignment = getEVTAlignment(MemVT);
3769 MachineFunction &MF = getMachineFunction();
3770 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3772 // For now, atomics are considered to be volatile always.
3773 Flags |= MachineMemOperand::MOVolatile;
3775 MachineMemOperand *MMO =
3776 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3777 MemVT.getStoreSize(), Alignment);
3779 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3782 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3784 SDValue Ptr, SDValue Val,
3785 MachineMemOperand *MMO) {
3786 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3787 Opcode == ISD::ATOMIC_LOAD_SUB ||
3788 Opcode == ISD::ATOMIC_LOAD_AND ||
3789 Opcode == ISD::ATOMIC_LOAD_OR ||
3790 Opcode == ISD::ATOMIC_LOAD_XOR ||
3791 Opcode == ISD::ATOMIC_LOAD_NAND ||
3792 Opcode == ISD::ATOMIC_LOAD_MIN ||
3793 Opcode == ISD::ATOMIC_LOAD_MAX ||
3794 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3795 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3796 Opcode == ISD::ATOMIC_SWAP) &&
3797 "Invalid Atomic Op");
3799 EVT VT = Val.getValueType();
3801 SDVTList VTs = getVTList(VT, MVT::Other);
3802 FoldingSetNodeID ID;
3803 ID.AddInteger(MemVT.getRawBits());
3804 SDValue Ops[] = {Chain, Ptr, Val};
3805 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3807 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3808 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3809 return SDValue(E, 0);
3811 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3813 CSEMap.InsertNode(N, IP);
3814 AllNodes.push_back(N);
3815 return SDValue(N, 0);
3818 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3819 /// Allowed to return something different (and simpler) if Simplify is true.
3820 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3825 SmallVector<EVT, 4> VTs;
3826 VTs.reserve(NumOps);
3827 for (unsigned i = 0; i < NumOps; ++i)
3828 VTs.push_back(Ops[i].getValueType());
3829 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3834 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3835 const EVT *VTs, unsigned NumVTs,
3836 const SDValue *Ops, unsigned NumOps,
3837 EVT MemVT, MachinePointerInfo PtrInfo,
3838 unsigned Align, bool Vol,
3839 bool ReadMem, bool WriteMem) {
3840 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3841 MemVT, PtrInfo, Align, Vol,
3846 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3847 const SDValue *Ops, unsigned NumOps,
3848 EVT MemVT, MachinePointerInfo PtrInfo,
3849 unsigned Align, bool Vol,
3850 bool ReadMem, bool WriteMem) {
3851 if (Align == 0) // Ensure that codegen never sees alignment 0
3852 Align = getEVTAlignment(MemVT);
3854 MachineFunction &MF = getMachineFunction();
3857 Flags |= MachineMemOperand::MOStore;
3859 Flags |= MachineMemOperand::MOLoad;
3861 Flags |= MachineMemOperand::MOVolatile;
3862 MachineMemOperand *MMO =
3863 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3865 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3869 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3870 const SDValue *Ops, unsigned NumOps,
3871 EVT MemVT, MachineMemOperand *MMO) {
3872 assert((Opcode == ISD::INTRINSIC_VOID ||
3873 Opcode == ISD::INTRINSIC_W_CHAIN ||
3874 Opcode == ISD::PREFETCH ||
3875 (Opcode <= INT_MAX &&
3876 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3877 "Opcode is not a memory-accessing opcode!");
3879 // Memoize the node unless it returns a flag.
3880 MemIntrinsicSDNode *N;
3881 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3882 FoldingSetNodeID ID;
3883 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3886 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3887 return SDValue(E, 0);
3890 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3892 CSEMap.InsertNode(N, IP);
3894 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3897 AllNodes.push_back(N);
3898 return SDValue(N, 0);
3901 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3902 /// MachinePointerInfo record from it. This is particularly useful because the
3903 /// code generator has many cases where it doesn't bother passing in a
3904 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3905 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3906 // If this is FI+Offset, we can model it.
3907 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3908 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3910 // If this is (FI+Offset1)+Offset2, we can model it.
3911 if (Ptr.getOpcode() != ISD::ADD ||
3912 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3913 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3914 return MachinePointerInfo();
3916 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3917 return MachinePointerInfo::getFixedStack(FI, Offset+
3918 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3921 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3922 /// MachinePointerInfo record from it. This is particularly useful because the
3923 /// code generator has many cases where it doesn't bother passing in a
3924 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3925 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3926 // If the 'Offset' value isn't a constant, we can't handle this.
3927 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3928 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3929 if (OffsetOp.getOpcode() == ISD::UNDEF)
3930 return InferPointerInfo(Ptr);
3931 return MachinePointerInfo();
3936 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3937 EVT VT, DebugLoc dl, SDValue Chain,
3938 SDValue Ptr, SDValue Offset,
3939 MachinePointerInfo PtrInfo, EVT MemVT,
3940 bool isVolatile, bool isNonTemporal,
3941 unsigned Alignment, const MDNode *TBAAInfo) {
3942 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3943 Alignment = getEVTAlignment(VT);
3945 unsigned Flags = MachineMemOperand::MOLoad;
3947 Flags |= MachineMemOperand::MOVolatile;
3949 Flags |= MachineMemOperand::MONonTemporal;
3951 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3954 PtrInfo = InferPointerInfo(Ptr, Offset);
3956 MachineFunction &MF = getMachineFunction();
3957 MachineMemOperand *MMO =
3958 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3960 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3964 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3965 EVT VT, DebugLoc dl, SDValue Chain,
3966 SDValue Ptr, SDValue Offset, EVT MemVT,
3967 MachineMemOperand *MMO) {
3969 ExtType = ISD::NON_EXTLOAD;
3970 } else if (ExtType == ISD::NON_EXTLOAD) {
3971 assert(VT == MemVT && "Non-extending load from different memory type!");
3974 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3975 "Should only be an extending load, not truncating!");
3976 assert(VT.isInteger() == MemVT.isInteger() &&
3977 "Cannot convert from FP to Int or Int -> FP!");
3978 assert(VT.isVector() == MemVT.isVector() &&
3979 "Cannot use trunc store to convert to or from a vector!");
3980 assert((!VT.isVector() ||
3981 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3982 "Cannot use trunc store to change the number of vector elements!");
3985 bool Indexed = AM != ISD::UNINDEXED;
3986 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3987 "Unindexed load with an offset!");
3989 SDVTList VTs = Indexed ?
3990 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3991 SDValue Ops[] = { Chain, Ptr, Offset };
3992 FoldingSetNodeID ID;
3993 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3994 ID.AddInteger(MemVT.getRawBits());
3995 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3996 MMO->isNonTemporal()));
3998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3999 cast<LoadSDNode>(E)->refineAlignment(MMO);
4000 return SDValue(E, 0);
4002 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4004 CSEMap.InsertNode(N, IP);
4005 AllNodes.push_back(N);
4006 return SDValue(N, 0);
4009 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4010 SDValue Chain, SDValue Ptr,
4011 MachinePointerInfo PtrInfo,
4012 bool isVolatile, bool isNonTemporal,
4013 unsigned Alignment, const MDNode *TBAAInfo) {
4014 SDValue Undef = getUNDEF(Ptr.getValueType());
4015 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4016 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4019 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
4020 SDValue Chain, SDValue Ptr,
4021 MachinePointerInfo PtrInfo, EVT MemVT,
4022 bool isVolatile, bool isNonTemporal,
4023 unsigned Alignment, const MDNode *TBAAInfo) {
4024 SDValue Undef = getUNDEF(Ptr.getValueType());
4025 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4026 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4032 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4033 SDValue Offset, ISD::MemIndexedMode AM) {
4034 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4035 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4036 "Load is already a indexed load!");
4037 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4038 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4040 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4043 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4044 SDValue Ptr, MachinePointerInfo PtrInfo,
4045 bool isVolatile, bool isNonTemporal,
4046 unsigned Alignment, const MDNode *TBAAInfo) {
4047 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4048 Alignment = getEVTAlignment(Val.getValueType());
4050 unsigned Flags = MachineMemOperand::MOStore;
4052 Flags |= MachineMemOperand::MOVolatile;
4054 Flags |= MachineMemOperand::MONonTemporal;
4057 PtrInfo = InferPointerInfo(Ptr);
4059 MachineFunction &MF = getMachineFunction();
4060 MachineMemOperand *MMO =
4061 MF.getMachineMemOperand(PtrInfo, Flags,
4062 Val.getValueType().getStoreSize(), Alignment,
4065 return getStore(Chain, dl, Val, Ptr, MMO);
4068 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4069 SDValue Ptr, MachineMemOperand *MMO) {
4070 EVT VT = Val.getValueType();
4071 SDVTList VTs = getVTList(MVT::Other);
4072 SDValue Undef = getUNDEF(Ptr.getValueType());
4073 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4074 FoldingSetNodeID ID;
4075 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4076 ID.AddInteger(VT.getRawBits());
4077 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4078 MMO->isNonTemporal()));
4080 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4081 cast<StoreSDNode>(E)->refineAlignment(MMO);
4082 return SDValue(E, 0);
4084 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4086 CSEMap.InsertNode(N, IP);
4087 AllNodes.push_back(N);
4088 return SDValue(N, 0);
4091 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4092 SDValue Ptr, MachinePointerInfo PtrInfo,
4093 EVT SVT,bool isVolatile, bool isNonTemporal,
4095 const MDNode *TBAAInfo) {
4096 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4097 Alignment = getEVTAlignment(SVT);
4099 unsigned Flags = MachineMemOperand::MOStore;
4101 Flags |= MachineMemOperand::MOVolatile;
4103 Flags |= MachineMemOperand::MONonTemporal;
4106 PtrInfo = InferPointerInfo(Ptr);
4108 MachineFunction &MF = getMachineFunction();
4109 MachineMemOperand *MMO =
4110 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4113 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4116 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4117 SDValue Ptr, EVT SVT,
4118 MachineMemOperand *MMO) {
4119 EVT VT = Val.getValueType();
4122 return getStore(Chain, dl, Val, Ptr, MMO);
4124 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4125 "Should only be a truncating store, not extending!");
4126 assert(VT.isInteger() == SVT.isInteger() &&
4127 "Can't do FP-INT conversion!");
4128 assert(VT.isVector() == SVT.isVector() &&
4129 "Cannot use trunc store to convert to or from a vector!");
4130 assert((!VT.isVector() ||
4131 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4132 "Cannot use trunc store to change the number of vector elements!");
4134 SDVTList VTs = getVTList(MVT::Other);
4135 SDValue Undef = getUNDEF(Ptr.getValueType());
4136 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4137 FoldingSetNodeID ID;
4138 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4139 ID.AddInteger(SVT.getRawBits());
4140 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4141 MMO->isNonTemporal()));
4143 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4144 cast<StoreSDNode>(E)->refineAlignment(MMO);
4145 return SDValue(E, 0);
4147 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4149 CSEMap.InsertNode(N, IP);
4150 AllNodes.push_back(N);
4151 return SDValue(N, 0);
4155 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4156 SDValue Offset, ISD::MemIndexedMode AM) {
4157 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4158 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4159 "Store is already a indexed store!");
4160 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4161 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4162 FoldingSetNodeID ID;
4163 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4164 ID.AddInteger(ST->getMemoryVT().getRawBits());
4165 ID.AddInteger(ST->getRawSubclassData());
4167 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4168 return SDValue(E, 0);
4170 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4171 ST->isTruncatingStore(),
4173 ST->getMemOperand());
4174 CSEMap.InsertNode(N, IP);
4175 AllNodes.push_back(N);
4176 return SDValue(N, 0);
4179 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4180 SDValue Chain, SDValue Ptr,
4183 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4184 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4187 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4188 const SDUse *Ops, unsigned NumOps) {
4190 case 0: return getNode(Opcode, DL, VT);
4191 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4192 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4193 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4197 // Copy from an SDUse array into an SDValue array for use with
4198 // the regular getNode logic.
4199 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4200 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4203 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4204 const SDValue *Ops, unsigned NumOps) {
4206 case 0: return getNode(Opcode, DL, VT);
4207 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4208 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4209 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4215 case ISD::SELECT_CC: {
4216 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4217 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4218 "LHS and RHS of condition must have same type!");
4219 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4220 "True and False arms of SelectCC must have same type!");
4221 assert(Ops[2].getValueType() == VT &&
4222 "select_cc node must be of same type as true and false value!");
4226 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4227 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4228 "LHS/RHS of comparison should match types!");
4235 SDVTList VTs = getVTList(VT);
4237 if (VT != MVT::Flag) {
4238 FoldingSetNodeID ID;
4239 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4242 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4243 return SDValue(E, 0);
4245 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4246 CSEMap.InsertNode(N, IP);
4248 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4251 AllNodes.push_back(N);
4255 return SDValue(N, 0);
4258 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4259 const std::vector<EVT> &ResultTys,
4260 const SDValue *Ops, unsigned NumOps) {
4261 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4265 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4266 const EVT *VTs, unsigned NumVTs,
4267 const SDValue *Ops, unsigned NumOps) {
4269 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4270 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4273 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4274 const SDValue *Ops, unsigned NumOps) {
4275 if (VTList.NumVTs == 1)
4276 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4280 // FIXME: figure out how to safely handle things like
4281 // int foo(int x) { return 1 << (x & 255); }
4282 // int bar() { return foo(256); }
4283 case ISD::SRA_PARTS:
4284 case ISD::SRL_PARTS:
4285 case ISD::SHL_PARTS:
4286 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4287 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4288 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4289 else if (N3.getOpcode() == ISD::AND)
4290 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4291 // If the and is only masking out bits that cannot effect the shift,
4292 // eliminate the and.
4293 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4294 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4295 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4301 // Memoize the node unless it returns a flag.
4303 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4304 FoldingSetNodeID ID;
4305 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4307 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4308 return SDValue(E, 0);
4311 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4312 } else if (NumOps == 2) {
4313 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4314 } else if (NumOps == 3) {
4315 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4318 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4320 CSEMap.InsertNode(N, IP);
4323 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4324 } else if (NumOps == 2) {
4325 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4326 } else if (NumOps == 3) {
4327 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4330 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4333 AllNodes.push_back(N);
4337 return SDValue(N, 0);
4340 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4341 return getNode(Opcode, DL, VTList, 0, 0);
4344 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4346 SDValue Ops[] = { N1 };
4347 return getNode(Opcode, DL, VTList, Ops, 1);
4350 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4351 SDValue N1, SDValue N2) {
4352 SDValue Ops[] = { N1, N2 };
4353 return getNode(Opcode, DL, VTList, Ops, 2);
4356 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4357 SDValue N1, SDValue N2, SDValue N3) {
4358 SDValue Ops[] = { N1, N2, N3 };
4359 return getNode(Opcode, DL, VTList, Ops, 3);
4362 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4363 SDValue N1, SDValue N2, SDValue N3,
4365 SDValue Ops[] = { N1, N2, N3, N4 };
4366 return getNode(Opcode, DL, VTList, Ops, 4);
4369 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4370 SDValue N1, SDValue N2, SDValue N3,
4371 SDValue N4, SDValue N5) {
4372 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4373 return getNode(Opcode, DL, VTList, Ops, 5);
4376 SDVTList SelectionDAG::getVTList(EVT VT) {
4377 return makeVTList(SDNode::getValueTypeList(VT), 1);
4380 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4381 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4382 E = VTList.rend(); I != E; ++I)
4383 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4386 EVT *Array = Allocator.Allocate<EVT>(2);
4389 SDVTList Result = makeVTList(Array, 2);
4390 VTList.push_back(Result);
4394 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4395 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4396 E = VTList.rend(); I != E; ++I)
4397 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4401 EVT *Array = Allocator.Allocate<EVT>(3);
4405 SDVTList Result = makeVTList(Array, 3);
4406 VTList.push_back(Result);
4410 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4411 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4412 E = VTList.rend(); I != E; ++I)
4413 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4414 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4417 EVT *Array = Allocator.Allocate<EVT>(4);
4422 SDVTList Result = makeVTList(Array, 4);
4423 VTList.push_back(Result);
4427 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4429 case 0: llvm_unreachable("Cannot have nodes without results!");
4430 case 1: return getVTList(VTs[0]);
4431 case 2: return getVTList(VTs[0], VTs[1]);
4432 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4433 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4437 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4438 E = VTList.rend(); I != E; ++I) {
4439 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4442 bool NoMatch = false;
4443 for (unsigned i = 2; i != NumVTs; ++i)
4444 if (VTs[i] != I->VTs[i]) {
4452 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4453 std::copy(VTs, VTs+NumVTs, Array);
4454 SDVTList Result = makeVTList(Array, NumVTs);
4455 VTList.push_back(Result);
4460 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4461 /// specified operands. If the resultant node already exists in the DAG,
4462 /// this does not modify the specified node, instead it returns the node that
4463 /// already exists. If the resultant node does not exist in the DAG, the
4464 /// input node is returned. As a degenerate case, if you specify the same
4465 /// input operands as the node already has, the input node is returned.
4466 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4467 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4469 // Check to see if there is no change.
4470 if (Op == N->getOperand(0)) return N;
4472 // See if the modified node already exists.
4473 void *InsertPos = 0;
4474 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4477 // Nope it doesn't. Remove the node from its current place in the maps.
4479 if (!RemoveNodeFromCSEMaps(N))
4482 // Now we update the operands.
4483 N->OperandList[0].set(Op);
4485 // If this gets put into a CSE map, add it.
4486 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4490 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4491 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4493 // Check to see if there is no change.
4494 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4495 return N; // No operands changed, just return the input node.
4497 // See if the modified node already exists.
4498 void *InsertPos = 0;
4499 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4502 // Nope it doesn't. Remove the node from its current place in the maps.
4504 if (!RemoveNodeFromCSEMaps(N))
4507 // Now we update the operands.
4508 if (N->OperandList[0] != Op1)
4509 N->OperandList[0].set(Op1);
4510 if (N->OperandList[1] != Op2)
4511 N->OperandList[1].set(Op2);
4513 // If this gets put into a CSE map, add it.
4514 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4518 SDNode *SelectionDAG::
4519 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4520 SDValue Ops[] = { Op1, Op2, Op3 };
4521 return UpdateNodeOperands(N, Ops, 3);
4524 SDNode *SelectionDAG::
4525 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4526 SDValue Op3, SDValue Op4) {
4527 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4528 return UpdateNodeOperands(N, Ops, 4);
4531 SDNode *SelectionDAG::
4532 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4533 SDValue Op3, SDValue Op4, SDValue Op5) {
4534 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4535 return UpdateNodeOperands(N, Ops, 5);
4538 SDNode *SelectionDAG::
4539 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4540 assert(N->getNumOperands() == NumOps &&
4541 "Update with wrong number of operands");
4543 // Check to see if there is no change.
4544 bool AnyChange = false;
4545 for (unsigned i = 0; i != NumOps; ++i) {
4546 if (Ops[i] != N->getOperand(i)) {
4552 // No operands changed, just return the input node.
4553 if (!AnyChange) return N;
4555 // See if the modified node already exists.
4556 void *InsertPos = 0;
4557 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4560 // Nope it doesn't. Remove the node from its current place in the maps.
4562 if (!RemoveNodeFromCSEMaps(N))
4565 // Now we update the operands.
4566 for (unsigned i = 0; i != NumOps; ++i)
4567 if (N->OperandList[i] != Ops[i])
4568 N->OperandList[i].set(Ops[i]);
4570 // If this gets put into a CSE map, add it.
4571 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4575 /// DropOperands - Release the operands and set this node to have
4577 void SDNode::DropOperands() {
4578 // Unlike the code in MorphNodeTo that does this, we don't need to
4579 // watch for dead nodes here.
4580 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4586 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4589 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4591 SDVTList VTs = getVTList(VT);
4592 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4595 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4596 EVT VT, SDValue Op1) {
4597 SDVTList VTs = getVTList(VT);
4598 SDValue Ops[] = { Op1 };
4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4602 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4603 EVT VT, SDValue Op1,
4605 SDVTList VTs = getVTList(VT);
4606 SDValue Ops[] = { Op1, Op2 };
4607 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4610 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4611 EVT VT, SDValue Op1,
4612 SDValue Op2, SDValue Op3) {
4613 SDVTList VTs = getVTList(VT);
4614 SDValue Ops[] = { Op1, Op2, Op3 };
4615 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4618 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4619 EVT VT, const SDValue *Ops,
4621 SDVTList VTs = getVTList(VT);
4622 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4625 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4626 EVT VT1, EVT VT2, const SDValue *Ops,
4628 SDVTList VTs = getVTList(VT1, VT2);
4629 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4632 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4634 SDVTList VTs = getVTList(VT1, VT2);
4635 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4638 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4639 EVT VT1, EVT VT2, EVT VT3,
4640 const SDValue *Ops, unsigned NumOps) {
4641 SDVTList VTs = getVTList(VT1, VT2, VT3);
4642 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4645 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4646 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4647 const SDValue *Ops, unsigned NumOps) {
4648 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4649 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4652 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4655 SDVTList VTs = getVTList(VT1, VT2);
4656 SDValue Ops[] = { Op1 };
4657 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4660 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4662 SDValue Op1, SDValue Op2) {
4663 SDVTList VTs = getVTList(VT1, VT2);
4664 SDValue Ops[] = { Op1, Op2 };
4665 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4668 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4670 SDValue Op1, SDValue Op2,
4672 SDVTList VTs = getVTList(VT1, VT2);
4673 SDValue Ops[] = { Op1, Op2, Op3 };
4674 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4677 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4678 EVT VT1, EVT VT2, EVT VT3,
4679 SDValue Op1, SDValue Op2,
4681 SDVTList VTs = getVTList(VT1, VT2, VT3);
4682 SDValue Ops[] = { Op1, Op2, Op3 };
4683 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4686 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4687 SDVTList VTs, const SDValue *Ops,
4689 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4690 // Reset the NodeID to -1.
4695 /// MorphNodeTo - This *mutates* the specified node to have the specified
4696 /// return type, opcode, and operands.
4698 /// Note that MorphNodeTo returns the resultant node. If there is already a
4699 /// node of the specified opcode and operands, it returns that node instead of
4700 /// the current one. Note that the DebugLoc need not be the same.
4702 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4703 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4704 /// node, and because it doesn't require CSE recalculation for any of
4705 /// the node's users.
4707 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4708 SDVTList VTs, const SDValue *Ops,
4710 // If an identical node already exists, use it.
4712 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4713 FoldingSetNodeID ID;
4714 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4715 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4719 if (!RemoveNodeFromCSEMaps(N))
4722 // Start the morphing.
4724 N->ValueList = VTs.VTs;
4725 N->NumValues = VTs.NumVTs;
4727 // Clear the operands list, updating used nodes to remove this from their
4728 // use list. Keep track of any operands that become dead as a result.
4729 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4730 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4732 SDNode *Used = Use.getNode();
4734 if (Used->use_empty())
4735 DeadNodeSet.insert(Used);
4738 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4739 // Initialize the memory references information.
4740 MN->setMemRefs(0, 0);
4741 // If NumOps is larger than the # of operands we can have in a
4742 // MachineSDNode, reallocate the operand list.
4743 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4744 if (MN->OperandsNeedDelete)
4745 delete[] MN->OperandList;
4746 if (NumOps > array_lengthof(MN->LocalOperands))
4747 // We're creating a final node that will live unmorphed for the
4748 // remainder of the current SelectionDAG iteration, so we can allocate
4749 // the operands directly out of a pool with no recycling metadata.
4750 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4753 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4754 MN->OperandsNeedDelete = false;
4756 MN->InitOperands(MN->OperandList, Ops, NumOps);
4758 // If NumOps is larger than the # of operands we currently have, reallocate
4759 // the operand list.
4760 if (NumOps > N->NumOperands) {
4761 if (N->OperandsNeedDelete)
4762 delete[] N->OperandList;
4763 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4764 N->OperandsNeedDelete = true;
4766 N->InitOperands(N->OperandList, Ops, NumOps);
4769 // Delete any nodes that are still dead after adding the uses for the
4771 if (!DeadNodeSet.empty()) {
4772 SmallVector<SDNode *, 16> DeadNodes;
4773 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4774 E = DeadNodeSet.end(); I != E; ++I)
4775 if ((*I)->use_empty())
4776 DeadNodes.push_back(*I);
4777 RemoveDeadNodes(DeadNodes);
4781 CSEMap.InsertNode(N, IP); // Memoize the new node.
4786 /// getMachineNode - These are used for target selectors to create a new node
4787 /// with specified return type(s), MachineInstr opcode, and operands.
4789 /// Note that getMachineNode returns the resultant node. If there is already a
4790 /// node of the specified opcode and operands, it returns that node instead of
4791 /// the current one.
4793 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4794 SDVTList VTs = getVTList(VT);
4795 return getMachineNode(Opcode, dl, VTs, 0, 0);
4799 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4800 SDVTList VTs = getVTList(VT);
4801 SDValue Ops[] = { Op1 };
4802 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4806 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4807 SDValue Op1, SDValue Op2) {
4808 SDVTList VTs = getVTList(VT);
4809 SDValue Ops[] = { Op1, Op2 };
4810 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4814 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4815 SDValue Op1, SDValue Op2, SDValue Op3) {
4816 SDVTList VTs = getVTList(VT);
4817 SDValue Ops[] = { Op1, Op2, Op3 };
4818 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4822 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4823 const SDValue *Ops, unsigned NumOps) {
4824 SDVTList VTs = getVTList(VT);
4825 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4830 SDVTList VTs = getVTList(VT1, VT2);
4831 return getMachineNode(Opcode, dl, VTs, 0, 0);
4835 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4836 EVT VT1, EVT VT2, SDValue Op1) {
4837 SDVTList VTs = getVTList(VT1, VT2);
4838 SDValue Ops[] = { Op1 };
4839 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4843 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4844 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4845 SDVTList VTs = getVTList(VT1, VT2);
4846 SDValue Ops[] = { Op1, Op2 };
4847 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4851 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4852 EVT VT1, EVT VT2, SDValue Op1,
4853 SDValue Op2, SDValue Op3) {
4854 SDVTList VTs = getVTList(VT1, VT2);
4855 SDValue Ops[] = { Op1, Op2, Op3 };
4856 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4860 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4862 const SDValue *Ops, unsigned NumOps) {
4863 SDVTList VTs = getVTList(VT1, VT2);
4864 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4868 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4869 EVT VT1, EVT VT2, EVT VT3,
4870 SDValue Op1, SDValue Op2) {
4871 SDVTList VTs = getVTList(VT1, VT2, VT3);
4872 SDValue Ops[] = { Op1, Op2 };
4873 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4877 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4878 EVT VT1, EVT VT2, EVT VT3,
4879 SDValue Op1, SDValue Op2, SDValue Op3) {
4880 SDVTList VTs = getVTList(VT1, VT2, VT3);
4881 SDValue Ops[] = { Op1, Op2, Op3 };
4882 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4886 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4887 EVT VT1, EVT VT2, EVT VT3,
4888 const SDValue *Ops, unsigned NumOps) {
4889 SDVTList VTs = getVTList(VT1, VT2, VT3);
4890 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4894 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4895 EVT VT2, EVT VT3, EVT VT4,
4896 const SDValue *Ops, unsigned NumOps) {
4897 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4898 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4902 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4903 const std::vector<EVT> &ResultTys,
4904 const SDValue *Ops, unsigned NumOps) {
4905 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4906 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4910 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4911 const SDValue *Ops, unsigned NumOps) {
4912 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4917 FoldingSetNodeID ID;
4918 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4920 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4921 return cast<MachineSDNode>(E);
4924 // Allocate a new MachineSDNode.
4925 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4927 // Initialize the operands list.
4928 if (NumOps > array_lengthof(N->LocalOperands))
4929 // We're creating a final node that will live unmorphed for the
4930 // remainder of the current SelectionDAG iteration, so we can allocate
4931 // the operands directly out of a pool with no recycling metadata.
4932 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4935 N->InitOperands(N->LocalOperands, Ops, NumOps);
4936 N->OperandsNeedDelete = false;
4939 CSEMap.InsertNode(N, IP);
4941 AllNodes.push_back(N);
4943 VerifyMachineNode(N);
4948 /// getTargetExtractSubreg - A convenience function for creating
4949 /// TargetOpcode::EXTRACT_SUBREG nodes.
4951 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4953 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4954 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4955 VT, Operand, SRIdxVal);
4956 return SDValue(Subreg, 0);
4959 /// getTargetInsertSubreg - A convenience function for creating
4960 /// TargetOpcode::INSERT_SUBREG nodes.
4962 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4963 SDValue Operand, SDValue Subreg) {
4964 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4965 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4966 VT, Operand, Subreg, SRIdxVal);
4967 return SDValue(Result, 0);
4970 /// getNodeIfExists - Get the specified node if it's already available, or
4971 /// else return NULL.
4972 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4973 const SDValue *Ops, unsigned NumOps) {
4974 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4975 FoldingSetNodeID ID;
4976 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4978 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4984 /// getDbgValue - Creates a SDDbgValue node.
4987 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4988 DebugLoc DL, unsigned O) {
4989 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4993 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4994 DebugLoc DL, unsigned O) {
4995 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4999 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5000 DebugLoc DL, unsigned O) {
5001 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5006 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5007 /// pointed to by a use iterator is deleted, increment the use iterator
5008 /// so that it doesn't dangle.
5010 /// This class also manages a "downlink" DAGUpdateListener, to forward
5011 /// messages to ReplaceAllUsesWith's callers.
5013 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5014 SelectionDAG::DAGUpdateListener *DownLink;
5015 SDNode::use_iterator &UI;
5016 SDNode::use_iterator &UE;
5018 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5019 // Increment the iterator as needed.
5020 while (UI != UE && N == *UI)
5023 // Then forward the message.
5024 if (DownLink) DownLink->NodeDeleted(N, E);
5027 virtual void NodeUpdated(SDNode *N) {
5028 // Just forward the message.
5029 if (DownLink) DownLink->NodeUpdated(N);
5033 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5034 SDNode::use_iterator &ui,
5035 SDNode::use_iterator &ue)
5036 : DownLink(dl), UI(ui), UE(ue) {}
5041 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5042 /// This can cause recursive merging of nodes in the DAG.
5044 /// This version assumes From has a single result value.
5046 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5047 DAGUpdateListener *UpdateListener) {
5048 SDNode *From = FromN.getNode();
5049 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5050 "Cannot replace with this method!");
5051 assert(From != To.getNode() && "Cannot replace uses of with self");
5053 // Iterate over all the existing uses of From. New uses will be added
5054 // to the beginning of the use list, which we avoid visiting.
5055 // This specifically avoids visiting uses of From that arise while the
5056 // replacement is happening, because any such uses would be the result
5057 // of CSE: If an existing node looks like From after one of its operands
5058 // is replaced by To, we don't want to replace of all its users with To
5059 // too. See PR3018 for more info.
5060 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5061 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5065 // This node is about to morph, remove its old self from the CSE maps.
5066 RemoveNodeFromCSEMaps(User);
5068 // A user can appear in a use list multiple times, and when this
5069 // happens the uses are usually next to each other in the list.
5070 // To help reduce the number of CSE recomputations, process all
5071 // the uses of this user that we can find this way.
5073 SDUse &Use = UI.getUse();
5076 } while (UI != UE && *UI == User);
5078 // Now that we have modified User, add it back to the CSE maps. If it
5079 // already exists there, recursively merge the results together.
5080 AddModifiedNodeToCSEMaps(User, &Listener);
5084 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5085 /// This can cause recursive merging of nodes in the DAG.
5087 /// This version assumes that for each value of From, there is a
5088 /// corresponding value in To in the same position with the same type.
5090 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5091 DAGUpdateListener *UpdateListener) {
5093 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5094 assert((!From->hasAnyUseOfValue(i) ||
5095 From->getValueType(i) == To->getValueType(i)) &&
5096 "Cannot use this version of ReplaceAllUsesWith!");
5099 // Handle the trivial case.
5103 // Iterate over just the existing users of From. See the comments in
5104 // the ReplaceAllUsesWith above.
5105 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5106 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5110 // This node is about to morph, remove its old self from the CSE maps.
5111 RemoveNodeFromCSEMaps(User);
5113 // A user can appear in a use list multiple times, and when this
5114 // happens the uses are usually next to each other in the list.
5115 // To help reduce the number of CSE recomputations, process all
5116 // the uses of this user that we can find this way.
5118 SDUse &Use = UI.getUse();
5121 } while (UI != UE && *UI == User);
5123 // Now that we have modified User, add it back to the CSE maps. If it
5124 // already exists there, recursively merge the results together.
5125 AddModifiedNodeToCSEMaps(User, &Listener);
5129 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5130 /// This can cause recursive merging of nodes in the DAG.
5132 /// This version can replace From with any result values. To must match the
5133 /// number and types of values returned by From.
5134 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5136 DAGUpdateListener *UpdateListener) {
5137 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5138 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5140 // Iterate over just the existing users of From. See the comments in
5141 // the ReplaceAllUsesWith above.
5142 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5143 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5147 // This node is about to morph, remove its old self from the CSE maps.
5148 RemoveNodeFromCSEMaps(User);
5150 // A user can appear in a use list multiple times, and when this
5151 // happens the uses are usually next to each other in the list.
5152 // To help reduce the number of CSE recomputations, process all
5153 // the uses of this user that we can find this way.
5155 SDUse &Use = UI.getUse();
5156 const SDValue &ToOp = To[Use.getResNo()];
5159 } while (UI != UE && *UI == User);
5161 // Now that we have modified User, add it back to the CSE maps. If it
5162 // already exists there, recursively merge the results together.
5163 AddModifiedNodeToCSEMaps(User, &Listener);
5167 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5168 /// uses of other values produced by From.getNode() alone. The Deleted
5169 /// vector is handled the same way as for ReplaceAllUsesWith.
5170 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5171 DAGUpdateListener *UpdateListener){
5172 // Handle the really simple, really trivial case efficiently.
5173 if (From == To) return;
5175 // Handle the simple, trivial, case efficiently.
5176 if (From.getNode()->getNumValues() == 1) {
5177 ReplaceAllUsesWith(From, To, UpdateListener);
5181 // Iterate over just the existing users of From. See the comments in
5182 // the ReplaceAllUsesWith above.
5183 SDNode::use_iterator UI = From.getNode()->use_begin(),
5184 UE = From.getNode()->use_end();
5185 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5188 bool UserRemovedFromCSEMaps = false;
5190 // A user can appear in a use list multiple times, and when this
5191 // happens the uses are usually next to each other in the list.
5192 // To help reduce the number of CSE recomputations, process all
5193 // the uses of this user that we can find this way.
5195 SDUse &Use = UI.getUse();
5197 // Skip uses of different values from the same node.
5198 if (Use.getResNo() != From.getResNo()) {
5203 // If this node hasn't been modified yet, it's still in the CSE maps,
5204 // so remove its old self from the CSE maps.
5205 if (!UserRemovedFromCSEMaps) {
5206 RemoveNodeFromCSEMaps(User);
5207 UserRemovedFromCSEMaps = true;
5212 } while (UI != UE && *UI == User);
5214 // We are iterating over all uses of the From node, so if a use
5215 // doesn't use the specific value, no changes are made.
5216 if (!UserRemovedFromCSEMaps)
5219 // Now that we have modified User, add it back to the CSE maps. If it
5220 // already exists there, recursively merge the results together.
5221 AddModifiedNodeToCSEMaps(User, &Listener);
5226 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5227 /// to record information about a use.
5234 /// operator< - Sort Memos by User.
5235 bool operator<(const UseMemo &L, const UseMemo &R) {
5236 return (intptr_t)L.User < (intptr_t)R.User;
5240 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5241 /// uses of other values produced by From.getNode() alone. The same value
5242 /// may appear in both the From and To list. The Deleted vector is
5243 /// handled the same way as for ReplaceAllUsesWith.
5244 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5247 DAGUpdateListener *UpdateListener){
5248 // Handle the simple, trivial case efficiently.
5250 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5252 // Read up all the uses and make records of them. This helps
5253 // processing new uses that are introduced during the
5254 // replacement process.
5255 SmallVector<UseMemo, 4> Uses;
5256 for (unsigned i = 0; i != Num; ++i) {
5257 unsigned FromResNo = From[i].getResNo();
5258 SDNode *FromNode = From[i].getNode();
5259 for (SDNode::use_iterator UI = FromNode->use_begin(),
5260 E = FromNode->use_end(); UI != E; ++UI) {
5261 SDUse &Use = UI.getUse();
5262 if (Use.getResNo() == FromResNo) {
5263 UseMemo Memo = { *UI, i, &Use };
5264 Uses.push_back(Memo);
5269 // Sort the uses, so that all the uses from a given User are together.
5270 std::sort(Uses.begin(), Uses.end());
5272 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5273 UseIndex != UseIndexEnd; ) {
5274 // We know that this user uses some value of From. If it is the right
5275 // value, update it.
5276 SDNode *User = Uses[UseIndex].User;
5278 // This node is about to morph, remove its old self from the CSE maps.
5279 RemoveNodeFromCSEMaps(User);
5281 // The Uses array is sorted, so all the uses for a given User
5282 // are next to each other in the list.
5283 // To help reduce the number of CSE recomputations, process all
5284 // the uses of this user that we can find this way.
5286 unsigned i = Uses[UseIndex].Index;
5287 SDUse &Use = *Uses[UseIndex].Use;
5291 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5293 // Now that we have modified User, add it back to the CSE maps. If it
5294 // already exists there, recursively merge the results together.
5295 AddModifiedNodeToCSEMaps(User, UpdateListener);
5299 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5300 /// based on their topological order. It returns the maximum id and a vector
5301 /// of the SDNodes* in assigned order by reference.
5302 unsigned SelectionDAG::AssignTopologicalOrder() {
5304 unsigned DAGSize = 0;
5306 // SortedPos tracks the progress of the algorithm. Nodes before it are
5307 // sorted, nodes after it are unsorted. When the algorithm completes
5308 // it is at the end of the list.
5309 allnodes_iterator SortedPos = allnodes_begin();
5311 // Visit all the nodes. Move nodes with no operands to the front of
5312 // the list immediately. Annotate nodes that do have operands with their
5313 // operand count. Before we do this, the Node Id fields of the nodes
5314 // may contain arbitrary values. After, the Node Id fields for nodes
5315 // before SortedPos will contain the topological sort index, and the
5316 // Node Id fields for nodes At SortedPos and after will contain the
5317 // count of outstanding operands.
5318 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5321 unsigned Degree = N->getNumOperands();
5323 // A node with no uses, add it to the result array immediately.
5324 N->setNodeId(DAGSize++);
5325 allnodes_iterator Q = N;
5327 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5328 assert(SortedPos != AllNodes.end() && "Overran node list");
5331 // Temporarily use the Node Id as scratch space for the degree count.
5332 N->setNodeId(Degree);
5336 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5337 // such that by the time the end is reached all nodes will be sorted.
5338 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5341 // N is in sorted position, so all its uses have one less operand
5342 // that needs to be sorted.
5343 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5346 unsigned Degree = P->getNodeId();
5347 assert(Degree != 0 && "Invalid node degree");
5350 // All of P's operands are sorted, so P may sorted now.
5351 P->setNodeId(DAGSize++);
5353 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5354 assert(SortedPos != AllNodes.end() && "Overran node list");
5357 // Update P's outstanding operand count.
5358 P->setNodeId(Degree);
5361 if (I == SortedPos) {
5364 dbgs() << "Overran sorted position:\n";
5367 llvm_unreachable(0);
5371 assert(SortedPos == AllNodes.end() &&
5372 "Topological sort incomplete!");
5373 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5374 "First node in topological sort is not the entry token!");
5375 assert(AllNodes.front().getNodeId() == 0 &&
5376 "First node in topological sort has non-zero id!");
5377 assert(AllNodes.front().getNumOperands() == 0 &&
5378 "First node in topological sort has operands!");
5379 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5380 "Last node in topologic sort has unexpected id!");
5381 assert(AllNodes.back().use_empty() &&
5382 "Last node in topologic sort has users!");
5383 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5387 /// AssignOrdering - Assign an order to the SDNode.
5388 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5389 assert(SD && "Trying to assign an order to a null node!");
5390 Ordering->add(SD, Order);
5393 /// GetOrdering - Get the order for the SDNode.
5394 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5395 assert(SD && "Trying to get the order of a null node!");
5396 return Ordering->getOrder(SD);
5399 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5400 /// value is produced by SD.
5401 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5402 DbgInfo->add(DB, SD, isParameter);
5404 SD->setHasDebugValue(true);
5407 //===----------------------------------------------------------------------===//
5409 //===----------------------------------------------------------------------===//
5411 HandleSDNode::~HandleSDNode() {
5415 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5416 const GlobalValue *GA,
5417 EVT VT, int64_t o, unsigned char TF)
5418 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5422 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5423 MachineMemOperand *mmo)
5424 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5425 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5426 MMO->isNonTemporal());
5427 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5428 assert(isNonTemporal() == MMO->isNonTemporal() &&
5429 "Non-temporal encoding error!");
5430 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5433 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5434 const SDValue *Ops, unsigned NumOps, EVT memvt,
5435 MachineMemOperand *mmo)
5436 : SDNode(Opc, dl, VTs, Ops, NumOps),
5437 MemoryVT(memvt), MMO(mmo) {
5438 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5439 MMO->isNonTemporal());
5440 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5441 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5444 /// Profile - Gather unique data for the node.
5446 void SDNode::Profile(FoldingSetNodeID &ID) const {
5447 AddNodeIDNode(ID, this);
5452 std::vector<EVT> VTs;
5455 VTs.reserve(MVT::LAST_VALUETYPE);
5456 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5457 VTs.push_back(MVT((MVT::SimpleValueType)i));
5462 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5463 static ManagedStatic<EVTArray> SimpleVTArray;
5464 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5466 /// getValueTypeList - Return a pointer to the specified value type.
5468 const EVT *SDNode::getValueTypeList(EVT VT) {
5469 if (VT.isExtended()) {
5470 sys::SmartScopedLock<true> Lock(*VTMutex);
5471 return &(*EVTs->insert(VT).first);
5473 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5474 "Value type out of range!");
5475 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5479 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5480 /// indicated value. This method ignores uses of other values defined by this
5482 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5483 assert(Value < getNumValues() && "Bad value!");
5485 // TODO: Only iterate over uses of a given value of the node
5486 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5487 if (UI.getUse().getResNo() == Value) {
5494 // Found exactly the right number of uses?
5499 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5500 /// value. This method ignores uses of other values defined by this operation.
5501 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5502 assert(Value < getNumValues() && "Bad value!");
5504 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5505 if (UI.getUse().getResNo() == Value)
5512 /// isOnlyUserOf - Return true if this node is the only use of N.
5514 bool SDNode::isOnlyUserOf(SDNode *N) const {
5516 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5527 /// isOperand - Return true if this node is an operand of N.
5529 bool SDValue::isOperandOf(SDNode *N) const {
5530 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5531 if (*this == N->getOperand(i))
5536 bool SDNode::isOperandOf(SDNode *N) const {
5537 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5538 if (this == N->OperandList[i].getNode())
5543 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5544 /// be a chain) reaches the specified operand without crossing any
5545 /// side-effecting instructions on any chain path. In practice, this looks
5546 /// through token factors and non-volatile loads. In order to remain efficient,
5547 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5548 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5549 unsigned Depth) const {
5550 if (*this == Dest) return true;
5552 // Don't search too deeply, we just want to be able to see through
5553 // TokenFactor's etc.
5554 if (Depth == 0) return false;
5556 // If this is a token factor, all inputs to the TF happen in parallel. If any
5557 // of the operands of the TF does not reach dest, then we cannot do the xform.
5558 if (getOpcode() == ISD::TokenFactor) {
5559 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5560 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5565 // Loads don't have side effects, look through them.
5566 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5567 if (!Ld->isVolatile())
5568 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5573 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5574 /// is either an operand of N or it can be reached by traversing up the operands.
5575 /// NOTE: this is an expensive method. Use it carefully.
5576 bool SDNode::isPredecessorOf(SDNode *N) const {
5577 SmallPtrSet<SDNode *, 32> Visited;
5578 SmallVector<SDNode *, 16> Worklist;
5579 Worklist.push_back(N);
5582 N = Worklist.pop_back_val();
5583 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5584 SDNode *Op = N->getOperand(i).getNode();
5587 if (Visited.insert(Op))
5588 Worklist.push_back(Op);
5590 } while (!Worklist.empty());
5595 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5596 assert(Num < NumOperands && "Invalid child # of SDNode!");
5597 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5600 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5601 switch (getOpcode()) {
5603 if (getOpcode() < ISD::BUILTIN_OP_END)
5604 return "<<Unknown DAG Node>>";
5605 if (isMachineOpcode()) {
5607 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5608 if (getMachineOpcode() < TII->getNumOpcodes())
5609 return TII->get(getMachineOpcode()).getName();
5610 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5613 const TargetLowering &TLI = G->getTargetLoweringInfo();
5614 const char *Name = TLI.getTargetNodeName(getOpcode());
5615 if (Name) return Name;
5616 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5618 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5621 case ISD::DELETED_NODE:
5622 return "<<Deleted Node!>>";
5624 case ISD::PREFETCH: return "Prefetch";
5625 case ISD::MEMBARRIER: return "MemBarrier";
5626 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5627 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5628 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5629 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5630 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5631 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5632 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5633 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5634 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5635 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5636 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5637 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5638 case ISD::PCMARKER: return "PCMarker";
5639 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5640 case ISD::SRCVALUE: return "SrcValue";
5641 case ISD::MDNODE_SDNODE: return "MDNode";
5642 case ISD::EntryToken: return "EntryToken";
5643 case ISD::TokenFactor: return "TokenFactor";
5644 case ISD::AssertSext: return "AssertSext";
5645 case ISD::AssertZext: return "AssertZext";
5647 case ISD::BasicBlock: return "BasicBlock";
5648 case ISD::VALUETYPE: return "ValueType";
5649 case ISD::Register: return "Register";
5651 case ISD::Constant: return "Constant";
5652 case ISD::ConstantFP: return "ConstantFP";
5653 case ISD::GlobalAddress: return "GlobalAddress";
5654 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5655 case ISD::FrameIndex: return "FrameIndex";
5656 case ISD::JumpTable: return "JumpTable";
5657 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5658 case ISD::RETURNADDR: return "RETURNADDR";
5659 case ISD::FRAMEADDR: return "FRAMEADDR";
5660 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5661 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5662 case ISD::LSDAADDR: return "LSDAADDR";
5663 case ISD::EHSELECTION: return "EHSELECTION";
5664 case ISD::EH_RETURN: return "EH_RETURN";
5665 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5666 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5667 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5668 case ISD::ConstantPool: return "ConstantPool";
5669 case ISD::ExternalSymbol: return "ExternalSymbol";
5670 case ISD::BlockAddress: return "BlockAddress";
5671 case ISD::INTRINSIC_WO_CHAIN:
5672 case ISD::INTRINSIC_VOID:
5673 case ISD::INTRINSIC_W_CHAIN: {
5674 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5675 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5676 if (IID < Intrinsic::num_intrinsics)
5677 return Intrinsic::getName((Intrinsic::ID)IID);
5678 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5679 return TII->getName(IID);
5680 llvm_unreachable("Invalid intrinsic ID");
5683 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5684 case ISD::TargetConstant: return "TargetConstant";
5685 case ISD::TargetConstantFP:return "TargetConstantFP";
5686 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5687 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5688 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5689 case ISD::TargetJumpTable: return "TargetJumpTable";
5690 case ISD::TargetConstantPool: return "TargetConstantPool";
5691 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5692 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5694 case ISD::CopyToReg: return "CopyToReg";
5695 case ISD::CopyFromReg: return "CopyFromReg";
5696 case ISD::UNDEF: return "undef";
5697 case ISD::MERGE_VALUES: return "merge_values";
5698 case ISD::INLINEASM: return "inlineasm";
5699 case ISD::EH_LABEL: return "eh_label";
5700 case ISD::HANDLENODE: return "handlenode";
5703 case ISD::FABS: return "fabs";
5704 case ISD::FNEG: return "fneg";
5705 case ISD::FSQRT: return "fsqrt";
5706 case ISD::FSIN: return "fsin";
5707 case ISD::FCOS: return "fcos";
5708 case ISD::FTRUNC: return "ftrunc";
5709 case ISD::FFLOOR: return "ffloor";
5710 case ISD::FCEIL: return "fceil";
5711 case ISD::FRINT: return "frint";
5712 case ISD::FNEARBYINT: return "fnearbyint";
5713 case ISD::FEXP: return "fexp";
5714 case ISD::FEXP2: return "fexp2";
5715 case ISD::FLOG: return "flog";
5716 case ISD::FLOG2: return "flog2";
5717 case ISD::FLOG10: return "flog10";
5720 case ISD::ADD: return "add";
5721 case ISD::SUB: return "sub";
5722 case ISD::MUL: return "mul";
5723 case ISD::MULHU: return "mulhu";
5724 case ISD::MULHS: return "mulhs";
5725 case ISD::SDIV: return "sdiv";
5726 case ISD::UDIV: return "udiv";
5727 case ISD::SREM: return "srem";
5728 case ISD::UREM: return "urem";
5729 case ISD::SMUL_LOHI: return "smul_lohi";
5730 case ISD::UMUL_LOHI: return "umul_lohi";
5731 case ISD::SDIVREM: return "sdivrem";
5732 case ISD::UDIVREM: return "udivrem";
5733 case ISD::AND: return "and";
5734 case ISD::OR: return "or";
5735 case ISD::XOR: return "xor";
5736 case ISD::SHL: return "shl";
5737 case ISD::SRA: return "sra";
5738 case ISD::SRL: return "srl";
5739 case ISD::ROTL: return "rotl";
5740 case ISD::ROTR: return "rotr";
5741 case ISD::FADD: return "fadd";
5742 case ISD::FSUB: return "fsub";
5743 case ISD::FMUL: return "fmul";
5744 case ISD::FDIV: return "fdiv";
5745 case ISD::FREM: return "frem";
5746 case ISD::FCOPYSIGN: return "fcopysign";
5747 case ISD::FGETSIGN: return "fgetsign";
5748 case ISD::FPOW: return "fpow";
5750 case ISD::FPOWI: return "fpowi";
5751 case ISD::SETCC: return "setcc";
5752 case ISD::VSETCC: return "vsetcc";
5753 case ISD::SELECT: return "select";
5754 case ISD::SELECT_CC: return "select_cc";
5755 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5756 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5757 case ISD::CONCAT_VECTORS: return "concat_vectors";
5758 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5759 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5760 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5761 case ISD::CARRY_FALSE: return "carry_false";
5762 case ISD::ADDC: return "addc";
5763 case ISD::ADDE: return "adde";
5764 case ISD::SADDO: return "saddo";
5765 case ISD::UADDO: return "uaddo";
5766 case ISD::SSUBO: return "ssubo";
5767 case ISD::USUBO: return "usubo";
5768 case ISD::SMULO: return "smulo";
5769 case ISD::UMULO: return "umulo";
5770 case ISD::SUBC: return "subc";
5771 case ISD::SUBE: return "sube";
5772 case ISD::SHL_PARTS: return "shl_parts";
5773 case ISD::SRA_PARTS: return "sra_parts";
5774 case ISD::SRL_PARTS: return "srl_parts";
5776 // Conversion operators.
5777 case ISD::SIGN_EXTEND: return "sign_extend";
5778 case ISD::ZERO_EXTEND: return "zero_extend";
5779 case ISD::ANY_EXTEND: return "any_extend";
5780 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5781 case ISD::TRUNCATE: return "truncate";
5782 case ISD::FP_ROUND: return "fp_round";
5783 case ISD::FLT_ROUNDS_: return "flt_rounds";
5784 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5785 case ISD::FP_EXTEND: return "fp_extend";
5787 case ISD::SINT_TO_FP: return "sint_to_fp";
5788 case ISD::UINT_TO_FP: return "uint_to_fp";
5789 case ISD::FP_TO_SINT: return "fp_to_sint";
5790 case ISD::FP_TO_UINT: return "fp_to_uint";
5791 case ISD::BITCAST: return "bit_convert";
5792 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5793 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5795 case ISD::CONVERT_RNDSAT: {
5796 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5797 default: llvm_unreachable("Unknown cvt code!");
5798 case ISD::CVT_FF: return "cvt_ff";
5799 case ISD::CVT_FS: return "cvt_fs";
5800 case ISD::CVT_FU: return "cvt_fu";
5801 case ISD::CVT_SF: return "cvt_sf";
5802 case ISD::CVT_UF: return "cvt_uf";
5803 case ISD::CVT_SS: return "cvt_ss";
5804 case ISD::CVT_SU: return "cvt_su";
5805 case ISD::CVT_US: return "cvt_us";
5806 case ISD::CVT_UU: return "cvt_uu";
5810 // Control flow instructions
5811 case ISD::BR: return "br";
5812 case ISD::BRIND: return "brind";
5813 case ISD::BR_JT: return "br_jt";
5814 case ISD::BRCOND: return "brcond";
5815 case ISD::BR_CC: return "br_cc";
5816 case ISD::CALLSEQ_START: return "callseq_start";
5817 case ISD::CALLSEQ_END: return "callseq_end";
5820 case ISD::LOAD: return "load";
5821 case ISD::STORE: return "store";
5822 case ISD::VAARG: return "vaarg";
5823 case ISD::VACOPY: return "vacopy";
5824 case ISD::VAEND: return "vaend";
5825 case ISD::VASTART: return "vastart";
5826 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5827 case ISD::EXTRACT_ELEMENT: return "extract_element";
5828 case ISD::BUILD_PAIR: return "build_pair";
5829 case ISD::STACKSAVE: return "stacksave";
5830 case ISD::STACKRESTORE: return "stackrestore";
5831 case ISD::TRAP: return "trap";
5834 case ISD::BSWAP: return "bswap";
5835 case ISD::CTPOP: return "ctpop";
5836 case ISD::CTTZ: return "cttz";
5837 case ISD::CTLZ: return "ctlz";
5840 case ISD::TRAMPOLINE: return "trampoline";
5843 switch (cast<CondCodeSDNode>(this)->get()) {
5844 default: llvm_unreachable("Unknown setcc condition!");
5845 case ISD::SETOEQ: return "setoeq";
5846 case ISD::SETOGT: return "setogt";
5847 case ISD::SETOGE: return "setoge";
5848 case ISD::SETOLT: return "setolt";
5849 case ISD::SETOLE: return "setole";
5850 case ISD::SETONE: return "setone";
5852 case ISD::SETO: return "seto";
5853 case ISD::SETUO: return "setuo";
5854 case ISD::SETUEQ: return "setue";
5855 case ISD::SETUGT: return "setugt";
5856 case ISD::SETUGE: return "setuge";
5857 case ISD::SETULT: return "setult";
5858 case ISD::SETULE: return "setule";
5859 case ISD::SETUNE: return "setune";
5861 case ISD::SETEQ: return "seteq";
5862 case ISD::SETGT: return "setgt";
5863 case ISD::SETGE: return "setge";
5864 case ISD::SETLT: return "setlt";
5865 case ISD::SETLE: return "setle";
5866 case ISD::SETNE: return "setne";
5871 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5880 return "<post-inc>";
5882 return "<post-dec>";
5886 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5887 std::string S = "< ";
5901 if (getByValAlign())
5902 S += "byval-align:" + utostr(getByValAlign()) + " ";
5904 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5906 S += "byval-size:" + utostr(getByValSize()) + " ";
5910 void SDNode::dump() const { dump(0); }
5911 void SDNode::dump(const SelectionDAG *G) const {
5916 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5917 OS << (void*)this << ": ";
5919 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5921 if (getValueType(i) == MVT::Other)
5924 OS << getValueType(i).getEVTString();
5926 OS << " = " << getOperationName(G);
5929 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5930 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5931 if (!MN->memoperands_empty()) {
5934 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5935 e = MN->memoperands_end(); i != e; ++i) {
5937 if (llvm::next(i) != e)
5942 } else if (const ShuffleVectorSDNode *SVN =
5943 dyn_cast<ShuffleVectorSDNode>(this)) {
5945 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5946 int Idx = SVN->getMaskElt(i);
5954 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5955 OS << '<' << CSDN->getAPIntValue() << '>';
5956 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5957 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5958 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5959 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5960 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5963 CSDN->getValueAPF().bitcastToAPInt().dump();
5966 } else if (const GlobalAddressSDNode *GADN =
5967 dyn_cast<GlobalAddressSDNode>(this)) {
5968 int64_t offset = GADN->getOffset();
5970 WriteAsOperand(OS, GADN->getGlobal());
5973 OS << " + " << offset;
5975 OS << " " << offset;
5976 if (unsigned int TF = GADN->getTargetFlags())
5977 OS << " [TF=" << TF << ']';
5978 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5979 OS << "<" << FIDN->getIndex() << ">";
5980 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5981 OS << "<" << JTDN->getIndex() << ">";
5982 if (unsigned int TF = JTDN->getTargetFlags())
5983 OS << " [TF=" << TF << ']';
5984 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5985 int offset = CP->getOffset();
5986 if (CP->isMachineConstantPoolEntry())
5987 OS << "<" << *CP->getMachineCPVal() << ">";
5989 OS << "<" << *CP->getConstVal() << ">";
5991 OS << " + " << offset;
5993 OS << " " << offset;
5994 if (unsigned int TF = CP->getTargetFlags())
5995 OS << " [TF=" << TF << ']';
5996 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5998 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6000 OS << LBB->getName() << " ";
6001 OS << (const void*)BBDN->getBasicBlock() << ">";
6002 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6003 if (G && R->getReg() &&
6004 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
6005 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
6007 OS << " %reg" << R->getReg();
6009 } else if (const ExternalSymbolSDNode *ES =
6010 dyn_cast<ExternalSymbolSDNode>(this)) {
6011 OS << "'" << ES->getSymbol() << "'";
6012 if (unsigned int TF = ES->getTargetFlags())
6013 OS << " [TF=" << TF << ']';
6014 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6016 OS << "<" << M->getValue() << ">";
6019 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6021 OS << "<" << MD->getMD() << ">";
6024 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6025 OS << ":" << N->getVT().getEVTString();
6027 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6028 OS << "<" << *LD->getMemOperand();
6031 switch (LD->getExtensionType()) {
6032 default: doExt = false; break;
6033 case ISD::EXTLOAD: OS << ", anyext"; break;
6034 case ISD::SEXTLOAD: OS << ", sext"; break;
6035 case ISD::ZEXTLOAD: OS << ", zext"; break;
6038 OS << " from " << LD->getMemoryVT().getEVTString();
6040 const char *AM = getIndexedModeName(LD->getAddressingMode());
6045 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6046 OS << "<" << *ST->getMemOperand();
6048 if (ST->isTruncatingStore())
6049 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6051 const char *AM = getIndexedModeName(ST->getAddressingMode());
6056 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6057 OS << "<" << *M->getMemOperand() << ">";
6058 } else if (const BlockAddressSDNode *BA =
6059 dyn_cast<BlockAddressSDNode>(this)) {
6061 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6063 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6065 if (unsigned int TF = BA->getTargetFlags())
6066 OS << " [TF=" << TF << ']';
6070 if (unsigned Order = G->GetOrdering(this))
6071 OS << " [ORD=" << Order << ']';
6073 if (getNodeId() != -1)
6074 OS << " [ID=" << getNodeId() << ']';
6076 DebugLoc dl = getDebugLoc();
6077 if (G && !dl.isUnknown()) {
6079 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6081 // Omit the directory, since it's usually long and uninteresting.
6083 OS << Scope.getFilename();
6086 OS << ':' << dl.getLine();
6087 if (dl.getCol() != 0)
6088 OS << ':' << dl.getCol();
6092 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6094 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6095 if (i) OS << ", "; else OS << " ";
6096 OS << (void*)getOperand(i).getNode();
6097 if (unsigned RN = getOperand(i).getResNo())
6100 print_details(OS, G);
6103 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6104 const SelectionDAG *G, unsigned depth,
6117 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6119 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6123 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6124 unsigned depth) const {
6125 printrWithDepthHelper(OS, this, G, depth, 0);
6128 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6129 // Don't print impossibly deep things.
6130 printrWithDepth(OS, G, 100);
6133 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6134 printrWithDepth(dbgs(), G, depth);
6137 void SDNode::dumprFull(const SelectionDAG *G) const {
6138 // Don't print impossibly deep things.
6139 dumprWithDepth(G, 100);
6142 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6143 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6144 if (N->getOperand(i).getNode()->hasOneUse())
6145 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6147 dbgs() << "\n" << std::string(indent+2, ' ')
6148 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6152 dbgs().indent(indent);
6156 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6157 assert(N->getNumValues() == 1 &&
6158 "Can't unroll a vector with multiple results!");
6160 EVT VT = N->getValueType(0);
6161 unsigned NE = VT.getVectorNumElements();
6162 EVT EltVT = VT.getVectorElementType();
6163 DebugLoc dl = N->getDebugLoc();
6165 SmallVector<SDValue, 8> Scalars;
6166 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6168 // If ResNE is 0, fully unroll the vector op.
6171 else if (NE > ResNE)
6175 for (i= 0; i != NE; ++i) {
6176 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6177 SDValue Operand = N->getOperand(j);
6178 EVT OperandVT = Operand.getValueType();
6179 if (OperandVT.isVector()) {
6180 // A vector operand; extract a single element.
6181 EVT OperandEltVT = OperandVT.getVectorElementType();
6182 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6185 getConstant(i, MVT::i32));
6187 // A scalar operand; just use it as is.
6188 Operands[j] = Operand;
6192 switch (N->getOpcode()) {
6194 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6195 &Operands[0], Operands.size()));
6202 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6203 getShiftAmountOperand(Operands[1])));
6205 case ISD::SIGN_EXTEND_INREG:
6206 case ISD::FP_ROUND_INREG: {
6207 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6208 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6210 getValueType(ExtVT)));
6215 for (; i < ResNE; ++i)
6216 Scalars.push_back(getUNDEF(EltVT));
6218 return getNode(ISD::BUILD_VECTOR, dl,
6219 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6220 &Scalars[0], Scalars.size());
6224 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6225 /// location that is 'Dist' units away from the location that the 'Base' load
6226 /// is loading from.
6227 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6228 unsigned Bytes, int Dist) const {
6229 if (LD->getChain() != Base->getChain())
6231 EVT VT = LD->getValueType(0);
6232 if (VT.getSizeInBits() / 8 != Bytes)
6235 SDValue Loc = LD->getOperand(1);
6236 SDValue BaseLoc = Base->getOperand(1);
6237 if (Loc.getOpcode() == ISD::FrameIndex) {
6238 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6240 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6241 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6242 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6243 int FS = MFI->getObjectSize(FI);
6244 int BFS = MFI->getObjectSize(BFI);
6245 if (FS != BFS || FS != (int)Bytes) return false;
6246 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6248 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6249 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6250 if (V && (V->getSExtValue() == Dist*Bytes))
6254 const GlobalValue *GV1 = NULL;
6255 const GlobalValue *GV2 = NULL;
6256 int64_t Offset1 = 0;
6257 int64_t Offset2 = 0;
6258 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6259 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6260 if (isGA1 && isGA2 && GV1 == GV2)
6261 return Offset1 == (Offset2 + Dist*Bytes);
6266 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6267 /// it cannot be inferred.
6268 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6269 // If this is a GlobalAddress + cst, return the alignment.
6270 const GlobalValue *GV;
6271 int64_t GVOffset = 0;
6272 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6273 // If GV has specified alignment, then use it. Otherwise, use the preferred
6275 unsigned Align = GV->getAlignment();
6277 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6278 if (GVar->hasInitializer()) {
6279 const TargetData *TD = TLI.getTargetData();
6280 Align = TD->getPreferredAlignment(GVar);
6284 return MinAlign(Align, GVOffset);
6287 // If this is a direct reference to a stack slot, use information about the
6288 // stack slot's alignment.
6289 int FrameIdx = 1 << 31;
6290 int64_t FrameOffset = 0;
6291 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6292 FrameIdx = FI->getIndex();
6293 } else if (Ptr.getOpcode() == ISD::ADD &&
6294 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6295 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6296 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6297 FrameOffset = Ptr.getConstantOperandVal(1);
6300 if (FrameIdx != (1 << 31)) {
6301 // FIXME: Handle FI+CST.
6302 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6303 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6311 void SelectionDAG::dump() const {
6312 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6314 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6316 const SDNode *N = I;
6317 if (!N->hasOneUse() && N != getRoot().getNode())
6318 DumpNodes(N, 2, this);
6321 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6326 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6328 print_details(OS, G);
6331 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6332 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6333 const SelectionDAG *G, VisitedSDNodeSet &once) {
6334 if (!once.insert(N)) // If we've been here before, return now.
6337 // Dump the current SDNode, but don't end the line yet.
6338 OS << std::string(indent, ' ');
6341 // Having printed this SDNode, walk the children:
6342 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6343 const SDNode *child = N->getOperand(i).getNode();
6348 if (child->getNumOperands() == 0) {
6349 // This child has no grandchildren; print it inline right here.
6350 child->printr(OS, G);
6352 } else { // Just the address. FIXME: also print the child's opcode.
6354 if (unsigned RN = N->getOperand(i).getResNo())
6361 // Dump children that have grandchildren on their own line(s).
6362 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6363 const SDNode *child = N->getOperand(i).getNode();
6364 DumpNodesr(OS, child, indent+2, G, once);
6368 void SDNode::dumpr() const {
6369 VisitedSDNodeSet once;
6370 DumpNodesr(dbgs(), this, 0, 0, once);
6373 void SDNode::dumpr(const SelectionDAG *G) const {
6374 VisitedSDNodeSet once;
6375 DumpNodesr(dbgs(), this, 0, G, once);
6379 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6380 unsigned GlobalAddressSDNode::getAddressSpace() const {
6381 return getGlobal()->getType()->getAddressSpace();
6385 const Type *ConstantPoolSDNode::getType() const {
6386 if (isMachineConstantPoolEntry())
6387 return Val.MachineCPVal->getType();
6388 return Val.ConstVal->getType();
6391 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6393 unsigned &SplatBitSize,
6395 unsigned MinSplatBits,
6397 EVT VT = getValueType(0);
6398 assert(VT.isVector() && "Expected a vector type");
6399 unsigned sz = VT.getSizeInBits();
6400 if (MinSplatBits > sz)
6403 SplatValue = APInt(sz, 0);
6404 SplatUndef = APInt(sz, 0);
6406 // Get the bits. Bits with undefined values (when the corresponding element
6407 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6408 // in SplatValue. If any of the values are not constant, give up and return
6410 unsigned int nOps = getNumOperands();
6411 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6412 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6414 for (unsigned j = 0; j < nOps; ++j) {
6415 unsigned i = isBigEndian ? nOps-1-j : j;
6416 SDValue OpVal = getOperand(i);
6417 unsigned BitPos = j * EltBitSize;
6419 if (OpVal.getOpcode() == ISD::UNDEF)
6420 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6421 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6422 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6423 zextOrTrunc(sz) << BitPos;
6424 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6425 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6430 // The build_vector is all constants or undefs. Find the smallest element
6431 // size that splats the vector.
6433 HasAnyUndefs = (SplatUndef != 0);
6436 unsigned HalfSize = sz / 2;
6437 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6438 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6439 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6440 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6442 // If the two halves do not match (ignoring undef bits), stop here.
6443 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6444 MinSplatBits > HalfSize)
6447 SplatValue = HighValue | LowValue;
6448 SplatUndef = HighUndef & LowUndef;
6457 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6458 // Find the first non-undef value in the shuffle mask.
6460 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6463 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6465 // Make sure all remaining elements are either undef or the same as the first
6467 for (int Idx = Mask[i]; i != e; ++i)
6468 if (Mask[i] >= 0 && Mask[i] != Idx)
6474 static void checkForCyclesHelper(const SDNode *N,
6475 SmallPtrSet<const SDNode*, 32> &Visited,
6476 SmallPtrSet<const SDNode*, 32> &Checked) {
6477 // If this node has already been checked, don't check it again.
6478 if (Checked.count(N))
6481 // If a node has already been visited on this depth-first walk, reject it as
6483 if (!Visited.insert(N)) {
6484 dbgs() << "Offending node:\n";
6486 errs() << "Detected cycle in SelectionDAG\n";
6490 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6491 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6498 void llvm::checkForCycles(const llvm::SDNode *N) {
6500 assert(N && "Checking nonexistant SDNode");
6501 SmallPtrSet<const SDNode*, 32> visited;
6502 SmallPtrSet<const SDNode*, 32> checked;
6503 checkForCyclesHelper(N, visited, checked);
6507 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6508 checkForCycles(DAG->getRoot().getNode());